xref: /linux/scripts/dtc/include-prefixes/arm64/marvell/armada-7020-comexpress.dtsi (revision 6589b3d76db2d6adbf8f2084c303fb24252a0dc6) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2023 Marvell Technology Group Ltd.
4 *
5 * Device Tree file for Marvell Armada 7020 Com Express CPU module board.
6 */
7
8#include "armada-7020.dtsi"
9
10/ {
11	model = "Marvell Armada-7020 COMEXPRESS board setup";
12	compatible = "marvell,armada7020-cpu-module", "marvell,armada7020",
13			"marvell,armada-ap806-dual", "marvell,armada-ap806";
14
15	memory@0 {
16		device_type = "memory";
17		reg = <0x0 0x0 0x2 0x00000000>;
18	};
19
20	chosen {
21		stdout-path = "serial0:115200n8";
22	};
23
24	aliases {
25		ethernet0 = &cp0_eth0;
26		ethernet1 = &cp0_eth1;
27	};
28};
29
30&ap_clk {
31	status = "okay";
32};
33
34&gic {
35	status = "okay";
36};
37
38&i2c0 {
39	status = "okay";
40	clock-frequency = <100000>;
41};
42
43&spi0 {
44	status = "okay";
45};
46
47&uart0 {
48	status = "okay";
49};
50
51&cp0_mdio {
52	status = "okay";
53
54	phy0: ethernet-phy@10 {
55		reg = <0x10>;
56	};
57};
58
59&cp0_ethernet {
60	status = "okay";
61};
62
63&cp0_eth0 {
64	status = "okay";
65	phy-mode = "10gbase-r";
66	managed = "in-band-status";
67	/* Generic PHY, providing serdes lanes */
68	phys = <&cp0_comphy4 0>;
69};
70
71&cp0_eth1 {
72	status = "okay";
73	phy = <&phy0>;
74	phy-mode = "rgmii-id";
75};
76
77&cp0_usb3_0 {
78	status = "okay";
79};
80
81&cp0_usb3_1 {
82	status = "okay";
83};
84
85&cp0_clk {
86	status = "okay";
87};
88
89&cp0_i2c0 {
90	status = "okay";
91	clock-frequency = <100000>;
92};
93
94&cp0_nand_controller {
95	status = "okay";
96
97	nand@0 {
98		reg = <0>;
99		label = "main-storage";
100		nand-rb = <0>;
101		nand-ecc-mode = "hw";
102		nand-on-flash-bbt;
103		nand-ecc-strength = <8>;
104		nand-ecc-step-size = <512>;
105
106		partitions {
107			compatible = "fixed-partitions";
108			#address-cells = <1>;
109			#size-cells = <1>;
110
111			partition@0 {
112				label = "U-Boot";
113				reg = <0 0x400000>;
114			};
115			partition@200000 {
116				label = "Linux";
117				reg = <0x400000 0x100000>;
118			};
119			partition@1000000 {
120				label = "Filesystem";
121				reg = <0x500000 0x1e00000>;
122			};
123		};
124	};
125};
126
127&cp0_pcie0 {
128	status = "okay";
129	num-lanes = <4>;
130	num-viewport = <8>;
131
132	ranges = <0x81000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x00010000
133		  0x82000000 0x0 0x00000000 0x0 0xc0000000 0x0 0x30000000>;
134
135	/* Generic PHY, providing serdes lanes */
136	phys = <&cp0_comphy0 0
137		&cp0_comphy1 0
138		&cp0_comphy2 0
139		&cp0_comphy3 0>;
140};
141
142&cp0_sata0 {
143	/* CPM Lane 0 - U29 */
144	status = "okay";
145
146	sata-port@1 {
147		status = "okay";
148		/* Generic PHY, providing serdes lanes */
149		phys = <&cp0_comphy5 1>;
150	};
151};
152
153&cp0_sdhci0 {
154	pinctrl-names = "default";
155	pinctrl-0 = <&sdhci_pins>;
156	status = "okay";
157	bus-width = <4>;
158	no-1-8-v;
159	broken-cd;
160};
161
162