xref: /linux/scripts/dtc/include-prefixes/arm64/freescale/imx95-libra-rdk-fpsc.dts (revision 115e74a29b530d121891238e9551c4bcdf7b04b5) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2025 PHYTEC Messtechnik GmbH
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/leds/leds-pca9532.h>
9#include <dt-bindings/pwm/pwm.h>
10
11#include "imx95-phycore-fpsc.dtsi"
12
13/ {
14	compatible = "phytec,imx95-libra-rdk-fpsc",
15		"phytec,imx95-phycore-fpsc", "fsl,imx95";
16	model = "PHYTEC Libra i.MX95 RDK FPSC";
17
18	aliases {
19		can1 = &flexcan2;
20		can2 = &flexcan1;
21		ethernet0 = &enetc_port0;
22		serial0 = &lpuart7;
23		serial1 = &lpuart8;
24	};
25
26	chosen {
27		stdout-path = &lpuart7;
28	};
29
30	backlight_lvds0: backlight0 {
31		compatible = "pwm-backlight";
32		pinctrl-0 = <&pinctrl_lvds0>;
33		power-supply = <&reg_vdd_12v0>;
34		status = "disabled";
35	};
36
37	transceiver1: can-phy {
38		compatible = "ti,tcan1043";
39		#phy-cells = <0>;
40		max-bitrate = <8000000>;
41		enable-gpios = <&gpio_expander 10 GPIO_ACTIVE_LOW>;
42	};
43
44	transceiver2: can-phy {
45		compatible = "ti,tcan1043";
46		#phy-cells = <0>;
47		max-bitrate = <8000000>;
48		enable-gpios = <&gpio_expander 9 GPIO_ACTIVE_LOW>;
49	};
50
51	panel0_lvds: panel-lvds0 {
52		backlight = <&backlight_lvds0>;
53		power-supply = <&reg_vdd_3v3>;
54		status = "disabled";
55	};
56
57	reg_vdd_12v0: regulator-vdd-12v0 {
58		compatible = "regulator-fixed";
59		regulator-always-on;
60		regulator-boot-on;
61		regulator-max-microvolt = <12000000>;
62		regulator-min-microvolt = <12000000>;
63		regulator-name = "VDD_12V0";
64	};
65
66	reg_vdd_1v8: regulator-vdd-1v8 {
67		compatible = "regulator-fixed";
68		regulator-always-on;
69		regulator-boot-on;
70		regulator-max-microvolt = <1800000>;
71		regulator-min-microvolt = <1800000>;
72		regulator-name = "VDD_1V8";
73	};
74
75	reg_vdd_3v3: regulator-vdd-3v3 {
76		compatible = "regulator-fixed";
77		regulator-always-on;
78		regulator-boot-on;
79		regulator-max-microvolt = <3300000>;
80		regulator-min-microvolt = <3300000>;
81		regulator-name = "VDD_3V3";
82	};
83
84	reg_vdd_5v0: regulator-vdd-5v0 {
85		compatible = "regulator-fixed";
86		regulator-always-on;
87		regulator-boot-on;
88		regulator-max-microvolt = <5000000>;
89		regulator-min-microvolt = <5000000>;
90		regulator-name = "VDD_5V0";
91	};
92};
93
94&enetc_port0 {
95	phy-handle = <&ethphy0>;
96	status = "okay";
97};
98
99&enetc_port2 {
100	managed = "in-band-status";
101	phy-handle = <&ethphy2>;
102	phy-mode = "10gbase-r";
103};
104
105/* CAN FD */
106&flexcan1 {
107	phys = <&transceiver1>;
108	status = "okay";
109};
110
111&flexcan2 {
112	phys = <&transceiver2>;
113	status = "okay";
114};
115
116/* SPI-NOR */
117&flexspi1 {
118	pinctrl-0 = <&pinctrl_flexspi>;
119	pinctrl-names = "default";
120	status = "okay";
121
122	spi_nor: flash@0 {
123		compatible = "jedec,spi-nor";
124		reg = <0>;
125		spi-max-frequency = <166000000>;
126		spi-rx-bus-width = <4>;
127		spi-tx-bus-width = <4>;
128		vcc-supply = <&reg_vdd_1v8>;
129	};
130};
131
132&gpio2 {
133	gpio-line-names = "", "", "", "", "",
134			  "", "", "", "", "",
135			  "", "", "", "", "",
136			  "", "RGMII2_nINT", "GPIO4", "RTC_INT", "",
137			  "LVDS1_BL_EN";
138};
139
140&lpi2c1 {
141	temperature-sensor@4f {
142		compatible = "nxp,p3t1755";
143		reg = <0x4f>;
144		vs-supply = <&reg_vdd_1v8>;
145	};
146};
147
148&lpi2c3 {
149	status = "okay";
150
151	leds@62 {
152		compatible = "nxp,pca9533";
153		reg = <0x62>;
154
155		led-1 {
156			type = <PCA9532_TYPE_LED>;
157		};
158
159		led-2 {
160			type = <PCA9532_TYPE_LED>;
161		};
162
163		led-3 {
164			type = <PCA9532_TYPE_LED>;
165		};
166	};
167};
168
169&lpi2c4 {
170	status = "okay";
171
172	gpio_expander: gpio@20 {
173		compatible = "ti,tca6416";
174		reg = <0x20>;
175		interrupt-parent = <&gpio2>;
176		interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
177		#gpio-cells = <2>;
178		gpio-controller;
179		gpio-line-names = "CSI1_CTRL1", "CSI1_CTRL2", "CSI1_CTRL3",
180				  "CSI1_CTRL4", "CSI2_CTRL1", "CSI2_CTRL2",
181				  "CSI2_CTRL3", "CSI2_CTRL4", "CLK_EN_AV",
182				  "nCAN2_EN", "nCAN1_EN", "PCIE1_nWAKE",
183				  "PCIE2_nWAKE", "PCIE2_nALERT_3V3",
184				  "UART1_BT_RS_SEL", "UART1_RS232_485_SEL";
185		vcc-supply = <&reg_vdd_1v8>;
186
187		uart1_bt_rs_sel: bt-rs-hog {
188			gpios = <14 GPIO_ACTIVE_HIGH>;
189			gpio-hog;
190			line-name = "UART1_BT_RS_SEL";
191			output-low;
192		};
193	};
194};
195
196&lpi2c5 {
197	status = "okay";
198
199	eeprom@51 {
200		compatible = "atmel,24c02";
201		reg = <0x51>;
202		pagesize = <16>;
203		vcc-supply = <&reg_vdd_1v8>;
204	};
205};
206
207/* Used for M33 debug */
208&lpuart2 {
209	pinctrl-0 = <&pinctrl_lpuart2>;
210	pinctrl-names = "default";
211};
212
213/* A-55 debug UART */
214&lpuart7 {
215	status = "okay";
216};
217
218/* RS232/RS485/BT */
219&lpuart8 {
220	uart-has-rtscts;
221	status = "okay";
222};
223
224&netc_emdio { /* RGMII2 */
225	ethphy0: ethernet-phy@1 {
226		compatible = "ethernet-phy-ieee802.3-c22";
227		reg = <0x1>;
228		interrupt-parent = <&gpio2>;
229		interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
230		enet-phy-lane-no-swap;
231		ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
232		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
233		ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
234		ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
235	};
236
237	ethphy2: ethernet-phy@8 {
238		compatible = "ethernet-phy-ieee802.3-c45";
239		reg = <0x8>;
240		max-speed = <10000>; /* 10Gbit/s */
241		status = "disabled";
242	};
243};
244
245&pcie0 {
246	reset-gpio = <&gpio1 10 GPIO_ACTIVE_LOW>;
247	vpcie-supply = <&reg_vdd_3v3>;
248	status = "okay";
249};
250
251&pcie1 {
252	reset-gpio = <&gpio1 14 GPIO_ACTIVE_LOW>;
253	vpcie-supply = <&reg_vdd_3v3>;
254	status = "okay";
255};
256
257&rv3028 {
258	pinctrl-names = "default";
259	pinctrl-0 = <&pinctrl_rtc>;
260	interrupt-parent = <&gpio2>;
261	interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
262	aux-voltage-chargeable = <1>;
263	wakeup-source;
264	trickle-resistor-ohms = <3000>;
265};
266
267&scmi_iomuxc {
268	pinctrl_lpuart2: lpuart2grp { /* FPSC proprietary */
269		fsl,pins = <
270			IMX95_PAD_UART2_TXD__AONMIX_TOP_LPUART2_TX	0x31e
271			IMX95_PAD_UART2_RXD__AONMIX_TOP_LPUART2_RX	0x31e
272		>;
273	};
274
275	pinctrl_lvds0: lvds0grp {
276		fsl,pins = <
277			IMX95_PAD_GPIO_IO20__GPIO2_IO_BIT20	0x31e
278		>;
279	};
280
281	pinctrl_rtc: rtcgrp {
282		fsl,pins = <
283			IMX95_PAD_GPIO_IO18__GPIO2_IO_BIT18	0x31e
284		>;
285	};
286
287	pinctrl_tpm4: tpm4grp {
288		fsl,pins = <
289			IMX95_PAD_GPIO_IO21__TPM4_CH1	0x51e
290		>;
291	};
292};
293
294&tpm4 {
295	pinctrl-0 = <&pinctrl_tpm4>;
296	pinctrl-names = "default";
297};
298
299&usb3 {
300	fsl,over-current-active-low;
301	fsl,power-active-low;
302	status = "okay";
303};
304
305&usb3_dwc3 {
306	dr_mode = "peripheral";
307	status = "okay";
308};
309
310&usb3_phy {
311	vbus-supply = <&reg_vdd_5v0>;
312	status = "okay";
313};
314
315/* uSD Card */
316&usdhc2 {
317	status = "okay";
318};
319