1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright 2025 NXP 4 */ 5 6/dts-v1/; 7 8#include "imx95-19x19-evk.dts" 9 10/ { 11 sof_cpu: cm7-cpu@80000000 { 12 compatible = "fsl,imx95-cm7-sof"; 13 reg = <0x0 0x80000000 0x0 0x6100000>; 14 reg-names = "sram"; 15 memory-region = <&adma_res>; 16 memory-region-names = "dma"; 17 mboxes = <&mu7 2 0>, <&mu7 2 1>, <&mu7 3 0>, <&mu7 3 1>; 18 mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1"; 19 20 sai3_cpu: port { 21 sai3_cpu_ep: endpoint { 22 remote-endpoint = <&wm8962_ep>; 23 }; 24 }; 25 }; 26 27 reserved-memory { 28 adma_res: memory@86100000 { 29 compatible = "shared-dma-pool"; 30 reg = <0x0 0x86100000 0x0 0x100000>; 31 no-map; 32 }; 33 }; 34 35 sof-sound { 36 compatible = "audio-graph-card2"; 37 links = <&sai3_cpu>; 38 label = "audio"; 39 hp-det-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>; 40 pinctrl-names = "default"; 41 pinctrl-0 = <&pinctrl_hp>; 42 widgets = "Headphone", "Headphones", 43 "Microphone", "Headset Mic"; 44 routing = "Headphones", "HPOUTL", 45 "Headphones", "HPOUTR", 46 "Headset Mic", "MICBIAS", 47 "IN3R", "Headset Mic", 48 "IN1R", "Headset Mic"; 49 }; 50 51 sound-wm8962 { 52 status = "disabled"; 53 }; 54 55}; 56 57&edma2 { 58 /* 59 * channels 0 and 1 reserved for V2X fast hash, 60 * channels 30 and 31 reserved for FW usage 61 */ 62 dma-channel-mask = <0xc0000003>, <0x0>; 63}; 64 65&sai3 { 66 status = "disabled"; 67}; 68 69&wm8962 { 70 assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>, 71 <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>, 72 <&scmi_clk IMX95_CLK_AUDIOPLL1>, 73 <&scmi_clk IMX95_CLK_AUDIOPLL2>, 74 <&scmi_clk IMX95_CLK_SAI3>; 75 assigned-clock-parents = <0>, <0>, <0>, <0>, <&scmi_clk IMX95_CLK_AUDIOPLL1>; 76 assigned-clock-rates = <3932160000>, <3612672000>, 77 <393216000>, <361267200>, 78 <12288000>; 79 80 port { 81 wm8962_ep: endpoint { 82 bitclock-master; 83 frame-master; 84 remote-endpoint = <&sai3_cpu_ep>; 85 }; 86 }; 87}; 88