1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2/* 3 * Copyright (C) 2025 PHYTEC Messtechnik GmbH 4 */ 5 6#include <dt-bindings/clock/imx8mp-clock.h> 7#include <dt-bindings/gpio/gpio.h> 8#include "imx8mp-pinfunc.h" 9 10&{/} { 11 backlight_lvds0: backlight0 { 12 compatible = "pwm-backlight"; 13 pinctrl-0 = <&pinctrl_lvds0>; 14 pinctrl-names = "default"; 15 power-supply = <®_vcc_12v>; 16 status = "disabled"; 17 }; 18 19 panel_lvds0: panel-lvds0 { 20 backlight = <&backlight_lvds0>; 21 power-supply = <®_vcc_3v3_sw>; 22 status = "disabled"; 23 24 port { 25 panel0_in: endpoint { 26 remote-endpoint = <&ldb_lvds_ch0>; 27 }; 28 }; 29 }; 30 31 reg_vcc_12v: regulator-12v { 32 compatible = "regulator-fixed"; 33 regulator-always-on; 34 regulator-boot-on; 35 regulator-max-microvolt = <12000000>; 36 regulator-min-microvolt = <12000000>; 37 regulator-name = "VCC_12V"; 38 }; 39 40 reg_vcc_1v8_audio: regulator-1v8 { 41 compatible = "regulator-fixed"; 42 regulator-always-on; 43 regulator-boot-on; 44 regulator-max-microvolt = <1800000>; 45 regulator-min-microvolt = <1800000>; 46 regulator-name = "VCC_1V8_Audio"; 47 }; 48 49 reg_vcc_3v3_analog: regulator-3v3 { 50 compatible = "regulator-fixed"; 51 regulator-always-on; 52 regulator-boot-on; 53 regulator-max-microvolt = <3300000>; 54 regulator-min-microvolt = <3300000>; 55 regulator-name = "VCC_3V3_Analog"; 56 }; 57 58 sound { 59 compatible = "simple-audio-card"; 60 simple-audio-card,name = "snd-peb-av-10"; 61 simple-audio-card,format = "i2s"; 62 simple-audio-card,bitclock-master = <&dailink_master>; 63 simple-audio-card,frame-master = <&dailink_master>; 64 simple-audio-card,mclk-fs = <32>; 65 simple-audio-card,widgets = 66 "Line", "Line In", 67 "Speaker", "Speaker", 68 "Microphone", "Microphone Jack", 69 "Headphone", "Headphone Jack"; 70 simple-audio-card,routing = 71 "Speaker", "SPOP", 72 "Speaker", "SPOM", 73 "Headphone Jack", "HPLOUT", 74 "Headphone Jack", "HPROUT", 75 "LINE1L", "Line In", 76 "LINE1R", "Line In", 77 "MIC3R", "Microphone Jack", 78 "Microphone Jack", "Mic Bias"; 79 80 simple-audio-card,cpu { 81 sound-dai = <&sai2>; 82 }; 83 84 dailink_master: simple-audio-card,codec { 85 sound-dai = <&codec>; 86 clocks = <&clk IMX8MP_CLK_SAI2>; 87 }; 88 }; 89}; 90 91&i2c4 { 92 clock-frequency = <400000>; 93 pinctrl-0 = <&pinctrl_i2c4>; 94 pinctrl-1 = <&pinctrl_i2c4_gpio>; 95 pinctrl-names = "default", "gpio"; 96 scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 97 sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 98 #address-cells = <1>; 99 #size-cells = <0>; 100 status = "okay"; 101 102 codec: codec@18 { 103 compatible = "ti,tlv320aic3007"; 104 reg = <0x18>; 105 pinctrl-0 = <&pinctrl_tlv320>; 106 pinctrl-names = "default"; 107 #sound-dai-cells = <0>; 108 reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; 109 ai3x-gpio-func = <0xd 0x0>; 110 ai3x-micbias-vg = <2>; 111 AVDD-supply = <®_vcc_3v3_analog>; 112 DRVDD-supply = <®_vcc_3v3_analog>; 113 DVDD-supply = <®_vcc_1v8_audio>; 114 IOVDD-supply = <®_vcc_3v3_sw>; 115 }; 116 117 eeprom@57 { 118 compatible = "atmel,24c32"; 119 reg = <0x57>; 120 pagesize = <32>; 121 vcc-supply = <®_vcc_3v3_sw>; 122 }; 123}; 124 125&ldb_lvds_ch0 { 126 remote-endpoint = <&panel0_in>; 127}; 128 129&pwm4 { 130 pinctrl-0 = <&pinctrl_pwm4>; 131 pinctrl-names = "default"; 132}; 133 134&sai2 { 135 pinctrl-0 = <&pinctrl_sai2>; 136 pinctrl-names = "default"; 137 assigned-clocks = <&clk IMX8MP_CLK_SAI2>; 138 assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>; 139 assigned-clock-rates = <12288000>; 140 clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI2_IPG>, 141 <&clk IMX8MP_CLK_DUMMY>, 142 <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI2_MCLK1>, 143 <&clk IMX8MP_CLK_DUMMY>, 144 <&clk IMX8MP_CLK_DUMMY>, 145 <&clk IMX8MP_AUDIO_PLL1_OUT>, 146 <&clk IMX8MP_AUDIO_PLL2_OUT>; 147 clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", 148 "pll11k"; 149 #sound-dai-cells = <0>; 150 fsl,sai-mclk-direction-output; 151 fsl,sai-synchronous-rx; 152 status = "okay"; 153}; 154 155&iomuxc { 156 pinctrl_i2c4: i2c4grp { 157 fsl,pins = < 158 MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c2 159 MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c2 160 >; 161 }; 162 163 pinctrl_i2c4_gpio: i2c4gpiogrp { 164 fsl,pins = < 165 MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20 0x1e2 166 MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21 0x1e2 167 >; 168 }; 169 170 pinctrl_lvds0: lvds0grp { 171 fsl,pins = < 172 MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01 0x12 173 >; 174 }; 175 176 pinctrl_pwm4: pwm4grp { 177 fsl,pins = < 178 MX8MP_IOMUXC_SAI3_MCLK__PWM4_OUT 0x12 179 >; 180 }; 181 182 pinctrl_sai2: sai2grp { 183 fsl,pins = < 184 MX8MP_IOMUXC_SAI2_MCLK__AUDIOMIX_SAI2_MCLK 0xd6 185 MX8MP_IOMUXC_SAI2_RXFS__AUDIOMIX_SAI2_RX_SYNC 0xd6 186 MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK 0xd6 187 MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00 0xd6 188 MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI2_RX_DATA00 0xd6 189 >; 190 }; 191 192 pinctrl_tlv320: tlv320grp { 193 fsl,pins = < 194 MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x16 195 MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x16 196 >; 197 }; 198}; 199