xref: /linux/scripts/dtc/include-prefixes/arm64/freescale/imx8mp-edm-g-wb.dts (revision 0f048c878ee32a4259dbf28e0ad8fd0b71ee0085) 
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright 2024 TechNexion Ltd.
4 *
5 * Author: Ray Chang <ray.chang@technexion.com>
6 */
7
8/dts-v1/;
9
10#include <dt-bindings/phy/phy-imx8-pcie.h>
11#include "imx8mp-edm-g.dtsi"
12
13/ {
14	compatible = "technexion,edm-g-imx8mp-wb", "technexion,edm-g-imx8mp", "fsl,imx8mp";
15	model = "TechNexion EDM-G-IMX8MP SOM on WB-EDM-G";
16
17	connector {
18		compatible = "usb-c-connector";
19		data-role = "dual";
20		label = "USB-C";
21
22		ports {
23			#address-cells = <1>;
24			#size-cells = <0>;
25
26			port@0 {
27				reg = <0>;
28
29				hs_ep: endpoint {
30					remote-endpoint = <&usb3_hs_ep>;
31				};
32			};
33
34			port@1 {
35				reg = <1>;
36
37				ss_ep: endpoint {
38					remote-endpoint = <&hd3ss3220_in_ep>;
39				};
40			};
41		};
42	};
43
44	hdmi-connector {
45		compatible = "hdmi-connector";
46		label = "HDMI OUT";
47		type = "a";
48
49		port {
50			hdmi_in: endpoint {
51				remote-endpoint = <&hdmi_tx_out>;
52			};
53		};
54	};
55
56	leds {
57		compatible = "gpio-leds";
58
59		led {
60			default-state = "on";
61			gpios = <&expander2 1 GPIO_ACTIVE_HIGH>;
62			label = "gpio-led";
63		};
64	};
65
66	pcie0_refclk: clock-pcie-ref {
67		compatible = "fixed-clock";
68		#clock-cells = <0>;
69		clock-frequency = <100000000>;
70	};
71
72	reg_pwr_3v3: regulator-pwr-3v3 {
73		compatible = "regulator-fixed";
74		regulator-always-on;
75		regulator-boot-on;
76		regulator-max-microvolt = <3300000>;
77		regulator-min-microvolt = <3300000>;
78		regulator-name = "pwr-3v3";
79	};
80
81	reg_pwr_5v: regulator-pwr-5v {
82		compatible = "regulator-fixed";
83		regulator-always-on;
84		regulator-boot-on;
85		regulator-max-microvolt = <5000000>;
86		regulator-min-microvolt = <5000000>;
87		regulator-name = "pwr-5v";
88	};
89
90	sound-hdmi {
91		compatible = "fsl,imx-audio-hdmi";
92		audio-cpu = <&aud2htx>;
93		hdmi-out;
94		model = "audio-hdmi";
95	};
96
97	sound-wm8960 {
98		compatible = "fsl,imx-audio-wm8960";
99		audio-asrc = <&easrc>;
100		audio-codec = <&wm8960>;
101		audio-cpu = <&sai3>;
102		audio-routing = "Headphone Jack", "HP_L",
103			"Headphone Jack", "HP_R",
104			"Ext Spk", "SPK_LP",
105			"Ext Spk", "SPK_LN",
106			"Ext Spk", "SPK_RP",
107			"Ext Spk", "SPK_RN",
108			"LINPUT1", "Mic Jack",
109			"LINPUT1", "Mic Jack",
110			"Mic Jack", "MICB";
111		model = "wm8960-audio";
112	};
113};
114
115&aud2htx {
116	status = "okay";
117};
118
119&easrc {
120	fsl,asrc-rate  = <48000>;
121	status = "okay";
122};
123
124&flexcan1 {
125	status = "okay";
126};
127
128&gpio1 {
129	gpio-line-names =
130		"", "", "", "", "", "", "DSI_RST", "",
131		"", "", "", "", "", "PCIE_CLKREQ_N", "", "",
132		"", "", "", "", "", "", "", "",
133		"", "", "", "", "", "", "", "";
134	pinctrl-0 = <&pinctrl_gpio1>;
135};
136
137&gpio4 {
138	gpio-line-names =
139		"", "", "", "", "", "", "GPIO_P249", "GPIO_P251",
140		"", "GPIO_P255", "", "", "", "", "", "",
141		"DSI_BL_EN", "DSI_VDDEN", "", "", "", "", "", "",
142		"", "", "", "", "", "", "", "";
143	pinctrl-0 = <&pinctrl_gpio4>;
144};
145
146&hdmi_pvi {
147	status = "okay";
148};
149
150&hdmi_tx {
151	pinctrl-0 = <&pinctrl_hdmi>;
152	pinctrl-names = "default";
153	status = "okay";
154
155	ports {
156		port@1 {
157			hdmi_tx_out: endpoint {
158				remote-endpoint = <&hdmi_in>;
159			};
160		};
161	};
162};
163
164&hdmi_tx_phy {
165	status = "okay";
166};
167
168&i2c2 {
169	status = "okay";
170
171	wm8960: audio-codec@1a {
172		compatible = "wlf,wm8960";
173		reg = <0x1a>;
174		clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_SAI3_MCLK1>;
175		clock-names = "mclk";
176		#sound-dai-cells = <0>;
177		AVDD-supply = <&reg_pwr_3v3>;
178		DBVDD-supply = <&reg_pwr_3v3>;
179		DCVDD-supply = <&reg_pwr_3v3>;
180		SPKVDD1-supply = <&reg_pwr_5v>;
181		SPKVDD2-supply = <&reg_pwr_5v>;
182		wlf,gpio-cfg = <1 2>;
183		wlf,hp-cfg = <2 2 3>;
184		wlf,shared-lrclk;
185	};
186
187	expander1: gpio@21 {
188		compatible = "nxp,pca9555";
189		reg = <0x21>;
190		#gpio-cells = <2>;
191		gpio-controller;
192		gpio-line-names = "EXPOSURE_TRIG_IN1", "FLASH_OUT1",
193				  "INFO_TRIG_IN1", "CAM_SHUTTER1", "XVS1",
194				  "PWR1_TIME0", "PWR1_TIME1", "PWR1_TIME2",
195				  "EXPOSURE_TRIG_IN2", "FLASH_OUT2",
196				  "INFO_TRIG_IN2", "CAM_SHUTTER2", "XVS2",
197				  "PWR2_TIME0", "PWR2_TIME1", "PWR2_TIME2";
198	};
199
200	expander2: gpio@23 {
201		compatible = "nxp,pca9555";
202		reg = <0x23>;
203		#interrupt-cells = <2>;
204		interrupt-controller;
205		interrupt-parent = <&gpio4>;
206		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
207		#gpio-cells = <2>;
208		gpio-controller;
209		gpio-line-names = "M2_DISABLE_N", "LED_EN", "", "",
210				  "", "", "", "USB_OTG_OC",
211				  "EXT_GPIO8", "EXT_GPIO9", "", "",
212				  "", "CSI1_PDB", "CSI2_PDB", "PD_FAULT";
213		pinctrl-0 = <&pinctrl_expander2_irq>;
214		pinctrl-names = "default";
215	};
216
217	usb_typec: usb-typec@67 {
218		compatible = "ti,hd3ss3220";
219		reg = <0x67>;
220		interrupt-parent = <&gpio4>;
221		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
222		pinctrl-0 = <&pinctrl_hd3ss3220_irq>;
223		pinctrl-names = "default";
224
225		ports {
226			#address-cells = <1>;
227			#size-cells = <0>;
228
229			port@0 {
230				reg = <0>;
231
232				hd3ss3220_in_ep: endpoint {
233					remote-endpoint = <&ss_ep>;
234				};
235			};
236
237			port@1 {
238				reg = <1>;
239
240				hd3ss3220_out_ep: endpoint {
241					remote-endpoint = <&usb3_role_switch>;
242				};
243			};
244		};
245	};
246};
247
248&i2c_0 {
249	eeprom2: eeprom@51 {
250		compatible = "atmel,24c02";
251		reg = <0x51>;
252		pagesize = <16>;
253	};
254};
255
256&lcdif3 {
257	status = "okay";
258};
259
260&pcie {
261	status = "okay";
262};
263
264&pcie_phy {
265	clocks = <&pcie0_refclk>;
266	clock-names = "ref";
267	fsl,clkreq-unsupported;
268	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
269	status = "okay";
270};
271
272&usb3_0 {
273	status = "okay";
274};
275
276&usb3_1 {
277	status = "okay";
278};
279
280&usb3_phy0 {
281	status = "okay";
282};
283
284&usb3_phy1 {
285	status = "okay";
286};
287
288&usb_dwc3_0 {
289	/* dual role is implemented but not a full featured OTG */
290	adp-disable;
291	dr_mode = "otg";
292	hnp-disable;
293	role-switch-default-mode = "peripheral";
294	srp-disable;
295	usb-role-switch;
296
297	ports {
298		#address-cells = <1>;
299		#size-cells = <0>;
300
301		port@0 {
302			reg = <0>;
303
304			usb3_hs_ep: endpoint {
305				remote-endpoint = <&hs_ep>;
306			};
307		};
308
309		port@1 {
310			reg = <1>;
311
312			usb3_role_switch: endpoint {
313				remote-endpoint = <&hd3ss3220_out_ep>;
314			};
315		};
316	};
317};
318
319&usb_dwc3_1 {
320	dr_mode = "host";
321};
322
323&iomuxc {
324	pinctrl_expander2_irq: expander2-irqgrp {
325		fsl,pins = <
326			MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11		0x140 /* GPIO_P247 */
327		>;
328	};
329
330	pinctrl_gpio1: gpio1grp {
331		fsl,pins = <
332			MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06		0x16 /* DSI_RST */
333		>;
334	};
335
336	pinctrl_gpio4: gpio4grp {
337		fsl,pins = <
338			MX8MP_IOMUXC_SAI1_RXD4__GPIO4_IO06		0x16 /* GPIO_P249 */
339			MX8MP_IOMUXC_SAI1_RXD5__GPIO4_IO07		0x16 /* GPIO_P251 */
340			MX8MP_IOMUXC_SAI1_RXD7__GPIO4_IO09		0x16 /* GPIO_P255 */
341			MX8MP_IOMUXC_SAI1_TXD4__GPIO4_IO16		0x16 /* DSI_BL_EN */
342			MX8MP_IOMUXC_SAI1_TXD5__GPIO4_IO17		0x16 /* DSI_VDDEN */
343		>;
344	};
345
346	pinctrl_hd3ss3220_irq: hd3ss3220-irqgrp {
347		fsl,pins = <
348			MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08		0x41 /* GPIO_P253 */
349		>;
350	};
351
352	pinctrl_hdmi: hdmigrp {
353		fsl,pins = <
354			MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL	0x1c2
355			MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA	0x1c2
356			MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC		0x10
357		>;
358	};
359};
360