1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright 2020-2024 Fedor Ross <fedor.ross@ifm.com> 4 */ 5 6/dts-v1/; 7 8#include "imx8mn-vhip4-evalboard-common.dtsi" 9 10/ { 11 model = "ifm i.MX8MNano VHIP4 Evaluation Board v1"; 12 compatible = "ifm,imx8mn-vhip4-evalboard-v1", "ifm,imx8mn-vhip4-evalboard", 13 "ifm,imx8mn-vhip4", "fsl,imx8mn"; 14}; 15 16&ifm_led { 17 pinctrl-1 = <&pinctrl_gpio_led_v1>; 18 19 led-2 { 20 function = LED_FUNCTION_STATUS; 21 function-enumerator = <3>; 22 color = <LED_COLOR_ID_YELLOW>; 23 gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>; 24 default-state = "keep"; 25 }; 26 27 led-3 { 28 function = LED_FUNCTION_STATUS; 29 function-enumerator = <4>; 30 color = <LED_COLOR_ID_GREEN>; 31 gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>; 32 default-state = "keep"; 33 }; 34}; 35 36&ecspi1 { 37 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>, <&gpio5 21 GPIO_ACTIVE_LOW>; 38 status = "okay"; 39 40 eeprom@0 { 41 compatible = "anvo,anv32c81w", "atmel,at25"; 42 reg = <0>; 43 spi-max-frequency = <20000000>; 44 spi-cpha; 45 spi-cpol; 46 pagesize = <1>; 47 size = <32768>; 48 address-width = <16>; 49 }; 50}; 51 52&ecspi3 { 53 cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>, <&gpio5 4 GPIO_ACTIVE_LOW>; 54 status = "okay"; 55 56 can0: can@0 { 57 compatible = "microchip,mcp25625"; 58 pinctrl-names = "default"; 59 pinctrl-0 = <&pinctrl_mcp25625>; 60 reg = <0>; 61 clocks = <&can_clk20m>; 62 interrupt-parent = <&gpio4>; 63 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 64 gpio-controller; 65 #gpio-cells = <2>; 66 }; 67 68 can1: can@1 { 69 compatible = "microchip,mcp2518fd"; 70 pinctrl-names = "default"; 71 pinctrl-0 = <&pinctrl_mcp2518>; 72 reg = <1>; 73 clocks = <&can_clk40m>; 74 interrupt-parent = <&gpio5>; 75 interrupts = <2 IRQ_TYPE_LEVEL_LOW>; 76 microchip,rx-int-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; 77 spi-max-frequency = <20000000>; 78 }; 79}; 80 81&i2c1 { 82 scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 83 sda-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; 84 status = "okay"; 85 86 temperature-sensor@48 { 87 compatible = "national,lm75"; 88 reg = <0x48>; 89 }; 90 91 eeprom@50 { 92 compatible = "atmel,24c128"; 93 reg = <0x50>; 94 }; 95}; 96 97&i2c2 { 98 clock-frequency = <100000>; 99 pinctrl-names = "default", "gpio"; 100 pinctrl-0 = <&pinctrl_i2c2>; 101 pinctrl-1 = <&pinctrl_i2c2_gpio>; 102 scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 103 sda-gpios = <&gpio5 17 GPIO_ACTIVE_HIGH>; 104 status = "okay"; 105}; 106 107&i2c3 { 108 scl-gpios = <&gpio2 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 109 sda-gpios = <&gpio2 11 GPIO_ACTIVE_HIGH>; 110 status = "okay"; 111}; 112 113&ifm_pmic { 114 interrupt-parent = <&gpio2>; 115 interrupts = <0 GPIO_ACTIVE_LOW>; 116}; 117 118&iomuxc { 119 pinctrl_ecspi1_cs: ecspi1-cs-grp { 120 fsl,pins = < 121 /* KS8794 nCS */ 122 MX8MN_IOMUXC_I2C4_SDA_GPIO5_IO21 0x150 123 /* ANV32C81 nCS */ 124 MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x150 125 >; 126 }; 127 128 pinctrl_ecspi3_cs: ecspi3-cs-grp { 129 fsl,pins = < 130 /* MCP25625 nCS */ 131 MX8MN_IOMUXC_UART2_TXD_GPIO5_IO25 0x150 132 /* MCP2518FD nCS */ 133 MX8MN_IOMUXC_SPDIF_RX_GPIO5_IO4 0x150 134 >; 135 }; 136 137 pinctrl_gpio_5: gpio5-grp { 138 fsl,pins = < 139 /* CFG_EEPROM_WP */ 140 MX8MN_IOMUXC_I2C4_SCL_GPIO5_IO20 0x140 141 >; 142 }; 143 144 pinctrl_gpio_led_v1: gpioled-v1-grp { 145 fsl,pins = < 146 MX8MN_IOMUXC_SD2_DATA2_GPIO2_IO17 0x116 147 MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x116 148 >; 149 }; 150 151 pinctrl_i2c1: i2c1-grp { 152 fsl,pins = < 153 MX8MN_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000056 154 MX8MN_IOMUXC_I2C1_SDA_I2C1_SDA 0x400000d6 155 >; 156 }; 157 158 pinctrl_i2c1_gpio: i2c1-gpio-grp { 159 fsl,pins = < 160 MX8MN_IOMUXC_I2C1_SCL_GPIO5_IO14 0x56 161 MX8MN_IOMUXC_I2C1_SDA_GPIO5_IO15 0xd6 162 >; 163 }; 164 165 pinctrl_i2c2: i2c2-grp { 166 fsl,pins = < 167 MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000056 168 MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400000d6 169 >; 170 }; 171 172 pinctrl_i2c2_gpio: i2c2-gpio-grp { 173 fsl,pins = < 174 MX8MN_IOMUXC_I2C2_SCL_GPIO5_IO16 0x56 175 MX8MN_IOMUXC_I2C2_SDA_GPIO5_IO17 0xd6 176 >; 177 }; 178 179 pinctrl_i2c3: i2c3-grp { 180 fsl,pins = < 181 MX8MN_IOMUXC_SD1_RESET_B_I2C3_SCL 0x40000056 182 MX8MN_IOMUXC_SD1_STROBE_I2C3_SDA 0x400000d6 183 >; 184 }; 185 186 pinctrl_i2c3_gpio: i2c3-gpio-grp { 187 fsl,pins = < 188 MX8MN_IOMUXC_SD1_RESET_B_GPIO2_IO10 0x56 189 MX8MN_IOMUXC_SD1_STROBE_GPIO2_IO11 0xd6 190 >; 191 }; 192 193 pinctrl_mcp2518: mcp2518-grp { 194 fsl,pins = < 195 /* MCP2518 nINT line */ 196 MX8MN_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x116 197 /* MCP2518 nINT1/GPIO1 line */ 198 MX8MN_IOMUXC_SAI3_TXD_GPIO5_IO1 0x116 199 >; 200 }; 201 202 pinctrl_mcp25625: mcp25625-grp { 203 fsl,pins = < 204 /* MCP25625 nINT line */ 205 MX8MN_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x156 206 >; 207 }; 208 209 pinctrl_pmic: pmic-irq-grp { 210 fsl,pins = < 211 MX8MN_IOMUXC_SD1_CLK_GPIO2_IO0 0x16 212 >; 213 }; 214 215 pinctrl_uart3: uart3-grp { 216 fsl,pins = < 217 MX8MN_IOMUXC_UART3_RXD_UART3_DCE_RX 0x142 218 MX8MN_IOMUXC_UART3_TXD_UART3_DCE_TX 0x142 219 >; 220 }; 221 222 pinctrl_usb_nreset: usbnreset-grp { 223 fsl,pins = < 224 MX8MN_IOMUXC_SAI3_RXC_GPIO4_IO29 0x14a 225 >; 226 }; 227 228 pinctrl_wdog: wdog-grp { 229 fsl,pins = < 230 MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x64 231 >; 232 }; 233}; 234 235&gpio5 { 236 pinctrl-names = "default"; 237 pinctrl-0 = <&pinctrl_gpio_5>; 238 gpio-line-names = 239 "", "", "", "", "", "", "", "", 240 "", "", "", "", "", "", "", "", 241 "", "", "", "", 242 "ifm_device_info_eeprom_wp", 243 "", "", "", 244 "", "", "", "", "", "", "", ""; 245}; 246 247&usbotg1 { 248 pinctrl-names = "default"; 249 pinctrl-0 = <&pinctrl_usb_nreset>; 250 #address-cells = <1>; 251 #size-cells = <0>; 252 253 usb-hub@1 { 254 compatible = "usb424,2512", "usb424,2514"; 255 reg = <1>; 256 reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>; 257 }; 258}; 259