xref: /linux/scripts/dtc/include-prefixes/arm64/freescale/imx8mn-vhip4-evalboard-common.dtsi (revision 6589b3d76db2d6adbf8f2084c303fb24252a0dc6)

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright 2020-2024 Fedor Ross <fedor.ross@ifm.com>
 */

#include "imx8mn.dtsi"
#include <dt-bindings/leds/common.h>

/ {
	model = "ifm i.MX8MNano VHIP4 Evaluation Board";
	compatible = "ifm,imx8mn-vhip4-evalboard", "ifm,imx8mn-vhip4", "fsl,imx8mn";

	aliases {
		mmc0 = &usdhc3;
		mmc1 = &usdhc1;
		mmc2 = &usdhc2;
		rtc0 = &hw_rtc;
		rtc1 = &snvs_rtc;
	};

	chosen {
		bootargs = "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200 rootwait";
		stdout-path = &uart3;
	};

	memory@40000000 {
		device_type = "memory";
		reg = <0x0 0x40000000 0 0x40000000>;
	};

	can_clk20m: can-clk20m {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <20000000>;
	};

	can_clk40m: can-clk40m {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <40000000>;
	};

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-0 = <&pinctrl_gpio_button>;
		pinctrl-names = "default";

		button-2 {
			label = "Button2";
			gpios = <&gpio2 16 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_2>;
		};

		button-3 {
			label = "Button3";
			gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_3>;
		};
	};

	ifm_led: led {
		compatible = "gpio-leds";
		pinctrl-0 = <&pinctrl_gpio_led>;
		pinctrl-names = "default", "extended";

		led-0 {
			function = LED_FUNCTION_STATUS;
			function-enumerator = <1>;
			color = <LED_COLOR_ID_YELLOW>;
			gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
			default-state = "keep";
		};

		led-1 {
			function = LED_FUNCTION_STATUS;
			function-enumerator = <2>;
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
			default-state = "keep";
		};
	};
};

&A53_0 {
	cpu-supply = <&buck2_reg>;
};

&A53_1 {
	cpu-supply = <&buck2_reg>;
};

&A53_2 {
	cpu-supply = <&buck2_reg>;
};

&A53_3 {
	cpu-supply = <&buck2_reg>;
};

&ddrc {
	operating-points-v2 = <&ddrc_opp_table>;

	ddrc_opp_table: opp-table {
		compatible = "operating-points-v2";

		opp-25000000 {
			opp-hz = /bits/ 64 <25000000>;
		};

		opp-100000000 {
			opp-hz = /bits/ 64 <100000000>;
		};

		opp-600000000 {
			opp-hz = /bits/ 64 <600000000>;
		};
	};
};

&ecspi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi1>, <&pinctrl_ecspi1_cs>;
	/delete-property/ dmas;
	/delete-property/ dma-names;
};

&ecspi3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi3>, <&pinctrl_ecspi3_cs>;
	/delete-property/ dmas;
	/delete-property/ dma-names;
};

&gpu {
	/* SoC has GPU fused off. */
	status = "disabled";
};

&i2c1 {
	clock-frequency = <100000>;
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&pinctrl_i2c1>;
	pinctrl-1 = <&pinctrl_i2c1_gpio>;

	eeprom@51 {
		compatible = "atmel,24c128";
		reg = <0x51>;
	};

	hw_rtc: rtc@52 {
		compatible = "microcrystal,rv3028";
		reg = <0x52>;
	};
};

&i2c3 {
	clock-frequency = <100000>;
	pinctrl-names = "default", "gpio";
	pinctrl-0 = <&pinctrl_i2c3>;
	pinctrl-1 = <&pinctrl_i2c3_gpio>;

	ifm_pmic: pmic@4b {
		compatible = "rohm,bd71847";
		reg = <0x4b>;
		pinctrl-0 = <&pinctrl_pmic>;
		rohm,reset-snvs-powered;

		regulators {
			buck1_reg: BUCK1 {
				regulator-name = "buck1";
				regulator-min-microvolt = <790000>;
				regulator-max-microvolt = <860000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <1250>;
			};

			buck2_reg: BUCK2 {
				regulator-name = "buck2";
				regulator-min-microvolt = <840000>;
				regulator-max-microvolt = <960000>;
				regulator-boot-on;
				regulator-always-on;
				regulator-ramp-delay = <1250>;
			};

			buck3_reg: BUCK3 {
				// BUCK5 in datasheet
				regulator-name = "buck3";
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1350000>;
			};

			buck4_reg: BUCK4 {
				// BUCK6 in datasheet
				regulator-name = "buck4";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck5_reg: BUCK5 {
				// BUCK7 in datasheet
				regulator-name = "buck5";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			buck6_reg: BUCK6 {
				// BUCK8 in datasheet
				regulator-name = "buck6";
				regulator-min-microvolt = <1100000>;
				regulator-max-microvolt = <1100000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo1_reg: LDO1 {
				regulator-name = "ldo1";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo2_reg: LDO2 {
				regulator-name = "ldo2";
				regulator-min-microvolt = <800000>;
				regulator-max-microvolt = <800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo3_reg: LDO3 {
				regulator-name = "ldo3";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			ldo4_reg: LDO4 {
				regulator-name = "ldo4";
				regulator-min-microvolt = <900000>;
				regulator-max-microvolt = <1800000>;
			};

			ldo5_reg: LDO5 {
				regulator-name = "ldo5";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
			};

			ldo6_reg: LDO6 {
				regulator-name = "ldo6";
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1200000>;
				regulator-boot-on;
				regulator-always-on;
			};
		};
	};
};

&iomuxc {
	pinctrl_ecspi1: ecspi1-grp {
		fsl,pins = <
			MX8MN_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK		0x110
			MX8MN_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI		0x110
			MX8MN_IOMUXC_ECSPI1_MISO_ECSPI1_MISO		0x190
		>;
	};

	pinctrl_ecspi3: ecspi3-grp {
		fsl,pins = <
			/* SPI3_CAN_CLK */
			MX8MN_IOMUXC_UART1_RXD_ECSPI3_SCLK		0x110
			/* SPI3_CAN_MOSI */
			MX8MN_IOMUXC_UART1_TXD_ECSPI3_MOSI		0x110
			/* SPI3_CAN_MISO */
			MX8MN_IOMUXC_UART2_RXD_ECSPI3_MISO		0x190
		>;
	};

	pinctrl_gpio_button: gpiobutton-grp {
		fsl,pins = <
			MX8MN_IOMUXC_SD2_DATA1_GPIO2_IO16		0x96
			MX8MN_IOMUXC_SD2_DATA3_GPIO2_IO18		0x96
		>;
	};

	pinctrl_gpio_led: gpioled-grp {
		fsl,pins = <
			MX8MN_IOMUXC_SD2_CLK_GPIO2_IO13			0x116
			MX8MN_IOMUXC_SD2_DATA0_GPIO2_IO15		0x116
		>;
	};

	pinctrl_usdhc3: usdhc3-grp {
		fsl,pins = <
			MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK		0x40000110
			MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD		0x1d0
			MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0		0x1d0
			MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1		0x1d0
			MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2		0x1d0
			MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3		0x1d0
			MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4		0x1d0
			MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5		0x1d0
			MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6		0x1d0
			MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7		0x1d0
			MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE		0x190
			MX8MN_IOMUXC_NAND_READY_B_USDHC3_RESET_B	0x150
		>;
	};

	pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
		fsl,pins = <
			MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK		0x40000114
			MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD		0x1d4
			MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0		0x1d4
			MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1		0x1d4
			MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2		0x1d4
			MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3		0x1d4
			MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4		0x1d4
			MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5		0x1d4
			MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6		0x1d4
			MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7		0x1d4
			MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE		0x194
			MX8MN_IOMUXC_NAND_READY_B_USDHC3_RESET_B	0x150
		>;
	};

	pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
		fsl,pins = <
			MX8MN_IOMUXC_NAND_WE_B_USDHC3_CLK		0x40000116
			MX8MN_IOMUXC_NAND_WP_B_USDHC3_CMD		0x1d6
			MX8MN_IOMUXC_NAND_DATA04_USDHC3_DATA0		0x1d6
			MX8MN_IOMUXC_NAND_DATA05_USDHC3_DATA1		0x1d6
			MX8MN_IOMUXC_NAND_DATA06_USDHC3_DATA2		0x1d6
			MX8MN_IOMUXC_NAND_DATA07_USDHC3_DATA3		0x1d6
			MX8MN_IOMUXC_NAND_RE_B_USDHC3_DATA4		0x1d6
			MX8MN_IOMUXC_NAND_CE2_B_USDHC3_DATA5		0x1d6
			MX8MN_IOMUXC_NAND_CE3_B_USDHC3_DATA6		0x1d6
			MX8MN_IOMUXC_NAND_CLE_USDHC3_DATA7		0x1d6
			MX8MN_IOMUXC_NAND_CE1_B_USDHC3_STROBE		0x196
			MX8MN_IOMUXC_NAND_READY_B_USDHC3_RESET_B	0x150
		>;
	};

	pinctrl_wdog: wdog-grp {
		fsl,pins = <
			MX8MN_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B		0x64
		>;
	};
};

&pgc_gpumix {
	/* SoC has GPU fused off. */
	status = "disabled";
};

&snvs_pwrkey {
	status = "okay";
};

&uart3 { /* console */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	status = "okay";
};

&usbotg1 {
	status = "okay";
};

&usdhc3 {
	assigned-clocks = <&clk IMX8MN_CLK_USDHC3_ROOT>;
	assigned-clock-rates = <400000000>;
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc3>;
	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
	bus-width = <8>;
	non-removable;
	status = "okay";
};

&wdog1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_wdog>;
	fsl,ext-reset-output;
	status = "okay";
};