1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2025 Maud Spierings <maudspierings@gocontroll.com> 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/leds/common.h> 9 10#include "imx8mm-tx8m-1610.dtsi" 11 12/ { 13 chassis-type = "embedded"; 14 compatible = "gocontroll,moduline-mini-111", "karo,tx8m-1610", "fsl,imx8mm"; 15 hardware = "Moduline Mini V1.11"; 16 model = "GOcontroll Moduline Mini"; 17 18 aliases { 19 spi0 = &ecspi2; /* spidev number compatibility */ 20 spi1 = &ecspi3; /* spidev number compatibility */ 21 spi2 = &ecspi1; /* spidev number compatibility */ 22 }; 23 24 chosen { 25 stdout-path = "serial2:115200n8"; 26 }; 27 28 mcp_clock: mcp-clock { 29 compatible = "fixed-clock"; 30 #clock-cells = <0>; 31 clock-frequency = <20000000>; 32 }; 33 34 reg_3v3_comm: regulator-3v3-communication { 35 compatible = "regulator-fixed"; 36 enable-active-high; 37 gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>; 38 pinctrl-0 = <&pinctrl_reg_comm>; 39 pinctrl-names = "default"; 40 power-supply = <®_6v4>; 41 /* also powers the cellular modem which can't vote on the regulator */ 42 regulator-always-on; 43 regulator-max-microvolt = <3300000>; 44 regulator-min-microvolt = <3300000>; 45 regulator-name = "3v3_comm"; 46 }; 47 48 reg_5v0: regulator-5v0 { 49 compatible = "regulator-fixed"; 50 power-supply = <®_6v4>; 51 regulator-always-on; 52 regulator-max-microvolt = <5000000>; 53 regulator-min-microvolt = <5000000>; 54 regulator-name = "5v0"; 55 }; 56 57 reg_6v4: regulator-6v4 { 58 compatible = "regulator-fixed"; 59 regulator-always-on; 60 regulator-max-microvolt = <6400000>; 61 regulator-min-microvolt = <6400000>; 62 regulator-name = "6v4"; 63 }; 64 65 reg_can1_stby: regulator-can1-stby { 66 compatible = "regulator-fixed"; 67 gpio = <&gpio2 12 GPIO_ACTIVE_LOW>; 68 pinctrl-0 = <&pinctrl_can1_reg>; 69 pinctrl-names = "default"; 70 regulator-max-microvolt = <3300000>; 71 regulator-min-microvolt = <3300000>; 72 regulator-name = "can1-stby"; 73 }; 74 75 reg_can2_stby: regulator-can2-stby { 76 compatible = "regulator-fixed"; 77 gpio = <&gpio3 15 GPIO_ACTIVE_LOW>; 78 pinctrl-0 = <&pinctrl_can2_reg>; 79 pinctrl-names = "default"; 80 regulator-max-microvolt = <3300000>; 81 regulator-min-microvolt = <3300000>; 82 regulator-name = "can2-stby"; 83 }; 84 85 wifi_pwrseq: wifi-pwrseq { 86 compatible = "mmc-pwrseq-simple"; 87 pinctrl-0 = <&pinctrl_wl_reg>; 88 pinctrl-names = "default"; 89 post-power-on-delay-ms = <100>; 90 power-off-delay-us = <500000>; 91 reset-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>; 92 }; 93}; 94 95&ecspi1 { 96 cs-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>, 97 <&gpio3 23 GPIO_ACTIVE_LOW>, 98 <&gpio3 1 GPIO_ACTIVE_LOW>; 99 pinctrl-0 = <&pinctrl_ecspi1>; 100 pinctrl-names = "default"; 101 status = "okay"; 102 103 connector@0 { 104 compatible = "gocontroll,moduline-module-slot"; 105 reg = <0>; 106 i2c-bus = <&i2c2>; 107 interrupt-parent = <&gpio4>; 108 interrupts = <26 IRQ_TYPE_EDGE_FALLING>; 109 reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; 110 slot-number = <3>; 111 spi-max-frequency = <54000000>; 112 sync-gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>; 113 vddhpp-supply = <®_6v4>; 114 vddp-supply = <®_5v0>; 115 vdd-supply = <®_vdd_3v3>; 116 }; 117 118 connector@1 { 119 compatible = "gocontroll,moduline-module-slot"; 120 reg = <1>; 121 i2c-bus = <&i2c2>; 122 interrupt-parent = <&gpio3>; 123 interrupts = <19 IRQ_TYPE_EDGE_FALLING>; 124 reset-gpios = <&gpio3 21 GPIO_ACTIVE_LOW>; 125 slot-number = <4>; 126 spi-max-frequency = <54000000>; 127 sync-gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>; 128 vddhpp-supply = <®_6v4>; 129 vddp-supply = <®_5v0>; 130 vdd-supply = <®_vdd_3v3>; 131 }; 132 133 adc@2 { 134 compatible = "microchip,mcp3004"; 135 reg = <2>; 136 spi-max-frequency = <2300000>; 137 vref-supply = <®_vdd_3v3>; 138 }; 139}; 140 141&ecspi2 { 142 cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>, 143 <&gpio3 9 GPIO_ACTIVE_LOW>; 144 pinctrl-0 = <&pinctrl_ecspi2>; 145 pinctrl-names = "default"; 146 status = "okay"; 147 148 can@0 { 149 compatible = "microchip,mcp25625"; 150 reg = <0>; 151 clocks = <&mcp_clock>; 152 interrupt-parent = <&gpio3>; 153 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; 154 pinctrl-0 = <&pinctrl_can1>; 155 pinctrl-names = "default"; 156 spi-max-frequency = <10000000>; 157 vdd-supply = <®_vdd_3v3>; 158 xceiver-supply = <®_can1_stby>; 159 }; 160 161 can@1 { 162 compatible = "microchip,mcp25625"; 163 reg = <1>; 164 clocks = <&mcp_clock>; 165 interrupt-parent = <&gpio3>; 166 interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 167 pinctrl-0 = <&pinctrl_can2>; 168 pinctrl-names = "default"; 169 spi-max-frequency = <10000000>; 170 vdd-supply = <®_vdd_3v3>; 171 xceiver-supply = <®_can2_stby>; 172 }; 173}; 174 175&ecspi3 { 176 cs-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>, 177 <&gpio1 2 GPIO_ACTIVE_LOW>; 178 pinctrl-0 = <&pinctrl_ecspi3>; 179 pinctrl-names = "default"; 180 status = "okay"; 181 182 connector@0 { 183 compatible = "gocontroll,moduline-module-slot"; 184 reg = <0>; 185 i2c-bus = <&i2c2>; 186 interrupt-parent = <&gpio1>; 187 interrupts = <10 IRQ_TYPE_EDGE_FALLING>; 188 reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; 189 slot-number = <1>; 190 spi-max-frequency = <54000000>; 191 sync-gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>; 192 vddhpp-supply = <®_6v4>; 193 vddp-supply = <®_5v0>; 194 vdd-supply = <®_vdd_3v3>; 195 }; 196 197 connector@1 { 198 compatible = "gocontroll,moduline-module-slot"; 199 reg = <1>; 200 i2c-bus = <&i2c2>; 201 interrupt-parent = <&gpio1>; 202 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; 203 reset-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>; 204 slot-number = <2>; 205 spi-max-frequency = <54000000>; 206 sync-gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>; 207 vddhpp-supply = <®_6v4>; 208 vddp-supply = <®_5v0>; 209 vdd-supply = <®_vdd_3v3>; 210 }; 211}; 212 213&gpu_2d { 214 status = "disabled"; 215}; 216 217&gpu_3d { 218 status = "disabled"; 219}; 220 221&i2c2 { 222 clock-frequency = <400000>; 223 pinctrl-0 = <&pinctrl_i2c2>; 224 pinctrl-1 = <&pinctrl_i2c2_gpio>; 225 pinctrl-names = "default", "gpio"; 226 scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 227 sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 228 status = "okay"; 229}; 230 231&i2c3 { 232 clock-frequency = <400000>; 233 pinctrl-0 = <&pinctrl_i2c3>; 234 pinctrl-1 = <&pinctrl_i2c3_gpio>; 235 pinctrl-names = "default", "gpio"; 236 scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 237 sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 238 status = "okay"; 239 240 lp5012@14 { 241 compatible = "ti,lp5012"; 242 reg = <0x14>; 243 vled-supply = <®_6v4>; 244 #address-cells = <1>; 245 #size-cells = <0>; 246 247 multi-led@0 { 248 #address-cells = <1>; 249 #size-cells = <0>; 250 reg = <0>; 251 color = <LED_COLOR_ID_RGB>; 252 label = "case-led1"; 253 254 led@0 { 255 reg = <0>; 256 color = <LED_COLOR_ID_RED>; 257 }; 258 259 led@1 { 260 reg = <1>; 261 color = <LED_COLOR_ID_GREEN>; 262 }; 263 264 led@2 { 265 reg = <2>; 266 color = <LED_COLOR_ID_BLUE>; 267 }; 268 }; 269 270 multi-led@1 { 271 #address-cells = <1>; 272 #size-cells = <0>; 273 reg = <1>; 274 color = <LED_COLOR_ID_RGB>; 275 label = "case-led2"; 276 277 led@0 { 278 reg = <0>; 279 color = <LED_COLOR_ID_RED>; 280 }; 281 282 led@1 { 283 reg = <1>; 284 color = <LED_COLOR_ID_GREEN>; 285 }; 286 287 led@2 { 288 reg = <2>; 289 color = <LED_COLOR_ID_BLUE>; 290 }; 291 }; 292 293 multi-led@2 { 294 #address-cells = <1>; 295 #size-cells = <0>; 296 reg = <2>; 297 color = <LED_COLOR_ID_RGB>; 298 label = "case-led3"; 299 300 led@0 { 301 reg = <0>; 302 color = <LED_COLOR_ID_RED>; 303 }; 304 305 led@1 { 306 reg = <1>; 307 color = <LED_COLOR_ID_GREEN>; 308 }; 309 310 led@2 { 311 reg = <2>; 312 color = <LED_COLOR_ID_BLUE>; 313 }; 314 }; 315 316 multi-led@3 { 317 #address-cells = <1>; 318 #size-cells = <0>; 319 reg = <3>; 320 color = <LED_COLOR_ID_RGB>; 321 label = "case-led4"; 322 323 led@0 { 324 reg = <0>; 325 color = <LED_COLOR_ID_RED>; 326 }; 327 328 led@1 { 329 reg = <1>; 330 color = <LED_COLOR_ID_GREEN>; 331 }; 332 333 led@2 { 334 reg = <2>; 335 color = <LED_COLOR_ID_BLUE>; 336 }; 337 }; 338 }; 339 340 accelerometer@18 { 341 compatible = "st,lis2dw12"; 342 reg = <0x18>; 343 interrupt-parent = <&gpio5>; 344 interrupts = <3 IRQ_TYPE_EDGE_RISING>, <5 IRQ_TYPE_EDGE_RISING>; 345 pinctrl-0 = <&pinctrl_lis_int>; 346 pinctrl-names = "default"; 347 vddio-supply = <®_vdd_3v3>; 348 vdd-supply = <®_vdd_3v3>; 349 }; 350 351 humidity-sensor@5f { 352 compatible = "st,hts221"; 353 reg = <0x5f>; 354 interrupt-parent = <&gpio3>; 355 interrupts = <10 IRQ_TYPE_EDGE_RISING>; 356 pinctrl-0 = <&pinctrl_hts_int>; 357 pinctrl-names = "default"; 358 vdd-supply = <®_vdd_3v3>; 359 }; 360}; 361 362&iomuxc { 363 pinctrl_bt: btgrp { 364 fsl,pins = < 365 MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 366 MX8MM_DSE_X1 367 MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 368 (MX8MM_PULL_UP | MX8MM_PULL_ENABLE | MX8MM_HYS_SCHMITT) 369 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 370 MX8MM_DSE_X1 371 >; 372 }; 373 374 pinctrl_can1: can1grp { 375 fsl,pins = < 376 MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 377 (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) 378 MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22 379 (MX8MM_PULL_UP | MX8MM_PULL_ENABLE | MX8MM_HYS_SCHMITT) 380 >; 381 }; 382 383 pinctrl_can1_reg: can1reggrp { 384 fsl,pins = < 385 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 386 (MX8MM_DSE_X2 | MX8MM_FSEL_FAST | MX8MM_PULL_UP | MX8MM_PULL_ENABLE) 387 >; 388 }; 389 390 pinctrl_can2: can2grp { 391 fsl,pins = < 392 MX8MM_IOMUXC_NAND_CLE_GPIO3_IO5 393 (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) 394 MX8MM_IOMUXC_NAND_DATA00_GPIO3_IO6 395 (MX8MM_PULL_UP | MX8MM_PULL_ENABLE | MX8MM_HYS_SCHMITT) 396 >; 397 }; 398 399 pinctrl_can2_reg: can2reggrp { 400 fsl,pins = < 401 MX8MM_IOMUXC_NAND_RE_B_GPIO3_IO15 402 (MX8MM_DSE_X2 | MX8MM_FSEL_FAST | MX8MM_PULL_UP | MX8MM_PULL_ENABLE) 403 >; 404 }; 405 406 pinctrl_ecspi1: ecspi1grp { 407 fsl,pins = < 408 MX8MM_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 409 MX8MM_DSE_X4 410 MX8MM_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 411 (MX8MM_DSE_X4 | MX8MM_HYS_SCHMITT) 412 MX8MM_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 413 MX8MM_DSE_X4 414 MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 415 MX8MM_DSE_X1 416 MX8MM_IOMUXC_SAI5_RXD2_GPIO3_IO23 417 MX8MM_DSE_X1 418 MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 419 MX8MM_DSE_X1 420 >; 421 }; 422 423 pinctrl_ecspi2: ecspi2grp { 424 fsl,pins = < 425 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 426 MX8MM_DSE_X4 427 MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 428 (MX8MM_DSE_X4 | MX8MM_HYS_SCHMITT) 429 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 430 MX8MM_DSE_X4 431 MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24 432 MX8MM_DSE_X1 433 MX8MM_IOMUXC_NAND_DATA03_GPIO3_IO9 434 MX8MM_DSE_X1 435 >; 436 }; 437 438 pinctrl_ecspi3: ecspi3grp { 439 fsl,pins = < 440 MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 441 MX8MM_DSE_X4 442 MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 443 (MX8MM_DSE_X4 | MX8MM_HYS_SCHMITT) 444 MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 445 MX8MM_DSE_X4 446 MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 447 MX8MM_DSE_X1 448 MX8MM_IOMUXC_GPIO1_IO02_GPIO1_IO2 449 MX8MM_DSE_X1 450 >; 451 }; 452 453 pinctrl_hts_int: htsintgrp { 454 fsl,pins = < 455 MX8MM_IOMUXC_NAND_DATA04_GPIO3_IO10 456 (MX8MM_PULL_ENABLE | MX8MM_HYS_SCHMITT) 457 >; 458 }; 459 460 pinctrl_i2c2: i2c2grp { 461 fsl,pins = < 462 MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 463 MX8MM_I2C_DEFAULT 464 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 465 MX8MM_I2C_DEFAULT 466 >; 467 }; 468 469 pinctrl_i2c2_gpio: i2c2-gpiogrp { 470 fsl,pins = < 471 MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16 472 MX8MM_I2C_DEFAULT 473 MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17 474 MX8MM_I2C_DEFAULT 475 >; 476 }; 477 478 pinctrl_i2c3: i2c3grp { 479 fsl,pins = < 480 MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 481 MX8MM_I2C_DEFAULT 482 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 483 MX8MM_I2C_DEFAULT 484 >; 485 }; 486 487 pinctrl_i2c3_gpio: i2c3-gpiogrp { 488 fsl,pins = < 489 MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 490 MX8MM_I2C_DEFAULT 491 MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 492 MX8MM_I2C_DEFAULT 493 >; 494 }; 495 496 pinctrl_lis_int: lisintgrp { 497 fsl,pins = < 498 MX8MM_IOMUXC_SPDIF_TX_GPIO5_IO3 499 (MX8MM_PULL_ENABLE | MX8MM_HYS_SCHMITT) 500 MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5 501 (MX8MM_PULL_ENABLE | MX8MM_HYS_SCHMITT) 502 >; 503 }; 504 505 pinctrl_reg_comm: reg_commgrp { 506 fsl,pins = < 507 MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 508 MX8MM_DSE_X1 509 >; 510 }; 511 512 pinctrl_sysfs_gpios: sysfsgpiogrp { 513 fsl,pins = < 514 MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 515 MX8MM_DSE_X1 516 MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 517 MX8MM_DSE_X1 518 MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 519 MX8MM_DSE_X1 520 MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21 521 MX8MM_DSE_X1 522 MX8MM_IOMUXC_SD2_WP_GPIO2_IO20 523 MX8MM_DSE_X1 524 MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 525 MX8MM_DSE_X1 526 MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 527 MX8MM_DSE_X1 528 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 529 MX8MM_DSE_X1 530 >; 531 }; 532 533 pinctrl_uart1: uart1grp { 534 fsl,pins = < 535 MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 536 (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) 537 MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 538 (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) 539 MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 540 (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) 541 MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 542 (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) 543 >; 544 }; 545 546 pinctrl_uart2: uart2grp { 547 fsl,pins = < 548 MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 549 (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) 550 MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 551 (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) 552 MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 553 (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) 554 MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 555 (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) 556 >; 557 }; 558 559 pinctrl_uart3: uart3grp { 560 fsl,pins = < 561 MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX 562 (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) 563 MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX 564 (MX8MM_PULL_UP | MX8MM_PULL_ENABLE) 565 >; 566 }; 567 568 pinctrl_usdhc2: pinctrlusdhc2grp { 569 fsl,pins = < 570 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 571 (MX8MM_DSE_X2 | MX8MM_FSEL_FAST | MX8MM_PULL_ENABLE) 572 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 573 (MX8MM_DSE_X2 | MX8MM_USDHC_DATA_DEFAULT) 574 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 575 (MX8MM_DSE_X2 | MX8MM_USDHC_DATA_DEFAULT) 576 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 577 (MX8MM_DSE_X2 | MX8MM_USDHC_DATA_DEFAULT) 578 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 579 (MX8MM_DSE_X2 | MX8MM_USDHC_DATA_DEFAULT) 580 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 581 (MX8MM_DSE_X2 | MX8MM_USDHC_DATA_DEFAULT) 582 >; 583 }; 584 585 pinctrl_wl_int: wlintgrp { 586 fsl,pins = < 587 MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 588 (MX8MM_PULL_UP | MX8MM_HYS_SCHMITT | MX8MM_PULL_ENABLE) 589 >; 590 }; 591 592 pinctrl_wl_reg: wlreggrp { 593 fsl,pins = < 594 MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28 595 MX8MM_DSE_X1 596 >; 597 }; 598}; 599 600&uart1 { 601 pinctrl-0 = <&pinctrl_uart1>; 602 pinctrl-names = "default"; 603 uart-has-rtscts; 604 status = "okay"; 605 606 bluetooth { 607 compatible = "infineon,cyw43439-bt", "brcm,bcm4329-bt"; 608 device-wakeup-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH>; 609 interrupt-names = "host-wakeup"; 610 interrupt-parent = <&gpio3>; 611 interrupts = <25 IRQ_TYPE_EDGE_FALLING>; 612 max-speed = <921600>; 613 pinctrl-0 = <&pinctrl_bt>; 614 pinctrl-names = "default"; 615 shutdown-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; 616 vbat-supply = <®_3v3_comm>; 617 vddio-supply = <®_3v3_comm>; 618 }; 619}; 620 621&uart2 { 622 pinctrl-0 = <&pinctrl_uart2>; 623 pinctrl-names = "default"; 624 uart-has-rtscts; 625 status = "okay"; 626}; 627 628&uart3 { 629 pinctrl-0 = <&pinctrl_uart3>; 630 pinctrl-names = "default"; 631 status = "okay"; 632}; 633 634&usbotg1 { 635 disable-over-current; 636 dr_mode = "peripheral"; 637 status = "okay"; 638}; 639 640&usbotg2 { 641 disable-over-current; 642 dr_mode = "host"; 643 vbus-supply = <®_5v0>; 644 status = "okay"; 645}; 646 647&usdhc2 { 648 #address-cells = <1>; 649 #size-cells = <0>; 650 cap-power-off-card; 651 keep-power-in-suspend; 652 max-frequency = <50000000>; 653 mmc-pwrseq = <&wifi_pwrseq>; 654 non-removable; 655 pinctrl-0 = <&pinctrl_usdhc2>; 656 pinctrl-names = "default"; 657 sd-uhs-sdr25; 658 vmmc-supply = <®_3v3_comm>; 659 status = "okay"; 660 661 wifi@1 { 662 compatible = "infineon,cyw43439-fmac", "brcm,bcm4329-fmac"; 663 reg = <1>; 664 pinctrl-0 = <&pinctrl_wl_int>; 665 pinctrl-names = "default"; 666 interrupt-names = "host-wake"; 667 interrupt-parent = <&gpio3>; 668 interrupts = <20 IRQ_TYPE_LEVEL_LOW>; 669 brcm,board-type = "GOcontroll,moduline"; 670 }; 671}; 672 673&vpu_blk_ctrl { 674 status = "disabled"; 675}; 676 677&vpu_g1 { 678 status = "disabled"; 679}; 680 681&vpu_g2 { 682 status = "disabled"; 683}; 684 685&wdog1 { 686 status = "okay"; 687}; 688