1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright 2022-2026 Josua Mayer <josua@solid-run.com> 4 */ 5 6/dts-v1/; 7 8#include "imx8dxl-sr-som.dtsi" 9 10/ { 11 compatible = "solidrun,imx8dxl-hummingboard-telematics", 12 "solidrun,imx8dxl-sr-som", "fsl,imx8dxl"; 13 model = "SolidRun i.MX8DXL HummingBoard Telematics"; 14 15 aliases { 16 /* override ethernet aliases from imx8dxl.dtsi */ 17 ethernet0 = &eqos; 18 ethernet1 = &switch_port1; 19 ethernet2 = &switch_port2; 20 ethernet3 = &switch_port3; 21 ethernet4 = &switch_port4; 22 ethernet5 = &switch_port5; 23 ethernet6 = &switch_port6; 24 ethernet7 = &switch_port7; 25 ethernet8 = &switch_port8; 26 ethernet9 = &switch_port9; 27 ethernet10 = &switch_port10; 28 gpio8 = &tca6408_u2; 29 mmc2 = &usdhc3; 30 rtc0 = &carrier_rtc; 31 rtc1 = &rtc; 32 serial1 = &lpuart1; 33 }; 34 35 osc_32k: clock-osc-32k { 36 compatible = "fixed-clock"; 37 clock-frequency = <32768>; 38 #clock-cells = <0>; 39 }; 40 41 v_1_1: regulator-1-1 { 42 compatible = "regulator-fixed"; 43 regulator-name = "1v1"; 44 pinctrl-0 = <®ulator_1v1_pins>; 45 pinctrl-names = "default"; 46 regulator-always-on; 47 regulator-max-microvolt = <1100000>; 48 regulator-min-microvolt = <1100000>; 49 vin-supply = <&v_5_0>; 50 gpio = <&lsio_gpio4 5 GPIO_ACTIVE_HIGH>; 51 enable-active-high; 52 }; 53 54 v_5_0: regulator-5-0 { 55 compatible = "regulator-fixed"; 56 regulator-name = "5v0"; 57 regulator-max-microvolt = <5000000>; 58 regulator-min-microvolt = <5000000>; 59 }; 60 61 /* can transceiver builtin regulator (STBN1 pin) */ 62 reg_flexcan1_stby: regulator-flexcan1-standby { 63 compatible = "regulator-fixed"; 64 regulator-name = "flexcan1-standby"; 65 regulator-max-microvolt = <3300000>; 66 regulator-min-microvolt = <3300000>; 67 gpio = <&tca6408_u2 2 GPIO_ACTIVE_HIGH>; 68 enable-active-high; 69 }; 70 71 /* can transceiver builtin regulator (STBN2 pin) */ 72 reg_flexcan2_stby: regulator-flexcan2-standby { 73 compatible = "regulator-fixed"; 74 regulator-name = "flexcan2-standby"; 75 regulator-max-microvolt = <3300000>; 76 regulator-min-microvolt = <3300000>; 77 gpio = <&tca6408_u2 3 GPIO_ACTIVE_HIGH>; 78 enable-active-high; 79 }; 80 81 modem_vbat: regulator-modem-vbat { 82 compatible = "regulator-fixed"; 83 regulator-name = "modem-vbat"; 84 pinctrl-0 = <®ulator_modem_vbat_pins>; 85 pinctrl-names = "default"; 86 regulator-max-microvolt = <3600000>; 87 regulator-min-microvolt = <3600000>; 88 vin-supply = <&v_5_0>; 89 gpio = <&lsio_gpio0 14 GPIO_ACTIVE_HIGH>; 90 enable-active-high; 91 /* 92 * Cellular Modem uses VBAT, RESET_N and PWRKEY for 93 * power-sequencing. USB core does not currently 94 * support this, keep vbat on permanently and let 95 * userspace deal with reset/pwrkey. 96 */ 97 regulator-always-on; 98 regulator-boot-on; 99 }; 100 101 vbus1: regulator-vbus-1 { 102 compatible = "regulator-fixed"; 103 regulator-name = "vbus1"; 104 pinctrl-0 = <®ulator_usb1_vbus_pins>; 105 pinctrl-names = "default"; 106 regulator-max-microvolt = <5000000>; 107 regulator-min-microvolt = <5000000>; 108 gpio = <&lsio_gpio0 16 GPIO_ACTIVE_HIGH>; 109 enable-active-high; 110 }; 111 112 usdhc3_pwrseq: usdhc3-pwrseq { 113 compatible = "mmc-pwrseq-simple"; 114 reset-gpios = <&lsio_gpio0 15 GPIO_ACTIVE_LOW>; 115 }; 116}; 117 118&dma_apbh { 119 status = "disabled"; 120}; 121 122&eqos { 123 /* delays are added by connected ethernet-switch cpu port */ 124 phy-mode = "rgmii-id"; 125 rx-internal-delay-ps = <0>; 126 tx-internal-delay-ps = <0>; 127 pinctrl-0 = <&eqos_pins>; 128 pinctrl-names = "default"; 129 status = "okay"; 130 131 fixed-link { 132 full-duplex; 133 speed = <1000>; 134 }; 135}; 136 137&flexcan1 { 138 pinctrl-0 = <&flexcan1_pins>; 139 pinctrl-names = "default"; 140 xceiver-supply = <®_flexcan1_stby>; 141 status = "okay"; 142 143 can-transceiver { 144 max-bitrate = <5000000>; 145 }; 146}; 147 148&flexcan2 { 149 pinctrl-0 = <&flexcan2_pins>; 150 pinctrl-names = "default"; 151 xceiver-supply = <®_flexcan2_stby>; 152 status = "okay"; 153 154 can-transceiver { 155 max-bitrate = <5000000>; 156 }; 157}; 158 159&i2c2 { 160 /* routed to J14: SDA(51), SCL(53) */ 161 162 /* regulator@18 */ 163 164 tca6408_u2: gpio@20 { 165 compatible = "ti,tca6408"; 166 reg = <0x20>; 167 #interrupt-cells = <2>; 168 interrupt-controller; 169 #gpio-cells = <2>; 170 gpio-controller; 171 gpio-line-names = "DIG_IN1", "DIG_IN2", "CAN_STNB1", "CAN_STNB2", 172 "DIG_OUT1", "DIG_OUT2", "", ""; 173 interrupts-extended = <&lsio_gpio0 20 IRQ_TYPE_EDGE_FALLING>; 174 pinctrl-0 = <&tca6408_u2_int_pins>; 175 pinctrl-names = "default"; 176 }; 177 178 carrier_rtc: rtc@32 { 179 compatible = "epson,rx8111"; 180 reg = <0x32>; 181 }; 182}; 183 184&iomuxc { 185 bluetooth_pins: pinctrl-bluetooth-grp { 186 fsl,pins = < 187 /* BT_REG_ON: io without pull (module integrates pd) */ 188 IMX8DXL_SPI3_SCK_LSIO_GPIO0_IO13 0x0000061 189 >; 190 }; 191 192 eqos_pins: pinctrl-eqos-grp { 193 fsl,pins = < 194 /* MDIO to Switch */ 195 /* enet0 mdio pads supplied with 3.3v */ 196 /* IMX8DXL_COMP_CTL_GPIO_1V8_3V3_GPIOCT */ 197 IMX8DXL_ENET0_MDC_CONN_EQOS_MDC 0x06000020 198 IMX8DXL_ENET0_MDIO_CONN_EQOS_MDIO 0x06000020 199 /* RGMII to Switch */ 200 IMX8DXL_ENET1_RGMII_TX_CTL_CONN_EQOS_RGMII_TX_CTL 0x06000020 201 IMX8DXL_ENET1_RGMII_TXC_CONN_EQOS_RGMII_TXC 0x06000020 202 IMX8DXL_ENET1_RGMII_TXD0_CONN_EQOS_RGMII_TXD0 0x06000020 203 IMX8DXL_ENET1_RGMII_TXD1_CONN_EQOS_RGMII_TXD1 0x06000020 204 IMX8DXL_ENET1_RGMII_TXD2_CONN_EQOS_RGMII_TXD2 0x06000020 205 IMX8DXL_ENET1_RGMII_TXD3_CONN_EQOS_RGMII_TXD3 0x06000020 206 IMX8DXL_ENET1_RGMII_RXC_CONN_EQOS_RGMII_RXC 0x06000020 207 IMX8DXL_ENET1_RGMII_RX_CTL_CONN_EQOS_RGMII_RX_CTL 0x06000020 208 IMX8DXL_ENET1_RGMII_RXD0_CONN_EQOS_RGMII_RXD0 0x06000020 209 IMX8DXL_ENET1_RGMII_RXD1_CONN_EQOS_RGMII_RXD1 0x06000020 210 IMX8DXL_ENET1_RGMII_RXD2_CONN_EQOS_RGMII_RXD2 0x06000020 211 IMX8DXL_ENET1_RGMII_RXD3_CONN_EQOS_RGMII_RXD3 0x06000020 212 >; 213 }; 214 215 flexcan1_pins: pinctrl-flexcan1-grp { 216 fsl,pins = < 217 IMX8DXL_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x00000021 218 IMX8DXL_FLEXCAN0_RX_ADMA_FLEXCAN0_RX 0x00000021 219 >; 220 }; 221 222 flexcan2_pins: pinctrl-flexcan2-grp { 223 fsl,pins = < 224 IMX8DXL_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x00000021 225 IMX8DXL_FLEXCAN1_RX_ADMA_FLEXCAN1_RX 0x00000021 226 >; 227 }; 228 229 lpspi0_pins: pinctrl-lpspi0-grp { 230 fsl,pins = < 231 IMX8DXL_SPI0_SCK_ADMA_SPI0_SCK 0x600004c 232 IMX8DXL_SPI0_SDO_ADMA_SPI0_SDO 0x600004c 233 IMX8DXL_SPI0_SDI_ADMA_SPI0_SDI 0x600004c 234 IMX8DXL_SPI0_CS0_LSIO_GPIO1_IO08 0x0000021 235 IMX8DXL_SPI0_CS1_LSIO_GPIO1_IO07 0x0000021 236 >; 237 }; 238 239 lpuart1_pins: pinctrl-lpuart1-grp { 240 fsl,pins = < 241 IMX8DXL_UART1_RX_ADMA_UART1_RX 0x06000020 242 IMX8DXL_UART1_TX_ADMA_UART1_TX 0x06000020 243 IMX8DXL_UART1_CTS_B_ADMA_UART1_CTS_B 0x06000020 244 IMX8DXL_UART1_RTS_B_ADMA_UART1_RTS_B 0x06000020 245 >; 246 }; 247 248 modem_pins: pinctrl-lte-grp { 249 fsl,pins = < 250 /* modem RESET_N: io open drain drive 2mA */ 251 IMX8DXL_ADC_IN3_LSIO_GPIO1_IO11 0x2000061 252 253 /* modem PWRKEY: io open drain with pull-up, drive 2mA */ 254 IMX8DXL_ADC_IN2_LSIO_GPIO1_IO12 0x2000021 255 >; 256 }; 257 258 regulator_1v1_pins: pinctrl-regulator-1-1-grp { 259 fsl,pins = < 260 /* SW_PE: io without pull-up */ 261 IMX8DXL_USB_SS3_TC2_LSIO_GPIO4_IO05 0x0000061 262 >; 263 }; 264 265 regulator_modem_vbat_pins: pinctrl-regulator-modem-vbat-grp { 266 fsl,pins = < 267 /* 268 * RF_PWR: io without pull-up, 269 * has either external pull-up (R1117) or pull-down (R1118). 270 * With pull-up Modem will boot at system power-up, 271 * with pull-down modem will enter power-down mode once 272 * vbat is enabled -> toggle pwrkey to boot modem. 273 * Hence pull-up (R1117) is preferred. 274 */ 275 IMX8DXL_SPI3_SDO_LSIO_GPIO0_IO14 0x0000061 276 >; 277 }; 278 279 regulator_usb1_vbus_pins: pinctrl-regulator-usb1-vbus-grp { 280 fsl,pins = < 281 /* regulator enable: open-drain with pull-up & low drive strength */ 282 IMX8DXL_SPI3_CS0_LSIO_GPIO0_IO16 0x2000021 283 >; 284 }; 285 286 switch_pins: pinctrl-switch-grp { 287 fsl,pins = < 288 /* SW_RSTn: io without pull-up */ 289 IMX8DXL_USB_SS3_TC0_LSIO_GPIO4_IO03 0x0000021 290 291 /* SW_CORE_RSTn: io without pull-up */ 292 IMX8DXL_USB_SS3_TC1_LSIO_GPIO4_IO04 0x0000021 293 294 /* INT_N: io without pull-up */ 295 IMX8DXL_USB_SS3_TC3_LSIO_GPIO4_IO06 0x0000021 296 >; 297 }; 298 299 tca6408_u2_int_pins: pinctrl-tca6408-u2-int-grp { 300 fsl,pins = < 301 /* gpio-expander interrupt: io with pull-up */ 302 IMX8DXL_MCLK_OUT0_LSIO_GPIO0_IO20 0x0000021 303 >; 304 }; 305 306 usdhc3_pins: pinctrl-usdhc3-grp { 307 fsl,pins = < 308 IMX8DXL_ENET0_RGMII_TXC_CONN_USDHC2_CLK 0x06000040 309 IMX8DXL_ENET0_RGMII_TX_CTL_CONN_USDHC2_CMD 0x00000021 310 IMX8DXL_ENET0_RGMII_TXD0_CONN_USDHC2_DATA0 0x00000021 311 IMX8DXL_ENET0_RGMII_TXD1_CONN_USDHC2_DATA1 0x00000021 312 IMX8DXL_ENET0_RGMII_TXD2_CONN_USDHC2_DATA2 0x00000021 313 IMX8DXL_ENET0_RGMII_TXD3_CONN_USDHC2_DATA3 0x00000021 314 >; 315 }; 316 317 wifi_pins: pinctrl-wifi-grp { 318 fsl,pins = < 319 /* WL_REG_ON: io without pull (module integrates pd) */ 320 IMX8DXL_SPI3_SDI_LSIO_GPIO0_IO15 0x0000061 321 >; 322 }; 323}; 324 325&lpspi0 { 326 cs-gpios = <&lsio_gpio1 8 GPIO_ACTIVE_LOW>, <&lsio_gpio1 7 GPIO_ACTIVE_LOW>; 327 pinctrl-0 = <&lpspi0_pins>, <&switch_pins>; 328 pinctrl-names = "default"; 329 status = "okay"; 330 331 ethernet-switch@0 { 332 compatible = "nxp,sja1110a"; 333 reg = <0>; 334 reset-gpios = <&lsio_gpio4 3 GPIO_ACTIVE_LOW>; 335 spi-max-frequency = <4000000>; 336 337 ethernet-ports { 338 #address-cells = <1>; 339 #size-cells = <0>; 340 341 /* 100Base-TX on connector J26 */ 342 switch_port1: port@1 { 343 reg = <0x1>; 344 phy-handle = <&switch_port1_base_tx_phy>; 345 phy-mode = "internal"; 346 }; 347 348 /* CPU */ 349 switch_port2: port@2 { 350 reg = <0x2>; 351 ethernet = <&eqos>; 352 phy-mode = "rgmii-id"; 353 rx-internal-delay-ps = <2000>; 354 tx-internal-delay-ps = <2000>; 355 356 fixed-link { 357 full-duplex; 358 speed = <1000>; 359 }; 360 }; 361 362 /* sgmii on addon board connector J21 */ 363 switch_port3: port@3 { 364 reg = <0x3>; 365 status = "disabled"; 366 }; 367 368 /* sgmii on addon board connector J21 */ 369 switch_port4: port@4 { 370 reg = <0x4>; 371 status = "disabled"; 372 }; 373 374 /* 100base-t1 on addon board connector J21 */ 375 switch_port5: port@5 { 376 reg = <0x5>; 377 phy-handle = <&switch_port5_base_t1_phy>; 378 phy-mode = "internal"; 379 status = "disabled"; 380 }; 381 382 /* 100base-t1 on addon board connector J21 */ 383 switch_port6: port@6 { 384 reg = <0x6>; 385 phy-handle = <&switch_port6_base_t1_phy>; 386 phy-mode = "internal"; 387 status = "disabled"; 388 }; 389 390 /* 100base-t1 on addon board connector J21 */ 391 switch_port7: port@7 { 392 reg = <0x7>; 393 phy-handle = <&switch_port7_base_t1_phy>; 394 phy-mode = "internal"; 395 status = "disabled"; 396 }; 397 398 /* 100base-t1 on addon board connector J21 */ 399 switch_port8: port@8 { 400 reg = <0x8>; 401 phy-handle = <&switch_port8_base_t1_phy>; 402 phy-mode = "internal"; 403 status = "disabled"; 404 }; 405 406 /* 100base-t1 on addon board connector J21 */ 407 switch_port9: port@9 { 408 reg = <0x9>; 409 phy-handle = <&switch_port9_base_t1_phy>; 410 phy-mode = "internal"; 411 status = "disabled"; 412 }; 413 414 /* 100Base-T1 on connector J26 */ 415 switch_port10: port@a { 416 reg = <0xa>; 417 phy-handle = <&switch_port10_base_t1_phy>; 418 phy-mode = "internal"; 419 }; 420 }; 421 422 mdios { 423 #address-cells = <1>; 424 #size-cells = <0>; 425 426 mdio@0 { 427 compatible = "nxp,sja1110-base-t1-mdio"; 428 reg = <0>; 429 #address-cells = <1>; 430 #size-cells = <0>; 431 432 /* 100base-t1 on addon board connector J21 */ 433 switch_port5_base_t1_phy: ethernet-phy@1 { 434 compatible = "ethernet-phy-ieee802.3-c45"; 435 reg = <0x1>; 436 status = "disabled"; 437 }; 438 439 /* 100base-t1 on addon board connector J21 */ 440 switch_port6_base_t1_phy: ethernet-phy@2 { 441 compatible = "ethernet-phy-ieee802.3-c45"; 442 reg = <0x2>; 443 status = "disabled"; 444 }; 445 446 /* 100base-t1 on addon board connector J21 */ 447 switch_port7_base_t1_phy: ethernet-phy@3 { 448 compatible = "ethernet-phy-ieee802.3-c45"; 449 reg = <0x3>; 450 status = "disabled"; 451 }; 452 453 /* 100base-t1 on addon board connector J21 */ 454 switch_port8_base_t1_phy: ethernet-phy@4 { 455 compatible = "ethernet-phy-ieee802.3-c45"; 456 reg = <0x4>; 457 status = "disabled"; 458 }; 459 460 /* 100base-t1 on addon board connector J21 */ 461 switch_port9_base_t1_phy: ethernet-phy@5 { 462 compatible = "ethernet-phy-ieee802.3-c45"; 463 reg = <0x5>; 464 status = "disabled"; 465 }; 466 467 /* 100Base-T1 on connector J26 */ 468 switch_port10_base_t1_phy: ethernet-phy@6 { 469 compatible = "ethernet-phy-ieee802.3-c45"; 470 reg = <0x6>; 471 }; 472 }; 473 474 mdio@1 { 475 compatible = "nxp,sja1110-base-tx-mdio"; 476 reg = <1>; 477 #address-cells = <1>; 478 #size-cells = <0>; 479 480 /* 100Base-TX on connector J26 */ 481 switch_port1_base_tx_phy: ethernet-phy@1 { 482 reg = <0x1>; 483 }; 484 }; 485 }; 486 }; 487}; 488 489/* bluetooth */ 490&lpuart1 { 491 pinctrl-0 = <&lpuart1_pins>, <&bluetooth_pins>; 492 pinctrl-names = "default"; 493 uart-has-rtscts; 494 status = "okay"; 495 496 bluetooth { 497 compatible = "brcm,bcm4345c5"; 498 clocks = <&osc_32k>; 499 clock-names = "lpo"; 500 /* Murata 1MW module supports max. 3M baud */ 501 max-speed = <3000000>; 502 shutdown-gpios = <&lsio_gpio0 13 GPIO_ACTIVE_HIGH>; 503 /* link fixed supplies to avoid fall-back lookup by name */ 504 vbat-supply = <&v_3_3>; 505 vddio-supply = <&v_1_8>; 506 }; 507}; 508 509&lsio_gpio1 { 510 gpio-line-names = "", "", "", "", "", "", "", "", 511 "", "", "", "CELL_RESET_N", "CELL_PWRKEY", "", "", "", 512 "", "", "", "", "", "", "", "", 513 "", "", "", "", "", "", "", ""; 514}; 515 516&usbotg1 { 517 dr_mode = "host"; 518 vbus-supply = <&vbus1>; 519}; 520 521/* cellular modem */ 522&usbotg2 { 523 #address-cells = <1>; 524 #size-cells = <0>; 525 adp-disable; 526 disable-over-current; 527 dr_mode = "host"; 528 hnp-disable; 529 pinctrl-0 = <&modem_pins>; 530 pinctrl-names = "default"; 531 power-active-high; 532 srp-disable; 533 vbus-supply = <&v_5_0>; 534 status = "okay"; 535 536 usb-device@1 { 537 compatible = "usb2c7c,125"; 538 reg = <1>; 539 vbus-supply = <&v_3_3>; 540 vdd-supply = <&modem_vbat>; 541 }; 542}; 543 544&usbphy2 { 545 status = "okay"; 546}; 547 548/* WiFi */ 549&usdhc3 { 550 bus-width = <4>; 551 cap-sdio-irq; 552 mmc-pwrseq = <&usdhc3_pwrseq>; 553 non-removable; 554 no-sd; 555 pinctrl-0 = <&usdhc3_pins>, <&wifi_pins>; 556 pinctrl-names = "default"; 557 vmmc-supply = <&v_3_3>; 558 vqmmc-supply = <&v_1_8>; 559 status = "okay"; 560}; 561