xref: /linux/scripts/dtc/include-prefixes/arm64/freescale/fsl-lx216xa-pcie-gen3.dtsi (revision 67f8bc848ee31831336bd478e57d2f993551902e)
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2//
3// Device Tree file describing the PCIe IPs found on the LX2160A Rev2 and LX2162A SoCs
4//
5// Copyright 2026 NXP
6
7&soc {
8	pcie1: pcie@3400000 {
9		compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie";
10		reg = <0x00 0x03400000 0x0 0x00100000   /* controller registers */
11		       0x80 0x00000000 0x0 0x00002000>; /* configuration space */
12		reg-names = "regs", "config";
13
14		#address-cells = <3>;
15		#size-cells = <2>;
16		device_type = "pci";
17		dma-coherent;
18		bus-range = <0x0 0xff>;
19
20		ranges = /* 16-Bit IO Window */
21			 <0x81000000 0x00 0x00000000 0x80 0x00010000 0x00 0x00010000>,
22			 /* 32-Bit - non-prefetchable */
23			 <0x82000000 0x00 0x40000000 0x80 0x40000000 0x00 0x40000000>,
24			 /* 64-Bit - prefetchable - 16GB */
25			 <0xC3000000 0x84 0x00000000 0x84 0x00000000 0x04 0x00000000>;
26
27		interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
28		interrupt-names = "intr";
29		msi-parent = <&its 0>;
30		#interrupt-cells = <1>;
31		interrupt-map-mask = <0 0 0 7>;
32		interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
33				<0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
34				<0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
35				<0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
36		iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
37		status = "disabled";
38	};
39
40	pcie_ep1: pcie-ep@3400000 {
41		compatible = "fsl,lx2160ar2-pcie-ep";
42		reg = <0x00 0x03400000 0x0 0x00100000
43		       0x80 0x00000000 0x8 0x00000000>;
44		reg-names = "regs", "addr_space";
45		num-ob-windows = <8>;
46		num-ib-windows = <8>;
47		status = "disabled";
48	};
49
50	pcie2: pcie@3500000 {
51		compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie";
52		reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
53		       0x88 0x00000000 0x0 0x00002000>; /* configuration space */
54		reg-names = "regs", "config";
55
56		#address-cells = <3>;
57		#size-cells = <2>;
58		device_type = "pci";
59		dma-coherent;
60		bus-range = <0x0 0xff>;
61		ranges = /* 16-Bit IO Window */
62			 <0x81000000 0x00 0x00000000 0x88 0x00010000 0x00 0x00010000>,
63			 /* 32-Bit - non-prefetchable */
64			 <0x82000000 0x00 0x40000000 0x88 0x40000000 0x00 0x40000000>,
65			 /* 64-Bit - prefetchable - 16GB */
66			 <0xC3000000 0x8c 0x00000000 0x8c 0x00000000 0x04 0x00000000>;
67
68		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
69		interrupt-names = "intr";
70		msi-parent = <&its 0>;
71		#interrupt-cells = <1>;
72		interrupt-map-mask = <0 0 0 7>;
73		interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
74				<0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
75				<0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
76				<0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
77		iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
78		status = "disabled";
79	};
80
81	pcie_ep2: pcie-ep@3500000 {
82		compatible = "fsl,lx2160ar2-pcie-ep";
83		reg = <0x00 0x03500000 0x0 0x00100000
84		       0x88 0x00000000 0x8 0x00000000>;
85		reg-names = "regs", "addr_space";
86		num-ob-windows = <8>;
87		num-ib-windows = <8>;
88		status = "disabled";
89	};
90
91	pcie3: pcie@3600000 {
92		compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie";
93		reg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */
94		       0x90 0x00000000 0x0 0x00002000>; /* configuration space */
95		reg-names = "regs", "config";
96
97		#address-cells = <3>;
98		#size-cells = <2>;
99		device_type = "pci";
100		dma-coherent;
101		bus-range = <0x0 0xff>;
102		ranges = /* 16-Bit IO Window */
103			 <0x81000000 0x00 0x00000000 0x90 0x00010000 0x00 0x00010000>,
104			 /* 32-Bit - non-prefetchable */
105			 <0x82000000 0x00 0x40000000 0x90 0x40000000 0x00 0x40000000>,
106			 /* 64-Bit - prefetchable - 16GB */
107			 <0xC3000000 0x94 0x00000000 0x94 0x00000000 0x04 0x00000000>;
108
109		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
110		interrupt-names = "intr";
111
112		msi-parent = <&its 0>;
113		#interrupt-cells = <1>;
114		interrupt-map-mask = <0 0 0 7>;
115		interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
116				<0000 0 0 2 &gic 0 0 GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
117				<0000 0 0 3 &gic 0 0 GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
118				<0000 0 0 4 &gic 0 0 GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
119		iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
120		status = "disabled";
121	};
122
123	pcie_ep3: pcie-ep@3600000 {
124		compatible = "fsl,lx2160ar2-pcie-ep";
125		reg = <0x00 0x03600000 0x0 0x00100000
126		       0x90 0x00000000 0x8 0x00000000>;
127		reg-names = "regs", "addr_space";
128		num-ob-windows = <256>;
129		num-ib-windows = <24>;
130		status = "disabled";
131	};
132
133	pcie4: pcie@3700000 {
134		compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie";
135		reg = <0x00 0x03700000 0x0 0x00100000   /* controller registers */
136		       0x98 0x00000000 0x0 0x00002000>; /* configuration space */
137		reg-names = "regs", "config";
138
139		#address-cells = <3>;
140		#size-cells = <2>;
141		device_type = "pci";
142		dma-coherent;
143		bus-range = <0x0 0xff>;
144		ranges = /* 16-Bit IO Window */
145			 <0x81000000 0x00 0x00000000 0x98 0x00010000 0x00 0x00010000>,
146			 /* 32-Bit - non-prefetchable */
147			 <0x82000000 0x00 0x40000000 0x98 0x40000000 0x00 0x40000000>,
148			 /* 64-Bit - prefetchable - 16GB */
149			 <0xC3000000 0x9c 0x00000000 0x9c 0x00000000 0x04 0x00000000>;
150
151		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
152		interrupt-names = "intr";
153		msi-parent = <&its 0>;
154		#interrupt-cells = <1>;
155		interrupt-map-mask = <0 0 0 7>;
156		interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
157				<0000 0 0 2 &gic 0 0 GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
158				<0000 0 0 3 &gic 0 0 GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
159				<0000 0 0 4 &gic 0 0 GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
160		iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
161		status = "disabled";
162	};
163
164	pcie_ep4: pcie-ep@3700000 {
165		compatible = "fsl,lx2160ar2-pcie-ep";
166		reg = <0x00 0x03700000 0x0 0x00100000
167		       0x98 0x00000000 0x8 0x00000000>;
168		reg-names = "regs", "addr_space";
169		num-ob-windows = <8>;
170		num-ib-windows = <8>;
171		status = "disabled";
172	};
173
174	pcie5: pcie@3800000 {
175		compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie";
176		reg = <0x00 0x03800000 0x0 0x00100000   /* controller registers */
177		       0xa0 0x00000000 0x0 0x00002000>; /* configuration space */
178		reg-names = "regs", "config";
179
180		#address-cells = <3>;
181		#size-cells = <2>;
182		device_type = "pci";
183		dma-coherent;
184		bus-range = <0x0 0xff>;
185
186		ranges = /* 16-Bit IO Window */
187			 <0x81000000 0x00 0x00000000 0xa0 0x00010000 0x00 0x00010000>,
188			 /* 32-Bit - non-prefetchable */
189			 <0x82000000 0x00 0x40000000 0xa0 0x40000000 0x00 0x40000000>,
190			 /* 64-Bit - prefetchable - 16GB */
191			 <0xC3000000 0xa4 0x00000000 0xa4 0x00000000 0x04 0x00000000>;
192
193		interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
194		interrupt-names = "intr";
195		msi-parent = <&its 0>;
196		#interrupt-cells = <1>;
197		interrupt-map-mask = <0 0 0 7>;
198		interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
199				<0000 0 0 2 &gic 0 0 GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
200				<0000 0 0 3 &gic 0 0 GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
201				<0000 0 0 4 &gic 0 0 GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
202		iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
203		status = "disabled";
204	};
205
206	pcie_ep5: pcie-ep@3800000 {
207		compatible = "fsl,lx2160ar2-pcie-ep";
208		reg = <0x00 0x03800000 0x0 0x00100000
209		       0xa0 0x00000000 0x8 0x00000000>;
210		reg-names = "regs", "addr_space";
211		num-ob-windows = <256>;
212		num-ib-windows = <24>;
213		status = "disabled";
214	};
215
216	pcie6: pcie@3900000 {
217		compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie";
218		reg = <0x00 0x03900000 0x0 0x00100000   /* controller registers */
219		       0xa8 0x00000000 0x0 0x00002000>; /* configuration space */
220		reg-names = "regs", "config";
221
222		#address-cells = <3>;
223		#size-cells = <2>;
224		device_type = "pci";
225		dma-coherent;
226		bus-range = <0x0 0xff>;
227
228		ranges = /* 16-Bit IO Window */
229			 <0x81000000 0x00 0x00000000 0xa8 0x00010000 0x00 0x00010000>,
230			 /* 32-Bit - non-prefetchable */
231			 <0x82000000 0x00 0x40000000 0xa8 0x40000000 0x00 0x40000000>,
232			 /* 64-Bit - prefetchable - 16GB */
233			 <0xC3000000 0xac 0x00000000 0xac 0x00000000 0x04 0x00000000>;
234
235		interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
236		interrupt-names = "intr";
237		msi-parent = <&its 0>;
238		#interrupt-cells = <1>;
239		interrupt-map-mask = <0 0 0 7>;
240		interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
241				<0000 0 0 2 &gic 0 0 GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
242				<0000 0 0 3 &gic 0 0 GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
243				<0000 0 0 4 &gic 0 0 GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
244		iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
245		status = "disabled";
246	};
247
248	pcie_ep6: pcie-ep@3900000 {
249		compatible = "fsl,lx2160ar2-pcie-ep";
250		reg = <0x00 0x03900000 0x0 0x00100000
251		       0xa8 0x00000000 0x8 0x00000000>;
252		reg-names = "regs", "addr_space";
253		num-ob-windows = <8>;
254		num-ib-windows = <8>;
255		status = "disabled";
256	};
257};
258