xref: /linux/scripts/dtc/include-prefixes/arm64/aspeed/aspeed-g7-soc1-pinctrl.dtsi (revision 9611c0ce215a66770ccbe5c126bf57ba8c31bcad) 
1// SPDX-License-Identifier: GPL-2.0-only OR MIT
2// Copyright 2025 ASPEED Corp.
3
4&pinctrl1 {
5	pinctrl_sgpm0_default: sgpm0-default-state {
6		function = "SGPM0";
7		groups = "SGPM0";
8	};
9
10	pinctrl_dsgpm0_default: dsgpm0-default-state {
11		function = "SGPM0";
12		groups = "DSGPM0";
13	};
14
15	pinctrl_sgpm1_default: sgpm1-default-state {
16		function = "SGPM1";
17		groups = "SGPM1";
18	};
19
20	pinctrl_sgps_default: sgps-default-state {
21		function = "SGPS";
22		groups = "SGPS";
23	};
24
25	pinctrl_adc0_default: adc0-default-state {
26		function = "ADC0";
27		groups = "ADC0";
28	};
29
30	pinctrl_adc1_default: adc1-default-state {
31		function = "ADC1";
32		groups = "ADC1";
33	};
34
35	pinctrl_adc2_default: adc2-default-state {
36		function = "ADC2";
37		groups = "ADC2";
38	};
39
40	pinctrl_adc3_default: adc3-default-state {
41		function = "ADC3";
42		groups = "ADC3";
43	};
44
45	pinctrl_adc4_default: adc4-default-state {
46		function = "ADC4";
47		groups = "ADC4";
48	};
49
50	pinctrl_adc5_default: adc5-default-state {
51		function = "ADC5";
52		groups = "ADC5";
53	};
54
55	pinctrl_adc6_default: adc6-default-state {
56		function = "ADC6";
57		groups = "ADC6";
58	};
59
60	pinctrl_adc7_default: adc7-default-state {
61		function = "ADC7";
62		groups = "ADC7";
63	};
64
65	pinctrl_adc8_default: adc8-default-state {
66		function = "ADC8";
67		groups = "ADC8";
68	};
69
70	pinctrl_adc9_default: adc9-default-state {
71		function = "ADC9";
72		groups = "ADC9";
73	};
74
75	pinctrl_adc10_default: adc10-default-state {
76		function = "ADC10";
77		groups = "ADC10";
78	};
79
80	pinctrl_adc11_default: adc11-default-state {
81		function = "ADC11";
82		groups = "ADC11";
83	};
84
85	pinctrl_adc12_default: adc12-default-state {
86		function = "ADC12";
87		groups = "ADC12";
88	};
89
90	pinctrl_adc13_default: adc13-default-state {
91		function = "ADC13";
92		groups = "ADC13";
93	};
94
95	pinctrl_adc14_default: adc14-default-state {
96		function = "ADC14";
97		groups = "ADC14";
98	};
99
100	pinctrl_adc15_default: adc15-default-state {
101		function = "ADC15";
102		groups = "ADC15";
103	};
104
105	pinctrl_pwm0_default: pwm0-default-state {
106		function = "PWM0";
107		groups = "PWM0";
108	};
109
110	pinctrl_pwm1_default: pwm1-default-state {
111		function = "PWM1";
112		groups = "PWM1";
113	};
114
115	pinctrl_pwm2_default: pwm2-default-state {
116		function = "PWM2";
117		groups = "PWM2";
118	};
119
120	pinctrl_pwm3_default: pwm3-default-state {
121		function = "PWM3";
122		groups = "PWM3";
123	};
124
125	pinctrl_pwm4_default: pwm4-default-state {
126		function = "PWM4";
127		groups = "PWM4";
128	};
129
130	pinctrl_pwm5_default: pwm5-default-state {
131		function = "PWM5";
132		groups = "PWM5";
133	};
134
135	pinctrl_pwm6_default: pwm6-default-state {
136		function = "PWM6";
137		groups = "PWM6";
138	};
139
140	pinctrl_pwm7_default: pwm7-default-state {
141		function = "PWM7";
142		groups = "PWM7";
143	};
144
145	pinctrl_pwm8_default: pwm8-default-state {
146		function = "PWM8";
147		groups = "PWM8";
148	};
149
150	pinctrl_pwm9_default: pwm9-default-state {
151		function = "PWM9";
152		groups = "PWM9";
153	};
154
155	pinctrl_pwm10_default: pwm10-default-state {
156		function = "PWM10";
157		groups = "PWM10";
158	};
159
160	pinctrl_pwm11_default: pwm11-default-state {
161		function = "PWM11";
162		groups = "PWM11";
163	};
164
165	pinctrl_pwm12_default: pwm12-default-state {
166		function = "PWM12";
167		groups = "PWM12";
168	};
169
170	pinctrl_pwm13_default: pwm13-default-state {
171		function = "PWM13";
172		groups = "PWM13";
173	};
174
175	pinctrl_pwm14_default: pwm14-default-state {
176		function = "PWM14";
177		groups = "PWM14";
178	};
179
180	pinctrl_pwm15_default: pwm15-default-state {
181		function = "PWM15";
182		groups = "PWM15";
183	};
184
185	pinctrl_tach0_default: tach0-default-state {
186		function = "TACH0";
187		groups = "TACH0";
188	};
189
190	pinctrl_tach1_default: tach1-default-state {
191		function = "TACH1";
192		groups = "TACH1";
193	};
194
195	pinctrl_tach2_default: tach2-default-state {
196		function = "TACH2";
197		groups = "TACH2";
198	};
199
200	pinctrl_tach3_default: tach3-default-state {
201		function = "TACH3";
202		groups = "TACH3";
203	};
204
205	pinctrl_tach4_default: tach4-default-state {
206		function = "TACH4";
207		groups = "TACH4";
208	};
209
210	pinctrl_tach5_default: tach5-default-state {
211		function = "TACH5";
212		groups = "TACH5";
213	};
214
215	pinctrl_tach6_default: tach6-default-state {
216		function = "TACH6";
217		groups = "TACH6";
218	};
219
220	pinctrl_tach7_default: tach7-default-state {
221		function = "TACH7";
222		groups = "TACH7";
223	};
224
225	pinctrl_tach8_default: tach8-default-state {
226		function = "TACH8";
227		groups = "TACH8";
228	};
229
230	pinctrl_tach9_default: tach9-default-state {
231		function = "TACH9";
232		groups = "TACH9";
233	};
234
235	pinctrl_tach10_default: tach10-default-state {
236		function = "TACH10";
237		groups = "TACH10";
238	};
239
240	pinctrl_tach11_default: tach11-default-state {
241		function = "TACH11";
242		groups = "TACH11";
243	};
244
245	pinctrl_tach12_default: tach12-default-state {
246		function = "TACH12";
247		groups = "TACH12";
248	};
249
250	pinctrl_tach13_default: tach13-default-state {
251		function = "TACH13";
252		groups = "TACH13";
253	};
254
255	pinctrl_tach14_default: tach14-default-state {
256		function = "TACH14";
257		groups = "TACH14";
258	};
259
260	pinctrl_tach15_default: tach15-default-state {
261		function = "TACH15";
262		groups = "TACH15";
263	};
264
265	pinctrl_jtagm1_default: jtagm1-default-state {
266		function = "JTAGM1";
267		groups = "JTAGM1";
268	};
269
270	pinctrl_mdio0_default: mdio0-default-state {
271		function = "MDIO0";
272		groups = "MDIO0";
273	};
274
275	pinctrl_mdio1_default: mdio1-default-state {
276		function = "MDIO1";
277		groups = "MDIO1";
278	};
279
280	pinctrl_mdio2_default: mdio2-default-state {
281		function = "MDIO2";
282		groups = "MDIO2";
283	};
284
285	pinctrl_rgmii0_default: rgmii0-default-state {
286		function = "RGMII0";
287		groups = "RGMII0";
288	};
289
290	pinctrl_rgmii1_default: rgmii1-default-state {
291		function = "RGMII1";
292		groups = "RGMII1";
293	};
294
295	pinctrl_rmii0_default: rmii0-default-state {
296		function = "RMII0";
297		groups = "RMII0";
298	};
299
300	pinctrl_rmii0_rclko_default: rmii0-rclko-default-state {
301		function = "RMII0RCLKO";
302		groups = "RMII0RCLKO";
303	};
304
305	pinctrl_rmii1_default: rmii1-default-state {
306		function = "RMII1";
307		groups = "RMII1";
308	};
309
310	pinctrl_rmii1_rclko_default: rmii1-rclko-default-state {
311		function = "RMII1RCLKO";
312		groups = "RMII1RCLKO";
313	};
314
315	pinctrl_sgmii_default: sgmii-default-state {
316		function = "SGMII";
317		groups = "SGMII";
318	};
319
320	pinctrl_fwspi_quad_default: fwspi-quad-default-state {
321		function = "FWQSPI";
322		groups = "FWQSPI";
323	};
324
325	pinctrl_fsi0_default: fsi0-default-state {
326		function = "FSI0";
327		groups = "FSI0";
328	};
329
330	pinctrl_fsi1_default: fsi1-default-state {
331		function = "FSI1";
332		groups = "FSI1";
333	};
334
335	pinctrl_fsi2_default: fsi2-default-state {
336		function = "FSI2";
337		groups = "FSI2";
338	};
339
340	pinctrl_fsi3_default: fsi3-default-state {
341		function = "FSI3";
342		groups = "FSI3";
343	};
344
345	pinctrl_spi0_default: spi0-default-state {
346		function = "SPI0";
347		groups = "SPI0";
348	};
349
350	pinctrl_spi0_quad_default: spi0-quad-default-state {
351		function = "QSPI0";
352		groups = "QSPI0";
353	};
354
355	pinctrl_spi0_cs1_default: spi0-cs1-default-state {
356		function = "SPI0CS1";
357		groups = "SPI0CS1";
358	};
359
360	pinctrl_spi1_default: spi1-default-state {
361		function = "SPI1";
362		groups = "SPI1";
363	};
364
365	pinctrl_spi1_quad_default: spi1-quad-default-state {
366		function = "QSPI1";
367		groups = "QSPI1";
368	};
369
370	pinctrl_spi1_cs1_default: spi1-cs1-default-state {
371		function = "SPI1CS1";
372		groups = "SPI1CS1";
373	};
374
375	pinctrl_spi2_default: spi2-default-state {
376		function = "SPI2";
377		groups = "SPI2";
378	};
379
380	pinctrl_spi2_quad_default: spi2-quad-default-state {
381		function = "QSPI2";
382		groups = "QSPI2";
383	};
384
385	pinctrl_spi2_cs1_default: spi2-cs1-default-state {
386		function = "SPI2CS1";
387		groups = "SPI2CS1";
388	};
389
390	pinctrl_espi0_default: espi0-default-state {
391		function = "ESPI0";
392		groups = "ESPI0";
393	};
394
395	pinctrl_espi1_default: espi1-default-state {
396		function = "ESPI1";
397		groups = "ESPI1";
398	};
399
400	pinctrl_lpc0_default: lpc0-default-state {
401		function = "LPC0";
402		groups = "LPC0";
403	};
404
405	pinctrl_lpc1_default: lpc1-default-state {
406		function = "LPC1";
407		groups = "LPC1";
408	};
409
410	pinctrl_vpi_default: vpi-default-state {
411		function = "VPI";
412		groups = "VPI";
413	};
414
415	pinctrl_sd_default: sd-default-state {
416		function = "SD";
417		groups = "SD";
418	};
419
420	pinctrl_hvi3c0_default: hvi3c0-default-state {
421		function = "I3C0";
422		groups = "HVI3C0";
423	};
424
425	pinctrl_hvi3c1_default: hvi3c1-default-state {
426		function = "I3C1";
427		groups = "HVI3C1";
428	};
429
430	pinctrl_hvi3c2_default: hvi3c2-default-state {
431		function = "I3C2";
432		groups = "HVI3C2";
433	};
434
435	pinctrl_hvi3c3_default: hvi3c3-default-state {
436		function = "I3C3";
437		groups = "HVI3C3";
438	};
439
440	pinctrl_i3c4_default: i3c4-default-state {
441		function = "I3C4";
442		groups = "I3C4";
443	};
444
445	pinctrl_i3c5_default: i3c5-default-state {
446		function = "I3C5";
447		groups = "I3C5";
448	};
449
450	pinctrl_i3c6_default: i3c6-default-state {
451		function = "I3C6";
452		groups = "I3C6";
453	};
454
455	pinctrl_i3c7_default: i3c7-default-state {
456		function = "I3C7";
457		groups = "I3C7";
458	};
459
460	pinctrl_i3c8_default: i3c8-default-state {
461		function = "I3C8";
462		groups = "I3C8";
463	};
464
465	pinctrl_i3c9_default: i3c9-default-state {
466		function = "I3C9";
467		groups = "I3C9";
468	};
469
470	pinctrl_i3c10_default: i3c10-default-state {
471		function = "I3C10";
472		groups = "I3C10";
473	};
474
475	pinctrl_i3c11_default: i3c11-default-state {
476		function = "I3C11";
477		groups = "I3C11";
478	};
479
480	pinctrl_hvi3c12_default: hvi3c12-default-state {
481		function = "I3C12";
482		groups = "HVI3C12";
483	};
484
485	pinctrl_hvi3c13_default: hvi3c13-default-state {
486		function = "I3C13";
487		groups = "HVI3C13";
488	};
489
490	pinctrl_hvi3c14_default: hvi3c14-default-state {
491		function = "I3C14";
492		groups = "HVI3C14";
493	};
494
495	pinctrl_hvi3c15_default: hvi3c15-default-state {
496		function = "I3C15";
497		groups = "HVI3C15";
498	};
499	pinctrl_thru0_default: thru0-default-state {
500		function = "THRU0";
501		groups = "THRU0";
502	};
503
504	pinctrl_thru1_default: thru1-default-state {
505		function = "THRU1";
506		groups = "THRU1";
507	};
508
509	pinctrl_thru2_default: thru2-default-state {
510		function = "THRU2";
511		groups = "THRU2";
512	};
513
514	pinctrl_thru3_default: thru3-default-state {
515		function = "THRU3";
516		groups = "THRU3";
517	};
518
519	pinctrl_ncts5_default: ncts5-default-state {
520		function = "NCTS5";
521		groups = "NCTS5";
522	};
523
524	pinctrl_ndcd5_default: ndcd5-default-state {
525		function = "NDCD5";
526		groups = "NDCD5";
527	};
528
529	pinctrl_ndsr5_default: ndsr5-default-state {
530		function = "NDSR5";
531		groups = "NDSR5";
532	};
533
534	pinctrl_nri5_default: nri5-default-state {
535		function = "NRI5";
536		groups = "NRI5";
537	};
538
539	pinctrl_i2c0_default: i2c0-default-state {
540		function = "I2C0";
541		groups = "I2C0";
542	};
543
544	pinctrl_i2c1_default: i2c1-default-state {
545		function = "I2C1";
546		groups = "I2C1";
547	};
548
549	pinctrl_i2c2_default: i2c2-default-state {
550		function = "I2C2";
551		groups = "I2C2";
552	};
553
554	pinctrl_i2c3_default: i2c3-default-state {
555		function = "I2C3";
556		groups = "I2C3";
557	};
558
559	pinctrl_i2c4_default: i2c4-default-state {
560		function = "I2C4";
561		groups = "I2C4";
562	};
563
564	pinctrl_i2c5_default: i2c5-default-state {
565		function = "I2C5";
566		groups = "I2C5";
567	};
568
569	pinctrl_i2c6_default: i2c6-default-state {
570		function = "I2C6";
571		groups = "I2C6";
572	};
573
574	pinctrl_i2c7_default: i2c7-default-state {
575		function = "I2C7";
576		groups = "I2C7";
577	};
578
579	pinctrl_i2c8_default: i2c8-default-state {
580		function = "I2C8";
581		groups = "I2C8";
582	};
583
584	pinctrl_i2c9_default: i2c9-default-state {
585		function = "I2C9";
586		groups = "I2C9";
587	};
588
589	pinctrl_i2c10_default: i2c10-default-state {
590		function = "I2C10";
591		groups = "I2C10";
592	};
593
594	pinctrl_i2c11_default: i2c11-default-state {
595		function = "I2C11";
596		groups = "I2C11";
597	};
598
599	pinctrl_i2c12_default: i2c12-default-state {
600		function = "I2C12";
601		groups = "I2C12";
602	};
603
604	pinctrl_i2c13_default: i2c13-default-state {
605		function = "I2C13";
606		groups = "I2C13";
607	};
608
609	pinctrl_i2c14_default: i2c14-default-state {
610		function = "I2C14";
611		groups = "I2C14";
612	};
613
614	pinctrl_i2c15_default: i2c15-default-state {
615		function = "I2C15";
616		groups = "I2C15";
617	};
618
619	pinctrl_salt0_default: salt0-default-state {
620		function = "SALT0";
621		groups = "SALT0";
622	};
623
624	pinctrl_salt1_default: salt1-default-state {
625		function = "SALT1";
626		groups = "SALT1";
627	};
628
629	pinctrl_salt2_default: salt2-default-state {
630		function = "SALT2";
631		groups = "SALT2";
632	};
633
634	pinctrl_salt3_default: salt3-default-state {
635		function = "SALT3";
636		groups = "SALT3";
637	};
638
639	pinctrl_salt4_default: salt4-default-state {
640		function = "SALT4";
641		groups = "SALT4";
642	};
643
644	pinctrl_salt5_default: salt5-default-state {
645		function = "SALT5";
646		groups = "SALT5";
647	};
648
649	pinctrl_salt6_default: salt6-default-state {
650		function = "SALT6";
651		groups = "SALT6";
652	};
653
654	pinctrl_salt7_default: salt7-default-state {
655		function = "SALT7";
656		groups = "SALT7";
657	};
658
659	pinctrl_salt8_default: salt8-default-state {
660		function = "SALT8";
661		groups = "SALT8";
662	};
663
664	pinctrl_salt9_default: salt9-default-state {
665		function = "SALT9";
666		groups = "SALT9";
667	};
668
669	pinctrl_salt10_default: salt10-default-state {
670		function = "SALT10";
671		groups = "SALT10";
672	};
673
674	pinctrl_salt11_default: salt11-default-state {
675		function = "SALT11";
676		groups = "SALT11";
677	};
678
679	pinctrl_salt12_default: salt12-default-state {
680		function = "SALT12";
681		groups = "SALT12";
682	};
683
684	pinctrl_salt13_default: salt13-default-state {
685		function = "SALT13";
686		groups = "SALT13";
687	};
688
689	pinctrl_salt14_default: salt14-default-state {
690		function = "SALT14";
691		groups = "SALT14";
692	};
693
694	pinctrl_salt15_default: salt15-default-state {
695		function = "SALT15";
696		groups = "SALT15";
697	};
698
699	pinctrl_ltpipsi2c0_default: ltpipsi2c0-default-state {
700		function = "I2C0";
701		groups = "LTPI_PS_I2C0";
702	};
703
704	pinctrl_ltpipsi2c1_default: ltpipsi2c1-default-state {
705		function = "I2C1";
706		groups = "LTPI_PS_I2C1";
707	};
708
709	pinctrl_ltpipsi2c2_default: ltpipsi2c2-default-state {
710		function = "I2C2";
711		groups = "LTPI_PS_I2C2";
712	};
713
714	pinctrl_ltpipsi2c3_default: ltpipsi2c3-default-state {
715		function = "I2C3";
716		groups = "LTPI_PS_I2C3";
717	};
718
719	pinctrl_can_default: can-default-state {
720		function = "CANBUS";
721		groups = "CANBUS";
722	};
723
724	pinctrl_di2c0_default: di2c0-default-state {
725		function = "I2C0";
726		groups = "DI2C0";
727	};
728
729	pinctrl_di2c1_default: di2c1-default-state {
730		function = "I2C1";
731		groups = "DI2C1";
732	};
733
734	pinctrl_di2c2_default: di2c2-default-state {
735		function = "I2C2";
736		groups = "DI2C2";
737	};
738
739	pinctrl_di2c3_default: di2c3-default-state {
740		function = "I2C3";
741		groups = "DI2C3";
742	};
743	pinctrl_di2c8_default: di2c8-default-state {
744		function = "I2C8";
745		groups = "DI2C8";
746	};
747
748	pinctrl_di2c9_default: di2c9-default-state {
749		function = "I2C9";
750		groups = "DI2C9";
751	};
752
753	pinctrl_di2c10_default: di2c10-default-state {
754		function = "I2C10";
755		groups = "DI2C10";
756	};
757
758	pinctrl_di2c11_default: di2c11-default-state {
759		function = "I2C11";
760		groups = "DI2C11";
761	};
762
763	pinctrl_di2c12_default: di2c12-default-state {
764		function = "I2C12";
765		groups = "DI2C12";
766	};
767
768	pinctrl_di2c13_default: di2c13-default-state {
769		function = "I2C13";
770		groups = "DI2C13";
771	};
772
773	pinctrl_di2c14_default: di2c14-default-state {
774		function = "I2C14";
775		groups = "DI2C14";
776	};
777
778	pinctrl_di2c15_default: di2c15-default-state {
779		function = "I2C15";
780		groups = "DI2C15";
781	};
782
783	pinctrl_ncts0_default: ncts0-default-state {
784		function = "NCTS0";
785		groups = "NCTS0";
786	};
787
788	pinctrl_ndcd0_default: ndcd0-default-state {
789		function = "NDCD0";
790		groups = "NDCD0";
791	};
792
793	pinctrl_ndsr0_default: ndsr0-default-state {
794		function = "NDSR0";
795		groups = "NDSR0";
796	};
797
798	pinctrl_nri0_default: nri0-default-state {
799		function = "NRI0";
800		groups = "NRI0";
801	};
802
803	pinctrl_ndtr0_default: ndtr0-default-state {
804		function = "NDTR0";
805		groups = "NDTR0";
806	};
807
808	pinctrl_nrts0_default: nrts0-default-state {
809		function = "NRTS0";
810		groups = "NRTS0";
811	};
812
813	pinctrl_uart0_default: uart0-default-state {
814		function = "UART0";
815		groups = "UART0";
816	};
817
818	pinctrl_ncts1_default: ncts1-default-state {
819		function = "NCTS1";
820		groups = "NCTS1";
821	};
822
823	pinctrl_ndcd1_default: ndcd1-default-state {
824		function = "NDCD1";
825		groups = "NDCD1";
826	};
827
828	pinctrl_ndsr1_default: ndsr1-default-state {
829		function = "NDSR1";
830		groups = "NDSR1";
831	};
832
833	pinctrl_nri1_default: nri1-default-state {
834		function = "NRI1";
835		groups = "NRI1";
836	};
837
838	pinctrl_ndtr1_default: ndtr1-default-state {
839		function = "NDTR1";
840		groups = "NDTR1";
841	};
842
843	pinctrl_nrts1_default: nrts1-default-state {
844		function = "NRTS1";
845		groups = "NRTS1";
846	};
847
848	pinctrl_uart1_default: uart1-default-state {
849		function = "UART1";
850		groups = "UART1";
851	};
852
853	pinctrl_uart2_default: uart2-default-state {
854		function = "UART2";
855		groups = "UART2";
856	};
857
858	pinctrl_uart3_default: uart3-default-state {
859		function = "UART3";
860		groups = "UART3";
861	};
862	pinctrl_ndtr5_default: ndtr5-default-state {
863		function = "NDTR5";
864		groups = "NDTR5";
865	};
866
867	pinctrl_nrts5_default: nrts5-default-state {
868		function = "NRTS5";
869		groups = "NRTS5";
870	};
871
872	pinctrl_uart5_default: uart5-default-state {
873		function = "UART5";
874		groups = "UART5";
875	};
876
877	pinctrl_ncts6_default: ncts6-default-state {
878		function = "NCTS6";
879		groups = "NCTS6";
880	};
881
882	pinctrl_ndcd6_default: ndcd6-default-state {
883		function = "NDCD6";
884		groups = "NDCD6";
885	};
886
887	pinctrl_ndsr6_default: ndsr6-default-state {
888		function = "NDSR6";
889		groups = "NDSR6";
890	};
891
892	pinctrl_nri6_default: nri6-default-state {
893		function = "NRI6";
894		groups = "NRI6";
895	};
896
897	pinctrl_ndtr6_default: ndtr6-default-state {
898		function = "NDTR6";
899		groups = "NDTR6";
900	};
901
902	pinctrl_nrts6_default: nrts6-default-state {
903		function = "NRTS6";
904		groups = "NRTS6";
905	};
906
907	pinctrl_uart6_default: uart6-default-state {
908		function = "UART6";
909		groups = "UART6";
910	};
911
912	pinctrl_uart7_default: uart7-default-state {
913		function = "UART7";
914		groups = "UART7";
915	};
916
917	pinctrl_uart8_default: uart8-default-state {
918		function = "UART8";
919		groups = "UART8";
920	};
921
922	pinctrl_uart9_default: uart9-default-state {
923		function = "UART9";
924		groups = "UART9";
925	};
926
927	pinctrl_uart10_default: uart10-default-state {
928		function = "UART10";
929		groups = "UART10";
930	};
931
932	pinctrl_uart11_default: uart11-default-state {
933		function = "UART11";
934		groups = "UART11";
935	};
936
937	pinctrl_pcierc2_perst_default: pcierc2-perst-default-state {
938		function = "PCIERC";
939		groups = "PE2SGRSTN";
940	};
941
942	pinctrl_usb2cud_default: usb2cud-default-state {
943		function = "USB2C";
944		groups = "USB2CUD";
945	};
946
947	pinctrl_usb2cd_default: usb2cd-default-state {
948		function = "USB2C";
949		groups = "USB2CD";
950	};
951
952	pinctrl_usb2ch_default: usb2ch-default-state {
953		function = "USB2C";
954		groups = "USB2CH";
955	};
956
957	pinctrl_usb2cu_default: usb2cu-default-state {
958		function = "USB2C";
959		groups = "USB2CU";
960	};
961
962	pinctrl_usb2dd_default: usb2dd-default-state {
963		function = "USB2D";
964		groups = "USB2DD";
965	};
966
967	pinctrl_usb2dh_default: usb2dh-default-state {
968		function = "USB2D";
969		groups = "USB2DH";
970	};
971
972	pinctrl_wdtrst0n_default: wdtrst0n-default-state {
973		function = "WDTRST0N";
974		groups = "WDTRST0N";
975	};
976
977	pinctrl_wdtrst1n_default: wdtrst1n-default-state {
978		function = "WDTRST1N";
979		groups = "WDTRST1N";
980	};
981
982	pinctrl_wdtrst2n_default: wdtrst2n-default-state {
983		function = "WDTRST2N";
984		groups = "WDTRST2N";
985	};
986
987	pinctrl_wdtrst3n_default: wdtrst3n-default-state {
988		function = "WDTRST3N";
989		groups = "WDTRST3N";
990	};
991
992	pinctrl_wdtrst4n_default: wdtrst4n-default-state {
993		function = "WDTRST4N";
994		groups = "WDTRST4N";
995	};
996
997	pinctrl_wdtrst5n_default: wdtrst5n-default-state {
998		function = "WDTRST5N";
999		groups = "WDTRST5N";
1000	};
1001
1002	pinctrl_wdtrst6n_default: wdtrst6n-default-state {
1003		function = "WDTRST6N";
1004		groups = "WDTRST6N";
1005	};
1006
1007	pinctrl_wdtrst7n_default: wdtrst7n-default-state {
1008		function = "WDTRST7N";
1009		groups = "WDTRST7N";
1010	};
1011};
1012