1*e77bb5dcSRyan Chen// SPDX-License-Identifier: GPL-2.0-only OR MIT 2*e77bb5dcSRyan Chen/* 3*e77bb5dcSRyan Chen * Device Tree Source for AST27xx SoC Family Main Domain peripherals 4*e77bb5dcSRyan Chen * 5*e77bb5dcSRyan Chen * Copyright (C) 2026 ASPEED Technology Inc. 6*e77bb5dcSRyan Chen */ 7*e77bb5dcSRyan Chen 8*e77bb5dcSRyan Chen#include <dt-bindings/clock/aspeed,ast2700-scu.h> 9*e77bb5dcSRyan Chen#include <dt-bindings/reset/aspeed,ast2700-scu.h> 10*e77bb5dcSRyan Chen#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 11*e77bb5dcSRyan Chen 12*e77bb5dcSRyan Chen&soc0 { 13*e77bb5dcSRyan Chen sram0: sram@10000000 { 14*e77bb5dcSRyan Chen compatible = "mmio-sram"; 15*e77bb5dcSRyan Chen reg = <0x0 0x10000000 0x0 0x20000>; 16*e77bb5dcSRyan Chen ranges = <0x0 0x0 0x10000000 0x20000>; 17*e77bb5dcSRyan Chen #address-cells = <1>; 18*e77bb5dcSRyan Chen #size-cells = <1>; 19*e77bb5dcSRyan Chen 20*e77bb5dcSRyan Chen soc0-sram@0 { 21*e77bb5dcSRyan Chen reg = <0x0 0x20000>; 22*e77bb5dcSRyan Chen export; 23*e77bb5dcSRyan Chen }; 24*e77bb5dcSRyan Chen }; 25*e77bb5dcSRyan Chen 26*e77bb5dcSRyan Chen vhuba1: usb-vhub@12011000 { 27*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-usb-vhub"; 28*e77bb5dcSRyan Chen reg = <0x0 0x12011000 0x0 0x820>; 29*e77bb5dcSRyan Chen interrupts-extended = <&intc0 32>; 30*e77bb5dcSRyan Chen clocks = <&syscon0 SCU0_CLK_GATE_PORTAUSB2CLK>; 31*e77bb5dcSRyan Chen resets = <&syscon0 SCU0_RESET_PORTA_VHUB>; 32*e77bb5dcSRyan Chen aspeed,vhub-downstream-ports = <7>; 33*e77bb5dcSRyan Chen aspeed,vhub-generic-endpoints = <21>; 34*e77bb5dcSRyan Chen pinctrl-names = "default"; 35*e77bb5dcSRyan Chen pinctrl-0 = <&pinctrl_usb2axhpd1_default>; 36*e77bb5dcSRyan Chen status = "disabled"; 37*e77bb5dcSRyan Chen }; 38*e77bb5dcSRyan Chen 39*e77bb5dcSRyan Chen vhubb1: usb-vhub@12021000 { 40*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-usb-vhub"; 41*e77bb5dcSRyan Chen reg = <0x0 0x12021000 0x0 0x820>; 42*e77bb5dcSRyan Chen interrupts-extended = <&intc0 36>; 43*e77bb5dcSRyan Chen clocks = <&syscon0 SCU0_CLK_GATE_PORTBUSB2CLK>; 44*e77bb5dcSRyan Chen resets = <&syscon0 SCU0_RESET_PORTB_VHUB>; 45*e77bb5dcSRyan Chen aspeed,vhub-downstream-ports = <7>; 46*e77bb5dcSRyan Chen aspeed,vhub-generic-endpoints = <21>; 47*e77bb5dcSRyan Chen pinctrl-names = "default"; 48*e77bb5dcSRyan Chen pinctrl-0 = <&pinctrl_usb2bxhpd1_default>; 49*e77bb5dcSRyan Chen status = "disabled"; 50*e77bb5dcSRyan Chen }; 51*e77bb5dcSRyan Chen 52*e77bb5dcSRyan Chen uhci0: usb@12040000 { 53*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-uhci", "generic-uhci"; 54*e77bb5dcSRyan Chen reg = <0x0 0x12040000 0x0 0x100>; 55*e77bb5dcSRyan Chen interrupts-extended = <&intc0 10>; 56*e77bb5dcSRyan Chen #ports = <2>; 57*e77bb5dcSRyan Chen clocks = <&syscon0 SCU0_CLK_GATE_UHCICLK>; 58*e77bb5dcSRyan Chen resets = <&syscon0 SCU0_RESET_UHCI>; 59*e77bb5dcSRyan Chen status = "disabled"; 60*e77bb5dcSRyan Chen }; 61*e77bb5dcSRyan Chen 62*e77bb5dcSRyan Chen vhuba0: usb-vhub@12060000 { 63*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-usb-vhub"; 64*e77bb5dcSRyan Chen reg = <0x0 0x12060000 0x0 0x820>; 65*e77bb5dcSRyan Chen interrupts-extended = <&intc0 33>; 66*e77bb5dcSRyan Chen clocks = <&syscon0 SCU0_CLK_GATE_PORTAUSB2CLK>; 67*e77bb5dcSRyan Chen resets = <&syscon0 SCU0_RESET_PORTA_VHUB_EHCI>; 68*e77bb5dcSRyan Chen aspeed,vhub-downstream-ports = <7>; 69*e77bb5dcSRyan Chen aspeed,vhub-generic-endpoints = <21>; 70*e77bb5dcSRyan Chen pinctrl-names = "default"; 71*e77bb5dcSRyan Chen pinctrl-0 = <&pinctrl_usb2ad0_default>; 72*e77bb5dcSRyan Chen status = "disabled"; 73*e77bb5dcSRyan Chen }; 74*e77bb5dcSRyan Chen 75*e77bb5dcSRyan Chen ehci0: usb@12061000 { 76*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-ehci", "generic-ehci"; 77*e77bb5dcSRyan Chen reg = <0x0 0x12061000 0x0 0x100>; 78*e77bb5dcSRyan Chen interrupts-extended = <&intc0 33>; 79*e77bb5dcSRyan Chen clocks = <&syscon0 SCU0_CLK_GATE_PORTAUSB2CLK>; 80*e77bb5dcSRyan Chen resets = <&syscon0 SCU0_RESET_PORTA_VHUB_EHCI>; 81*e77bb5dcSRyan Chen pinctrl-names = "default"; 82*e77bb5dcSRyan Chen pinctrl-0 = <&pinctrl_usb2ah_default>; 83*e77bb5dcSRyan Chen status = "disabled"; 84*e77bb5dcSRyan Chen }; 85*e77bb5dcSRyan Chen 86*e77bb5dcSRyan Chen vhubb0: usb-vhub@12062000 { 87*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-usb-vhub"; 88*e77bb5dcSRyan Chen reg = <0x0 0x12062000 0x0 0x820>; 89*e77bb5dcSRyan Chen interrupts-extended = <&intc0 37>; 90*e77bb5dcSRyan Chen clocks = <&syscon0 SCU0_CLK_GATE_PORTBUSB2CLK>; 91*e77bb5dcSRyan Chen resets = <&syscon0 SCU0_RESET_PORTB_VHUB_EHCI>; 92*e77bb5dcSRyan Chen aspeed,vhub-downstream-ports = <7>; 93*e77bb5dcSRyan Chen aspeed,vhub-generic-endpoints = <21>; 94*e77bb5dcSRyan Chen pinctrl-names = "default"; 95*e77bb5dcSRyan Chen pinctrl-0 = <&pinctrl_usb2bd0_default>; 96*e77bb5dcSRyan Chen status = "disabled"; 97*e77bb5dcSRyan Chen }; 98*e77bb5dcSRyan Chen 99*e77bb5dcSRyan Chen ehci1: usb@12063000 { 100*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-ehci", "generic-ehci"; 101*e77bb5dcSRyan Chen reg = <0x0 0x12063000 0x0 0x100>; 102*e77bb5dcSRyan Chen interrupts-extended = <&intc0 37>; 103*e77bb5dcSRyan Chen clocks = <&syscon0 SCU0_CLK_GATE_PORTBUSB2CLK>; 104*e77bb5dcSRyan Chen resets = <&syscon0 SCU0_RESET_PORTB_VHUB_EHCI>; 105*e77bb5dcSRyan Chen pinctrl-names = "default"; 106*e77bb5dcSRyan Chen pinctrl-0 = <&pinctrl_usb2bh_default>; 107*e77bb5dcSRyan Chen status = "disabled"; 108*e77bb5dcSRyan Chen }; 109*e77bb5dcSRyan Chen 110*e77bb5dcSRyan Chen emmc_controller: sdc@12090000 { 111*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-sd-controller", "aspeed,ast2600-sd-controller"; 112*e77bb5dcSRyan Chen reg = <0 0x12090000 0 0x100>; 113*e77bb5dcSRyan Chen #address-cells = <1>; 114*e77bb5dcSRyan Chen #size-cells = <1>; 115*e77bb5dcSRyan Chen ranges = <0x0 0x0 0x12090000 0x10000>; 116*e77bb5dcSRyan Chen clocks = <&syscon0 SCU0_CLK_GATE_EMMCCLK>; 117*e77bb5dcSRyan Chen resets = <&syscon0 SCU0_RESET_EMMC>; 118*e77bb5dcSRyan Chen status = "disabled"; 119*e77bb5dcSRyan Chen 120*e77bb5dcSRyan Chen emmc: sdhci@100 { 121*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-sdhci", "aspeed,ast2600-sdhci"; 122*e77bb5dcSRyan Chen reg = <0x100 0x100>; 123*e77bb5dcSRyan Chen sdhci,auto-cmd12; 124*e77bb5dcSRyan Chen interrupts-extended = <&intc0 15>; 125*e77bb5dcSRyan Chen clocks = <&syscon0 SCU0_CLK_GATE_EMMCCLK>; 126*e77bb5dcSRyan Chen status = "disabled"; 127*e77bb5dcSRyan Chen }; 128*e77bb5dcSRyan Chen }; 129*e77bb5dcSRyan Chen 130*e77bb5dcSRyan Chen intc0: interrupt-controller@12100000 { 131*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-intc0"; 132*e77bb5dcSRyan Chen reg = <0x0 0x12100000 0x0 0x3c00>; 133*e77bb5dcSRyan Chen interrupt-controller; 134*e77bb5dcSRyan Chen interrupt-parent = <&gic>; 135*e77bb5dcSRyan Chen #interrupt-cells = <1>; 136*e77bb5dcSRyan Chen aspeed,interrupt-ranges = 137*e77bb5dcSRyan Chen <0 128 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, /* linear range 1 to 1*/ 138*e77bb5dcSRyan Chen <144 8 &gic GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, /* sw int SSP */ 139*e77bb5dcSRyan Chen <152 8 &gic GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, /* sw int TSP */ 140*e77bb5dcSRyan Chen <192 10 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, /* M0-M9 intm */ 141*e77bb5dcSRyan Chen <208 10 &gic GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, /* M30-M39 intm */ 142*e77bb5dcSRyan Chen <224 10 &gic GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>, /* M40-M49 intm */ 143*e77bb5dcSRyan Chen <256 128 &ssp_nvic 0 0 >, /* linear to SSP */ 144*e77bb5dcSRyan Chen <384 10 &ssp_nvic 160 0 >, /* cascaded to SSP via M10-M19 */ 145*e77bb5dcSRyan Chen <400 8 &ssp_nvic 144 0 >, /* sw int PSP */ 146*e77bb5dcSRyan Chen <408 8 &ssp_nvic 152 0 >, /* sw int TSP */ 147*e77bb5dcSRyan Chen <426 128 &tsp_nvic 0 0 >, /* linear to TSP */ 148*e77bb5dcSRyan Chen <554 10 &tsp_nvic 160 0 >, /* cascaded to TSP via M20-M29 */ 149*e77bb5dcSRyan Chen <570 8 &tsp_nvic 144 0 >, /* sw int PSP */ 150*e77bb5dcSRyan Chen <578 8 &tsp_nvic 152 0 >; /* sw int TSP */ 151*e77bb5dcSRyan Chen }; 152*e77bb5dcSRyan Chen 153*e77bb5dcSRyan Chen syscon0: syscon@12c02000 { 154*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-scu0", "syscon", "simple-mfd"; 155*e77bb5dcSRyan Chen reg = <0x0 0x12c02000 0x0 0x1000>; 156*e77bb5dcSRyan Chen ranges = <0x0 0x0 0x12c02000 0x1000>; 157*e77bb5dcSRyan Chen #address-cells = <1>; 158*e77bb5dcSRyan Chen #size-cells = <1>; 159*e77bb5dcSRyan Chen #clock-cells = <1>; 160*e77bb5dcSRyan Chen #reset-cells = <1>; 161*e77bb5dcSRyan Chen 162*e77bb5dcSRyan Chen silicon-id@0 { 163*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-silicon-id", "aspeed,silicon-id"; 164*e77bb5dcSRyan Chen reg = <0x0 0x4>; 165*e77bb5dcSRyan Chen }; 166*e77bb5dcSRyan Chen 167*e77bb5dcSRyan Chen scu_ic0: interrupt-controller@1d0 { 168*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-scu-ic0"; 169*e77bb5dcSRyan Chen reg = <0x1d0 0xc>; 170*e77bb5dcSRyan Chen interrupts-extended = <&intc0 97>; 171*e77bb5dcSRyan Chen #interrupt-cells = <1>; 172*e77bb5dcSRyan Chen interrupt-controller; 173*e77bb5dcSRyan Chen }; 174*e77bb5dcSRyan Chen 175*e77bb5dcSRyan Chen scu_ic1: interrupt-controller@1e0 { 176*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-scu-ic1"; 177*e77bb5dcSRyan Chen reg = <0x1e0 0xc>; 178*e77bb5dcSRyan Chen interrupts-extended = <&intc0 98>; 179*e77bb5dcSRyan Chen #interrupt-cells = <1>; 180*e77bb5dcSRyan Chen interrupt-controller; 181*e77bb5dcSRyan Chen }; 182*e77bb5dcSRyan Chen 183*e77bb5dcSRyan Chen pinctrl0: pinctrl@400 { 184*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-soc0-pinctrl"; 185*e77bb5dcSRyan Chen reg = <0x400 0x318>; 186*e77bb5dcSRyan Chen }; 187*e77bb5dcSRyan Chen }; 188*e77bb5dcSRyan Chen 189*e77bb5dcSRyan Chen gpio0: gpio@12c11000 { 190*e77bb5dcSRyan Chen #gpio-cells = <2>; 191*e77bb5dcSRyan Chen gpio-controller; 192*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-gpio"; 193*e77bb5dcSRyan Chen reg = <0x0 0x12c11000 0x0 0x1000>; 194*e77bb5dcSRyan Chen interrupts-extended = <&intc0 11>; 195*e77bb5dcSRyan Chen gpio-ranges = <&pinctrl0 0 0 12>; 196*e77bb5dcSRyan Chen ngpios = <12>; 197*e77bb5dcSRyan Chen clocks = <&syscon0 SCU0_CLK_APB>; 198*e77bb5dcSRyan Chen interrupt-controller; 199*e77bb5dcSRyan Chen #interrupt-cells = <2>; 200*e77bb5dcSRyan Chen }; 201*e77bb5dcSRyan Chen 202*e77bb5dcSRyan Chen uart4: serial@12c1a000 { 203*e77bb5dcSRyan Chen compatible = "ns16550a"; 204*e77bb5dcSRyan Chen reg = <0x0 0x12c1a000 0x0 0x1000>; 205*e77bb5dcSRyan Chen reg-shift = <2>; 206*e77bb5dcSRyan Chen reg-io-width = <4>; 207*e77bb5dcSRyan Chen clocks = <&syscon0 SCU0_CLK_GATE_UART4CLK>; 208*e77bb5dcSRyan Chen interrupts-extended = <&intc0 8>; 209*e77bb5dcSRyan Chen no-loopback-test; 210*e77bb5dcSRyan Chen status = "disabled"; 211*e77bb5dcSRyan Chen }; 212*e77bb5dcSRyan Chen 213*e77bb5dcSRyan Chen mbox0: mbox@12c1c200 { 214*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-mailbox"; 215*e77bb5dcSRyan Chen reg = <0x0 0x12c1c200 0x0 0x100>, <0x0 0x12c1c300 0x0 0x100>; 216*e77bb5dcSRyan Chen reg-names = "tx", "rx"; 217*e77bb5dcSRyan Chen interrupts-extended = <&intc0 103>; 218*e77bb5dcSRyan Chen #mbox-cells = <1>; 219*e77bb5dcSRyan Chen }; 220*e77bb5dcSRyan Chen 221*e77bb5dcSRyan Chen mbox1: mbox@12c1c600 { 222*e77bb5dcSRyan Chen compatible = "aspeed,ast2700-mailbox"; 223*e77bb5dcSRyan Chen reg = <0x0 0x12c1c600 0x0 0x100>, <0x0 0x12c1c700 0x0 0x100>; 224*e77bb5dcSRyan Chen reg-names = "tx", "rx"; 225*e77bb5dcSRyan Chen interrupts-extended = <&intc0 107>; 226*e77bb5dcSRyan Chen #mbox-cells = <1>; 227*e77bb5dcSRyan Chen }; 228*e77bb5dcSRyan Chen}; 229*e77bb5dcSRyan Chen 230*e77bb5dcSRyan Chen#include "aspeed-g7-soc0-pinctrl.dtsi" 231