1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * Device Tree Source for AST27xx SoC Family Main Domain peripherals 4 * 5 * Copyright (C) 2026 ASPEED Technology Inc. 6 */ 7 8#include <dt-bindings/clock/aspeed,ast2700-scu.h> 9#include <dt-bindings/reset/aspeed,ast2700-scu.h> 10#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 11 12&soc0 { 13 sram0: sram@10000000 { 14 compatible = "mmio-sram"; 15 reg = <0x0 0x10000000 0x0 0x20000>; 16 ranges = <0x0 0x0 0x10000000 0x20000>; 17 #address-cells = <1>; 18 #size-cells = <1>; 19 20 soc0-sram@0 { 21 reg = <0x0 0x20000>; 22 export; 23 }; 24 }; 25 26 vhuba1: usb-vhub@12011000 { 27 compatible = "aspeed,ast2700-usb-vhub"; 28 reg = <0x0 0x12011000 0x0 0x820>; 29 interrupts-extended = <&intc0 32>; 30 clocks = <&syscon0 SCU0_CLK_GATE_PORTAUSB2CLK>; 31 resets = <&syscon0 SCU0_RESET_PORTA_VHUB>; 32 aspeed,vhub-downstream-ports = <7>; 33 aspeed,vhub-generic-endpoints = <21>; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&pinctrl_usb2axhpd1_default>; 36 status = "disabled"; 37 }; 38 39 vhubb1: usb-vhub@12021000 { 40 compatible = "aspeed,ast2700-usb-vhub"; 41 reg = <0x0 0x12021000 0x0 0x820>; 42 interrupts-extended = <&intc0 36>; 43 clocks = <&syscon0 SCU0_CLK_GATE_PORTBUSB2CLK>; 44 resets = <&syscon0 SCU0_RESET_PORTB_VHUB>; 45 aspeed,vhub-downstream-ports = <7>; 46 aspeed,vhub-generic-endpoints = <21>; 47 pinctrl-names = "default"; 48 pinctrl-0 = <&pinctrl_usb2bxhpd1_default>; 49 status = "disabled"; 50 }; 51 52 uhci0: usb@12040000 { 53 compatible = "aspeed,ast2700-uhci", "generic-uhci"; 54 reg = <0x0 0x12040000 0x0 0x100>; 55 interrupts-extended = <&intc0 10>; 56 #ports = <2>; 57 clocks = <&syscon0 SCU0_CLK_GATE_UHCICLK>; 58 resets = <&syscon0 SCU0_RESET_UHCI>; 59 status = "disabled"; 60 }; 61 62 vhuba0: usb-vhub@12060000 { 63 compatible = "aspeed,ast2700-usb-vhub"; 64 reg = <0x0 0x12060000 0x0 0x820>; 65 interrupts-extended = <&intc0 33>; 66 clocks = <&syscon0 SCU0_CLK_GATE_PORTAUSB2CLK>; 67 resets = <&syscon0 SCU0_RESET_PORTA_VHUB_EHCI>; 68 aspeed,vhub-downstream-ports = <7>; 69 aspeed,vhub-generic-endpoints = <21>; 70 pinctrl-names = "default"; 71 pinctrl-0 = <&pinctrl_usb2ad0_default>; 72 status = "disabled"; 73 }; 74 75 ehci0: usb@12061000 { 76 compatible = "aspeed,ast2700-ehci", "generic-ehci"; 77 reg = <0x0 0x12061000 0x0 0x100>; 78 interrupts-extended = <&intc0 33>; 79 clocks = <&syscon0 SCU0_CLK_GATE_PORTAUSB2CLK>; 80 resets = <&syscon0 SCU0_RESET_PORTA_VHUB_EHCI>; 81 pinctrl-names = "default"; 82 pinctrl-0 = <&pinctrl_usb2ah_default>; 83 status = "disabled"; 84 }; 85 86 vhubb0: usb-vhub@12062000 { 87 compatible = "aspeed,ast2700-usb-vhub"; 88 reg = <0x0 0x12062000 0x0 0x820>; 89 interrupts-extended = <&intc0 37>; 90 clocks = <&syscon0 SCU0_CLK_GATE_PORTBUSB2CLK>; 91 resets = <&syscon0 SCU0_RESET_PORTB_VHUB_EHCI>; 92 aspeed,vhub-downstream-ports = <7>; 93 aspeed,vhub-generic-endpoints = <21>; 94 pinctrl-names = "default"; 95 pinctrl-0 = <&pinctrl_usb2bd0_default>; 96 status = "disabled"; 97 }; 98 99 ehci1: usb@12063000 { 100 compatible = "aspeed,ast2700-ehci", "generic-ehci"; 101 reg = <0x0 0x12063000 0x0 0x100>; 102 interrupts-extended = <&intc0 37>; 103 clocks = <&syscon0 SCU0_CLK_GATE_PORTBUSB2CLK>; 104 resets = <&syscon0 SCU0_RESET_PORTB_VHUB_EHCI>; 105 pinctrl-names = "default"; 106 pinctrl-0 = <&pinctrl_usb2bh_default>; 107 status = "disabled"; 108 }; 109 110 emmc_controller: sdc@12090000 { 111 compatible = "aspeed,ast2700-sd-controller", "aspeed,ast2600-sd-controller"; 112 reg = <0 0x12090000 0 0x100>; 113 #address-cells = <1>; 114 #size-cells = <1>; 115 ranges = <0x0 0x0 0x12090000 0x10000>; 116 clocks = <&syscon0 SCU0_CLK_GATE_EMMCCLK>; 117 resets = <&syscon0 SCU0_RESET_EMMC>; 118 status = "disabled"; 119 120 emmc: sdhci@100 { 121 compatible = "aspeed,ast2700-sdhci", "aspeed,ast2600-sdhci"; 122 reg = <0x100 0x100>; 123 sdhci,auto-cmd12; 124 interrupts-extended = <&intc0 15>; 125 clocks = <&syscon0 SCU0_CLK_GATE_EMMCCLK>; 126 status = "disabled"; 127 }; 128 }; 129 130 intc0: interrupt-controller@12100000 { 131 compatible = "aspeed,ast2700-intc0"; 132 reg = <0x0 0x12100000 0x0 0x3c00>; 133 interrupt-controller; 134 interrupt-parent = <&gic>; 135 #interrupt-cells = <1>; 136 aspeed,interrupt-ranges = 137 <0 128 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, /* linear range 1 to 1*/ 138 <144 8 &gic GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, /* sw int SSP */ 139 <152 8 &gic GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, /* sw int TSP */ 140 <192 10 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, /* M0-M9 intm */ 141 <208 10 &gic GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, /* M30-M39 intm */ 142 <224 10 &gic GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>, /* M40-M49 intm */ 143 <256 128 &ssp_nvic 0 0 >, /* linear to SSP */ 144 <384 10 &ssp_nvic 160 0 >, /* cascaded to SSP via M10-M19 */ 145 <400 8 &ssp_nvic 144 0 >, /* sw int PSP */ 146 <408 8 &ssp_nvic 152 0 >, /* sw int TSP */ 147 <426 128 &tsp_nvic 0 0 >, /* linear to TSP */ 148 <554 10 &tsp_nvic 160 0 >, /* cascaded to TSP via M20-M29 */ 149 <570 8 &tsp_nvic 144 0 >, /* sw int PSP */ 150 <578 8 &tsp_nvic 152 0 >; /* sw int TSP */ 151 }; 152 153 syscon0: syscon@12c02000 { 154 compatible = "aspeed,ast2700-scu0", "syscon", "simple-mfd"; 155 reg = <0x0 0x12c02000 0x0 0x1000>; 156 ranges = <0x0 0x0 0x12c02000 0x1000>; 157 #address-cells = <1>; 158 #size-cells = <1>; 159 #clock-cells = <1>; 160 #reset-cells = <1>; 161 162 silicon-id@0 { 163 compatible = "aspeed,ast2700-silicon-id", "aspeed,silicon-id"; 164 reg = <0x0 0x4>; 165 }; 166 167 scu_ic0: interrupt-controller@1d0 { 168 compatible = "aspeed,ast2700-scu-ic0"; 169 reg = <0x1d0 0xc>; 170 interrupts-extended = <&intc0 97>; 171 #interrupt-cells = <1>; 172 interrupt-controller; 173 }; 174 175 scu_ic1: interrupt-controller@1e0 { 176 compatible = "aspeed,ast2700-scu-ic1"; 177 reg = <0x1e0 0xc>; 178 interrupts-extended = <&intc0 98>; 179 #interrupt-cells = <1>; 180 interrupt-controller; 181 }; 182 183 pinctrl0: pinctrl@400 { 184 compatible = "aspeed,ast2700-soc0-pinctrl"; 185 reg = <0x400 0x318>; 186 }; 187 }; 188 189 gpio0: gpio@12c11000 { 190 #gpio-cells = <2>; 191 gpio-controller; 192 compatible = "aspeed,ast2700-gpio"; 193 reg = <0x0 0x12c11000 0x0 0x1000>; 194 interrupts-extended = <&intc0 11>; 195 gpio-ranges = <&pinctrl0 0 0 12>; 196 ngpios = <12>; 197 clocks = <&syscon0 SCU0_CLK_APB>; 198 interrupt-controller; 199 #interrupt-cells = <2>; 200 }; 201 202 uart4: serial@12c1a000 { 203 compatible = "ns16550a"; 204 reg = <0x0 0x12c1a000 0x0 0x1000>; 205 reg-shift = <2>; 206 reg-io-width = <4>; 207 clocks = <&syscon0 SCU0_CLK_GATE_UART4CLK>; 208 interrupts-extended = <&intc0 8>; 209 no-loopback-test; 210 status = "disabled"; 211 }; 212 213 mbox0: mbox@12c1c200 { 214 compatible = "aspeed,ast2700-mailbox"; 215 reg = <0x0 0x12c1c200 0x0 0x100>, <0x0 0x12c1c300 0x0 0x100>; 216 reg-names = "tx", "rx"; 217 interrupts-extended = <&intc0 103>; 218 #mbox-cells = <1>; 219 }; 220 221 mbox1: mbox@12c1c600 { 222 compatible = "aspeed,ast2700-mailbox"; 223 reg = <0x0 0x12c1c600 0x0 0x100>, <0x0 0x12c1c700 0x0 0x100>; 224 reg-names = "tx", "rx"; 225 interrupts-extended = <&intc0 107>; 226 #mbox-cells = <1>; 227 }; 228}; 229 230#include "aspeed-g7-soc0-pinctrl.dtsi" 231