1*576df27aSNick Chan// SPDX-License-Identifier: GPL-2.0+ OR MIT 2*576df27aSNick Chan/* 3*576df27aSNick Chan * PMGR Power domains for the Apple T8012 "T2" SoC 4*576df27aSNick Chan * 5*576df27aSNick Chan * Copyright (c) 2024 Nick Chan <towinchenmi@gmail.com> 6*576df27aSNick Chan */ 7*576df27aSNick Chan 8*576df27aSNick Chan&pmgr { 9*576df27aSNick Chan ps_cpu0: power-controller@80000 { 10*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 11*576df27aSNick Chan reg = <0x80000 4>; 12*576df27aSNick Chan #power-domain-cells = <0>; 13*576df27aSNick Chan #reset-cells = <0>; 14*576df27aSNick Chan label = "cpu0"; 15*576df27aSNick Chan apple,always-on; /* Core device */ 16*576df27aSNick Chan }; 17*576df27aSNick Chan 18*576df27aSNick Chan ps_cpu1: power-controller@80008 { 19*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 20*576df27aSNick Chan reg = <0x80008 4>; 21*576df27aSNick Chan #power-domain-cells = <0>; 22*576df27aSNick Chan #reset-cells = <0>; 23*576df27aSNick Chan label = "cpu1"; 24*576df27aSNick Chan apple,always-on; /* Core device */ 25*576df27aSNick Chan }; 26*576df27aSNick Chan 27*576df27aSNick Chan ps_cpm: power-controller@80040 { 28*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 29*576df27aSNick Chan reg = <0x80040 4>; 30*576df27aSNick Chan #power-domain-cells = <0>; 31*576df27aSNick Chan #reset-cells = <0>; 32*576df27aSNick Chan label = "cpm"; 33*576df27aSNick Chan apple,always-on; /* Core device */ 34*576df27aSNick Chan }; 35*576df27aSNick Chan 36*576df27aSNick Chan ps_sio_busif: power-controller@80158 { 37*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 38*576df27aSNick Chan reg = <0x80158 4>; 39*576df27aSNick Chan #power-domain-cells = <0>; 40*576df27aSNick Chan #reset-cells = <0>; 41*576df27aSNick Chan label = "sio_busif"; 42*576df27aSNick Chan }; 43*576df27aSNick Chan 44*576df27aSNick Chan ps_sio_p: power-controller@80160 { 45*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 46*576df27aSNick Chan reg = <0x80160 4>; 47*576df27aSNick Chan #power-domain-cells = <0>; 48*576df27aSNick Chan #reset-cells = <0>; 49*576df27aSNick Chan label = "sio_p"; 50*576df27aSNick Chan power-domains = <&ps_sio_busif>; 51*576df27aSNick Chan }; 52*576df27aSNick Chan 53*576df27aSNick Chan ps_iomux: power-controller@80150 { 54*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 55*576df27aSNick Chan reg = <0x80150 4>; 56*576df27aSNick Chan #power-domain-cells = <0>; 57*576df27aSNick Chan #reset-cells = <0>; 58*576df27aSNick Chan label = "iomux"; 59*576df27aSNick Chan }; 60*576df27aSNick Chan 61*576df27aSNick Chan ps_sbr: power-controller@80100 { 62*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 63*576df27aSNick Chan reg = <0x80100 4>; 64*576df27aSNick Chan #power-domain-cells = <0>; 65*576df27aSNick Chan #reset-cells = <0>; 66*576df27aSNick Chan label = "sbr"; 67*576df27aSNick Chan apple,always-on; /* Apple fabric, critical block */ 68*576df27aSNick Chan }; 69*576df27aSNick Chan 70*576df27aSNick Chan ps_aic: power-controller@80108 { 71*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 72*576df27aSNick Chan reg = <0x80108 4>; 73*576df27aSNick Chan #power-domain-cells = <0>; 74*576df27aSNick Chan #reset-cells = <0>; 75*576df27aSNick Chan label = "aic"; 76*576df27aSNick Chan apple,always-on; /* Core device */ 77*576df27aSNick Chan }; 78*576df27aSNick Chan 79*576df27aSNick Chan ps_gpio: power-controller@80110 { 80*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 81*576df27aSNick Chan reg = <0x80110 4>; 82*576df27aSNick Chan #power-domain-cells = <0>; 83*576df27aSNick Chan #reset-cells = <0>; 84*576df27aSNick Chan label = "gpio"; 85*576df27aSNick Chan }; 86*576df27aSNick Chan 87*576df27aSNick Chan ps_pcie_down_ref: power-controller@80138 { 88*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 89*576df27aSNick Chan reg = <0x80138 4>; 90*576df27aSNick Chan #power-domain-cells = <0>; 91*576df27aSNick Chan #reset-cells = <0>; 92*576df27aSNick Chan label = "pcie_down_ref"; 93*576df27aSNick Chan }; 94*576df27aSNick Chan 95*576df27aSNick Chan ps_pcie_stg0_ref: power-controller@80140 { 96*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 97*576df27aSNick Chan reg = <0x80140 4>; 98*576df27aSNick Chan #power-domain-cells = <0>; 99*576df27aSNick Chan #reset-cells = <0>; 100*576df27aSNick Chan label = "pcie_stg0_ref"; 101*576df27aSNick Chan }; 102*576df27aSNick Chan 103*576df27aSNick Chan ps_pcie_stg1_ref: power-controller@80148 { 104*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 105*576df27aSNick Chan reg = <0x80148 4>; 106*576df27aSNick Chan #power-domain-cells = <0>; 107*576df27aSNick Chan #reset-cells = <0>; 108*576df27aSNick Chan label = "pcie_stg1_ref"; 109*576df27aSNick Chan }; 110*576df27aSNick Chan 111*576df27aSNick Chan ps_mca0: power-controller@80170 { 112*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 113*576df27aSNick Chan reg = <0x80170 4>; 114*576df27aSNick Chan #power-domain-cells = <0>; 115*576df27aSNick Chan #reset-cells = <0>; 116*576df27aSNick Chan label = "mca0"; 117*576df27aSNick Chan power-domains = <&ps_sio_p>; 118*576df27aSNick Chan }; 119*576df27aSNick Chan 120*576df27aSNick Chan ps_mca1: power-controller@80178 { 121*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 122*576df27aSNick Chan reg = <0x80178 4>; 123*576df27aSNick Chan #power-domain-cells = <0>; 124*576df27aSNick Chan #reset-cells = <0>; 125*576df27aSNick Chan label = "mca1"; 126*576df27aSNick Chan power-domains = <&ps_sio_p>; 127*576df27aSNick Chan }; 128*576df27aSNick Chan 129*576df27aSNick Chan ps_mca2: power-controller@80180 { 130*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 131*576df27aSNick Chan reg = <0x80180 4>; 132*576df27aSNick Chan #power-domain-cells = <0>; 133*576df27aSNick Chan #reset-cells = <0>; 134*576df27aSNick Chan label = "mca2"; 135*576df27aSNick Chan power-domains = <&ps_sio_p>; 136*576df27aSNick Chan }; 137*576df27aSNick Chan 138*576df27aSNick Chan ps_mca3: power-controller@80188 { 139*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 140*576df27aSNick Chan reg = <0x80188 4>; 141*576df27aSNick Chan #power-domain-cells = <0>; 142*576df27aSNick Chan #reset-cells = <0>; 143*576df27aSNick Chan label = "mca3"; 144*576df27aSNick Chan power-domains = <&ps_sio_p>; 145*576df27aSNick Chan }; 146*576df27aSNick Chan 147*576df27aSNick Chan ps_mca4: power-controller@80190 { 148*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 149*576df27aSNick Chan reg = <0x80190 4>; 150*576df27aSNick Chan #power-domain-cells = <0>; 151*576df27aSNick Chan #reset-cells = <0>; 152*576df27aSNick Chan label = "mca4"; 153*576df27aSNick Chan power-domains = <&ps_sio_p>; 154*576df27aSNick Chan }; 155*576df27aSNick Chan 156*576df27aSNick Chan ps_mca5: power-controller@80198 { 157*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 158*576df27aSNick Chan reg = <0x80198 4>; 159*576df27aSNick Chan #power-domain-cells = <0>; 160*576df27aSNick Chan #reset-cells = <0>; 161*576df27aSNick Chan label = "mca5"; 162*576df27aSNick Chan power-domains = <&ps_sio_p>; 163*576df27aSNick Chan }; 164*576df27aSNick Chan 165*576df27aSNick Chan ps_i2c0: power-controller@801a8 { 166*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 167*576df27aSNick Chan reg = <0x801a8 4>; 168*576df27aSNick Chan #power-domain-cells = <0>; 169*576df27aSNick Chan #reset-cells = <0>; 170*576df27aSNick Chan label = "i2c0"; 171*576df27aSNick Chan power-domains = <&ps_sio_p>; 172*576df27aSNick Chan }; 173*576df27aSNick Chan 174*576df27aSNick Chan ps_i2c1: power-controller@801b0 { 175*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 176*576df27aSNick Chan reg = <0x801b0 4>; 177*576df27aSNick Chan #power-domain-cells = <0>; 178*576df27aSNick Chan #reset-cells = <0>; 179*576df27aSNick Chan label = "i2c1"; 180*576df27aSNick Chan power-domains = <&ps_sio_p>; 181*576df27aSNick Chan }; 182*576df27aSNick Chan 183*576df27aSNick Chan ps_i2c2: power-controller@801b8 { 184*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 185*576df27aSNick Chan reg = <0x801b8 4>; 186*576df27aSNick Chan #power-domain-cells = <0>; 187*576df27aSNick Chan #reset-cells = <0>; 188*576df27aSNick Chan label = "i2c2"; 189*576df27aSNick Chan power-domains = <&ps_sio_p>; 190*576df27aSNick Chan }; 191*576df27aSNick Chan 192*576df27aSNick Chan ps_i2c3: power-controller@801c0 { 193*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 194*576df27aSNick Chan reg = <0x801c0 4>; 195*576df27aSNick Chan #power-domain-cells = <0>; 196*576df27aSNick Chan #reset-cells = <0>; 197*576df27aSNick Chan label = "i2c3"; 198*576df27aSNick Chan power-domains = <&ps_sio_p>; 199*576df27aSNick Chan }; 200*576df27aSNick Chan 201*576df27aSNick Chan ps_spi0: power-controller@801e0 { 202*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 203*576df27aSNick Chan reg = <0x801e0 4>; 204*576df27aSNick Chan #power-domain-cells = <0>; 205*576df27aSNick Chan #reset-cells = <0>; 206*576df27aSNick Chan label = "spi0"; 207*576df27aSNick Chan power-domains = <&ps_sio_p>; 208*576df27aSNick Chan }; 209*576df27aSNick Chan 210*576df27aSNick Chan ps_spi1: power-controller@801e8 { 211*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 212*576df27aSNick Chan reg = <0x801e8 4>; 213*576df27aSNick Chan #power-domain-cells = <0>; 214*576df27aSNick Chan #reset-cells = <0>; 215*576df27aSNick Chan label = "spi1"; 216*576df27aSNick Chan power-domains = <&ps_sio_p>; 217*576df27aSNick Chan }; 218*576df27aSNick Chan 219*576df27aSNick Chan ps_spi2: power-controller@801f0 { 220*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 221*576df27aSNick Chan reg = <0x801f0 4>; 222*576df27aSNick Chan #power-domain-cells = <0>; 223*576df27aSNick Chan #reset-cells = <0>; 224*576df27aSNick Chan label = "spi2"; 225*576df27aSNick Chan power-domains = <&ps_sio_p>; 226*576df27aSNick Chan }; 227*576df27aSNick Chan 228*576df27aSNick Chan ps_spi3: power-controller@801f8 { 229*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 230*576df27aSNick Chan reg = <0x801f8 4>; 231*576df27aSNick Chan #power-domain-cells = <0>; 232*576df27aSNick Chan #reset-cells = <0>; 233*576df27aSNick Chan label = "spi3"; 234*576df27aSNick Chan power-domains = <&ps_sio_p>; 235*576df27aSNick Chan }; 236*576df27aSNick Chan 237*576df27aSNick Chan ps_pwm0: power-controller@801a0 { 238*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 239*576df27aSNick Chan reg = <0x801a0 4>; 240*576df27aSNick Chan #power-domain-cells = <0>; 241*576df27aSNick Chan #reset-cells = <0>; 242*576df27aSNick Chan label = "pwm0"; 243*576df27aSNick Chan power-domains = <&ps_sio_p>; 244*576df27aSNick Chan }; 245*576df27aSNick Chan 246*576df27aSNick Chan ps_sio: power-controller@80168 { 247*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 248*576df27aSNick Chan reg = <0x80168 4>; 249*576df27aSNick Chan #power-domain-cells = <0>; 250*576df27aSNick Chan #reset-cells = <0>; 251*576df27aSNick Chan label = "sio"; 252*576df27aSNick Chan power-domains = <&ps_sio_p>; 253*576df27aSNick Chan apple,always-on; /* Core device */ 254*576df27aSNick Chan }; 255*576df27aSNick Chan 256*576df27aSNick Chan ps_isp_sens0: power-controller@80120 { 257*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 258*576df27aSNick Chan reg = <0x80120 4>; 259*576df27aSNick Chan #power-domain-cells = <0>; 260*576df27aSNick Chan #reset-cells = <0>; 261*576df27aSNick Chan label = "isp_sens0"; 262*576df27aSNick Chan }; 263*576df27aSNick Chan 264*576df27aSNick Chan ps_isp_sens1: power-controller@80128 { 265*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 266*576df27aSNick Chan reg = <0x80128 4>; 267*576df27aSNick Chan #power-domain-cells = <0>; 268*576df27aSNick Chan #reset-cells = <0>; 269*576df27aSNick Chan label = "isp_sens1"; 270*576df27aSNick Chan }; 271*576df27aSNick Chan 272*576df27aSNick Chan ps_isp_sens2: power-controller@80130 { 273*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 274*576df27aSNick Chan reg = <0x80130 4>; 275*576df27aSNick Chan #power-domain-cells = <0>; 276*576df27aSNick Chan #reset-cells = <0>; 277*576df27aSNick Chan label = "isp_sens2"; 278*576df27aSNick Chan }; 279*576df27aSNick Chan 280*576df27aSNick Chan ps_pms: power-controller@80118 { 281*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 282*576df27aSNick Chan reg = <0x80118 4>; 283*576df27aSNick Chan #power-domain-cells = <0>; 284*576df27aSNick Chan #reset-cells = <0>; 285*576df27aSNick Chan label = "pms"; 286*576df27aSNick Chan apple,always-on; /* Core device */ 287*576df27aSNick Chan }; 288*576df27aSNick Chan 289*576df27aSNick Chan ps_i2c4: power-controller@801c8 { 290*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 291*576df27aSNick Chan reg = <0x801c8 4>; 292*576df27aSNick Chan #power-domain-cells = <0>; 293*576df27aSNick Chan #reset-cells = <0>; 294*576df27aSNick Chan label = "i2c4"; 295*576df27aSNick Chan power-domains = <&ps_sio_p>; 296*576df27aSNick Chan }; 297*576df27aSNick Chan 298*576df27aSNick Chan ps_i2c5: power-controller@801d0 { 299*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 300*576df27aSNick Chan reg = <0x801d0 4>; 301*576df27aSNick Chan #power-domain-cells = <0>; 302*576df27aSNick Chan #reset-cells = <0>; 303*576df27aSNick Chan label = "i2c5"; 304*576df27aSNick Chan power-domains = <&ps_sio_p>; 305*576df27aSNick Chan }; 306*576df27aSNick Chan 307*576df27aSNick Chan ps_i2c6: power-controller@801d8 { 308*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 309*576df27aSNick Chan reg = <0x801d8 4>; 310*576df27aSNick Chan #power-domain-cells = <0>; 311*576df27aSNick Chan #reset-cells = <0>; 312*576df27aSNick Chan label = "i2c6"; 313*576df27aSNick Chan power-domains = <&ps_sio_p>; 314*576df27aSNick Chan }; 315*576df27aSNick Chan 316*576df27aSNick Chan ps_usb: power-controller@80268 { 317*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 318*576df27aSNick Chan reg = <0x80268 4>; 319*576df27aSNick Chan #power-domain-cells = <0>; 320*576df27aSNick Chan #reset-cells = <0>; 321*576df27aSNick Chan label = "usb"; 322*576df27aSNick Chan }; 323*576df27aSNick Chan 324*576df27aSNick Chan ps_usbctrl: power-controller@80270 { 325*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 326*576df27aSNick Chan reg = <0x80270 4>; 327*576df27aSNick Chan #power-domain-cells = <0>; 328*576df27aSNick Chan #reset-cells = <0>; 329*576df27aSNick Chan label = "usbctrl"; 330*576df27aSNick Chan power-domains = <&ps_usb>; 331*576df27aSNick Chan }; 332*576df27aSNick Chan 333*576df27aSNick Chan ps_usb2host0: power-controller@80278 { 334*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 335*576df27aSNick Chan reg = <0x80278 4>; 336*576df27aSNick Chan #power-domain-cells = <0>; 337*576df27aSNick Chan #reset-cells = <0>; 338*576df27aSNick Chan label = "usb2host0"; 339*576df27aSNick Chan power-domains = <&ps_usbctrl>; 340*576df27aSNick Chan }; 341*576df27aSNick Chan 342*576df27aSNick Chan ps_usb2host1: power-controller@80288 { 343*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 344*576df27aSNick Chan reg = <0x80288 4>; 345*576df27aSNick Chan #power-domain-cells = <0>; 346*576df27aSNick Chan #reset-cells = <0>; 347*576df27aSNick Chan label = "usb2host1"; 348*576df27aSNick Chan power-domains = <&ps_usbctrl>; 349*576df27aSNick Chan }; 350*576df27aSNick Chan 351*576df27aSNick Chan ps_rtmux: power-controller@802a8 { 352*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 353*576df27aSNick Chan reg = <0x802a8 4>; 354*576df27aSNick Chan #power-domain-cells = <0>; 355*576df27aSNick Chan #reset-cells = <0>; 356*576df27aSNick Chan label = "rtmux"; 357*576df27aSNick Chan }; 358*576df27aSNick Chan 359*576df27aSNick Chan ps_media: power-controller@802d8 { 360*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 361*576df27aSNick Chan reg = <0x802d8 4>; 362*576df27aSNick Chan #power-domain-cells = <0>; 363*576df27aSNick Chan #reset-cells = <0>; 364*576df27aSNick Chan label = "media"; 365*576df27aSNick Chan }; 366*576df27aSNick Chan 367*576df27aSNick Chan ps_isp_sys: power-controller@802d0 { 368*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 369*576df27aSNick Chan reg = <0x802d0 4>; 370*576df27aSNick Chan #power-domain-cells = <0>; 371*576df27aSNick Chan #reset-cells = <0>; 372*576df27aSNick Chan label = "isp_sys"; 373*576df27aSNick Chan power-domains = <&ps_rtmux>; 374*576df27aSNick Chan }; 375*576df27aSNick Chan 376*576df27aSNick Chan ps_msr: power-controller@802e8 { 377*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 378*576df27aSNick Chan reg = <0x802e8 4>; 379*576df27aSNick Chan #power-domain-cells = <0>; 380*576df27aSNick Chan #reset-cells = <0>; 381*576df27aSNick Chan label = "msr"; 382*576df27aSNick Chan power-domains = <&ps_media>; 383*576df27aSNick Chan }; 384*576df27aSNick Chan 385*576df27aSNick Chan ps_jpg: power-controller@802e0 { 386*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 387*576df27aSNick Chan reg = <0x802e0 4>; 388*576df27aSNick Chan #power-domain-cells = <0>; 389*576df27aSNick Chan #reset-cells = <0>; 390*576df27aSNick Chan label = "jpg"; 391*576df27aSNick Chan power-domains = <&ps_media>; 392*576df27aSNick Chan }; 393*576df27aSNick Chan 394*576df27aSNick Chan ps_disp0_fe: power-controller@802b0 { 395*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 396*576df27aSNick Chan reg = <0x802b0 4>; 397*576df27aSNick Chan #power-domain-cells = <0>; 398*576df27aSNick Chan #reset-cells = <0>; 399*576df27aSNick Chan label = "disp0_fe"; 400*576df27aSNick Chan power-domains = <&ps_rtmux>; 401*576df27aSNick Chan }; 402*576df27aSNick Chan 403*576df27aSNick Chan ps_disp0_be: power-controller@802b8 { 404*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 405*576df27aSNick Chan reg = <0x802b8 4>; 406*576df27aSNick Chan #power-domain-cells = <0>; 407*576df27aSNick Chan #reset-cells = <0>; 408*576df27aSNick Chan label = "disp0_be"; 409*576df27aSNick Chan power-domains = <&ps_disp0_fe>; 410*576df27aSNick Chan }; 411*576df27aSNick Chan 412*576df27aSNick Chan ps_uart0: power-controller@80200 { 413*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 414*576df27aSNick Chan reg = <0x80200 4>; 415*576df27aSNick Chan #power-domain-cells = <0>; 416*576df27aSNick Chan #reset-cells = <0>; 417*576df27aSNick Chan label = "uart0"; 418*576df27aSNick Chan power-domains = <&ps_sio_p>; 419*576df27aSNick Chan }; 420*576df27aSNick Chan 421*576df27aSNick Chan ps_uart1: power-controller@80208 { 422*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 423*576df27aSNick Chan reg = <0x80208 4>; 424*576df27aSNick Chan #power-domain-cells = <0>; 425*576df27aSNick Chan #reset-cells = <0>; 426*576df27aSNick Chan label = "uart1"; 427*576df27aSNick Chan power-domains = <&ps_sio_p>; 428*576df27aSNick Chan }; 429*576df27aSNick Chan 430*576df27aSNick Chan ps_uart2: power-controller@80210 { 431*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 432*576df27aSNick Chan reg = <0x80210 4>; 433*576df27aSNick Chan #power-domain-cells = <0>; 434*576df27aSNick Chan #reset-cells = <0>; 435*576df27aSNick Chan label = "uart2"; 436*576df27aSNick Chan power-domains = <&ps_sio_p>; 437*576df27aSNick Chan }; 438*576df27aSNick Chan 439*576df27aSNick Chan ps_uart3: power-controller@80218 { 440*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 441*576df27aSNick Chan reg = <0x80218 4>; 442*576df27aSNick Chan #power-domain-cells = <0>; 443*576df27aSNick Chan #reset-cells = <0>; 444*576df27aSNick Chan label = "uart3"; 445*576df27aSNick Chan power-domains = <&ps_sio_p>; 446*576df27aSNick Chan }; 447*576df27aSNick Chan 448*576df27aSNick Chan ps_uart4: power-controller@80220 { 449*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 450*576df27aSNick Chan reg = <0x80220 4>; 451*576df27aSNick Chan #power-domain-cells = <0>; 452*576df27aSNick Chan #reset-cells = <0>; 453*576df27aSNick Chan label = "uart4"; 454*576df27aSNick Chan power-domains = <&ps_sio_p>; 455*576df27aSNick Chan }; 456*576df27aSNick Chan 457*576df27aSNick Chan ps_dpa: power-controller@80228 { 458*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 459*576df27aSNick Chan reg = <0x80228 4>; 460*576df27aSNick Chan #power-domain-cells = <0>; 461*576df27aSNick Chan #reset-cells = <0>; 462*576df27aSNick Chan label = "dpa"; 463*576df27aSNick Chan power-domains = <&ps_sio_p>; 464*576df27aSNick Chan }; 465*576df27aSNick Chan 466*576df27aSNick Chan ps_hfd0: power-controller@80230 { 467*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 468*576df27aSNick Chan reg = <0x80230 4>; 469*576df27aSNick Chan #power-domain-cells = <0>; 470*576df27aSNick Chan #reset-cells = <0>; 471*576df27aSNick Chan label = "hfd0"; 472*576df27aSNick Chan power-domains = <&ps_sio_p>; 473*576df27aSNick Chan }; 474*576df27aSNick Chan 475*576df27aSNick Chan ps_mcc: power-controller@80240 { 476*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 477*576df27aSNick Chan reg = <0x80240 4>; 478*576df27aSNick Chan #power-domain-cells = <0>; 479*576df27aSNick Chan #reset-cells = <0>; 480*576df27aSNick Chan label = "mcc"; 481*576df27aSNick Chan apple,always-on; /* Memory cache controller */ 482*576df27aSNick Chan }; 483*576df27aSNick Chan 484*576df27aSNick Chan ps_dcs0: power-controller@80248 { 485*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 486*576df27aSNick Chan reg = <0x80248 4>; 487*576df27aSNick Chan #power-domain-cells = <0>; 488*576df27aSNick Chan #reset-cells = <0>; 489*576df27aSNick Chan label = "dcs0"; 490*576df27aSNick Chan apple,always-on; /* LPDDR4 interface */ 491*576df27aSNick Chan }; 492*576df27aSNick Chan 493*576df27aSNick Chan ps_dcs1: power-controller@80250 { 494*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 495*576df27aSNick Chan reg = <0x80250 4>; 496*576df27aSNick Chan #power-domain-cells = <0>; 497*576df27aSNick Chan #reset-cells = <0>; 498*576df27aSNick Chan label = "dcs1"; 499*576df27aSNick Chan apple,always-on; /* LPDDR4 interface */ 500*576df27aSNick Chan }; 501*576df27aSNick Chan 502*576df27aSNick Chan ps_dcs2: power-controller@80258 { 503*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 504*576df27aSNick Chan reg = <0x80258 4>; 505*576df27aSNick Chan #power-domain-cells = <0>; 506*576df27aSNick Chan #reset-cells = <0>; 507*576df27aSNick Chan label = "dcs2"; 508*576df27aSNick Chan /* Not used on some devicecs, to be disabled by loader */ 509*576df27aSNick Chan apple,always-on; /* LPDDR4 interface */ 510*576df27aSNick Chan }; 511*576df27aSNick Chan 512*576df27aSNick Chan ps_dcs3: power-controller@80260 { 513*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 514*576df27aSNick Chan reg = <0x80260 4>; 515*576df27aSNick Chan #power-domain-cells = <0>; 516*576df27aSNick Chan #reset-cells = <0>; 517*576df27aSNick Chan label = "dcs3"; 518*576df27aSNick Chan /* Not used on some devicecs, to be disabled by loader */ 519*576df27aSNick Chan apple,always-on; /* LPDDR4 interface */ 520*576df27aSNick Chan }; 521*576df27aSNick Chan 522*576df27aSNick Chan ps_usb2host0_ohci: power-controller@80280 { 523*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 524*576df27aSNick Chan reg = <0x80280 4>; 525*576df27aSNick Chan #power-domain-cells = <0>; 526*576df27aSNick Chan #reset-cells = <0>; 527*576df27aSNick Chan label = "usb2host0_ohci"; 528*576df27aSNick Chan power-domains = <&ps_usb2host0>; 529*576df27aSNick Chan }; 530*576df27aSNick Chan 531*576df27aSNick Chan ps_usbotg: power-controller@80290 { 532*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 533*576df27aSNick Chan reg = <0x80290 4>; 534*576df27aSNick Chan #power-domain-cells = <0>; 535*576df27aSNick Chan #reset-cells = <0>; 536*576df27aSNick Chan label = "usbotg"; 537*576df27aSNick Chan power-domains = <&ps_usbctrl>; 538*576df27aSNick Chan }; 539*576df27aSNick Chan 540*576df27aSNick Chan ps_smx: power-controller@80298 { 541*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 542*576df27aSNick Chan reg = <0x80298 4>; 543*576df27aSNick Chan #power-domain-cells = <0>; 544*576df27aSNick Chan #reset-cells = <0>; 545*576df27aSNick Chan label = "smx"; 546*576df27aSNick Chan apple,always-on; /* Apple fabric, critical block */ 547*576df27aSNick Chan }; 548*576df27aSNick Chan 549*576df27aSNick Chan ps_sf: power-controller@802a0 { 550*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 551*576df27aSNick Chan reg = <0x802a0 4>; 552*576df27aSNick Chan #power-domain-cells = <0>; 553*576df27aSNick Chan #reset-cells = <0>; 554*576df27aSNick Chan label = "sf"; 555*576df27aSNick Chan apple,always-on; /* Apple fabric, critical block */ 556*576df27aSNick Chan }; 557*576df27aSNick Chan 558*576df27aSNick Chan ps_mipi_dsi: power-controller@802c8 { 559*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 560*576df27aSNick Chan reg = <0x802c8 4>; 561*576df27aSNick Chan #power-domain-cells = <0>; 562*576df27aSNick Chan #reset-cells = <0>; 563*576df27aSNick Chan label = "mipi_dsi"; 564*576df27aSNick Chan power-domains = <&ps_disp0_be>; 565*576df27aSNick Chan }; 566*576df27aSNick Chan 567*576df27aSNick Chan ps_pmp: power-controller@802f0 { 568*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 569*576df27aSNick Chan reg = <0x802f0 4>; 570*576df27aSNick Chan #power-domain-cells = <0>; 571*576df27aSNick Chan #reset-cells = <0>; 572*576df27aSNick Chan label = "pmp"; 573*576df27aSNick Chan }; 574*576df27aSNick Chan 575*576df27aSNick Chan ps_pms_sram: power-controller@802f8 { 576*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 577*576df27aSNick Chan reg = <0x802f8 4>; 578*576df27aSNick Chan #power-domain-cells = <0>; 579*576df27aSNick Chan #reset-cells = <0>; 580*576df27aSNick Chan label = "pms_sram"; 581*576df27aSNick Chan }; 582*576df27aSNick Chan 583*576df27aSNick Chan ps_pcie_up_af: power-controller@80320 { 584*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 585*576df27aSNick Chan reg = <0x80320 4>; 586*576df27aSNick Chan #power-domain-cells = <0>; 587*576df27aSNick Chan #reset-cells = <0>; 588*576df27aSNick Chan label = "pcie_up_af"; 589*576df27aSNick Chan power-domains = <&ps_iomux>; 590*576df27aSNick Chan }; 591*576df27aSNick Chan 592*576df27aSNick Chan ps_pcie_up: power-controller@80328 { 593*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 594*576df27aSNick Chan reg = <0x80328 4>; 595*576df27aSNick Chan #power-domain-cells = <0>; 596*576df27aSNick Chan #reset-cells = <0>; 597*576df27aSNick Chan label = "pcie_up"; 598*576df27aSNick Chan power-domains = <&ps_pcie_up_af>; 599*576df27aSNick Chan }; 600*576df27aSNick Chan 601*576df27aSNick Chan ps_venc_sys: power-controller@80300 { 602*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 603*576df27aSNick Chan reg = <0x80300 4>; 604*576df27aSNick Chan #power-domain-cells = <0>; 605*576df27aSNick Chan #reset-cells = <0>; 606*576df27aSNick Chan label = "venc_sys"; 607*576df27aSNick Chan power-domains = <&ps_media>; 608*576df27aSNick Chan }; 609*576df27aSNick Chan 610*576df27aSNick Chan ps_ans2: power-controller@80308 { 611*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 612*576df27aSNick Chan reg = <0x80308 4>; 613*576df27aSNick Chan #power-domain-cells = <0>; 614*576df27aSNick Chan #reset-cells = <0>; 615*576df27aSNick Chan label = "ans2"; 616*576df27aSNick Chan power-domains = <&ps_iomux>; 617*576df27aSNick Chan }; 618*576df27aSNick Chan 619*576df27aSNick Chan ps_pcie_down: power-controller@80310 { 620*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 621*576df27aSNick Chan reg = <0x80310 4>; 622*576df27aSNick Chan #power-domain-cells = <0>; 623*576df27aSNick Chan #reset-cells = <0>; 624*576df27aSNick Chan label = "pcie_down"; 625*576df27aSNick Chan power-domains = <&ps_iomux>; 626*576df27aSNick Chan }; 627*576df27aSNick Chan 628*576df27aSNick Chan ps_pcie_down_aux: power-controller@80318 { 629*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 630*576df27aSNick Chan reg = <0x80318 4>; 631*576df27aSNick Chan #power-domain-cells = <0>; 632*576df27aSNick Chan #reset-cells = <0>; 633*576df27aSNick Chan label = "pcie_down_aux"; 634*576df27aSNick Chan }; 635*576df27aSNick Chan 636*576df27aSNick Chan ps_pcie_up_aux: power-controller@80330 { 637*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 638*576df27aSNick Chan reg = <0x80330 4>; 639*576df27aSNick Chan #power-domain-cells = <0>; 640*576df27aSNick Chan #reset-cells = <0>; 641*576df27aSNick Chan label = "pcie_up_aux"; 642*576df27aSNick Chan power-domains = <&ps_pcie_up>; 643*576df27aSNick Chan }; 644*576df27aSNick Chan 645*576df27aSNick Chan ps_pcie_stg0: power-controller@80338 { 646*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 647*576df27aSNick Chan reg = <0x80338 4>; 648*576df27aSNick Chan #power-domain-cells = <0>; 649*576df27aSNick Chan #reset-cells = <0>; 650*576df27aSNick Chan label = "pcie_stg0"; 651*576df27aSNick Chan power-domains = <&ps_ans2>; 652*576df27aSNick Chan }; 653*576df27aSNick Chan 654*576df27aSNick Chan ps_pcie_stg0_aux: power-controller@80340 { 655*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 656*576df27aSNick Chan reg = <0x80340 4>; 657*576df27aSNick Chan #power-domain-cells = <0>; 658*576df27aSNick Chan #reset-cells = <0>; 659*576df27aSNick Chan label = "pcie_stg0_aux"; 660*576df27aSNick Chan }; 661*576df27aSNick Chan 662*576df27aSNick Chan ps_pcie_stg1: power-controller@80348 { 663*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 664*576df27aSNick Chan reg = <0x80348 4>; 665*576df27aSNick Chan #power-domain-cells = <0>; 666*576df27aSNick Chan #reset-cells = <0>; 667*576df27aSNick Chan label = "pcie_stg1"; 668*576df27aSNick Chan power-domains = <&ps_ans2>; 669*576df27aSNick Chan }; 670*576df27aSNick Chan 671*576df27aSNick Chan ps_pcie_stg1_aux: power-controller@80350 { 672*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 673*576df27aSNick Chan reg = <0x80350 4>; 674*576df27aSNick Chan #power-domain-cells = <0>; 675*576df27aSNick Chan #reset-cells = <0>; 676*576df27aSNick Chan label = "pcie_stg1_aux"; 677*576df27aSNick Chan }; 678*576df27aSNick Chan 679*576df27aSNick Chan ps_sep: power-controller@80400 { 680*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 681*576df27aSNick Chan reg = <0x80400 4>; 682*576df27aSNick Chan #power-domain-cells = <0>; 683*576df27aSNick Chan #reset-cells = <0>; 684*576df27aSNick Chan label = "sep"; 685*576df27aSNick Chan apple,always-on; /* Locked on */ 686*576df27aSNick Chan }; 687*576df27aSNick Chan 688*576df27aSNick Chan ps_isp_rsts0: power-controller@84000 { 689*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 690*576df27aSNick Chan reg = <0x84000 4>; 691*576df27aSNick Chan #power-domain-cells = <0>; 692*576df27aSNick Chan #reset-cells = <0>; 693*576df27aSNick Chan label = "isp_rsts0"; 694*576df27aSNick Chan power-domains = <&ps_isp_sys>; 695*576df27aSNick Chan }; 696*576df27aSNick Chan 697*576df27aSNick Chan ps_isp_rsts1: power-controller@84008 { 698*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 699*576df27aSNick Chan reg = <0x84008 4>; 700*576df27aSNick Chan #power-domain-cells = <0>; 701*576df27aSNick Chan #reset-cells = <0>; 702*576df27aSNick Chan label = "isp_rsts1"; 703*576df27aSNick Chan power-domains = <&ps_isp_sys>; 704*576df27aSNick Chan }; 705*576df27aSNick Chan 706*576df27aSNick Chan ps_isp_vis: power-controller@84010 { 707*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 708*576df27aSNick Chan reg = <0x84010 4>; 709*576df27aSNick Chan #power-domain-cells = <0>; 710*576df27aSNick Chan #reset-cells = <0>; 711*576df27aSNick Chan label = "isp_vis"; 712*576df27aSNick Chan power-domains = <&ps_isp_sys>; 713*576df27aSNick Chan }; 714*576df27aSNick Chan 715*576df27aSNick Chan ps_isp_be: power-controller@84018 { 716*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 717*576df27aSNick Chan reg = <0x84018 4>; 718*576df27aSNick Chan #power-domain-cells = <0>; 719*576df27aSNick Chan #reset-cells = <0>; 720*576df27aSNick Chan label = "isp_be"; 721*576df27aSNick Chan power-domains = <&ps_isp_sys>; 722*576df27aSNick Chan }; 723*576df27aSNick Chan 724*576df27aSNick Chan ps_isp_pearl: power-controller@84020 { 725*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 726*576df27aSNick Chan reg = <0x84020 4>; 727*576df27aSNick Chan #power-domain-cells = <0>; 728*576df27aSNick Chan #reset-cells = <0>; 729*576df27aSNick Chan label = "isp_pearl"; 730*576df27aSNick Chan power-domains = <&ps_isp_sys>; 731*576df27aSNick Chan }; 732*576df27aSNick Chan 733*576df27aSNick Chan ps_venc_pipe4: power-controller@88000 { 734*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 735*576df27aSNick Chan reg = <0x88000 4>; 736*576df27aSNick Chan #power-domain-cells = <0>; 737*576df27aSNick Chan #reset-cells = <0>; 738*576df27aSNick Chan label = "venc_pipe4"; 739*576df27aSNick Chan }; 740*576df27aSNick Chan 741*576df27aSNick Chan ps_venc_pipe5: power-controller@88008 { 742*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 743*576df27aSNick Chan reg = <0x88008 4>; 744*576df27aSNick Chan #power-domain-cells = <0>; 745*576df27aSNick Chan #reset-cells = <0>; 746*576df27aSNick Chan label = "venc_pipe5"; 747*576df27aSNick Chan }; 748*576df27aSNick Chan 749*576df27aSNick Chan ps_venc_me0: power-controller@88010 { 750*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 751*576df27aSNick Chan reg = <0x88010 4>; 752*576df27aSNick Chan #power-domain-cells = <0>; 753*576df27aSNick Chan #reset-cells = <0>; 754*576df27aSNick Chan label = "venc_me0"; 755*576df27aSNick Chan }; 756*576df27aSNick Chan 757*576df27aSNick Chan ps_venc_me1: power-controller@88018 { 758*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 759*576df27aSNick Chan reg = <0x88018 4>; 760*576df27aSNick Chan #power-domain-cells = <0>; 761*576df27aSNick Chan #reset-cells = <0>; 762*576df27aSNick Chan label = "venc_me1"; 763*576df27aSNick Chan }; 764*576df27aSNick Chan}; 765*576df27aSNick Chan 766*576df27aSNick Chan&pmgr_mini { 767*576df27aSNick Chan ps_spmi: power-controller@80058 { 768*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 769*576df27aSNick Chan reg = <0x80058 4>; 770*576df27aSNick Chan #power-domain-cells = <0>; 771*576df27aSNick Chan #reset-cells = <0>; 772*576df27aSNick Chan label = "spmi"; 773*576df27aSNick Chan apple,always-on; /* Core AON device */ 774*576df27aSNick Chan }; 775*576df27aSNick Chan 776*576df27aSNick Chan ps_nub_aon: power-controller@80060 { 777*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 778*576df27aSNick Chan reg = <0x80060 4>; 779*576df27aSNick Chan #power-domain-cells = <0>; 780*576df27aSNick Chan #reset-cells = <0>; 781*576df27aSNick Chan label = "nub_aon"; 782*576df27aSNick Chan apple,always-on; /* Core AON device */ 783*576df27aSNick Chan }; 784*576df27aSNick Chan 785*576df27aSNick Chan ps_smc_fabric: power-controller@80030 { 786*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 787*576df27aSNick Chan reg = <0x80030 4>; 788*576df27aSNick Chan #power-domain-cells = <0>; 789*576df27aSNick Chan #reset-cells = <0>; 790*576df27aSNick Chan label = "smc_fabric"; 791*576df27aSNick Chan apple,always-on; /* Core AON device */ 792*576df27aSNick Chan }; 793*576df27aSNick Chan 794*576df27aSNick Chan ps_smc_aon: power-controller@80088 { 795*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 796*576df27aSNick Chan reg = <0x80088 4>; 797*576df27aSNick Chan #power-domain-cells = <0>; 798*576df27aSNick Chan #reset-cells = <0>; 799*576df27aSNick Chan label = "smc_aon"; 800*576df27aSNick Chan apple,always-on; /* Core AON device */ 801*576df27aSNick Chan }; 802*576df27aSNick Chan 803*576df27aSNick Chan ps_debug: power-controller@80050 { 804*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 805*576df27aSNick Chan reg = <0x80050 4>; 806*576df27aSNick Chan #power-domain-cells = <0>; 807*576df27aSNick Chan #reset-cells = <0>; 808*576df27aSNick Chan label = "debug"; 809*576df27aSNick Chan }; 810*576df27aSNick Chan 811*576df27aSNick Chan ps_nub_sram: power-controller@801a0 { 812*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 813*576df27aSNick Chan reg = <0x801a0 4>; 814*576df27aSNick Chan #power-domain-cells = <0>; 815*576df27aSNick Chan #reset-cells = <0>; 816*576df27aSNick Chan label = "nub_sram"; 817*576df27aSNick Chan apple,always-on; /* Core AON device */ 818*576df27aSNick Chan }; 819*576df27aSNick Chan 820*576df27aSNick Chan ps_nub_fabric: power-controller@80198 { 821*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 822*576df27aSNick Chan reg = <0x80198 4>; 823*576df27aSNick Chan #power-domain-cells = <0>; 824*576df27aSNick Chan #reset-cells = <0>; 825*576df27aSNick Chan label = "nub_fabric"; 826*576df27aSNick Chan apple,always-on; /* Core AON device */ 827*576df27aSNick Chan }; 828*576df27aSNick Chan 829*576df27aSNick Chan ps_smc_cpu: power-controller@801a8 { 830*576df27aSNick Chan compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 831*576df27aSNick Chan reg = <0x801a8 4>; 832*576df27aSNick Chan #power-domain-cells = <0>; 833*576df27aSNick Chan #reset-cells = <0>; 834*576df27aSNick Chan label = "smc_cpu"; 835*576df27aSNick Chan power-domains = <&ps_smc_fabric &ps_smc_aon>; 836*576df27aSNick Chan }; 837*576df27aSNick Chan}; 838