1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2/* 3 * PMGR Power domains for the Apple T8012 "T2" SoC 4 * 5 * Copyright (c) 2024 Nick Chan <towinchenmi@gmail.com> 6 */ 7 8&pmgr { 9 ps_cpu0: power-controller@80000 { 10 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 11 reg = <0x80000 4>; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 14 label = "cpu0"; 15 apple,always-on; /* Core device */ 16 }; 17 18 ps_cpu1: power-controller@80008 { 19 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 20 reg = <0x80008 4>; 21 #power-domain-cells = <0>; 22 #reset-cells = <0>; 23 label = "cpu1"; 24 apple,always-on; /* Core device */ 25 }; 26 27 ps_cpm: power-controller@80040 { 28 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 29 reg = <0x80040 4>; 30 #power-domain-cells = <0>; 31 #reset-cells = <0>; 32 label = "cpm"; 33 apple,always-on; /* Core device */ 34 }; 35 36 ps_sio_busif: power-controller@80158 { 37 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 38 reg = <0x80158 4>; 39 #power-domain-cells = <0>; 40 #reset-cells = <0>; 41 label = "sio_busif"; 42 }; 43 44 ps_sio_p: power-controller@80160 { 45 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 46 reg = <0x80160 4>; 47 #power-domain-cells = <0>; 48 #reset-cells = <0>; 49 label = "sio_p"; 50 power-domains = <&ps_sio_busif>; 51 }; 52 53 ps_iomux: power-controller@80150 { 54 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 55 reg = <0x80150 4>; 56 #power-domain-cells = <0>; 57 #reset-cells = <0>; 58 label = "iomux"; 59 }; 60 61 ps_sbr: power-controller@80100 { 62 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 63 reg = <0x80100 4>; 64 #power-domain-cells = <0>; 65 #reset-cells = <0>; 66 label = "sbr"; 67 apple,always-on; /* Apple fabric, critical block */ 68 }; 69 70 ps_aic: power-controller@80108 { 71 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 72 reg = <0x80108 4>; 73 #power-domain-cells = <0>; 74 #reset-cells = <0>; 75 label = "aic"; 76 apple,always-on; /* Core device */ 77 }; 78 79 ps_gpio: power-controller@80110 { 80 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 81 reg = <0x80110 4>; 82 #power-domain-cells = <0>; 83 #reset-cells = <0>; 84 label = "gpio"; 85 }; 86 87 ps_pcie_down_ref: power-controller@80138 { 88 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 89 reg = <0x80138 4>; 90 #power-domain-cells = <0>; 91 #reset-cells = <0>; 92 label = "pcie_down_ref"; 93 }; 94 95 ps_pcie_stg0_ref: power-controller@80140 { 96 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 97 reg = <0x80140 4>; 98 #power-domain-cells = <0>; 99 #reset-cells = <0>; 100 label = "pcie_stg0_ref"; 101 }; 102 103 ps_pcie_stg1_ref: power-controller@80148 { 104 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 105 reg = <0x80148 4>; 106 #power-domain-cells = <0>; 107 #reset-cells = <0>; 108 label = "pcie_stg1_ref"; 109 }; 110 111 ps_mca0: power-controller@80170 { 112 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 113 reg = <0x80170 4>; 114 #power-domain-cells = <0>; 115 #reset-cells = <0>; 116 label = "mca0"; 117 power-domains = <&ps_sio_p>; 118 }; 119 120 ps_mca1: power-controller@80178 { 121 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 122 reg = <0x80178 4>; 123 #power-domain-cells = <0>; 124 #reset-cells = <0>; 125 label = "mca1"; 126 power-domains = <&ps_sio_p>; 127 }; 128 129 ps_mca2: power-controller@80180 { 130 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 131 reg = <0x80180 4>; 132 #power-domain-cells = <0>; 133 #reset-cells = <0>; 134 label = "mca2"; 135 power-domains = <&ps_sio_p>; 136 }; 137 138 ps_mca3: power-controller@80188 { 139 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 140 reg = <0x80188 4>; 141 #power-domain-cells = <0>; 142 #reset-cells = <0>; 143 label = "mca3"; 144 power-domains = <&ps_sio_p>; 145 }; 146 147 ps_mca4: power-controller@80190 { 148 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 149 reg = <0x80190 4>; 150 #power-domain-cells = <0>; 151 #reset-cells = <0>; 152 label = "mca4"; 153 power-domains = <&ps_sio_p>; 154 }; 155 156 ps_mca5: power-controller@80198 { 157 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 158 reg = <0x80198 4>; 159 #power-domain-cells = <0>; 160 #reset-cells = <0>; 161 label = "mca5"; 162 power-domains = <&ps_sio_p>; 163 }; 164 165 ps_i2c0: power-controller@801a8 { 166 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 167 reg = <0x801a8 4>; 168 #power-domain-cells = <0>; 169 #reset-cells = <0>; 170 label = "i2c0"; 171 power-domains = <&ps_sio_p>; 172 }; 173 174 ps_i2c1: power-controller@801b0 { 175 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 176 reg = <0x801b0 4>; 177 #power-domain-cells = <0>; 178 #reset-cells = <0>; 179 label = "i2c1"; 180 power-domains = <&ps_sio_p>; 181 }; 182 183 ps_i2c2: power-controller@801b8 { 184 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 185 reg = <0x801b8 4>; 186 #power-domain-cells = <0>; 187 #reset-cells = <0>; 188 label = "i2c2"; 189 power-domains = <&ps_sio_p>; 190 }; 191 192 ps_i2c3: power-controller@801c0 { 193 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 194 reg = <0x801c0 4>; 195 #power-domain-cells = <0>; 196 #reset-cells = <0>; 197 label = "i2c3"; 198 power-domains = <&ps_sio_p>; 199 }; 200 201 ps_spi0: power-controller@801e0 { 202 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 203 reg = <0x801e0 4>; 204 #power-domain-cells = <0>; 205 #reset-cells = <0>; 206 label = "spi0"; 207 power-domains = <&ps_sio_p>; 208 }; 209 210 ps_spi1: power-controller@801e8 { 211 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 212 reg = <0x801e8 4>; 213 #power-domain-cells = <0>; 214 #reset-cells = <0>; 215 label = "spi1"; 216 power-domains = <&ps_sio_p>; 217 }; 218 219 ps_spi2: power-controller@801f0 { 220 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 221 reg = <0x801f0 4>; 222 #power-domain-cells = <0>; 223 #reset-cells = <0>; 224 label = "spi2"; 225 power-domains = <&ps_sio_p>; 226 }; 227 228 ps_spi3: power-controller@801f8 { 229 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 230 reg = <0x801f8 4>; 231 #power-domain-cells = <0>; 232 #reset-cells = <0>; 233 label = "spi3"; 234 power-domains = <&ps_sio_p>; 235 }; 236 237 ps_pwm0: power-controller@801a0 { 238 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 239 reg = <0x801a0 4>; 240 #power-domain-cells = <0>; 241 #reset-cells = <0>; 242 label = "pwm0"; 243 power-domains = <&ps_sio_p>; 244 }; 245 246 ps_sio: power-controller@80168 { 247 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 248 reg = <0x80168 4>; 249 #power-domain-cells = <0>; 250 #reset-cells = <0>; 251 label = "sio"; 252 power-domains = <&ps_sio_p>; 253 apple,always-on; /* Core device */ 254 }; 255 256 ps_isp_sens0: power-controller@80120 { 257 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 258 reg = <0x80120 4>; 259 #power-domain-cells = <0>; 260 #reset-cells = <0>; 261 label = "isp_sens0"; 262 }; 263 264 ps_isp_sens1: power-controller@80128 { 265 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 266 reg = <0x80128 4>; 267 #power-domain-cells = <0>; 268 #reset-cells = <0>; 269 label = "isp_sens1"; 270 }; 271 272 ps_isp_sens2: power-controller@80130 { 273 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 274 reg = <0x80130 4>; 275 #power-domain-cells = <0>; 276 #reset-cells = <0>; 277 label = "isp_sens2"; 278 }; 279 280 ps_pms: power-controller@80118 { 281 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 282 reg = <0x80118 4>; 283 #power-domain-cells = <0>; 284 #reset-cells = <0>; 285 label = "pms"; 286 apple,always-on; /* Core device */ 287 }; 288 289 ps_i2c4: power-controller@801c8 { 290 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 291 reg = <0x801c8 4>; 292 #power-domain-cells = <0>; 293 #reset-cells = <0>; 294 label = "i2c4"; 295 power-domains = <&ps_sio_p>; 296 }; 297 298 ps_i2c5: power-controller@801d0 { 299 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 300 reg = <0x801d0 4>; 301 #power-domain-cells = <0>; 302 #reset-cells = <0>; 303 label = "i2c5"; 304 power-domains = <&ps_sio_p>; 305 }; 306 307 ps_i2c6: power-controller@801d8 { 308 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 309 reg = <0x801d8 4>; 310 #power-domain-cells = <0>; 311 #reset-cells = <0>; 312 label = "i2c6"; 313 power-domains = <&ps_sio_p>; 314 }; 315 316 ps_usb: power-controller@80268 { 317 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 318 reg = <0x80268 4>; 319 #power-domain-cells = <0>; 320 #reset-cells = <0>; 321 label = "usb"; 322 }; 323 324 ps_usbctrl: power-controller@80270 { 325 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 326 reg = <0x80270 4>; 327 #power-domain-cells = <0>; 328 #reset-cells = <0>; 329 label = "usbctrl"; 330 power-domains = <&ps_usb>; 331 }; 332 333 ps_usb2host0: power-controller@80278 { 334 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 335 reg = <0x80278 4>; 336 #power-domain-cells = <0>; 337 #reset-cells = <0>; 338 label = "usb2host0"; 339 power-domains = <&ps_usbctrl>; 340 }; 341 342 ps_usb2host1: power-controller@80288 { 343 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 344 reg = <0x80288 4>; 345 #power-domain-cells = <0>; 346 #reset-cells = <0>; 347 label = "usb2host1"; 348 power-domains = <&ps_usbctrl>; 349 }; 350 351 ps_rtmux: power-controller@802a8 { 352 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 353 reg = <0x802a8 4>; 354 #power-domain-cells = <0>; 355 #reset-cells = <0>; 356 label = "rtmux"; 357 }; 358 359 ps_media: power-controller@802d8 { 360 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 361 reg = <0x802d8 4>; 362 #power-domain-cells = <0>; 363 #reset-cells = <0>; 364 label = "media"; 365 }; 366 367 ps_isp_sys: power-controller@802d0 { 368 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 369 reg = <0x802d0 4>; 370 #power-domain-cells = <0>; 371 #reset-cells = <0>; 372 label = "isp_sys"; 373 power-domains = <&ps_rtmux>; 374 }; 375 376 ps_msr: power-controller@802e8 { 377 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 378 reg = <0x802e8 4>; 379 #power-domain-cells = <0>; 380 #reset-cells = <0>; 381 label = "msr"; 382 power-domains = <&ps_media>; 383 }; 384 385 ps_jpg: power-controller@802e0 { 386 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 387 reg = <0x802e0 4>; 388 #power-domain-cells = <0>; 389 #reset-cells = <0>; 390 label = "jpg"; 391 power-domains = <&ps_media>; 392 }; 393 394 ps_disp0_fe: power-controller@802b0 { 395 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 396 reg = <0x802b0 4>; 397 #power-domain-cells = <0>; 398 #reset-cells = <0>; 399 label = "disp0_fe"; 400 power-domains = <&ps_rtmux>; 401 }; 402 403 ps_disp0_be: power-controller@802b8 { 404 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 405 reg = <0x802b8 4>; 406 #power-domain-cells = <0>; 407 #reset-cells = <0>; 408 label = "disp0_be"; 409 power-domains = <&ps_disp0_fe>; 410 }; 411 412 ps_uart0: power-controller@80200 { 413 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 414 reg = <0x80200 4>; 415 #power-domain-cells = <0>; 416 #reset-cells = <0>; 417 label = "uart0"; 418 power-domains = <&ps_sio_p>; 419 }; 420 421 ps_uart1: power-controller@80208 { 422 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 423 reg = <0x80208 4>; 424 #power-domain-cells = <0>; 425 #reset-cells = <0>; 426 label = "uart1"; 427 power-domains = <&ps_sio_p>; 428 }; 429 430 ps_uart2: power-controller@80210 { 431 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 432 reg = <0x80210 4>; 433 #power-domain-cells = <0>; 434 #reset-cells = <0>; 435 label = "uart2"; 436 power-domains = <&ps_sio_p>; 437 }; 438 439 ps_uart3: power-controller@80218 { 440 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 441 reg = <0x80218 4>; 442 #power-domain-cells = <0>; 443 #reset-cells = <0>; 444 label = "uart3"; 445 power-domains = <&ps_sio_p>; 446 }; 447 448 ps_uart4: power-controller@80220 { 449 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 450 reg = <0x80220 4>; 451 #power-domain-cells = <0>; 452 #reset-cells = <0>; 453 label = "uart4"; 454 power-domains = <&ps_sio_p>; 455 }; 456 457 ps_dpa: power-controller@80228 { 458 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 459 reg = <0x80228 4>; 460 #power-domain-cells = <0>; 461 #reset-cells = <0>; 462 label = "dpa"; 463 power-domains = <&ps_sio_p>; 464 }; 465 466 ps_hfd0: power-controller@80230 { 467 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 468 reg = <0x80230 4>; 469 #power-domain-cells = <0>; 470 #reset-cells = <0>; 471 label = "hfd0"; 472 power-domains = <&ps_sio_p>; 473 }; 474 475 ps_mcc: power-controller@80240 { 476 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 477 reg = <0x80240 4>; 478 #power-domain-cells = <0>; 479 #reset-cells = <0>; 480 label = "mcc"; 481 apple,always-on; /* Memory cache controller */ 482 }; 483 484 ps_dcs0: power-controller@80248 { 485 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 486 reg = <0x80248 4>; 487 #power-domain-cells = <0>; 488 #reset-cells = <0>; 489 label = "dcs0"; 490 apple,always-on; /* LPDDR4 interface */ 491 }; 492 493 ps_dcs1: power-controller@80250 { 494 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 495 reg = <0x80250 4>; 496 #power-domain-cells = <0>; 497 #reset-cells = <0>; 498 label = "dcs1"; 499 apple,always-on; /* LPDDR4 interface */ 500 }; 501 502 ps_dcs2: power-controller@80258 { 503 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 504 reg = <0x80258 4>; 505 #power-domain-cells = <0>; 506 #reset-cells = <0>; 507 label = "dcs2"; 508 /* Not used on some devicecs, to be disabled by loader */ 509 apple,always-on; /* LPDDR4 interface */ 510 }; 511 512 ps_dcs3: power-controller@80260 { 513 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 514 reg = <0x80260 4>; 515 #power-domain-cells = <0>; 516 #reset-cells = <0>; 517 label = "dcs3"; 518 /* Not used on some devicecs, to be disabled by loader */ 519 apple,always-on; /* LPDDR4 interface */ 520 }; 521 522 ps_usb2host0_ohci: power-controller@80280 { 523 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 524 reg = <0x80280 4>; 525 #power-domain-cells = <0>; 526 #reset-cells = <0>; 527 label = "usb2host0_ohci"; 528 power-domains = <&ps_usb2host0>; 529 }; 530 531 ps_usbotg: power-controller@80290 { 532 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 533 reg = <0x80290 4>; 534 #power-domain-cells = <0>; 535 #reset-cells = <0>; 536 label = "usbotg"; 537 power-domains = <&ps_usbctrl>; 538 }; 539 540 ps_smx: power-controller@80298 { 541 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 542 reg = <0x80298 4>; 543 #power-domain-cells = <0>; 544 #reset-cells = <0>; 545 label = "smx"; 546 apple,always-on; /* Apple fabric, critical block */ 547 }; 548 549 ps_sf: power-controller@802a0 { 550 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 551 reg = <0x802a0 4>; 552 #power-domain-cells = <0>; 553 #reset-cells = <0>; 554 label = "sf"; 555 apple,always-on; /* Apple fabric, critical block */ 556 }; 557 558 ps_mipi_dsi: power-controller@802c8 { 559 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 560 reg = <0x802c8 4>; 561 #power-domain-cells = <0>; 562 #reset-cells = <0>; 563 label = "mipi_dsi"; 564 power-domains = <&ps_disp0_be>; 565 }; 566 567 ps_pmp: power-controller@802f0 { 568 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 569 reg = <0x802f0 4>; 570 #power-domain-cells = <0>; 571 #reset-cells = <0>; 572 label = "pmp"; 573 }; 574 575 ps_pms_sram: power-controller@802f8 { 576 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 577 reg = <0x802f8 4>; 578 #power-domain-cells = <0>; 579 #reset-cells = <0>; 580 label = "pms_sram"; 581 }; 582 583 ps_pcie_up_af: power-controller@80320 { 584 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 585 reg = <0x80320 4>; 586 #power-domain-cells = <0>; 587 #reset-cells = <0>; 588 label = "pcie_up_af"; 589 power-domains = <&ps_iomux>; 590 }; 591 592 ps_pcie_up: power-controller@80328 { 593 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 594 reg = <0x80328 4>; 595 #power-domain-cells = <0>; 596 #reset-cells = <0>; 597 label = "pcie_up"; 598 power-domains = <&ps_pcie_up_af>; 599 }; 600 601 ps_venc_sys: power-controller@80300 { 602 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 603 reg = <0x80300 4>; 604 #power-domain-cells = <0>; 605 #reset-cells = <0>; 606 label = "venc_sys"; 607 power-domains = <&ps_media>; 608 }; 609 610 ps_ans2: power-controller@80308 { 611 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 612 reg = <0x80308 4>; 613 #power-domain-cells = <0>; 614 #reset-cells = <0>; 615 label = "ans2"; 616 power-domains = <&ps_iomux>; 617 }; 618 619 ps_pcie_down: power-controller@80310 { 620 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 621 reg = <0x80310 4>; 622 #power-domain-cells = <0>; 623 #reset-cells = <0>; 624 label = "pcie_down"; 625 power-domains = <&ps_iomux>; 626 }; 627 628 ps_pcie_down_aux: power-controller@80318 { 629 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 630 reg = <0x80318 4>; 631 #power-domain-cells = <0>; 632 #reset-cells = <0>; 633 label = "pcie_down_aux"; 634 }; 635 636 ps_pcie_up_aux: power-controller@80330 { 637 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 638 reg = <0x80330 4>; 639 #power-domain-cells = <0>; 640 #reset-cells = <0>; 641 label = "pcie_up_aux"; 642 power-domains = <&ps_pcie_up>; 643 }; 644 645 ps_pcie_stg0: power-controller@80338 { 646 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 647 reg = <0x80338 4>; 648 #power-domain-cells = <0>; 649 #reset-cells = <0>; 650 label = "pcie_stg0"; 651 power-domains = <&ps_ans2>; 652 }; 653 654 ps_pcie_stg0_aux: power-controller@80340 { 655 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 656 reg = <0x80340 4>; 657 #power-domain-cells = <0>; 658 #reset-cells = <0>; 659 label = "pcie_stg0_aux"; 660 }; 661 662 ps_pcie_stg1: power-controller@80348 { 663 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 664 reg = <0x80348 4>; 665 #power-domain-cells = <0>; 666 #reset-cells = <0>; 667 label = "pcie_stg1"; 668 power-domains = <&ps_ans2>; 669 }; 670 671 ps_pcie_stg1_aux: power-controller@80350 { 672 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 673 reg = <0x80350 4>; 674 #power-domain-cells = <0>; 675 #reset-cells = <0>; 676 label = "pcie_stg1_aux"; 677 }; 678 679 ps_sep: power-controller@80400 { 680 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 681 reg = <0x80400 4>; 682 #power-domain-cells = <0>; 683 #reset-cells = <0>; 684 label = "sep"; 685 apple,always-on; /* Locked on */ 686 }; 687 688 ps_isp_rsts0: power-controller@84000 { 689 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 690 reg = <0x84000 4>; 691 #power-domain-cells = <0>; 692 #reset-cells = <0>; 693 label = "isp_rsts0"; 694 power-domains = <&ps_isp_sys>; 695 }; 696 697 ps_isp_rsts1: power-controller@84008 { 698 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 699 reg = <0x84008 4>; 700 #power-domain-cells = <0>; 701 #reset-cells = <0>; 702 label = "isp_rsts1"; 703 power-domains = <&ps_isp_sys>; 704 }; 705 706 ps_isp_vis: power-controller@84010 { 707 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 708 reg = <0x84010 4>; 709 #power-domain-cells = <0>; 710 #reset-cells = <0>; 711 label = "isp_vis"; 712 power-domains = <&ps_isp_sys>; 713 }; 714 715 ps_isp_be: power-controller@84018 { 716 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 717 reg = <0x84018 4>; 718 #power-domain-cells = <0>; 719 #reset-cells = <0>; 720 label = "isp_be"; 721 power-domains = <&ps_isp_sys>; 722 }; 723 724 ps_isp_pearl: power-controller@84020 { 725 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 726 reg = <0x84020 4>; 727 #power-domain-cells = <0>; 728 #reset-cells = <0>; 729 label = "isp_pearl"; 730 power-domains = <&ps_isp_sys>; 731 }; 732 733 ps_venc_pipe4: power-controller@88000 { 734 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 735 reg = <0x88000 4>; 736 #power-domain-cells = <0>; 737 #reset-cells = <0>; 738 label = "venc_pipe4"; 739 }; 740 741 ps_venc_pipe5: power-controller@88008 { 742 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 743 reg = <0x88008 4>; 744 #power-domain-cells = <0>; 745 #reset-cells = <0>; 746 label = "venc_pipe5"; 747 }; 748 749 ps_venc_me0: power-controller@88010 { 750 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 751 reg = <0x88010 4>; 752 #power-domain-cells = <0>; 753 #reset-cells = <0>; 754 label = "venc_me0"; 755 }; 756 757 ps_venc_me1: power-controller@88018 { 758 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 759 reg = <0x88018 4>; 760 #power-domain-cells = <0>; 761 #reset-cells = <0>; 762 label = "venc_me1"; 763 }; 764}; 765 766&pmgr_mini { 767 ps_spmi: power-controller@80058 { 768 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 769 reg = <0x80058 4>; 770 #power-domain-cells = <0>; 771 #reset-cells = <0>; 772 label = "spmi"; 773 apple,always-on; /* Core AON device */ 774 }; 775 776 ps_nub_aon: power-controller@80060 { 777 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 778 reg = <0x80060 4>; 779 #power-domain-cells = <0>; 780 #reset-cells = <0>; 781 label = "nub_aon"; 782 apple,always-on; /* Core AON device */ 783 }; 784 785 ps_smc_fabric: power-controller@80030 { 786 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 787 reg = <0x80030 4>; 788 #power-domain-cells = <0>; 789 #reset-cells = <0>; 790 label = "smc_fabric"; 791 apple,always-on; /* Core AON device */ 792 }; 793 794 ps_smc_aon: power-controller@80088 { 795 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 796 reg = <0x80088 4>; 797 #power-domain-cells = <0>; 798 #reset-cells = <0>; 799 label = "smc_aon"; 800 apple,always-on; /* Core AON device */ 801 }; 802 803 ps_debug: power-controller@80050 { 804 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 805 reg = <0x80050 4>; 806 #power-domain-cells = <0>; 807 #reset-cells = <0>; 808 label = "debug"; 809 }; 810 811 ps_nub_sram: power-controller@801a0 { 812 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 813 reg = <0x801a0 4>; 814 #power-domain-cells = <0>; 815 #reset-cells = <0>; 816 label = "nub_sram"; 817 apple,always-on; /* Core AON device */ 818 }; 819 820 ps_nub_fabric: power-controller@80198 { 821 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 822 reg = <0x80198 4>; 823 #power-domain-cells = <0>; 824 #reset-cells = <0>; 825 label = "nub_fabric"; 826 apple,always-on; /* Core AON device */ 827 }; 828 829 ps_smc_cpu: power-controller@801a8 { 830 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 831 reg = <0x801a8 4>; 832 #power-domain-cells = <0>; 833 #reset-cells = <0>; 834 label = "smc_cpu"; 835 power-domains = <&ps_smc_fabric &ps_smc_aon>; 836 }; 837}; 838