1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2/* 3 * PMGR Power domains for the Apple T8011 "A10X" SoC 4 * 5 * Copyright (c) 2024 Nick Chan <towinchenmi@gmail.com> 6 */ 7 8&pmgr { 9 ps_cpu0: power-controller@80000 { 10 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 11 reg = <0x80000 4>; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 14 label = "cpu0"; 15 apple,always-on; /* Core device */ 16 }; 17 18 ps_cpu1: power-controller@80008 { 19 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 20 reg = <0x80008 4>; 21 #power-domain-cells = <0>; 22 #reset-cells = <0>; 23 label = "cpu1"; 24 apple,always-on; /* Core device */ 25 }; 26 27 ps_cpu2: power-controller@80010 { 28 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 29 reg = <0x80010 4>; 30 #power-domain-cells = <0>; 31 #reset-cells = <0>; 32 label = "cpu2"; 33 apple,always-on; /* Core device */ 34 }; 35 36 ps_cpm: power-controller@80040 { 37 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 38 reg = <0x80040 4>; 39 #power-domain-cells = <0>; 40 #reset-cells = <0>; 41 label = "cpm"; 42 apple,always-on; /* Core device */ 43 }; 44 45 ps_sio_busif: power-controller@80158 { 46 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 47 reg = <0x80158 4>; 48 #power-domain-cells = <0>; 49 #reset-cells = <0>; 50 label = "sio_busif"; 51 }; 52 53 ps_sio_p: power-controller@80160 { 54 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 55 reg = <0x80160 4>; 56 #power-domain-cells = <0>; 57 #reset-cells = <0>; 58 label = "sio_p"; 59 power-domains = <&ps_sio_busif>; 60 }; 61 62 ps_sbr: power-controller@80100 { 63 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 64 reg = <0x80100 4>; 65 #power-domain-cells = <0>; 66 #reset-cells = <0>; 67 label = "sbr"; 68 apple,always-on; /* Apple fabric, critical block */ 69 }; 70 71 ps_aic: power-controller@80108 { 72 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 73 reg = <0x80108 4>; 74 #power-domain-cells = <0>; 75 #reset-cells = <0>; 76 label = "aic"; 77 apple,always-on; /* Core device */ 78 }; 79 80 ps_dwi: power-controller@80110 { 81 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 82 reg = <0x80110 4>; 83 #power-domain-cells = <0>; 84 #reset-cells = <0>; 85 label = "dwi"; 86 }; 87 88 ps_gpio: power-controller@80118 { 89 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 90 reg = <0x80118 4>; 91 #power-domain-cells = <0>; 92 #reset-cells = <0>; 93 label = "gpio"; 94 }; 95 96 ps_pms: power-controller@80120 { 97 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 98 reg = <0x80120 4>; 99 #power-domain-cells = <0>; 100 #reset-cells = <0>; 101 label = "pms"; 102 apple,always-on; /* Core device */ 103 }; 104 105 ps_pcie_ref: power-controller@80148 { 106 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 107 reg = <0x80148 4>; 108 #power-domain-cells = <0>; 109 #reset-cells = <0>; 110 label = "pcie_ref"; 111 }; 112 113 ps_mca0: power-controller@80170 { 114 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 115 reg = <0x80170 4>; 116 #power-domain-cells = <0>; 117 #reset-cells = <0>; 118 label = "mca0"; 119 power-domains = <&ps_sio_p>; 120 }; 121 122 ps_mca1: power-controller@80178 { 123 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 124 reg = <0x80178 4>; 125 #power-domain-cells = <0>; 126 #reset-cells = <0>; 127 label = "mca1"; 128 power-domains = <&ps_sio_p>; 129 }; 130 131 ps_mca2: power-controller@80180 { 132 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 133 reg = <0x80180 4>; 134 #power-domain-cells = <0>; 135 #reset-cells = <0>; 136 label = "mca2"; 137 power-domains = <&ps_sio_p>; 138 }; 139 140 ps_mca3: power-controller@80188 { 141 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 142 reg = <0x80188 4>; 143 #power-domain-cells = <0>; 144 #reset-cells = <0>; 145 label = "mca3"; 146 power-domains = <&ps_sio_p>; 147 }; 148 149 ps_mca4: power-controller@80190 { 150 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 151 reg = <0x80190 4>; 152 #power-domain-cells = <0>; 153 #reset-cells = <0>; 154 label = "mca4"; 155 power-domains = <&ps_sio_p>; 156 }; 157 158 ps_pwm0: power-controller@80198 { 159 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 160 reg = <0x80198 4>; 161 #power-domain-cells = <0>; 162 #reset-cells = <0>; 163 label = "pwm0"; 164 power-domains = <&ps_sio_p>; 165 }; 166 167 ps_i2c0: power-controller@801a0 { 168 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 169 reg = <0x801a0 4>; 170 #power-domain-cells = <0>; 171 #reset-cells = <0>; 172 label = "i2c0"; 173 power-domains = <&ps_sio_p>; 174 }; 175 176 ps_i2c1: power-controller@801a8 { 177 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 178 reg = <0x801a8 4>; 179 #power-domain-cells = <0>; 180 #reset-cells = <0>; 181 label = "i2c1"; 182 power-domains = <&ps_sio_p>; 183 }; 184 185 ps_i2c2: power-controller@801b0 { 186 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 187 reg = <0x801b0 4>; 188 #power-domain-cells = <0>; 189 #reset-cells = <0>; 190 label = "i2c2"; 191 power-domains = <&ps_sio_p>; 192 }; 193 194 ps_i2c3: power-controller@801b8 { 195 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 196 reg = <0x801b8 4>; 197 #power-domain-cells = <0>; 198 #reset-cells = <0>; 199 label = "i2c3"; 200 power-domains = <&ps_sio_p>; 201 }; 202 203 ps_spi0: power-controller@801c0 { 204 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 205 reg = <0x801c0 4>; 206 #power-domain-cells = <0>; 207 #reset-cells = <0>; 208 label = "spi0"; 209 power-domains = <&ps_sio_p>; 210 }; 211 212 ps_spi1: power-controller@801c8 { 213 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 214 reg = <0x801c8 4>; 215 #power-domain-cells = <0>; 216 #reset-cells = <0>; 217 label = "spi1"; 218 power-domains = <&ps_sio_p>; 219 }; 220 221 ps_spi2: power-controller@801d0 { 222 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 223 reg = <0x801d0 4>; 224 #power-domain-cells = <0>; 225 #reset-cells = <0>; 226 label = "spi2"; 227 power-domains = <&ps_sio_p>; 228 }; 229 230 ps_spi3: power-controller@801d8 { 231 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 232 reg = <0x801d8 4>; 233 #power-domain-cells = <0>; 234 #reset-cells = <0>; 235 label = "spi3"; 236 power-domains = <&ps_sio_p>; 237 }; 238 239 ps_uart0: power-controller@801e0 { 240 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 241 reg = <0x801e0 4>; 242 #power-domain-cells = <0>; 243 #reset-cells = <0>; 244 label = "uart0"; 245 power-domains = <&ps_sio_p>; 246 }; 247 248 ps_uart1: power-controller@801e8 { 249 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 250 reg = <0x801e8 4>; 251 #power-domain-cells = <0>; 252 #reset-cells = <0>; 253 label = "uart1"; 254 power-domains = <&ps_sio_p>; 255 }; 256 257 ps_uart2: power-controller@801f0 { 258 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 259 reg = <0x801f0 4>; 260 #power-domain-cells = <0>; 261 #reset-cells = <0>; 262 label = "uart2"; 263 power-domains = <&ps_sio_p>; 264 }; 265 266 ps_uart3: power-controller@801f8 { 267 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 268 reg = <0x801f8 4>; 269 #power-domain-cells = <0>; 270 #reset-cells = <0>; 271 label = "uart3"; 272 power-domains = <&ps_sio_p>; 273 }; 274 275 ps_sio: power-controller@80168 { 276 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 277 reg = <0x80168 4>; 278 #power-domain-cells = <0>; 279 #reset-cells = <0>; 280 label = "sio"; 281 power-domains = <&ps_sio_p>; 282 apple,always-on; /* Core device */ 283 }; 284 285 ps_hsic0_phy: power-controller@80128 { 286 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 287 reg = <0x80128 4>; 288 #power-domain-cells = <0>; 289 #reset-cells = <0>; 290 label = "hsic0_phy"; 291 power-domains = <&ps_usb3host>; 292 }; 293 294 ps_isp_sens0: power-controller@80130 { 295 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 296 reg = <0x80130 4>; 297 #power-domain-cells = <0>; 298 #reset-cells = <0>; 299 label = "isp_sens0"; 300 }; 301 302 ps_isp_sens1: power-controller@80138 { 303 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 304 reg = <0x80138 4>; 305 #power-domain-cells = <0>; 306 #reset-cells = <0>; 307 label = "isp_sens1"; 308 }; 309 310 ps_isp_sens2: power-controller@80140 { 311 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 312 reg = <0x80140 4>; 313 #power-domain-cells = <0>; 314 #reset-cells = <0>; 315 label = "isp_sens2"; 316 }; 317 318 ps_usb: power-controller@80288 { 319 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 320 reg = <0x80288 4>; 321 #power-domain-cells = <0>; 322 #reset-cells = <0>; 323 label = "usb"; 324 }; 325 326 ps_usbctrl: power-controller@80290 { 327 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 328 reg = <0x80290 4>; 329 #power-domain-cells = <0>; 330 #reset-cells = <0>; 331 label = "usbctrl"; 332 power-domains = <&ps_usb>; 333 }; 334 335 ps_usb2host: power-controller@80298 { 336 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 337 reg = <0x80298 4>; 338 #power-domain-cells = <0>; 339 #reset-cells = <0>; 340 label = "usb2host"; 341 power-domains = <&ps_usbctrl>; 342 }; 343 344 ps_usb2dev: power-controller@802a0 { 345 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 346 reg = <0x802a0 4>; 347 #power-domain-cells = <0>; 348 #reset-cells = <0>; 349 label = "usb2dev"; 350 power-domains = <&ps_usbctrl>; 351 }; 352 353 ps_usb3host: power-controller@802a8 { 354 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 355 reg = <0x802a8 4>; 356 #power-domain-cells = <0>; 357 #reset-cells = <0>; 358 label = "usb3host"; 359 power-domains = <&ps_usbctrl>; 360 }; 361 362 ps_usb3dev: power-controller@802b0 { 363 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 364 reg = <0x802b0 4>; 365 #power-domain-cells = <0>; 366 #reset-cells = <0>; 367 label = "usb3dev"; 368 power-domains = <&ps_usbctrl>; 369 }; 370 371 ps_media: power-controller@802e8 { 372 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 373 reg = <0x802e8 4>; 374 #power-domain-cells = <0>; 375 #reset-cells = <0>; 376 label = "media"; 377 }; 378 379 ps_isp_sys: power-controller@802e0 { 380 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 381 reg = <0x802e0 4>; 382 #power-domain-cells = <0>; 383 #reset-cells = <0>; 384 label = "isp_sys"; 385 }; 386 387 ps_msr: power-controller@802f8 { 388 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 389 reg = <0x802f8 4>; 390 #power-domain-cells = <0>; 391 #reset-cells = <0>; 392 label = "msr"; 393 power-domains = <&ps_media>; 394 }; 395 396 ps_jpg: power-controller@802f0 { 397 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 398 reg = <0x802f0 4>; 399 #power-domain-cells = <0>; 400 #reset-cells = <0>; 401 label = "jpg"; 402 power-domains = <&ps_media>; 403 }; 404 405 ps_disp0_fe: power-controller@802c8 { 406 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 407 reg = <0x802c8 4>; 408 #power-domain-cells = <0>; 409 #reset-cells = <0>; 410 label = "disp0_fe"; 411 }; 412 413 ps_disp0_be: power-controller@802d0 { 414 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 415 reg = <0x802d0 4>; 416 #power-domain-cells = <0>; 417 #reset-cells = <0>; 418 label = "disp0_be"; 419 power-domains = <&ps_disp0_fe>; 420 }; 421 422 ps_dpa: power-controller@80230 { 423 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 424 reg = <0x80230 4>; 425 #power-domain-cells = <0>; 426 #reset-cells = <0>; 427 label = "dpa"; 428 power-domains = <&ps_sio_p>; 429 }; 430 431 ps_uart4: power-controller@80200 { 432 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 433 reg = <0x80200 4>; 434 #power-domain-cells = <0>; 435 #reset-cells = <0>; 436 label = "uart4"; 437 power-domains = <&ps_sio_p>; 438 }; 439 440 ps_uart5: power-controller@80208 { 441 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 442 reg = <0x80208 4>; 443 #power-domain-cells = <0>; 444 #reset-cells = <0>; 445 label = "uart5"; 446 power-domains = <&ps_sio_p>; 447 }; 448 449 ps_uart6: power-controller@80210 { 450 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 451 reg = <0x80210 4>; 452 #power-domain-cells = <0>; 453 #reset-cells = <0>; 454 label = "uart6"; 455 power-domains = <&ps_sio_p>; 456 }; 457 458 ps_uart7: power-controller@80218 { 459 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 460 reg = <0x80218 4>; 461 #power-domain-cells = <0>; 462 #reset-cells = <0>; 463 label = "uart7"; 464 power-domains = <&ps_sio_p>; 465 }; 466 467 ps_uart8: power-controller@80220 { 468 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 469 reg = <0x80220 4>; 470 #power-domain-cells = <0>; 471 #reset-cells = <0>; 472 label = "uart8"; 473 power-domains = <&ps_sio_p>; 474 }; 475 476 ps_hfd0: power-controller@80238 { 477 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 478 reg = <0x80238 4>; 479 #power-domain-cells = <0>; 480 #reset-cells = <0>; 481 label = "hfd0"; 482 power-domains = <&ps_sio_p>; 483 }; 484 485 ps_mcc: power-controller@80240 { 486 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 487 reg = <0x80240 4>; 488 #power-domain-cells = <0>; 489 #reset-cells = <0>; 490 label = "mcc"; 491 apple,always-on; /* Memory cache controller */ 492 }; 493 494 ps_dcs0: power-controller@80248 { 495 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 496 reg = <0x80248 4>; 497 #power-domain-cells = <0>; 498 #reset-cells = <0>; 499 label = "dcs0"; 500 apple,always-on; /* LPDDR4 interface */ 501 }; 502 503 ps_dcs1: power-controller@80250 { 504 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 505 reg = <0x80250 4>; 506 #power-domain-cells = <0>; 507 #reset-cells = <0>; 508 label = "dcs1"; 509 apple,always-on; /* LPDDR4 interface */ 510 }; 511 512 ps_dcs2: power-controller@80258 { 513 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 514 reg = <0x80258 4>; 515 #power-domain-cells = <0>; 516 #reset-cells = <0>; 517 label = "dcs2"; 518 apple,always-on; /* LPDDR4 interface */ 519 }; 520 521 ps_dcs3: power-controller@80260 { 522 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 523 reg = <0x80260 4>; 524 #power-domain-cells = <0>; 525 #reset-cells = <0>; 526 label = "dcs3"; 527 apple,always-on; /* LPDDR4 interface */ 528 }; 529 530 ps_dcs4: power-controller@80268 { 531 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 532 reg = <0x80268 4>; 533 #power-domain-cells = <0>; 534 #reset-cells = <0>; 535 label = "dcs4"; 536 apple,always-on; /* LPDDR4 interface */ 537 }; 538 539 ps_dcs5: power-controller@80270 { 540 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 541 reg = <0x80270 4>; 542 #power-domain-cells = <0>; 543 #reset-cells = <0>; 544 label = "dcs5"; 545 apple,always-on; /* LPDDR4 interface */ 546 }; 547 548 ps_dcs6: power-controller@80278 { 549 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 550 reg = <0x80278 4>; 551 #power-domain-cells = <0>; 552 #reset-cells = <0>; 553 label = "dcs6"; 554 }; 555 556 ps_dcs7: power-controller@80280 { 557 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 558 reg = <0x80280 4>; 559 #power-domain-cells = <0>; 560 #reset-cells = <0>; 561 label = "dcs7"; 562 }; 563 564 ps_smx: power-controller@802b8 { 565 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 566 reg = <0x802b8 4>; 567 #power-domain-cells = <0>; 568 #reset-cells = <0>; 569 label = "smx"; 570 apple,always-on; /* Apple fabric, critical block */ 571 }; 572 573 ps_sf: power-controller@802c0 { 574 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 575 reg = <0x802c0 4>; 576 #power-domain-cells = <0>; 577 #reset-cells = <0>; 578 label = "sf"; 579 apple,always-on; /* Apple fabric, critical block */ 580 }; 581 582 ps_dp: power-controller@802d8 { 583 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 584 reg = <0x802d8 4>; 585 #power-domain-cells = <0>; 586 #reset-cells = <0>; 587 label = "dp"; 588 power-domains = <&ps_disp0_be>; 589 }; 590 591 ps_venc_sys: power-controller@80320 { 592 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 593 reg = <0x80320 4>; 594 #power-domain-cells = <0>; 595 #reset-cells = <0>; 596 label = "venc_sys"; 597 power-domains = <&ps_media>; 598 }; 599 600 ps_srs: power-controller@80390 { 601 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 602 reg = <0x80390 4>; 603 #power-domain-cells = <0>; 604 #reset-cells = <0>; 605 label = "srs"; 606 power-domains = <&ps_media>; 607 }; 608 609 ps_pms_sram: power-controller@80308 { 610 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 611 reg = <0x80308 4>; 612 #power-domain-cells = <0>; 613 #reset-cells = <0>; 614 label = "pms_sram"; 615 }; 616 617 ps_pmp: power-controller@80300 { 618 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 619 reg = <0x80300 4>; 620 #power-domain-cells = <0>; 621 #reset-cells = <0>; 622 label = "pmp"; 623 }; 624 625 ps_pcie: power-controller@80328 { 626 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 627 reg = <0x80328 4>; 628 #power-domain-cells = <0>; 629 #reset-cells = <0>; 630 label = "pcie"; 631 }; 632 633 ps_pcie_aux: power-controller@80330 { 634 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 635 reg = <0x80330 4>; 636 #power-domain-cells = <0>; 637 #reset-cells = <0>; 638 label = "pcie_aux"; 639 }; 640 641 ps_vdec0: power-controller@80310 { 642 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 643 reg = <0x80310 4>; 644 #power-domain-cells = <0>; 645 #reset-cells = <0>; 646 label = "vdec0"; 647 power-domains = <&ps_media>; 648 }; 649 650 ps_gfx: power-controller@80338 { 651 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 652 reg = <0x80338 4>; 653 #power-domain-cells = <0>; 654 #reset-cells = <0>; 655 label = "gfx"; 656 }; 657 658 ps_sep: power-controller@80400 { 659 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 660 reg = <0x80400 4>; 661 #power-domain-cells = <0>; 662 #reset-cells = <0>; 663 label = "sep"; 664 apple,always-on; /* Locked on */ 665 }; 666 667 ps_isp_rsts0: power-controller@84000 { 668 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 669 reg = <0x84000 4>; 670 #power-domain-cells = <0>; 671 #reset-cells = <0>; 672 label = "isp_rsts0"; 673 power-domains = <&ps_isp_sys>; 674 }; 675 676 ps_isp_rsts1: power-controller@84008 { 677 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 678 reg = <0x84008 4>; 679 #power-domain-cells = <0>; 680 #reset-cells = <0>; 681 label = "isp_rsts1"; 682 power-domains = <&ps_isp_sys>; 683 }; 684 685 ps_isp_vis: power-controller@84010 { 686 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 687 reg = <0x84010 4>; 688 #power-domain-cells = <0>; 689 #reset-cells = <0>; 690 label = "isp_vis"; 691 power-domains = <&ps_isp_sys>; 692 }; 693 694 ps_isp_be: power-controller@84018 { 695 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 696 reg = <0x84018 4>; 697 #power-domain-cells = <0>; 698 #reset-cells = <0>; 699 label = "isp_be"; 700 power-domains = <&ps_isp_sys>; 701 }; 702 703 ps_isp_pearl: power-controller@84020 { 704 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 705 reg = <0x84020 4>; 706 #power-domain-cells = <0>; 707 #reset-cells = <0>; 708 label = "isp_pearl"; 709 power-domains = <&ps_isp_sys>; 710 }; 711 712 ps_dprx: power-controller@84028 { 713 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 714 reg = <0x84028 4>; 715 #power-domain-cells = <0>; 716 #reset-cells = <0>; 717 label = "dprx"; 718 power-domains = <&ps_isp_sys>; 719 }; 720 721 ps_venc_pipe4: power-controller@88000 { 722 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 723 reg = <0x88000 4>; 724 #power-domain-cells = <0>; 725 #reset-cells = <0>; 726 label = "venc_pipe4"; 727 power-domains = <&ps_venc_sys>; 728 }; 729 730 ps_venc_pipe5: power-controller@88008 { 731 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 732 reg = <0x88008 4>; 733 #power-domain-cells = <0>; 734 #reset-cells = <0>; 735 label = "venc_pipe5"; 736 power-domains = <&ps_venc_sys>; 737 }; 738 739 ps_venc_me0: power-controller@88010 { 740 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 741 reg = <0x88010 4>; 742 #power-domain-cells = <0>; 743 #reset-cells = <0>; 744 label = "venc_me0"; 745 }; 746 747 ps_venc_me1: power-controller@88018 { 748 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 749 reg = <0x88018 4>; 750 #power-domain-cells = <0>; 751 #reset-cells = <0>; 752 label = "venc_me1"; 753 }; 754}; 755 756&pmgr_mini { 757 ps_aop: power-controller@80000 { 758 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 759 reg = <0x80000 4>; 760 #power-domain-cells = <0>; 761 #reset-cells = <0>; 762 label = "aop"; 763 power-domains = <&ps_aop_cpu &ps_aop_filter &ps_aop_busif>; 764 apple,always-on; /* Always on processor */ 765 }; 766 767 ps_debug: power-controller@80008 { 768 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 769 reg = <0x80008 4>; 770 #power-domain-cells = <0>; 771 #reset-cells = <0>; 772 label = "debug"; 773 }; 774 775 ps_aop_gpio: power-controller@80010 { 776 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 777 reg = <0x80010 4>; 778 #power-domain-cells = <0>; 779 #reset-cells = <0>; 780 label = "aop_gpio"; 781 }; 782 783 ps_aop_cpu: power-controller@80048 { 784 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 785 reg = <0x80048 4>; 786 #power-domain-cells = <0>; 787 #reset-cells = <0>; 788 label = "aop_cpu"; 789 }; 790 791 ps_aop_filter: power-controller@80050 { 792 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 793 reg = <0x80050 4>; 794 #power-domain-cells = <0>; 795 #reset-cells = <0>; 796 label = "aop_filter"; 797 }; 798 799 ps_aop_busif: power-controller@80058 { 800 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 801 reg = <0x80058 4>; 802 #power-domain-cells = <0>; 803 #reset-cells = <0>; 804 label = "aop_busif"; 805 }; 806}; 807