1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2/* 3 * PMGR Power domains for the Apple T8010 "A10" SoC 4 * 5 * Copyright (c) 2024 Nick Chan <towinchenmi@gmail.com> 6 */ 7 8&pmgr { 9 ps_cpu0: power-controller@80000 { 10 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 11 reg = <0x80000 4>; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 14 label = "cpu0"; 15 apple,always-on; /* Core device */ 16 }; 17 18 ps_cpu1: power-controller@80008 { 19 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 20 reg = <0x80008 4>; 21 #power-domain-cells = <0>; 22 #reset-cells = <0>; 23 label = "cpu1"; 24 apple,always-on; /* Core device */ 25 }; 26 27 ps_cpm: power-controller@80040 { 28 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 29 reg = <0x80040 4>; 30 #power-domain-cells = <0>; 31 #reset-cells = <0>; 32 label = "cpm"; 33 apple,always-on; /* Core device */ 34 }; 35 36 ps_sio_busif: power-controller@80160 { 37 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 38 reg = <0x80160 4>; 39 #power-domain-cells = <0>; 40 #reset-cells = <0>; 41 label = "sio_busif"; 42 }; 43 44 ps_sio_p: power-controller@80168 { 45 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 46 reg = <0x80168 4>; 47 #power-domain-cells = <0>; 48 #reset-cells = <0>; 49 label = "sio_p"; 50 power-domains = <&ps_sio_busif>; 51 }; 52 53 ps_sbr: power-controller@80100 { 54 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 55 reg = <0x80100 4>; 56 #power-domain-cells = <0>; 57 #reset-cells = <0>; 58 label = "sbr"; 59 apple,always-on; /* Apple fabric, critical block */ 60 }; 61 62 ps_aic: power-controller@80108 { 63 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 64 reg = <0x80108 4>; 65 #power-domain-cells = <0>; 66 #reset-cells = <0>; 67 label = "aic"; 68 apple,always-on; /* Core device */ 69 }; 70 71 ps_dwi: power-controller@80110 { 72 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 73 reg = <0x80110 4>; 74 #power-domain-cells = <0>; 75 #reset-cells = <0>; 76 label = "dwi"; 77 }; 78 79 ps_gpio: power-controller@80118 { 80 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 81 reg = <0x80118 4>; 82 #power-domain-cells = <0>; 83 #reset-cells = <0>; 84 label = "gpio"; 85 }; 86 87 ps_pms: power-controller@80120 { 88 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 89 reg = <0x80120 4>; 90 #power-domain-cells = <0>; 91 #reset-cells = <0>; 92 label = "pms"; 93 apple,always-on; /* Core device */ 94 }; 95 96 ps_pcie_ref: power-controller@80148 { 97 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 98 reg = <0x80148 4>; 99 #power-domain-cells = <0>; 100 #reset-cells = <0>; 101 label = "pcie_ref"; 102 }; 103 104 ps_socuvd: power-controller@80150 { 105 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 106 reg = <0x80150 4>; 107 #power-domain-cells = <0>; 108 #reset-cells = <0>; 109 label = "socuvd"; 110 }; 111 112 ps_mca0: power-controller@80178 { 113 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 114 reg = <0x80178 4>; 115 #power-domain-cells = <0>; 116 #reset-cells = <0>; 117 label = "mca0"; 118 power-domains = <&ps_sio_p>; 119 }; 120 121 ps_mca1: power-controller@80180 { 122 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 123 reg = <0x80180 4>; 124 #power-domain-cells = <0>; 125 #reset-cells = <0>; 126 label = "mca1"; 127 power-domains = <&ps_sio_p>; 128 }; 129 130 ps_mca2: power-controller@80188 { 131 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 132 reg = <0x80188 4>; 133 #power-domain-cells = <0>; 134 #reset-cells = <0>; 135 label = "mca2"; 136 power-domains = <&ps_sio_p>; 137 }; 138 139 ps_mca3: power-controller@80190 { 140 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 141 reg = <0x80190 4>; 142 #power-domain-cells = <0>; 143 #reset-cells = <0>; 144 label = "mca3"; 145 power-domains = <&ps_sio_p>; 146 }; 147 148 ps_mca4: power-controller@80198 { 149 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 150 reg = <0x80198 4>; 151 #power-domain-cells = <0>; 152 #reset-cells = <0>; 153 label = "mca4"; 154 power-domains = <&ps_sio_p>; 155 }; 156 157 ps_pwm0: power-controller@801a0 { 158 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 159 reg = <0x801a0 4>; 160 #power-domain-cells = <0>; 161 #reset-cells = <0>; 162 label = "pwm0"; 163 power-domains = <&ps_sio_p>; 164 }; 165 166 ps_i2c0: power-controller@801a8 { 167 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 168 reg = <0x801a8 4>; 169 #power-domain-cells = <0>; 170 #reset-cells = <0>; 171 label = "i2c0"; 172 power-domains = <&ps_sio_p>; 173 }; 174 175 ps_i2c1: power-controller@801b0 { 176 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 177 reg = <0x801b0 4>; 178 #power-domain-cells = <0>; 179 #reset-cells = <0>; 180 label = "i2c1"; 181 power-domains = <&ps_sio_p>; 182 }; 183 184 ps_i2c2: power-controller@801b8 { 185 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 186 reg = <0x801b8 4>; 187 #power-domain-cells = <0>; 188 #reset-cells = <0>; 189 label = "i2c2"; 190 power-domains = <&ps_sio_p>; 191 }; 192 193 ps_i2c3: power-controller@801c0 { 194 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 195 reg = <0x801c0 4>; 196 #power-domain-cells = <0>; 197 #reset-cells = <0>; 198 label = "i2c3"; 199 power-domains = <&ps_sio_p>; 200 }; 201 202 ps_spi0: power-controller@801c8 { 203 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 204 reg = <0x801c8 4>; 205 #power-domain-cells = <0>; 206 #reset-cells = <0>; 207 label = "spi0"; 208 power-domains = <&ps_sio_p>; 209 }; 210 211 ps_spi1: power-controller@801d0 { 212 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 213 reg = <0x801d0 4>; 214 #power-domain-cells = <0>; 215 #reset-cells = <0>; 216 label = "spi1"; 217 power-domains = <&ps_sio_p>; 218 }; 219 220 ps_spi2: power-controller@801d8 { 221 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 222 reg = <0x801d8 4>; 223 #power-domain-cells = <0>; 224 #reset-cells = <0>; 225 label = "spi2"; 226 power-domains = <&ps_sio_p>; 227 }; 228 229 ps_spi3: power-controller@801e0 { 230 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 231 reg = <0x801e0 4>; 232 #power-domain-cells = <0>; 233 #reset-cells = <0>; 234 label = "spi3"; 235 power-domains = <&ps_sio_p>; 236 }; 237 238 ps_uart0: power-controller@801e8 { 239 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 240 reg = <0x801e8 4>; 241 #power-domain-cells = <0>; 242 #reset-cells = <0>; 243 label = "uart0"; 244 power-domains = <&ps_sio_p>; 245 }; 246 247 ps_uart1: power-controller@801f0 { 248 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 249 reg = <0x801f0 4>; 250 #power-domain-cells = <0>; 251 #reset-cells = <0>; 252 label = "uart1"; 253 power-domains = <&ps_sio_p>; 254 }; 255 256 ps_uart2: power-controller@801f8 { 257 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 258 reg = <0x801f8 4>; 259 #power-domain-cells = <0>; 260 #reset-cells = <0>; 261 label = "uart2"; 262 power-domains = <&ps_sio_p>; 263 }; 264 265 ps_sio: power-controller@80170 { 266 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 267 reg = <0x80170 4>; 268 #power-domain-cells = <0>; 269 #reset-cells = <0>; 270 label = "sio"; 271 power-domains = <&ps_sio_p>; 272 apple,always-on; /* Core device */ 273 }; 274 275 ps_hsic0_phy: power-controller@80128 { 276 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 277 reg = <0x80128 4>; 278 #power-domain-cells = <0>; 279 #reset-cells = <0>; 280 label = "hsic0_phy"; 281 power-domains = <&ps_usb2host1>; 282 }; 283 284 ps_isp_sens0: power-controller@80130 { 285 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 286 reg = <0x80130 4>; 287 #power-domain-cells = <0>; 288 #reset-cells = <0>; 289 label = "isp_sens0"; 290 }; 291 292 ps_isp_sens1: power-controller@80138 { 293 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 294 reg = <0x80138 4>; 295 #power-domain-cells = <0>; 296 #reset-cells = <0>; 297 label = "isp_sens1"; 298 }; 299 300 ps_isp_sens2: power-controller@80140 { 301 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 302 reg = <0x80140 4>; 303 #power-domain-cells = <0>; 304 #reset-cells = <0>; 305 label = "isp_sens2"; 306 }; 307 308 ps_usb: power-controller@80268 { 309 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 310 reg = <0x80268 4>; 311 #power-domain-cells = <0>; 312 #reset-cells = <0>; 313 label = "usb"; 314 }; 315 316 ps_usbctrl: power-controller@80270 { 317 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 318 reg = <0x80270 4>; 319 #power-domain-cells = <0>; 320 #reset-cells = <0>; 321 label = "usbctrl"; 322 power-domains = <&ps_usb>; 323 }; 324 325 ps_usb2host0: power-controller@80278 { 326 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 327 reg = <0x80278 4>; 328 #power-domain-cells = <0>; 329 #reset-cells = <0>; 330 label = "usb2host0"; 331 power-domains = <&ps_usbctrl>; 332 }; 333 334 ps_usb2host1: power-controller@80288 { 335 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 336 reg = <0x80288 4>; 337 #power-domain-cells = <0>; 338 #reset-cells = <0>; 339 label = "usb2host1"; 340 power-domains = <&ps_usbctrl>; 341 }; 342 343 ps_rtmux: power-controller@802a8 { 344 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 345 reg = <0x802a8 4>; 346 #power-domain-cells = <0>; 347 #reset-cells = <0>; 348 label = "rtmux"; 349 }; 350 351 ps_media: power-controller@802d8 { 352 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 353 reg = <0x802d8 4>; 354 #power-domain-cells = <0>; 355 #reset-cells = <0>; 356 label = "media"; 357 }; 358 359 ps_isp_sys: power-controller@802d0 { 360 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 361 reg = <0x802d0 4>; 362 #power-domain-cells = <0>; 363 #reset-cells = <0>; 364 label = "isp_sys"; 365 power-domains = <&ps_rtmux>; 366 }; 367 368 ps_msr: power-controller@802e8 { 369 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 370 reg = <0x802e8 4>; 371 #power-domain-cells = <0>; 372 #reset-cells = <0>; 373 label = "msr"; 374 power-domains = <&ps_media>; 375 }; 376 377 ps_jpg: power-controller@802e0 { 378 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 379 reg = <0x802e0 4>; 380 #power-domain-cells = <0>; 381 #reset-cells = <0>; 382 label = "jpg"; 383 power-domains = <&ps_media>; 384 }; 385 386 ps_disp0_fe: power-controller@802b0 { 387 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 388 reg = <0x802b0 4>; 389 #power-domain-cells = <0>; 390 #reset-cells = <0>; 391 label = "disp0_fe"; 392 power-domains = <&ps_rtmux>; 393 }; 394 395 ps_disp0_be: power-controller@802b8 { 396 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 397 reg = <0x802b8 4>; 398 #power-domain-cells = <0>; 399 #reset-cells = <0>; 400 label = "disp0_be"; 401 power-domains = <&ps_disp0_fe>; 402 }; 403 404 ps_pmp: power-controller@802f0 { 405 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 406 reg = <0x802f0 4>; 407 #power-domain-cells = <0>; 408 #reset-cells = <0>; 409 label = "pmp"; 410 }; 411 412 ps_pms_sram: power-controller@802f8 { 413 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 414 reg = <0x802f8 4>; 415 #power-domain-cells = <0>; 416 #reset-cells = <0>; 417 label = "pms_sram"; 418 }; 419 420 ps_uart3: power-controller@80200 { 421 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 422 reg = <0x80200 4>; 423 #power-domain-cells = <0>; 424 #reset-cells = <0>; 425 label = "uart3"; 426 power-domains = <&ps_sio_p>; 427 }; 428 429 ps_uart4: power-controller@80208 { 430 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 431 reg = <0x80208 4>; 432 #power-domain-cells = <0>; 433 #reset-cells = <0>; 434 label = "uart4"; 435 power-domains = <&ps_sio_p>; 436 }; 437 438 ps_uart5: power-controller@80210 { 439 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 440 reg = <0x80210 4>; 441 #power-domain-cells = <0>; 442 #reset-cells = <0>; 443 label = "uart5"; 444 power-domains = <&ps_sio_p>; 445 }; 446 447 ps_uart6: power-controller@80218 { 448 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 449 reg = <0x80218 4>; 450 #power-domain-cells = <0>; 451 #reset-cells = <0>; 452 label = "uart6"; 453 power-domains = <&ps_sio_p>; 454 }; 455 456 ps_uart7: power-controller@80220 { 457 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 458 reg = <0x80220 4>; 459 #power-domain-cells = <0>; 460 #reset-cells = <0>; 461 label = "uart7"; 462 power-domains = <&ps_sio_p>; 463 }; 464 465 ps_uart8: power-controller@80228 { 466 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 467 reg = <0x80228 4>; 468 #power-domain-cells = <0>; 469 #reset-cells = <0>; 470 label = "uart8"; 471 power-domains = <&ps_sio_p>; 472 }; 473 474 ps_hfd0: power-controller@80238 { 475 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 476 reg = <0x80238 4>; 477 #power-domain-cells = <0>; 478 #reset-cells = <0>; 479 label = "hfd0"; 480 power-domains = <&ps_sio_p>; 481 }; 482 483 ps_mcc: power-controller@80240 { 484 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 485 reg = <0x80240 4>; 486 #power-domain-cells = <0>; 487 #reset-cells = <0>; 488 label = "mcc"; 489 apple,always-on; /* Memory cache controller */ 490 }; 491 492 ps_dcs0: power-controller@80248 { 493 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 494 reg = <0x80248 4>; 495 #power-domain-cells = <0>; 496 #reset-cells = <0>; 497 label = "dcs0"; 498 apple,always-on; /* LPDDR4 interface */ 499 }; 500 501 ps_dcs1: power-controller@80250 { 502 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 503 reg = <0x80250 4>; 504 #power-domain-cells = <0>; 505 #reset-cells = <0>; 506 label = "dcs1"; 507 apple,always-on; /* LPDDR4 interface */ 508 }; 509 510 ps_dcs2: power-controller@80258 { 511 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 512 reg = <0x80258 4>; 513 #power-domain-cells = <0>; 514 #reset-cells = <0>; 515 label = "dcs2"; 516 apple,always-on; /* LPDDR4 interface */ 517 }; 518 519 ps_dcs3: power-controller@80260 { 520 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 521 reg = <0x80260 4>; 522 #power-domain-cells = <0>; 523 #reset-cells = <0>; 524 label = "dcs3"; 525 apple,always-on; /* LPDDR4 interface */ 526 }; 527 528 ps_usb2host0_ohci: power-controller@80280 { 529 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 530 reg = <0x80280 4>; 531 #power-domain-cells = <0>; 532 #reset-cells = <0>; 533 label = "usb2host0_ohci"; 534 power-domains = <&ps_usb2host0>; 535 }; 536 537 ps_usbotg: power-controller@80290 { 538 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 539 reg = <0x80290 4>; 540 #power-domain-cells = <0>; 541 #reset-cells = <0>; 542 label = "usbotg"; 543 power-domains = <&ps_usbctrl>; 544 }; 545 546 ps_smx: power-controller@80298 { 547 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 548 reg = <0x80298 4>; 549 #power-domain-cells = <0>; 550 #reset-cells = <0>; 551 label = "smx"; 552 apple,always-on; /* Apple fabric, critical block */ 553 }; 554 555 ps_sf: power-controller@802a0 { 556 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 557 reg = <0x802a0 4>; 558 #power-domain-cells = <0>; 559 #reset-cells = <0>; 560 label = "sf"; 561 apple,always-on; /* Apple fabric, critical block */ 562 }; 563 564 ps_mipi_dsi: power-controller@802c0 { 565 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 566 reg = <0x802c0 4>; 567 #power-domain-cells = <0>; 568 #reset-cells = <0>; 569 label = "mipi_dsi"; 570 power-domains = <&ps_disp0_be>; 571 }; 572 573 ps_dp: power-controller@802c8 { 574 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 575 reg = <0x802c8 4>; 576 #power-domain-cells = <0>; 577 #reset-cells = <0>; 578 label = "dp"; 579 power-domains = <&ps_disp0_be>; 580 }; 581 582 ps_venc_sys: power-controller@80310 { 583 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 584 reg = <0x80310 4>; 585 #power-domain-cells = <0>; 586 #reset-cells = <0>; 587 label = "venc_sys"; 588 power-domains = <&ps_media>; 589 }; 590 591 ps_pcie: power-controller@80318 { 592 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 593 reg = <0x80318 4>; 594 #power-domain-cells = <0>; 595 #reset-cells = <0>; 596 label = "pcie"; 597 }; 598 599 ps_pcie_aux: power-controller@80320 { 600 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 601 reg = <0x80320 4>; 602 #power-domain-cells = <0>; 603 #reset-cells = <0>; 604 label = "pcie_aux"; 605 }; 606 607 ps_vdec0: power-controller@80300 { 608 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 609 reg = <0x80300 4>; 610 #power-domain-cells = <0>; 611 #reset-cells = <0>; 612 label = "vdec0"; 613 power-domains = <&ps_media>; 614 }; 615 616 ps_gfx: power-controller@80328 { 617 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 618 reg = <0x80328 4>; 619 #power-domain-cells = <0>; 620 #reset-cells = <0>; 621 label = "gfx"; 622 }; 623 624 ps_sep: power-controller@80400 { 625 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 626 reg = <0x80400 4>; 627 #power-domain-cells = <0>; 628 #reset-cells = <0>; 629 label = "sep"; 630 apple,always-on; /* Locked on */ 631 }; 632 633 ps_isp_rsts0: power-controller@84000 { 634 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 635 reg = <0x84000 4>; 636 #power-domain-cells = <0>; 637 #reset-cells = <0>; 638 label = "isp_rsts0"; 639 power-domains = <&ps_isp_sys>; 640 }; 641 642 ps_isp_rsts1: power-controller@84008 { 643 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 644 reg = <0x84008 4>; 645 #power-domain-cells = <0>; 646 #reset-cells = <0>; 647 label = "isp_rsts1"; 648 power-domains = <&ps_isp_sys>; 649 }; 650 651 ps_isp_vis: power-controller@84010 { 652 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 653 reg = <0x84010 4>; 654 #power-domain-cells = <0>; 655 #reset-cells = <0>; 656 label = "isp_vis"; 657 power-domains = <&ps_isp_sys>; 658 }; 659 660 ps_isp_be: power-controller@84018 { 661 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 662 reg = <0x84018 4>; 663 #power-domain-cells = <0>; 664 #reset-cells = <0>; 665 label = "isp_be"; 666 power-domains = <&ps_isp_sys>; 667 }; 668 669 ps_isp_pearl: power-controller@84020 { 670 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 671 reg = <0x84020 4>; 672 #power-domain-cells = <0>; 673 #reset-cells = <0>; 674 label = "isp_pearl"; 675 power-domains = <&ps_isp_sys>; 676 }; 677 678 ps_dprx: power-controller@84028 { 679 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 680 reg = <0x84028 4>; 681 #power-domain-cells = <0>; 682 #reset-cells = <0>; 683 label = "dprx"; 684 power-domains = <&ps_isp_sys>; 685 }; 686 687 ps_venc_pipe4: power-controller@88000 { 688 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 689 reg = <0x88000 4>; 690 #power-domain-cells = <0>; 691 #reset-cells = <0>; 692 label = "venc_pipe4"; 693 power-domains = <&ps_venc_sys>; 694 }; 695 696 ps_venc_pipe5: power-controller@88008 { 697 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 698 reg = <0x88008 4>; 699 #power-domain-cells = <0>; 700 #reset-cells = <0>; 701 label = "venc_pipe5"; 702 power-domains = <&ps_venc_sys>; 703 }; 704 705 ps_venc_me0: power-controller@88010 { 706 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 707 reg = <0x88010 4>; 708 #power-domain-cells = <0>; 709 #reset-cells = <0>; 710 label = "venc_me0"; 711 }; 712 713 ps_venc_me1: power-controller@88018 { 714 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 715 reg = <0x88018 4>; 716 #power-domain-cells = <0>; 717 #reset-cells = <0>; 718 label = "venc_me1"; 719 }; 720}; 721 722&pmgr_mini { 723 ps_aop: power-controller@80000 { 724 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 725 reg = <0x80000 4>; 726 #power-domain-cells = <0>; 727 #reset-cells = <0>; 728 label = "aop"; 729 power-domains = <&ps_aop_cpu &ps_aop_busif &ps_aop_filter>; 730 apple,always-on; /* Always on processor */ 731 }; 732 733 ps_debug: power-controller@80008 { 734 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 735 reg = <0x80008 4>; 736 #power-domain-cells = <0>; 737 #reset-cells = <0>; 738 label = "debug"; 739 }; 740 741 ps_aop_gpio: power-controller@80010 { 742 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 743 reg = <0x80010 4>; 744 #power-domain-cells = <0>; 745 #reset-cells = <0>; 746 label = "aop_gpio"; 747 }; 748 749 ps_aop_cpu: power-controller@80048 { 750 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 751 reg = <0x80048 4>; 752 #power-domain-cells = <0>; 753 #reset-cells = <0>; 754 label = "aop_cpu"; 755 }; 756 757 ps_aop_filter: power-controller@80050 { 758 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 759 reg = <0x80050 4>; 760 #power-domain-cells = <0>; 761 #reset-cells = <0>; 762 label = "aop_filter"; 763 }; 764 765 ps_aop_busif: power-controller@80058 { 766 compatible = "apple,t8010-pmgr-pwrstate", "apple,pmgr-pwrstate"; 767 reg = <0x80058 4>; 768 #power-domain-cells = <0>; 769 #reset-cells = <0>; 770 label = "aop_busif"; 771 }; 772}; 773