1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2/* 3 * Devices used on die 0 on the Apple T6022 "M2 Ultra" SoC and present on 4 * Apple T6020 / T6021 "M2 Pro" / "M2 Max". 5 * 6 * Copyright The Asahi Linux Contributors 7 */ 8 9 nco: clock-controller@28e03c000 { 10 compatible = "apple,t6020-nco", "apple,t8103-nco"; 11 reg = <0x2 0x8e03c000 0x0 0x14000>; 12 clocks = <&nco_clkref>; 13 #clock-cells = <1>; 14 }; 15 16 aic: interrupt-controller@28e100000 { 17 compatible = "apple,t6020-aic", "apple,aic2"; 18 #interrupt-cells = <4>; 19 interrupt-controller; 20 reg = <0x2 0x8e100000 0x0 0xc000>, 21 <0x2 0x8e10c000 0x0 0x1000>; 22 reg-names = "core", "event"; 23 power-domains = <&ps_aic>; 24 }; 25 26 nub_spmi0: spmi@29e114000 { 27 compatible = "apple,t6020-spmi", "apple,t8103-spmi"; 28 reg = <0x2 0x9e114000 0x0 0x100>; 29 #address-cells = <2>; 30 #size-cells = <0>; 31 32 pmic1: pmic@f { 33 compatible = "apple,maverick-pmic", "apple,spmi-nvmem"; 34 reg = <0xb SPMI_USID>; 35 36 nvmem-layout { 37 compatible = "fixed-layout"; 38 #address-cells = <1>; 39 #size-cells = <1>; 40 41 pm_setting: pm-setting@1405 { 42 reg = <0x1405 0x1>; 43 }; 44 45 rtc_offset: rtc-offset@1411 { 46 reg = <0x1411 0x6>; 47 }; 48 49 boot_stage: boot-stage@6001 { 50 reg = <0x6001 0x1>; 51 }; 52 53 boot_error_count: boot-error-count@6002,0 { 54 reg = <0x6002 0x1>; 55 bits = <0 4>; 56 }; 57 58 panic_count: panic-count@6002,4 { 59 reg = <0x6002 0x1>; 60 bits = <4 4>; 61 }; 62 63 boot_error_stage: boot-error-stage@6003 { 64 reg = <0x6003 0x1>; 65 }; 66 67 shutdown_flag: shutdown-flag@600f,3 { 68 reg = <0x600f 0x1>; 69 bits = <3 1>; 70 }; 71 72 fault_shadow: fault-shadow@867b { 73 reg = <0x867b 0x10>; 74 }; 75 76 socd: socd@8b00 { 77 reg = <0x8b00 0x400>; 78 }; 79 }; 80 }; 81 }; 82 83 wdt: watchdog@29e2c4000 { 84 compatible = "apple,t6020-wdt", "apple,t8103-wdt"; 85 reg = <0x2 0x9e2c4000 0x0 0x4000>; 86 clocks = <&clkref>; 87 interrupt-parent = <&aic>; 88 interrupts = <AIC_IRQ 0 719 IRQ_TYPE_LEVEL_HIGH>; 89 }; 90 91 smc_mbox: mbox@2a2408000 { 92 compatible = "apple,t6020-asc-mailbox", "apple,asc-mailbox-v4"; 93 reg = <0x2 0xa2408000 0x0 0x4000>; 94 interrupt-parent = <&aic>; 95 interrupts = <AIC_IRQ 0 862 IRQ_TYPE_LEVEL_HIGH>, 96 <AIC_IRQ 0 863 IRQ_TYPE_LEVEL_HIGH>, 97 <AIC_IRQ 0 864 IRQ_TYPE_LEVEL_HIGH>, 98 <AIC_IRQ 0 865 IRQ_TYPE_LEVEL_HIGH>; 99 interrupt-names = "send-empty", "send-not-empty", 100 "recv-empty", "recv-not-empty"; 101 #mbox-cells = <0>; 102 }; 103 104 smc: smc@2a2400000 { 105 compatible = "apple,t6020-smc", "apple,t8103-smc"; 106 reg = <0x2 0xa2400000 0x0 0x4000>, 107 <0x2 0xa3e00000 0x0 0x100000>; 108 reg-names = "smc", "sram"; 109 mboxes = <&smc_mbox>; 110 111 smc_gpio: gpio { 112 compatible = "apple,smc-gpio"; 113 gpio-controller; 114 #gpio-cells = <2>; 115 }; 116 117 smc_reboot: reboot { 118 compatible = "apple,smc-reboot"; 119 nvmem-cells = <&shutdown_flag>, <&boot_stage>, 120 <&boot_error_count>, <&panic_count>; 121 nvmem-cell-names = "shutdown_flag", "boot_stage", 122 "boot_error_count", "panic_count"; 123 }; 124 }; 125 126 pinctrl_smc: pinctrl@2a2820000 { 127 compatible = "apple,t6020-pinctrl", "apple,t8103-pinctrl"; 128 reg = <0x2 0xa2820000 0x0 0x4000>; 129 130 gpio-controller; 131 #gpio-cells = <2>; 132 gpio-ranges = <&pinctrl_smc 0 0 30>; 133 apple,npins = <30>; 134 135 interrupt-controller; 136 #interrupt-cells = <2>; 137 interrupt-parent = <&aic>; 138 interrupts = <AIC_IRQ 0 851 IRQ_TYPE_LEVEL_HIGH>, 139 <AIC_IRQ 0 852 IRQ_TYPE_LEVEL_HIGH>, 140 <AIC_IRQ 0 853 IRQ_TYPE_LEVEL_HIGH>, 141 <AIC_IRQ 0 854 IRQ_TYPE_LEVEL_HIGH>, 142 <AIC_IRQ 0 855 IRQ_TYPE_LEVEL_HIGH>, 143 <AIC_IRQ 0 856 IRQ_TYPE_LEVEL_HIGH>, 144 <AIC_IRQ 0 857 IRQ_TYPE_LEVEL_HIGH>; 145 }; 146 147 sio_dart: iommu@39b008000 { 148 compatible = "apple,t6020-dart", "apple,t8110-dart"; 149 reg = <0x3 0x9b008000 0x0 0x8000>; 150 interrupt-parent = <&aic>; 151 interrupts = <AIC_IRQ 0 1231 IRQ_TYPE_LEVEL_HIGH>; 152 #iommu-cells = <1>; 153 power-domains = <&ps_sio_cpu>; 154 }; 155 156 fpwm0: pwm@39b030000 { 157 compatible = "apple,t6020-fpwm", "apple,s5l-fpwm"; 158 reg = <0x3 0x9b030000 0x0 0x4000>; 159 power-domains = <&ps_fpwm0>; 160 clocks = <&clkref>; 161 #pwm-cells = <2>; 162 status = "disabled"; 163 }; 164 165 i2c0: i2c@39b040000 { 166 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 167 reg = <0x3 0x9b040000 0x0 0x4000>; 168 clocks = <&clkref>; 169 interrupt-parent = <&aic>; 170 interrupts = <AIC_IRQ 0 1219 IRQ_TYPE_LEVEL_HIGH>; 171 pinctrl-0 = <&i2c0_pins>; 172 pinctrl-names = "default"; 173 power-domains = <&ps_i2c0>; 174 #address-cells = <0x1>; 175 #size-cells = <0x0>; 176 }; 177 178 i2c1: i2c@39b044000 { 179 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 180 reg = <0x3 0x9b044000 0x0 0x4000>; 181 clocks = <&clkref>; 182 interrupt-parent = <&aic>; 183 interrupts = <AIC_IRQ 0 1220 IRQ_TYPE_LEVEL_HIGH>; 184 pinctrl-0 = <&i2c1_pins>; 185 pinctrl-names = "default"; 186 power-domains = <&ps_i2c1>; 187 #address-cells = <0x1>; 188 #size-cells = <0x0>; 189 status = "disabled"; 190 }; 191 192 i2c2: i2c@39b048000 { 193 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 194 reg = <0x3 0x9b048000 0x0 0x4000>; 195 clocks = <&clkref>; 196 interrupt-parent = <&aic>; 197 interrupts = <AIC_IRQ 0 1221 IRQ_TYPE_LEVEL_HIGH>; 198 pinctrl-0 = <&i2c2_pins>; 199 pinctrl-names = "default"; 200 power-domains = <&ps_i2c2>; 201 #address-cells = <0x1>; 202 #size-cells = <0x0>; 203 status = "disabled"; 204 }; 205 206 i2c3: i2c@39b04c000 { 207 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 208 reg = <0x3 0x9b04c000 0x0 0x4000>; 209 clocks = <&clkref>; 210 interrupt-parent = <&aic>; 211 interrupts = <AIC_IRQ 0 1222 IRQ_TYPE_LEVEL_HIGH>; 212 pinctrl-0 = <&i2c3_pins>; 213 pinctrl-names = "default"; 214 power-domains = <&ps_i2c3>; 215 #address-cells = <0x1>; 216 #size-cells = <0x0>; 217 status = "disabled"; 218 }; 219 220 i2c4: i2c@39b050000 { 221 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 222 reg = <0x3 0x9b050000 0x0 0x4000>; 223 clocks = <&clkref>; 224 interrupt-parent = <&aic>; 225 interrupts = <AIC_IRQ 0 1223 IRQ_TYPE_LEVEL_HIGH>; 226 pinctrl-0 = <&i2c4_pins>; 227 pinctrl-names = "default"; 228 power-domains = <&ps_i2c4>; 229 #address-cells = <0x1>; 230 #size-cells = <0x0>; 231 status = "disabled"; 232 }; 233 234 i2c5: i2c@39b054000 { 235 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 236 reg = <0x3 0x9b054000 0x0 0x4000>; 237 clocks = <&clkref>; 238 interrupt-parent = <&aic>; 239 interrupts = <AIC_IRQ 0 1224 IRQ_TYPE_LEVEL_HIGH>; 240 pinctrl-0 = <&i2c5_pins>; 241 pinctrl-names = "default"; 242 power-domains = <&ps_i2c5>; 243 #address-cells = <0x1>; 244 #size-cells = <0x0>; 245 status = "disabled"; 246 }; 247 248 i2c6: i2c@39b054000 { 249 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 250 reg = <0x3 0x9b054000 0x0 0x4000>; 251 clocks = <&clkref>; 252 interrupt-parent = <&aic>; 253 interrupts = <AIC_IRQ 0 1225 IRQ_TYPE_LEVEL_HIGH>; 254 pinctrl-0 = <&i2c6_pins>; 255 pinctrl-names = "default"; 256 power-domains = <&ps_i2c6>; 257 #address-cells = <0x1>; 258 #size-cells = <0x0>; 259 status = "disabled"; 260 }; 261 262 i2c7: i2c@39b054000 { 263 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 264 reg = <0x3 0x9b054000 0x0 0x4000>; 265 clocks = <&clkref>; 266 interrupt-parent = <&aic>; 267 interrupts = <AIC_IRQ 0 1226 IRQ_TYPE_LEVEL_HIGH>; 268 pinctrl-0 = <&i2c7_pins>; 269 pinctrl-names = "default"; 270 power-domains = <&ps_i2c7>; 271 #address-cells = <0x1>; 272 #size-cells = <0x0>; 273 status = "disabled"; 274 }; 275 276 i2c8: i2c@39b054000 { 277 compatible = "apple,t6020-i2c", "apple,t8103-i2c"; 278 reg = <0x3 0x9b054000 0x0 0x4000>; 279 clocks = <&clkref>; 280 interrupt-parent = <&aic>; 281 interrupts = <AIC_IRQ 0 1227 IRQ_TYPE_LEVEL_HIGH>; 282 pinctrl-0 = <&i2c8_pins>; 283 pinctrl-names = "default"; 284 power-domains = <&ps_i2c8>; 285 #address-cells = <0x1>; 286 #size-cells = <0x0>; 287 status = "disabled"; 288 }; 289 290 spi1: spi@39b104000 { 291 compatible = "apple,t6020-spi", "apple,t8103-spi"; 292 reg = <0x3 0x9b104000 0x0 0x4000>; 293 interrupt-parent = <&aic>; 294 interrupts = <AIC_IRQ 0 1206 IRQ_TYPE_LEVEL_HIGH>; 295 #address-cells = <1>; 296 #size-cells = <0>; 297 clocks = <&clk_200m>; 298 pinctrl-0 = <&spi1_pins>; 299 pinctrl-names = "default"; 300 power-domains = <&ps_spi1>; 301 status = "disabled"; 302 }; 303 304 spi2: spi@39b108000 { 305 compatible = "apple,t6020-spi", "apple,t8103-spi"; 306 reg = <0x3 0x9b108000 0x0 0x4000>; 307 interrupt-parent = <&aic>; 308 interrupts = <AIC_IRQ 0 1207 IRQ_TYPE_LEVEL_HIGH>; 309 #address-cells = <1>; 310 #size-cells = <0>; 311 clocks = <&clkref>; 312 pinctrl-0 = <&spi2_pins>; 313 pinctrl-names = "default"; 314 power-domains = <&ps_spi2>; 315 status = "disabled"; 316 }; 317 318 spi4: spi@39b110000 { 319 compatible = "apple,t6020-spi", "apple,t8103-spi"; 320 reg = <0x3 0x9b110000 0x0 0x4000>; 321 interrupt-parent = <&aic>; 322 interrupts = <AIC_IRQ 0 1209 IRQ_TYPE_LEVEL_HIGH>; 323 #address-cells = <1>; 324 #size-cells = <0>; 325 clocks = <&clkref>; 326 pinctrl-0 = <&spi4_pins>; 327 pinctrl-names = "default"; 328 power-domains = <&ps_spi4>; 329 status = "disabled"; 330 }; 331 332 serial0: serial@39b200000 { 333 compatible = "apple,s5l-uart"; 334 reg = <0x3 0x9b200000 0x0 0x4000>; 335 reg-io-width = <4>; 336 interrupt-parent = <&aic>; 337 interrupts = <AIC_IRQ 0 1198 IRQ_TYPE_LEVEL_HIGH>; 338 /* 339 * TODO: figure out the clocking properly, there may 340 * be a third selectable clock. 341 */ 342 clocks = <&clkref>, <&clkref>; 343 clock-names = "uart", "clk_uart_baud0"; 344 power-domains = <&ps_uart0>; 345 status = "disabled"; 346 }; 347 348 admac: dma-controller@39b400000 { 349 compatible = "apple,t6020-admac", "apple,t8103-admac"; 350 reg = <0x3 0x9b400000 0x0 0x34000>; 351 #dma-cells = <1>; 352 dma-channels = <16>; 353 interrupts-extended = <0>, 354 <&aic AIC_IRQ 0 1218 IRQ_TYPE_LEVEL_HIGH>, 355 <0>, 356 <0>; 357 iommus = <&sio_dart 2>; 358 power-domains = <&ps_sio_adma>; 359 resets = <&ps_audio_p>; 360 }; 361 362 mca: mca@39b600000 { 363 compatible = "apple,t6020-mca", "apple,t8103-mca"; 364 reg = <0x3 0x9b600000 0x0 0x10000>, 365 <0x3 0x9b500000 0x0 0x20000>; 366 clocks = <&nco 0>, <&nco 1>, <&nco 2>, <&nco 3>; 367 dmas = <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>, 368 <&admac 4>, <&admac 5>, <&admac 6>, <&admac 7>, 369 <&admac 8>, <&admac 9>, <&admac 10>, <&admac 11>, 370 <&admac 12>, <&admac 13>, <&admac 14>, <&admac 15>; 371 dma-names = "tx0a", "rx0a", "tx0b", "rx0b", 372 "tx1a", "rx1a", "tx1b", "rx1b", 373 "tx2a", "rx2a", "tx2b", "rx2b", 374 "tx3a", "rx3a", "tx3b", "rx3b"; 375 interrupt-parent = <&aic>; 376 interrupts = <AIC_IRQ 0 1211 IRQ_TYPE_LEVEL_HIGH>, 377 <AIC_IRQ 0 1212 IRQ_TYPE_LEVEL_HIGH>, 378 <AIC_IRQ 0 1213 IRQ_TYPE_LEVEL_HIGH>, 379 <AIC_IRQ 0 1214 IRQ_TYPE_LEVEL_HIGH>; 380 power-domains = <&ps_audio_p>, <&ps_mca0>, <&ps_mca1>, 381 <&ps_mca2>, <&ps_mca3>; 382 resets = <&ps_audio_p>; 383 #sound-dai-cells = <1>; 384 }; 385 386 gpu: gpu@406400000 { 387 compatible = "apple,agx-g14s"; 388 reg = <0x4 0x6400000 0 0x40000>, 389 <0x4 0x4000000 0 0x1000000>; 390 reg-names = "asc", "sgx"; 391 mboxes = <&agx_mbox>; 392 power-domains = <&ps_gfx>; 393 memory-region = <&uat_ttbs>, <&uat_pagetables>, <&uat_handoff>, 394 <&gpu_hw_cal_a>, <&gpu_hw_cal_b>, <&gpu_globals>; 395 memory-region-names = "ttbs", "pagetables", "handoff", 396 "hw-cal-a", "hw-cal-b", "globals"; 397 398 apple,firmware-abi = <0 0 0>; 399 }; 400 401 agx_mbox: mbox@406408000 { 402 compatible = "apple,t6020-asc-mailbox", "apple,asc-mailbox-v4"; 403 reg = <0x4 0x6408000 0x0 0x4000>; 404 interrupt-parent = <&aic>; 405 interrupts = <AIC_IRQ 0 1143 IRQ_TYPE_LEVEL_HIGH>, 406 <AIC_IRQ 0 1144 IRQ_TYPE_LEVEL_HIGH>, 407 <AIC_IRQ 0 1145 IRQ_TYPE_LEVEL_HIGH>, 408 <AIC_IRQ 0 1146 IRQ_TYPE_LEVEL_HIGH>; 409 interrupt-names = "send-empty", "send-not-empty", 410 "recv-empty", "recv-not-empty"; 411 #mbox-cells = <0>; 412 }; 413 414 pcie0: pcie@580000000 { 415 compatible = "apple,t6020-pcie"; 416 device_type = "pci"; 417 418 reg = <0x5 0x80000000 0x0 0x1000000>, /* config */ 419 <0x5 0x91000000 0x0 0x4000>, /* rc */ 420 <0x5 0x94008000 0x0 0x4000>, /* port0 */ 421 <0x5 0x95008000 0x0 0x4000>, /* port1 */ 422 <0x5 0x96008000 0x0 0x4000>, /* port2 */ 423 <0x5 0x97008000 0x0 0x4000>, /* port3 */ 424 <0x5 0x9e00c000 0x0 0x4000>, /* phy0 */ 425 <0x5 0x9e010000 0x0 0x4000>, /* phy1 */ 426 <0x5 0x9e014000 0x0 0x4000>, /* phy2 */ 427 <0x5 0x9e018000 0x0 0x4000>; /* phy3 */ 428 reg-names = "config", "rc", 429 "port0", "port1", "port2", "port3", 430 "phy0", "phy1", "phy2", "phy3"; 431 432 interrupt-parent = <&aic>; 433 interrupts = <AIC_IRQ 0 1340 IRQ_TYPE_LEVEL_HIGH>, 434 <AIC_IRQ 0 1344 IRQ_TYPE_LEVEL_HIGH>, 435 <AIC_IRQ 0 1348 IRQ_TYPE_LEVEL_HIGH>, 436 <AIC_IRQ 0 1352 IRQ_TYPE_LEVEL_HIGH>; 437 438 msi-controller; 439 msi-parent = <&pcie0>; 440 msi-ranges = <&aic AIC_IRQ 0 1672 IRQ_TYPE_EDGE_RISING 32>; 441 442 iommu-map = <0x100 &pcie0_dart_0 1 1>, 443 <0x200 &pcie0_dart_1 1 1>, 444 <0x300 &pcie0_dart_2 1 1>, 445 <0x400 &pcie0_dart_3 1 1>; 446 iommu-map-mask = <0xff00>; 447 448 bus-range = <0 4>; 449 #address-cells = <3>; 450 #size-cells = <2>; 451 ranges = <0x43000000 0x5 0xa0000000 0x5 0xa0000000 0x0 0x20000000>, 452 <0x02000000 0x0 0xc0000000 0x5 0xc0000000 0x0 0x40000000>; 453 454 power-domains = <&ps_apcie_gp_sys>; 455 pinctrl-0 = <&pcie_pins>; 456 pinctrl-names = "default"; 457 458 port00: pci@0,0 { 459 device_type = "pci"; 460 reg = <0x0 0x0 0x0 0x0 0x0>; 461 reset-gpios = <&pinctrl_ap 4 GPIO_ACTIVE_LOW>; 462 463 #address-cells = <3>; 464 #size-cells = <2>; 465 ranges; 466 467 interrupt-controller; 468 #interrupt-cells = <1>; 469 470 interrupt-map-mask = <0 0 0 7>; 471 interrupt-map = <0 0 0 1 &port00 0 0 0 0>, 472 <0 0 0 2 &port00 0 0 0 1>, 473 <0 0 0 3 &port00 0 0 0 2>, 474 <0 0 0 4 &port00 0 0 0 3>; 475 }; 476 477 port01: pci@1,0 { 478 device_type = "pci"; 479 reg = <0x800 0x0 0x0 0x0 0x0>; 480 reset-gpios = <&pinctrl_ap 5 GPIO_ACTIVE_LOW>; 481 482 #address-cells = <3>; 483 #size-cells = <2>; 484 ranges; 485 486 interrupt-controller; 487 #interrupt-cells = <1>; 488 489 interrupt-map-mask = <0 0 0 7>; 490 interrupt-map = <0 0 0 1 &port01 0 0 0 0>, 491 <0 0 0 2 &port01 0 0 0 1>, 492 <0 0 0 3 &port01 0 0 0 2>, 493 <0 0 0 4 &port01 0 0 0 3>; 494 status = "disabled"; 495 }; 496 497 port02: pci@2,0 { 498 device_type = "pci"; 499 reg = <0x1000 0x0 0x0 0x0 0x0>; 500 reset-gpios = <&pinctrl_ap 6 GPIO_ACTIVE_LOW>; 501 502 #address-cells = <3>; 503 #size-cells = <2>; 504 ranges; 505 506 interrupt-controller; 507 #interrupt-cells = <1>; 508 509 interrupt-map-mask = <0 0 0 7>; 510 interrupt-map = <0 0 0 1 &port02 0 0 0 0>, 511 <0 0 0 2 &port02 0 0 0 1>, 512 <0 0 0 3 &port02 0 0 0 2>, 513 <0 0 0 4 &port02 0 0 0 3>; 514 status = "disabled"; 515 }; 516 517 port03: pci@3,0 { 518 device_type = "pci"; 519 reg = <0x1800 0x0 0x0 0x0 0x0>; 520 reset-gpios = <&pinctrl_ap 7 GPIO_ACTIVE_LOW>; 521 522 #address-cells = <3>; 523 #size-cells = <2>; 524 ranges; 525 526 interrupt-controller; 527 #interrupt-cells = <1>; 528 529 interrupt-map-mask = <0 0 0 7>; 530 interrupt-map = <0 0 0 1 &port03 0 0 0 0>, 531 <0 0 0 2 &port03 0 0 0 1>, 532 <0 0 0 3 &port03 0 0 0 2>, 533 <0 0 0 4 &port03 0 0 0 3>; 534 status = "disabled"; 535 }; 536 }; 537 538 pcie0_dart_0: iommu@594000000 { 539 compatible = "apple,t6020-dart", "apple,t8110-dart"; 540 reg = <0x5 0x94000000 0x0 0x4000>; 541 #iommu-cells = <1>; 542 interrupt-parent = <&aic>; 543 interrupts = <AIC_IRQ 0 1341 IRQ_TYPE_LEVEL_HIGH>; 544 power-domains = <&ps_apcie_gp_sys>; 545 }; 546 547 pcie0_dart_1: iommu@595000000 { 548 compatible = "apple,t6020-dart", "apple,t8110-dart"; 549 reg = <0x5 0x95000000 0x0 0x4000>; 550 #iommu-cells = <1>; 551 interrupt-parent = <&aic>; 552 interrupts = <AIC_IRQ 0 1345 IRQ_TYPE_LEVEL_HIGH>; 553 power-domains = <&ps_apcie_gp_sys>; 554 status = "disabled"; 555 }; 556 557 pcie0_dart_2: iommu@596000000 { 558 compatible = "apple,t6020-dart", "apple,t8110-dart"; 559 reg = <0x5 0x96000000 0x0 0x4000>; 560 #iommu-cells = <1>; 561 interrupt-parent = <&aic>; 562 interrupts = <AIC_IRQ 0 1349 IRQ_TYPE_LEVEL_HIGH>; 563 power-domains = <&ps_apcie_gp_sys>; 564 status = "disabled"; 565 }; 566 567 pcie0_dart_3: iommu@597000000 { 568 compatible = "apple,t6020-dart", "apple,t8110-dart"; 569 reg = <0x5 0x97000000 0x0 0x4000>; 570 #iommu-cells = <1>; 571 interrupt-parent = <&aic>; 572 interrupts = <AIC_IRQ 0 1353 IRQ_TYPE_LEVEL_HIGH>; 573 power-domains = <&ps_apcie_gp_sys>; 574 status = "disabled"; 575 }; 576