1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2/* 3 * Devices used on die 0 on the Apple T6002 "M1 Ultra" SoC and present on 4 * Apple T6000 / T6001 "M1 Pro" / "M1 Max". 5 * 6 * Copyright The Asahi Linux Contributors 7 */ 8 9 10 nco: clock-controller@28e03c000 { 11 compatible = "apple,t6000-nco", "apple,nco"; 12 reg = <0x2 0x8e03c000 0x0 0x14000>; 13 clocks = <&nco_clkref>; 14 #clock-cells = <1>; 15 }; 16 17 aic: interrupt-controller@28e100000 { 18 compatible = "apple,t6000-aic", "apple,aic2"; 19 #interrupt-cells = <4>; 20 interrupt-controller; 21 reg = <0x2 0x8e100000 0x0 0xc000>, 22 <0x2 0x8e10c000 0x0 0x4>; 23 reg-names = "core", "event"; 24 power-domains = <&ps_aic>; 25 }; 26 27 pinctrl_smc: pinctrl@290820000 { 28 compatible = "apple,t6000-pinctrl", "apple,pinctrl"; 29 reg = <0x2 0x90820000 0x0 0x4000>; 30 31 gpio-controller; 32 #gpio-cells = <2>; 33 gpio-ranges = <&pinctrl_smc 0 0 30>; 34 apple,npins = <30>; 35 36 interrupt-controller; 37 #interrupt-cells = <2>; 38 interrupt-parent = <&aic>; 39 interrupts = <AIC_IRQ 0 743 IRQ_TYPE_LEVEL_HIGH>, 40 <AIC_IRQ 0 744 IRQ_TYPE_LEVEL_HIGH>, 41 <AIC_IRQ 0 745 IRQ_TYPE_LEVEL_HIGH>, 42 <AIC_IRQ 0 746 IRQ_TYPE_LEVEL_HIGH>, 43 <AIC_IRQ 0 747 IRQ_TYPE_LEVEL_HIGH>, 44 <AIC_IRQ 0 748 IRQ_TYPE_LEVEL_HIGH>, 45 <AIC_IRQ 0 749 IRQ_TYPE_LEVEL_HIGH>; 46 }; 47 48 nub_spmi0: spmi@2920a1300 { 49 compatible = "apple,t6000-spmi", "apple,spmi"; 50 reg = <0x2 0x920a1300 0x0 0x100>; 51 #address-cells = <2>; 52 #size-cells = <0>; 53 54 pmic1: pmic@f { 55 compatible = "apple,maverick-pmic", "apple,spmi-nvmem"; 56 reg = <0xf SPMI_USID>; 57 58 nvmem-layout { 59 compatible = "fixed-layout"; 60 #address-cells = <1>; 61 #size-cells = <1>; 62 63 pm_setting: pm-setting@1405 { 64 reg = <0x1405 0x1>; 65 }; 66 67 rtc_offset: rtc-offset@1411 { 68 reg = <0x1411 0x6>; 69 }; 70 71 boot_stage: boot-stage@6001 { 72 reg = <0x6001 0x1>; 73 }; 74 75 boot_error_count: boot-error-count@6002,0 { 76 reg = <0x6002 0x1>; 77 bits = <0 4>; 78 }; 79 80 panic_count: panic-count@6002,4 { 81 reg = <0x6002 0x1>; 82 bits = <4 4>; 83 }; 84 85 boot_error_stage: boot-error-stage@6003 { 86 reg = <0x6003 0x1>; 87 }; 88 89 shutdown_flag: shutdown-flag@600f,3 { 90 reg = <0x600f 0x1>; 91 bits = <3 1>; 92 }; 93 94 fault_shadow: fault-shadow@867b { 95 reg = <0x867b 0x10>; 96 }; 97 98 socd: socd@8b00 { 99 reg = <0x8b00 0x400>; 100 }; 101 }; 102 }; 103 }; 104 105 wdt: watchdog@2922b0000 { 106 compatible = "apple,t6000-wdt", "apple,wdt"; 107 reg = <0x2 0x922b0000 0x0 0x4000>; 108 clocks = <&clkref>; 109 interrupt-parent = <&aic>; 110 interrupts = <AIC_IRQ 0 631 IRQ_TYPE_LEVEL_HIGH>; 111 }; 112 113 sio_dart_0: iommu@39b004000 { 114 compatible = "apple,t6000-dart"; 115 reg = <0x3 0x9b004000 0x0 0x4000>; 116 interrupt-parent = <&aic>; 117 interrupts = <AIC_IRQ 0 1130 IRQ_TYPE_LEVEL_HIGH>; 118 #iommu-cells = <1>; 119 power-domains = <&ps_sio_cpu>; 120 }; 121 122 sio_dart_1: iommu@39b008000 { 123 compatible = "apple,t6000-dart"; 124 reg = <0x3 0x9b008000 0x0 0x8000>; 125 interrupt-parent = <&aic>; 126 interrupts = <AIC_IRQ 0 1130 IRQ_TYPE_LEVEL_HIGH>; 127 #iommu-cells = <1>; 128 power-domains = <&ps_sio_cpu>; 129 }; 130 131 fpwm0: pwm@39b030000 { 132 compatible = "apple,t6000-fpwm", "apple,s5l-fpwm"; 133 reg = <0x3 0x9b030000 0x0 0x4000>; 134 power-domains = <&ps_fpwm0>; 135 clocks = <&clkref>; 136 #pwm-cells = <2>; 137 status = "disabled"; 138 }; 139 140 i2c0: i2c@39b040000 { 141 compatible = "apple,t6000-i2c", "apple,i2c"; 142 reg = <0x3 0x9b040000 0x0 0x4000>; 143 clocks = <&clkref>; 144 interrupt-parent = <&aic>; 145 interrupts = <AIC_IRQ 0 1119 IRQ_TYPE_LEVEL_HIGH>; 146 pinctrl-0 = <&i2c0_pins>; 147 pinctrl-names = "default"; 148 power-domains = <&ps_i2c0>; 149 #address-cells = <0x1>; 150 #size-cells = <0x0>; 151 }; 152 153 i2c1: i2c@39b044000 { 154 compatible = "apple,t6000-i2c", "apple,i2c"; 155 reg = <0x3 0x9b044000 0x0 0x4000>; 156 clocks = <&clkref>; 157 interrupt-parent = <&aic>; 158 interrupts = <AIC_IRQ 0 1120 IRQ_TYPE_LEVEL_HIGH>; 159 pinctrl-0 = <&i2c1_pins>; 160 pinctrl-names = "default"; 161 power-domains = <&ps_i2c1>; 162 #address-cells = <0x1>; 163 #size-cells = <0x0>; 164 status = "disabled"; 165 }; 166 167 i2c2: i2c@39b048000 { 168 compatible = "apple,t6000-i2c", "apple,i2c"; 169 reg = <0x3 0x9b048000 0x0 0x4000>; 170 clocks = <&clkref>; 171 interrupt-parent = <&aic>; 172 interrupts = <AIC_IRQ 0 1121 IRQ_TYPE_LEVEL_HIGH>; 173 pinctrl-0 = <&i2c2_pins>; 174 pinctrl-names = "default"; 175 power-domains = <&ps_i2c2>; 176 #address-cells = <0x1>; 177 #size-cells = <0x0>; 178 status = "disabled"; 179 }; 180 181 i2c3: i2c@39b04c000 { 182 compatible = "apple,t6000-i2c", "apple,i2c"; 183 reg = <0x3 0x9b04c000 0x0 0x4000>; 184 clocks = <&clkref>; 185 interrupt-parent = <&aic>; 186 interrupts = <AIC_IRQ 0 1122 IRQ_TYPE_LEVEL_HIGH>; 187 pinctrl-0 = <&i2c3_pins>; 188 pinctrl-names = "default"; 189 power-domains = <&ps_i2c3>; 190 #address-cells = <0x1>; 191 #size-cells = <0x0>; 192 status = "disabled"; 193 }; 194 195 i2c4: i2c@39b050000 { 196 compatible = "apple,t6000-i2c", "apple,i2c"; 197 reg = <0x3 0x9b050000 0x0 0x4000>; 198 clocks = <&clkref>; 199 interrupt-parent = <&aic>; 200 interrupts = <AIC_IRQ 0 1123 IRQ_TYPE_LEVEL_HIGH>; 201 pinctrl-0 = <&i2c4_pins>; 202 pinctrl-names = "default"; 203 power-domains = <&ps_i2c4>; 204 #address-cells = <0x1>; 205 #size-cells = <0x0>; 206 status = "disabled"; 207 }; 208 209 i2c5: i2c@39b054000 { 210 compatible = "apple,t6000-i2c", "apple,i2c"; 211 reg = <0x3 0x9b054000 0x0 0x4000>; 212 clocks = <&clkref>; 213 interrupt-parent = <&aic>; 214 interrupts = <AIC_IRQ 0 1124 IRQ_TYPE_LEVEL_HIGH>; 215 pinctrl-0 = <&i2c5_pins>; 216 pinctrl-names = "default"; 217 power-domains = <&ps_i2c5>; 218 #address-cells = <0x1>; 219 #size-cells = <0x0>; 220 status = "disabled"; 221 }; 222 223 spi1: spi@39b104000 { 224 compatible = "apple,t6000-spi", "apple,spi"; 225 reg = <0x3 0x9b104000 0x0 0x4000>; 226 interrupt-parent = <&aic>; 227 interrupts = <AIC_IRQ 0 1107 IRQ_TYPE_LEVEL_HIGH>; 228 #address-cells = <1>; 229 #size-cells = <0>; 230 clocks = <&clk_200m>; 231 pinctrl-0 = <&spi1_pins>; 232 pinctrl-names = "default"; 233 power-domains = <&ps_spi1>; 234 status = "disabled"; 235 }; 236 237 spi3: spi@39b10c000 { 238 compatible = "apple,t6000-spi", "apple,spi"; 239 reg = <0x3 0x9b10c000 0x0 0x4000>; 240 interrupt-parent = <&aic>; 241 interrupts = <AIC_IRQ 0 1109 IRQ_TYPE_LEVEL_HIGH>; 242 #address-cells = <1>; 243 #size-cells = <0>; 244 clocks = <&clkref>; 245 pinctrl-0 = <&spi3_pins>; 246 pinctrl-names = "default"; 247 power-domains = <&ps_spi3>; 248 status = "disabled"; 249 }; 250 251 serial0: serial@39b200000 { 252 compatible = "apple,s5l-uart"; 253 reg = <0x3 0x9b200000 0x0 0x1000>; 254 reg-io-width = <4>; 255 interrupt-parent = <&aic>; 256 interrupts = <AIC_IRQ 0 1097 IRQ_TYPE_LEVEL_HIGH>; 257 /* 258 * TODO: figure out the clocking properly, there may 259 * be a third selectable clock. 260 */ 261 clocks = <&clkref>, <&clkref>; 262 clock-names = "uart", "clk_uart_baud0"; 263 power-domains = <&ps_uart0>; 264 status = "disabled"; 265 }; 266 267 admac: dma-controller@39b400000 { 268 compatible = "apple,t6000-admac", "apple,admac"; 269 reg = <0x3 0x9b400000 0x0 0x34000>; 270 #dma-cells = <1>; 271 dma-channels = <16>; 272 interrupts-extended = <0>, 273 <&aic AIC_IRQ 0 1118 IRQ_TYPE_LEVEL_HIGH>, 274 <0>, 275 <0>; 276 iommus = <&sio_dart_0 2>, <&sio_dart_1 2>; 277 power-domains = <&ps_sio_adma>; 278 resets = <&ps_audio_p>; 279 }; 280 281 mca: mca@39b600000 { 282 compatible = "apple,t6000-mca", "apple,mca"; 283 reg = <0x3 0x9b600000 0x0 0x10000>, 284 <0x3 0x9b500000 0x0 0x20000>; 285 clocks = <&nco 0>, <&nco 1>, <&nco 2>, <&nco 3>; 286 dmas = <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>, 287 <&admac 4>, <&admac 5>, <&admac 6>, <&admac 7>, 288 <&admac 8>, <&admac 9>, <&admac 10>, <&admac 11>, 289 <&admac 12>, <&admac 13>, <&admac 14>, <&admac 15>; 290 dma-names = "tx0a", "rx0a", "tx0b", "rx0b", 291 "tx1a", "rx1a", "tx1b", "rx1b", 292 "tx2a", "rx2a", "tx2b", "rx2b", 293 "tx3a", "rx3a", "tx3b", "rx3b"; 294 interrupt-parent = <&aic>; 295 interrupts = <AIC_IRQ 0 1112 IRQ_TYPE_LEVEL_HIGH>, 296 <AIC_IRQ 0 1113 IRQ_TYPE_LEVEL_HIGH>, 297 <AIC_IRQ 0 1114 IRQ_TYPE_LEVEL_HIGH>, 298 <AIC_IRQ 0 1115 IRQ_TYPE_LEVEL_HIGH>; 299 power-domains = <&ps_audio_p>, <&ps_mca0>, <&ps_mca1>, 300 <&ps_mca2>, <&ps_mca3>; 301 resets = <&ps_audio_p>; 302 #sound-dai-cells = <1>; 303 }; 304 305 gpu: gpu@406400000 { 306 compatible = "apple,agx-g13s"; 307 reg = <0x4 0x6400000 0 0x40000>, 308 <0x4 0x4000000 0 0x1000000>; 309 reg-names = "asc", "sgx"; 310 mboxes = <&agx_mbox>; 311 power-domains = <&ps_gfx>; 312 memory-region = <&uat_ttbs>, <&uat_pagetables>, <&uat_handoff>, 313 <&gpu_hw_cal_a>, <&gpu_hw_cal_b>, <&gpu_globals>; 314 memory-region-names = "ttbs", "pagetables", "handoff", 315 "hw-cal-a", "hw-cal-b", "globals"; 316 317 apple,firmware-abi = <0 0 0>; 318 }; 319 320 agx_mbox: mbox@406408000 { 321 compatible = "apple,t6000-asc-mailbox", "apple,asc-mailbox-v4"; 322 reg = <0x4 0x6408000 0x0 0x4000>; 323 interrupt-parent = <&aic>; 324 interrupts = <AIC_IRQ 0 1059 IRQ_TYPE_LEVEL_HIGH>, 325 <AIC_IRQ 0 1060 IRQ_TYPE_LEVEL_HIGH>, 326 <AIC_IRQ 0 1061 IRQ_TYPE_LEVEL_HIGH>, 327 <AIC_IRQ 0 1062 IRQ_TYPE_LEVEL_HIGH>; 328 interrupt-names = "send-empty", "send-not-empty", 329 "recv-empty", "recv-not-empty"; 330 #mbox-cells = <0>; 331 }; 332 333 pcie0_dart_0: iommu@581008000 { 334 compatible = "apple,t6000-dart"; 335 reg = <0x5 0x81008000 0x0 0x4000>; 336 #iommu-cells = <1>; 337 interrupt-parent = <&aic>; 338 interrupts = <AIC_IRQ 0 1271 IRQ_TYPE_LEVEL_HIGH>; 339 power-domains = <&ps_apcie_gp_sys>; 340 }; 341 342 pcie0_dart_1: iommu@582008000 { 343 compatible = "apple,t6000-dart"; 344 reg = <0x5 0x82008000 0x0 0x4000>; 345 #iommu-cells = <1>; 346 interrupt-parent = <&aic>; 347 interrupts = <AIC_IRQ 0 1274 IRQ_TYPE_LEVEL_HIGH>; 348 power-domains = <&ps_apcie_gp_sys>; 349 }; 350 351 pcie0_dart_2: iommu@583008000 { 352 compatible = "apple,t6000-dart"; 353 reg = <0x5 0x83008000 0x0 0x4000>; 354 #iommu-cells = <1>; 355 interrupt-parent = <&aic>; 356 interrupts = <AIC_IRQ 0 1277 IRQ_TYPE_LEVEL_HIGH>; 357 power-domains = <&ps_apcie_gp_sys>; 358 status = "disabled"; 359 }; 360 361 pcie0_dart_3: iommu@584008000 { 362 compatible = "apple,t6000-dart"; 363 reg = <0x5 0x84008000 0x0 0x4000>; 364 #iommu-cells = <1>; 365 interrupt-parent = <&aic>; 366 interrupts = <AIC_IRQ 0 1280 IRQ_TYPE_LEVEL_HIGH>; 367 power-domains = <&ps_apcie_gp_sys>; 368 status = "disabled"; 369 }; 370 371 pcie0: pcie@590000000 { 372 compatible = "apple,t6000-pcie", "apple,pcie"; 373 device_type = "pci"; 374 375 reg = <0x5 0x90000000 0x0 0x1000000>, 376 <0x5 0x80000000 0x0 0x100000>, 377 <0x5 0x81000000 0x0 0x4000>, 378 <0x5 0x82000000 0x0 0x4000>, 379 <0x5 0x83000000 0x0 0x4000>, 380 <0x5 0x84000000 0x0 0x4000>; 381 reg-names = "config", "rc", "port0", "port1", "port2", "port3"; 382 383 interrupt-parent = <&aic>; 384 interrupts = <AIC_IRQ 0 1270 IRQ_TYPE_LEVEL_HIGH>, 385 <AIC_IRQ 0 1273 IRQ_TYPE_LEVEL_HIGH>, 386 <AIC_IRQ 0 1276 IRQ_TYPE_LEVEL_HIGH>, 387 <AIC_IRQ 0 1279 IRQ_TYPE_LEVEL_HIGH>; 388 389 msi-controller; 390 msi-parent = <&pcie0>; 391 msi-ranges = <&aic AIC_IRQ 0 1581 IRQ_TYPE_EDGE_RISING 32>; 392 393 394 iommu-map = <0x100 &pcie0_dart_0 1 1>, 395 <0x200 &pcie0_dart_1 1 1>, 396 <0x300 &pcie0_dart_2 1 1>, 397 <0x400 &pcie0_dart_3 1 1>; 398 iommu-map-mask = <0xff00>; 399 400 bus-range = <0 4>; 401 #address-cells = <3>; 402 #size-cells = <2>; 403 ranges = <0x43000000 0x5 0xa0000000 0x5 0xa0000000 0x0 0x20000000>, 404 <0x02000000 0x0 0xc0000000 0x5 0xc0000000 0x0 0x40000000>; 405 406 power-domains = <&ps_apcie_gp_sys>; 407 pinctrl-0 = <&pcie_pins>; 408 pinctrl-names = "default"; 409 410 port00: pci@0,0 { 411 device_type = "pci"; 412 reg = <0x0 0x0 0x0 0x0 0x0>; 413 reset-gpios = <&pinctrl_ap 4 GPIO_ACTIVE_LOW>; 414 415 #address-cells = <3>; 416 #size-cells = <2>; 417 ranges; 418 419 interrupt-controller; 420 #interrupt-cells = <1>; 421 422 interrupt-map-mask = <0 0 0 7>; 423 interrupt-map = <0 0 0 1 &port00 0 0 0 0>, 424 <0 0 0 2 &port00 0 0 0 1>, 425 <0 0 0 3 &port00 0 0 0 2>, 426 <0 0 0 4 &port00 0 0 0 3>; 427 }; 428 429 port01: pci@1,0 { 430 device_type = "pci"; 431 reg = <0x800 0x0 0x0 0x0 0x0>; 432 reset-gpios = <&pinctrl_ap 5 GPIO_ACTIVE_LOW>; 433 434 #address-cells = <3>; 435 #size-cells = <2>; 436 ranges; 437 438 interrupt-controller; 439 #interrupt-cells = <1>; 440 441 interrupt-map-mask = <0 0 0 7>; 442 interrupt-map = <0 0 0 1 &port01 0 0 0 0>, 443 <0 0 0 2 &port01 0 0 0 1>, 444 <0 0 0 3 &port01 0 0 0 2>, 445 <0 0 0 4 &port01 0 0 0 3>; 446 }; 447 448 port02: pci@2,0 { 449 device_type = "pci"; 450 reg = <0x1000 0x0 0x0 0x0 0x0>; 451 reset-gpios = <&pinctrl_ap 6 GPIO_ACTIVE_LOW>; 452 453 #address-cells = <3>; 454 #size-cells = <2>; 455 ranges; 456 457 interrupt-controller; 458 #interrupt-cells = <1>; 459 460 interrupt-map-mask = <0 0 0 7>; 461 interrupt-map = <0 0 0 1 &port02 0 0 0 0>, 462 <0 0 0 2 &port02 0 0 0 1>, 463 <0 0 0 3 &port02 0 0 0 2>, 464 <0 0 0 4 &port02 0 0 0 3>; 465 status = "disabled"; 466 }; 467 468 port03: pci@3,0 { 469 device_type = "pci"; 470 reg = <0x1800 0x0 0x0 0x0 0x0>; 471 reset-gpios = <&pinctrl_ap 7 GPIO_ACTIVE_LOW>; 472 473 #address-cells = <3>; 474 #size-cells = <2>; 475 ranges; 476 477 interrupt-controller; 478 #interrupt-cells = <1>; 479 480 interrupt-map-mask = <0 0 0 7>; 481 interrupt-map = <0 0 0 1 &port03 0 0 0 0>, 482 <0 0 0 2 &port03 0 0 0 1>, 483 <0 0 0 3 &port03 0 0 0 2>, 484 <0 0 0 4 &port03 0 0 0 3>; 485 status = "disabled"; 486 }; 487 }; 488