xref: /linux/scripts/dtc/include-prefixes/arm64/apple/s800-0-3-pmgr.dtsi (revision 2f24482304ebd32c5aa374f31465b9941a860b92)
1*bd89a1baSNick Chan// SPDX-License-Identifier: GPL-2.0+ OR MIT
2*bd89a1baSNick Chan/*
3*bd89a1baSNick Chan * PMGR Power domains for the Apple S8000/3 "A9" SoC
4*bd89a1baSNick Chan *
5*bd89a1baSNick Chan * Copyright (c) 2024 Nick Chan <towinchenmi@gmail.com>
6*bd89a1baSNick Chan */
7*bd89a1baSNick Chan
8*bd89a1baSNick Chan&pmgr {
9*bd89a1baSNick Chan	ps_cpu0: power-controller@80000 {
10*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
11*bd89a1baSNick Chan		reg = <0x80000 4>;
12*bd89a1baSNick Chan		#power-domain-cells = <0>;
13*bd89a1baSNick Chan		#reset-cells = <0>;
14*bd89a1baSNick Chan		label = "cpu0";
15*bd89a1baSNick Chan		apple,always-on; /* Core device */
16*bd89a1baSNick Chan	};
17*bd89a1baSNick Chan
18*bd89a1baSNick Chan	ps_cpu1: power-controller@80008 {
19*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
20*bd89a1baSNick Chan		reg = <0x80008 4>;
21*bd89a1baSNick Chan		#power-domain-cells = <0>;
22*bd89a1baSNick Chan		#reset-cells = <0>;
23*bd89a1baSNick Chan		label = "cpu1";
24*bd89a1baSNick Chan		apple,always-on; /* Core device */
25*bd89a1baSNick Chan	};
26*bd89a1baSNick Chan
27*bd89a1baSNick Chan	ps_cpm: power-controller@80040 {
28*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
29*bd89a1baSNick Chan		reg = <0x80040 4>;
30*bd89a1baSNick Chan		#power-domain-cells = <0>;
31*bd89a1baSNick Chan		#reset-cells = <0>;
32*bd89a1baSNick Chan		label = "cpm";
33*bd89a1baSNick Chan		apple,always-on; /* Core device */
34*bd89a1baSNick Chan	};
35*bd89a1baSNick Chan
36*bd89a1baSNick Chan	ps_sio_busif: power-controller@80150 {
37*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
38*bd89a1baSNick Chan		reg = <0x80150 4>;
39*bd89a1baSNick Chan		#power-domain-cells = <0>;
40*bd89a1baSNick Chan		#reset-cells = <0>;
41*bd89a1baSNick Chan		label = "sio_busif";
42*bd89a1baSNick Chan	};
43*bd89a1baSNick Chan
44*bd89a1baSNick Chan	ps_sio_p: power-controller@80158 {
45*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
46*bd89a1baSNick Chan		reg = <0x80158 4>;
47*bd89a1baSNick Chan		#power-domain-cells = <0>;
48*bd89a1baSNick Chan		#reset-cells = <0>;
49*bd89a1baSNick Chan		label = "sio_p";
50*bd89a1baSNick Chan		power-domains = <&ps_sio_busif>;
51*bd89a1baSNick Chan	};
52*bd89a1baSNick Chan
53*bd89a1baSNick Chan	ps_sbr: power-controller@80100 {
54*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
55*bd89a1baSNick Chan		reg = <0x80100 4>;
56*bd89a1baSNick Chan		#power-domain-cells = <0>;
57*bd89a1baSNick Chan		#reset-cells = <0>;
58*bd89a1baSNick Chan		label = "sbr";
59*bd89a1baSNick Chan		apple,always-on; /* Apple fabric, critical block */
60*bd89a1baSNick Chan	};
61*bd89a1baSNick Chan
62*bd89a1baSNick Chan	ps_aic: power-controller@80108 {
63*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
64*bd89a1baSNick Chan		reg = <0x80108 4>;
65*bd89a1baSNick Chan		#power-domain-cells = <0>;
66*bd89a1baSNick Chan		#reset-cells = <0>;
67*bd89a1baSNick Chan		label = "aic";
68*bd89a1baSNick Chan		apple,always-on; /* Core device */
69*bd89a1baSNick Chan	};
70*bd89a1baSNick Chan
71*bd89a1baSNick Chan	ps_dwi: power-controller@80110 {
72*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
73*bd89a1baSNick Chan		reg = <0x80110 4>;
74*bd89a1baSNick Chan		#power-domain-cells = <0>;
75*bd89a1baSNick Chan		#reset-cells = <0>;
76*bd89a1baSNick Chan		label = "dwi";
77*bd89a1baSNick Chan	};
78*bd89a1baSNick Chan
79*bd89a1baSNick Chan	ps_gpio: power-controller@80118 {
80*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
81*bd89a1baSNick Chan		reg = <0x80118 4>;
82*bd89a1baSNick Chan		#power-domain-cells = <0>;
83*bd89a1baSNick Chan		#reset-cells = <0>;
84*bd89a1baSNick Chan		label = "gpio";
85*bd89a1baSNick Chan	};
86*bd89a1baSNick Chan
87*bd89a1baSNick Chan	ps_pms: power-controller@80120 {
88*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
89*bd89a1baSNick Chan		reg = <0x80120 4>;
90*bd89a1baSNick Chan		#power-domain-cells = <0>;
91*bd89a1baSNick Chan		#reset-cells = <0>;
92*bd89a1baSNick Chan		label = "pms";
93*bd89a1baSNick Chan		apple,always-on; /* Core device */
94*bd89a1baSNick Chan	};
95*bd89a1baSNick Chan
96*bd89a1baSNick Chan	ps_pcie_ref: power-controller@80148 {
97*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
98*bd89a1baSNick Chan		reg = <0x80148 4>;
99*bd89a1baSNick Chan		#power-domain-cells = <0>;
100*bd89a1baSNick Chan		#reset-cells = <0>;
101*bd89a1baSNick Chan		label = "pcie_ref";
102*bd89a1baSNick Chan	};
103*bd89a1baSNick Chan
104*bd89a1baSNick Chan	ps_mca0: power-controller@80168 {
105*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
106*bd89a1baSNick Chan		reg = <0x80168 4>;
107*bd89a1baSNick Chan		#power-domain-cells = <0>;
108*bd89a1baSNick Chan		#reset-cells = <0>;
109*bd89a1baSNick Chan		label = "mca0";
110*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
111*bd89a1baSNick Chan	};
112*bd89a1baSNick Chan
113*bd89a1baSNick Chan	ps_mca1: power-controller@80170 {
114*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
115*bd89a1baSNick Chan		reg = <0x80170 4>;
116*bd89a1baSNick Chan		#power-domain-cells = <0>;
117*bd89a1baSNick Chan		#reset-cells = <0>;
118*bd89a1baSNick Chan		label = "mca1";
119*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
120*bd89a1baSNick Chan	};
121*bd89a1baSNick Chan
122*bd89a1baSNick Chan	ps_mca2: power-controller@80178 {
123*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
124*bd89a1baSNick Chan		reg = <0x80178 4>;
125*bd89a1baSNick Chan		#power-domain-cells = <0>;
126*bd89a1baSNick Chan		#reset-cells = <0>;
127*bd89a1baSNick Chan		label = "mca2";
128*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
129*bd89a1baSNick Chan	};
130*bd89a1baSNick Chan
131*bd89a1baSNick Chan	ps_mca3: power-controller@80180 {
132*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
133*bd89a1baSNick Chan		reg = <0x80180 4>;
134*bd89a1baSNick Chan		#power-domain-cells = <0>;
135*bd89a1baSNick Chan		#reset-cells = <0>;
136*bd89a1baSNick Chan		label = "mca3";
137*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
138*bd89a1baSNick Chan	};
139*bd89a1baSNick Chan
140*bd89a1baSNick Chan	ps_mca4: power-controller@80188 {
141*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
142*bd89a1baSNick Chan		reg = <0x80188 4>;
143*bd89a1baSNick Chan		#power-domain-cells = <0>;
144*bd89a1baSNick Chan		#reset-cells = <0>;
145*bd89a1baSNick Chan		label = "mca4";
146*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
147*bd89a1baSNick Chan	};
148*bd89a1baSNick Chan
149*bd89a1baSNick Chan	ps_pwm0: power-controller@80190 {
150*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
151*bd89a1baSNick Chan		reg = <0x80190 4>;
152*bd89a1baSNick Chan		#power-domain-cells = <0>;
153*bd89a1baSNick Chan		#reset-cells = <0>;
154*bd89a1baSNick Chan		label = "pwm0";
155*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
156*bd89a1baSNick Chan	};
157*bd89a1baSNick Chan
158*bd89a1baSNick Chan	ps_i2c0: power-controller@80198 {
159*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
160*bd89a1baSNick Chan		reg = <0x80198 4>;
161*bd89a1baSNick Chan		#power-domain-cells = <0>;
162*bd89a1baSNick Chan		#reset-cells = <0>;
163*bd89a1baSNick Chan		label = "i2c0";
164*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
165*bd89a1baSNick Chan	};
166*bd89a1baSNick Chan
167*bd89a1baSNick Chan	ps_i2c1: power-controller@801a0 {
168*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
169*bd89a1baSNick Chan		reg = <0x801a0 4>;
170*bd89a1baSNick Chan		#power-domain-cells = <0>;
171*bd89a1baSNick Chan		#reset-cells = <0>;
172*bd89a1baSNick Chan		label = "i2c1";
173*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
174*bd89a1baSNick Chan	};
175*bd89a1baSNick Chan
176*bd89a1baSNick Chan	ps_i2c2: power-controller@801a8 {
177*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
178*bd89a1baSNick Chan		reg = <0x801a8 4>;
179*bd89a1baSNick Chan		#power-domain-cells = <0>;
180*bd89a1baSNick Chan		#reset-cells = <0>;
181*bd89a1baSNick Chan		label = "i2c2";
182*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
183*bd89a1baSNick Chan	};
184*bd89a1baSNick Chan
185*bd89a1baSNick Chan	ps_i2c3: power-controller@801b0 {
186*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
187*bd89a1baSNick Chan		reg = <0x801b0 4>;
188*bd89a1baSNick Chan		#power-domain-cells = <0>;
189*bd89a1baSNick Chan		#reset-cells = <0>;
190*bd89a1baSNick Chan		label = "i2c3";
191*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
192*bd89a1baSNick Chan	};
193*bd89a1baSNick Chan
194*bd89a1baSNick Chan	ps_spi0: power-controller@801b8 {
195*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
196*bd89a1baSNick Chan		reg = <0x801b8 4>;
197*bd89a1baSNick Chan		#power-domain-cells = <0>;
198*bd89a1baSNick Chan		#reset-cells = <0>;
199*bd89a1baSNick Chan		label = "spi0";
200*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
201*bd89a1baSNick Chan	};
202*bd89a1baSNick Chan
203*bd89a1baSNick Chan	ps_spi1: power-controller@801c0 {
204*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
205*bd89a1baSNick Chan		reg = <0x801c0 4>;
206*bd89a1baSNick Chan		#power-domain-cells = <0>;
207*bd89a1baSNick Chan		#reset-cells = <0>;
208*bd89a1baSNick Chan		label = "spi1";
209*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
210*bd89a1baSNick Chan	};
211*bd89a1baSNick Chan
212*bd89a1baSNick Chan	ps_spi2: power-controller@801c8 {
213*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
214*bd89a1baSNick Chan		reg = <0x801c8 4>;
215*bd89a1baSNick Chan		#power-domain-cells = <0>;
216*bd89a1baSNick Chan		#reset-cells = <0>;
217*bd89a1baSNick Chan		label = "spi2";
218*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
219*bd89a1baSNick Chan	};
220*bd89a1baSNick Chan
221*bd89a1baSNick Chan	ps_spi3: power-controller@801d0 {
222*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
223*bd89a1baSNick Chan		reg = <0x801d0 4>;
224*bd89a1baSNick Chan		#power-domain-cells = <0>;
225*bd89a1baSNick Chan		#reset-cells = <0>;
226*bd89a1baSNick Chan		label = "spi3";
227*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
228*bd89a1baSNick Chan	};
229*bd89a1baSNick Chan
230*bd89a1baSNick Chan	ps_uart0: power-controller@801d8 {
231*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
232*bd89a1baSNick Chan		reg = <0x801d8 4>;
233*bd89a1baSNick Chan		#power-domain-cells = <0>;
234*bd89a1baSNick Chan		#reset-cells = <0>;
235*bd89a1baSNick Chan		label = "uart0";
236*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
237*bd89a1baSNick Chan	};
238*bd89a1baSNick Chan
239*bd89a1baSNick Chan	ps_uart1: power-controller@801e0 {
240*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
241*bd89a1baSNick Chan		reg = <0x801e0 4>;
242*bd89a1baSNick Chan		#power-domain-cells = <0>;
243*bd89a1baSNick Chan		#reset-cells = <0>;
244*bd89a1baSNick Chan		label = "uart1";
245*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
246*bd89a1baSNick Chan	};
247*bd89a1baSNick Chan
248*bd89a1baSNick Chan	ps_uart2: power-controller@801e8 {
249*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
250*bd89a1baSNick Chan		reg = <0x801e8 4>;
251*bd89a1baSNick Chan		#power-domain-cells = <0>;
252*bd89a1baSNick Chan		#reset-cells = <0>;
253*bd89a1baSNick Chan		label = "uart2";
254*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
255*bd89a1baSNick Chan	};
256*bd89a1baSNick Chan
257*bd89a1baSNick Chan	ps_uart3: power-controller@801f0 {
258*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
259*bd89a1baSNick Chan		reg = <0x801f0 4>;
260*bd89a1baSNick Chan		#power-domain-cells = <0>;
261*bd89a1baSNick Chan		#reset-cells = <0>;
262*bd89a1baSNick Chan		label = "uart3";
263*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
264*bd89a1baSNick Chan	};
265*bd89a1baSNick Chan
266*bd89a1baSNick Chan	ps_uart4: power-controller@801f8 {
267*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
268*bd89a1baSNick Chan		reg = <0x801f8 4>;
269*bd89a1baSNick Chan		#power-domain-cells = <0>;
270*bd89a1baSNick Chan		#reset-cells = <0>;
271*bd89a1baSNick Chan		label = "uart4";
272*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
273*bd89a1baSNick Chan	};
274*bd89a1baSNick Chan
275*bd89a1baSNick Chan	ps_sio: power-controller@80160 {
276*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
277*bd89a1baSNick Chan		reg = <0x80160 4>;
278*bd89a1baSNick Chan		#power-domain-cells = <0>;
279*bd89a1baSNick Chan		#reset-cells = <0>;
280*bd89a1baSNick Chan		label = "sio";
281*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
282*bd89a1baSNick Chan		apple,always-on; /* Core device */
283*bd89a1baSNick Chan	};
284*bd89a1baSNick Chan
285*bd89a1baSNick Chan	ps_hsic0_phy: power-controller@80128 {
286*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
287*bd89a1baSNick Chan		reg = <0x80128 4>;
288*bd89a1baSNick Chan		#power-domain-cells = <0>;
289*bd89a1baSNick Chan		#reset-cells = <0>;
290*bd89a1baSNick Chan		label = "hsic0_phy";
291*bd89a1baSNick Chan		power-domains = <&ps_usb2host1>;
292*bd89a1baSNick Chan	};
293*bd89a1baSNick Chan
294*bd89a1baSNick Chan	ps_hsic1_phy: power-controller@80130 {
295*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
296*bd89a1baSNick Chan		reg = <0x80130 4>;
297*bd89a1baSNick Chan		#power-domain-cells = <0>;
298*bd89a1baSNick Chan		#reset-cells = <0>;
299*bd89a1baSNick Chan		label = "hsic1_phy";
300*bd89a1baSNick Chan		power-domains = <&ps_usb2host2>;
301*bd89a1baSNick Chan	};
302*bd89a1baSNick Chan
303*bd89a1baSNick Chan	ps_isp_sens0: power-controller@80138 {
304*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
305*bd89a1baSNick Chan		reg = <0x80138 4>;
306*bd89a1baSNick Chan		#power-domain-cells = <0>;
307*bd89a1baSNick Chan		#reset-cells = <0>;
308*bd89a1baSNick Chan		label = "isp_sens0";
309*bd89a1baSNick Chan	};
310*bd89a1baSNick Chan
311*bd89a1baSNick Chan	ps_isp_sens1: power-controller@80140 {
312*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
313*bd89a1baSNick Chan		reg = <0x80140 4>;
314*bd89a1baSNick Chan		#power-domain-cells = <0>;
315*bd89a1baSNick Chan		#reset-cells = <0>;
316*bd89a1baSNick Chan		label = "isp_sens1";
317*bd89a1baSNick Chan	};
318*bd89a1baSNick Chan
319*bd89a1baSNick Chan	ps_usb: power-controller@80250 {
320*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
321*bd89a1baSNick Chan		reg = <0x80250 4>;
322*bd89a1baSNick Chan		#power-domain-cells = <0>;
323*bd89a1baSNick Chan		#reset-cells = <0>;
324*bd89a1baSNick Chan		label = "usb";
325*bd89a1baSNick Chan	};
326*bd89a1baSNick Chan
327*bd89a1baSNick Chan	ps_usbctrl: power-controller@80258 {
328*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
329*bd89a1baSNick Chan		reg = <0x80258 4>;
330*bd89a1baSNick Chan		#power-domain-cells = <0>;
331*bd89a1baSNick Chan		#reset-cells = <0>;
332*bd89a1baSNick Chan		label = "usbctrl";
333*bd89a1baSNick Chan		power-domains = <&ps_usb>;
334*bd89a1baSNick Chan	};
335*bd89a1baSNick Chan
336*bd89a1baSNick Chan	ps_usb2host0: power-controller@80260 {
337*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
338*bd89a1baSNick Chan		reg = <0x80260 4>;
339*bd89a1baSNick Chan		#power-domain-cells = <0>;
340*bd89a1baSNick Chan		#reset-cells = <0>;
341*bd89a1baSNick Chan		label = "usb2host0";
342*bd89a1baSNick Chan		power-domains = <&ps_usbctrl>;
343*bd89a1baSNick Chan	};
344*bd89a1baSNick Chan
345*bd89a1baSNick Chan	ps_usb2host1: power-controller@80270 {
346*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
347*bd89a1baSNick Chan		reg = <0x80270 4>;
348*bd89a1baSNick Chan		#power-domain-cells = <0>;
349*bd89a1baSNick Chan		#reset-cells = <0>;
350*bd89a1baSNick Chan		label = "usb2host1";
351*bd89a1baSNick Chan		power-domains = <&ps_usbctrl>;
352*bd89a1baSNick Chan	};
353*bd89a1baSNick Chan
354*bd89a1baSNick Chan	ps_usb2host2: power-controller@80280 {
355*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
356*bd89a1baSNick Chan		reg = <0x80280 4>;
357*bd89a1baSNick Chan		#power-domain-cells = <0>;
358*bd89a1baSNick Chan		#reset-cells = <0>;
359*bd89a1baSNick Chan		label = "usb2host2";
360*bd89a1baSNick Chan		power-domains = <&ps_usbctrl>;
361*bd89a1baSNick Chan	};
362*bd89a1baSNick Chan
363*bd89a1baSNick Chan	ps_rtmux: power-controller@802a8 {
364*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
365*bd89a1baSNick Chan		reg = <0x802a8 4>;
366*bd89a1baSNick Chan		#power-domain-cells = <0>;
367*bd89a1baSNick Chan		#reset-cells = <0>;
368*bd89a1baSNick Chan		label = "rtmux";
369*bd89a1baSNick Chan	};
370*bd89a1baSNick Chan
371*bd89a1baSNick Chan	ps_media: power-controller@802d0 {
372*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
373*bd89a1baSNick Chan		reg = <0x802d0 4>;
374*bd89a1baSNick Chan		#power-domain-cells = <0>;
375*bd89a1baSNick Chan		#reset-cells = <0>;
376*bd89a1baSNick Chan		label = "media";
377*bd89a1baSNick Chan	};
378*bd89a1baSNick Chan
379*bd89a1baSNick Chan	ps_isp: power-controller@802c8 {
380*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
381*bd89a1baSNick Chan		reg = <0x802c8 4>;
382*bd89a1baSNick Chan		#power-domain-cells = <0>;
383*bd89a1baSNick Chan		#reset-cells = <0>;
384*bd89a1baSNick Chan		label = "isp";
385*bd89a1baSNick Chan		power-domains = <&ps_rtmux>;
386*bd89a1baSNick Chan	};
387*bd89a1baSNick Chan
388*bd89a1baSNick Chan	ps_msr: power-controller@802e0 {
389*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
390*bd89a1baSNick Chan		reg = <0x802e0 4>;
391*bd89a1baSNick Chan		#power-domain-cells = <0>;
392*bd89a1baSNick Chan		#reset-cells = <0>;
393*bd89a1baSNick Chan		label = "msr";
394*bd89a1baSNick Chan		power-domains = <&ps_media>;
395*bd89a1baSNick Chan	};
396*bd89a1baSNick Chan
397*bd89a1baSNick Chan	ps_jpg: power-controller@802d8 {
398*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
399*bd89a1baSNick Chan		reg = <0x802d8 4>;
400*bd89a1baSNick Chan		#power-domain-cells = <0>;
401*bd89a1baSNick Chan		#reset-cells = <0>;
402*bd89a1baSNick Chan		label = "jpg";
403*bd89a1baSNick Chan		power-domains = <&ps_media>;
404*bd89a1baSNick Chan	};
405*bd89a1baSNick Chan
406*bd89a1baSNick Chan	ps_disp0: power-controller@802b0 {
407*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
408*bd89a1baSNick Chan		reg = <0x802b0 4>;
409*bd89a1baSNick Chan		#power-domain-cells = <0>;
410*bd89a1baSNick Chan		#reset-cells = <0>;
411*bd89a1baSNick Chan		label = "disp0";
412*bd89a1baSNick Chan		power-domains = <&ps_rtmux>;
413*bd89a1baSNick Chan	};
414*bd89a1baSNick Chan
415*bd89a1baSNick Chan	ps_pmp: power-controller@802e8 {
416*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
417*bd89a1baSNick Chan		reg = <0x802e8 4>;
418*bd89a1baSNick Chan		#power-domain-cells = <0>;
419*bd89a1baSNick Chan		#reset-cells = <0>;
420*bd89a1baSNick Chan		label = "pmp";
421*bd89a1baSNick Chan	};
422*bd89a1baSNick Chan
423*bd89a1baSNick Chan	ps_pms_sram: power-controller@802f0 {
424*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
425*bd89a1baSNick Chan		reg = <0x802f0 4>;
426*bd89a1baSNick Chan		#power-domain-cells = <0>;
427*bd89a1baSNick Chan		#reset-cells = <0>;
428*bd89a1baSNick Chan		label = "pms_sram";
429*bd89a1baSNick Chan	};
430*bd89a1baSNick Chan
431*bd89a1baSNick Chan	ps_uart5: power-controller@80200 {
432*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
433*bd89a1baSNick Chan		reg = <0x80200 4>;
434*bd89a1baSNick Chan		#power-domain-cells = <0>;
435*bd89a1baSNick Chan		#reset-cells = <0>;
436*bd89a1baSNick Chan		label = "uart5";
437*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
438*bd89a1baSNick Chan	};
439*bd89a1baSNick Chan
440*bd89a1baSNick Chan	ps_uart6: power-controller@80208 {
441*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
442*bd89a1baSNick Chan		reg = <0x80208 4>;
443*bd89a1baSNick Chan		#power-domain-cells = <0>;
444*bd89a1baSNick Chan		#reset-cells = <0>;
445*bd89a1baSNick Chan		label = "uart6";
446*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
447*bd89a1baSNick Chan	};
448*bd89a1baSNick Chan
449*bd89a1baSNick Chan	ps_uart7: power-controller@80210 {
450*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
451*bd89a1baSNick Chan		reg = <0x80210 4>;
452*bd89a1baSNick Chan		#power-domain-cells = <0>;
453*bd89a1baSNick Chan		#reset-cells = <0>;
454*bd89a1baSNick Chan		label = "uart7";
455*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
456*bd89a1baSNick Chan	};
457*bd89a1baSNick Chan
458*bd89a1baSNick Chan	ps_uart8: power-controller@80218 {
459*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
460*bd89a1baSNick Chan		reg = <0x80218 4>;
461*bd89a1baSNick Chan		#power-domain-cells = <0>;
462*bd89a1baSNick Chan		#reset-cells = <0>;
463*bd89a1baSNick Chan		label = "uart8";
464*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
465*bd89a1baSNick Chan	};
466*bd89a1baSNick Chan
467*bd89a1baSNick Chan	ps_aes0: power-controller@80220 {
468*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
469*bd89a1baSNick Chan		reg = <0x80220 4>;
470*bd89a1baSNick Chan		#power-domain-cells = <0>;
471*bd89a1baSNick Chan		#reset-cells = <0>;
472*bd89a1baSNick Chan		label = "aes0";
473*bd89a1baSNick Chan		power-domains = <&ps_sio_p>;
474*bd89a1baSNick Chan	};
475*bd89a1baSNick Chan
476*bd89a1baSNick Chan	ps_mcc: power-controller@80228 {
477*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
478*bd89a1baSNick Chan		reg = <0x80228 4>;
479*bd89a1baSNick Chan		#power-domain-cells = <0>;
480*bd89a1baSNick Chan		#reset-cells = <0>;
481*bd89a1baSNick Chan		label = "mcc";
482*bd89a1baSNick Chan		apple,always-on; /* Memory cache controller */
483*bd89a1baSNick Chan	};
484*bd89a1baSNick Chan
485*bd89a1baSNick Chan	ps_dcs0: power-controller@80230 {
486*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
487*bd89a1baSNick Chan		reg = <0x80230 4>;
488*bd89a1baSNick Chan		#power-domain-cells = <0>;
489*bd89a1baSNick Chan		#reset-cells = <0>;
490*bd89a1baSNick Chan		label = "dcs0";
491*bd89a1baSNick Chan		apple,always-on; /* LPDDR4 interface */
492*bd89a1baSNick Chan	};
493*bd89a1baSNick Chan
494*bd89a1baSNick Chan	ps_dcs1: power-controller@80238 {
495*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
496*bd89a1baSNick Chan		reg = <0x80238 4>;
497*bd89a1baSNick Chan		#power-domain-cells = <0>;
498*bd89a1baSNick Chan		#reset-cells = <0>;
499*bd89a1baSNick Chan		label = "dcs1";
500*bd89a1baSNick Chan		apple,always-on; /* LPDDR4 interface */
501*bd89a1baSNick Chan	};
502*bd89a1baSNick Chan
503*bd89a1baSNick Chan	ps_dcs2: power-controller@80240 {
504*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
505*bd89a1baSNick Chan		reg = <0x80240 4>;
506*bd89a1baSNick Chan		#power-domain-cells = <0>;
507*bd89a1baSNick Chan		#reset-cells = <0>;
508*bd89a1baSNick Chan		label = "dcs2";
509*bd89a1baSNick Chan		apple,always-on; /* LPDDR4 interface */
510*bd89a1baSNick Chan	};
511*bd89a1baSNick Chan
512*bd89a1baSNick Chan	ps_dcs3: power-controller@80248 {
513*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
514*bd89a1baSNick Chan		reg = <0x80248 4>;
515*bd89a1baSNick Chan		#power-domain-cells = <0>;
516*bd89a1baSNick Chan		#reset-cells = <0>;
517*bd89a1baSNick Chan		label = "dcs3";
518*bd89a1baSNick Chan		apple,always-on; /* LPDDR4 interface */
519*bd89a1baSNick Chan	};
520*bd89a1baSNick Chan
521*bd89a1baSNick Chan	ps_usb2host0_ohci: power-controller@80268 {
522*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
523*bd89a1baSNick Chan		reg = <0x80268 4>;
524*bd89a1baSNick Chan		#power-domain-cells = <0>;
525*bd89a1baSNick Chan		#reset-cells = <0>;
526*bd89a1baSNick Chan		label = "usb2host0_ohci";
527*bd89a1baSNick Chan		power-domains = <&ps_usb2host0>;
528*bd89a1baSNick Chan	};
529*bd89a1baSNick Chan
530*bd89a1baSNick Chan	ps_usb2host1_ohci: power-controller@80278 {
531*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
532*bd89a1baSNick Chan		reg = <0x80278 4>;
533*bd89a1baSNick Chan		#power-domain-cells = <0>;
534*bd89a1baSNick Chan		#reset-cells = <0>;
535*bd89a1baSNick Chan		label = "usb2host1_ohci";
536*bd89a1baSNick Chan		power-domains = <&ps_usb2host1>;
537*bd89a1baSNick Chan	};
538*bd89a1baSNick Chan
539*bd89a1baSNick Chan	ps_usb2host2_ohci: power-controller@80288 {
540*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
541*bd89a1baSNick Chan		reg = <0x80288 4>;
542*bd89a1baSNick Chan		#power-domain-cells = <0>;
543*bd89a1baSNick Chan		#reset-cells = <0>;
544*bd89a1baSNick Chan		label = "usb2host2_ohci";
545*bd89a1baSNick Chan		power-domains = <&ps_usb2host2>;
546*bd89a1baSNick Chan	};
547*bd89a1baSNick Chan
548*bd89a1baSNick Chan	ps_usbotg: power-controller@80290 {
549*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
550*bd89a1baSNick Chan		reg = <0x80290 4>;
551*bd89a1baSNick Chan		#power-domain-cells = <0>;
552*bd89a1baSNick Chan		#reset-cells = <0>;
553*bd89a1baSNick Chan		label = "usbotg";
554*bd89a1baSNick Chan		power-domains = <&ps_usbctrl>;
555*bd89a1baSNick Chan	};
556*bd89a1baSNick Chan
557*bd89a1baSNick Chan	ps_smx: power-controller@80298 {
558*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
559*bd89a1baSNick Chan		reg = <0x80298 4>;
560*bd89a1baSNick Chan		#power-domain-cells = <0>;
561*bd89a1baSNick Chan		#reset-cells = <0>;
562*bd89a1baSNick Chan		label = "smx";
563*bd89a1baSNick Chan		apple,always-on; /* Apple fabric, critical block */
564*bd89a1baSNick Chan	};
565*bd89a1baSNick Chan
566*bd89a1baSNick Chan	ps_sf: power-controller@802a0 {
567*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
568*bd89a1baSNick Chan		reg = <0x802a0 4>;
569*bd89a1baSNick Chan		#power-domain-cells = <0>;
570*bd89a1baSNick Chan		#reset-cells = <0>;
571*bd89a1baSNick Chan		label = "sf";
572*bd89a1baSNick Chan		apple,always-on; /* Apple fabric, critical block */
573*bd89a1baSNick Chan	};
574*bd89a1baSNick Chan
575*bd89a1baSNick Chan	ps_mipi_dsi: power-controller@802b8 {
576*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
577*bd89a1baSNick Chan		reg = <0x802b8 4>;
578*bd89a1baSNick Chan		#power-domain-cells = <0>;
579*bd89a1baSNick Chan		#reset-cells = <0>;
580*bd89a1baSNick Chan		label = "mipi_dsi";
581*bd89a1baSNick Chan		power-domains = <&ps_rtmux>;
582*bd89a1baSNick Chan	};
583*bd89a1baSNick Chan
584*bd89a1baSNick Chan	ps_dp: power-controller@802c0 {
585*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
586*bd89a1baSNick Chan		reg = <0x802c0 4>;
587*bd89a1baSNick Chan		#power-domain-cells = <0>;
588*bd89a1baSNick Chan		#reset-cells = <0>;
589*bd89a1baSNick Chan		label = "dp";
590*bd89a1baSNick Chan		power-domains = <&ps_disp0>;
591*bd89a1baSNick Chan	};
592*bd89a1baSNick Chan
593*bd89a1baSNick Chan	ps_vdec: power-controller@802f8 {
594*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
595*bd89a1baSNick Chan		reg = <0x802f8 4>;
596*bd89a1baSNick Chan		#power-domain-cells = <0>;
597*bd89a1baSNick Chan		#reset-cells = <0>;
598*bd89a1baSNick Chan		label = "vdec";
599*bd89a1baSNick Chan		power-domains = <&ps_media>;
600*bd89a1baSNick Chan	};
601*bd89a1baSNick Chan
602*bd89a1baSNick Chan	ps_venc: power-controller@80308 {
603*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
604*bd89a1baSNick Chan		reg = <0x80308 4>;
605*bd89a1baSNick Chan		#power-domain-cells = <0>;
606*bd89a1baSNick Chan		#reset-cells = <0>;
607*bd89a1baSNick Chan		label = "venc";
608*bd89a1baSNick Chan		power-domains = <&ps_media>;
609*bd89a1baSNick Chan	};
610*bd89a1baSNick Chan
611*bd89a1baSNick Chan	ps_pcie: power-controller@80310 {
612*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
613*bd89a1baSNick Chan		reg = <0x80310 4>;
614*bd89a1baSNick Chan		#power-domain-cells = <0>;
615*bd89a1baSNick Chan		#reset-cells = <0>;
616*bd89a1baSNick Chan		label = "pcie";
617*bd89a1baSNick Chan	};
618*bd89a1baSNick Chan
619*bd89a1baSNick Chan	ps_pcie_aux: power-controller@80318 {
620*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
621*bd89a1baSNick Chan		reg = <0x80318 4>;
622*bd89a1baSNick Chan		#power-domain-cells = <0>;
623*bd89a1baSNick Chan		#reset-cells = <0>;
624*bd89a1baSNick Chan		label = "pcie_aux";
625*bd89a1baSNick Chan	};
626*bd89a1baSNick Chan
627*bd89a1baSNick Chan	ps_pcie_link0: power-controller@80320 {
628*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
629*bd89a1baSNick Chan		reg = <0x80320 4>;
630*bd89a1baSNick Chan		#power-domain-cells = <0>;
631*bd89a1baSNick Chan		#reset-cells = <0>;
632*bd89a1baSNick Chan		label = "pcie_link0";
633*bd89a1baSNick Chan		power-domains = <&ps_pcie>;
634*bd89a1baSNick Chan	};
635*bd89a1baSNick Chan
636*bd89a1baSNick Chan	ps_pcie_link1: power-controller@80328 {
637*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
638*bd89a1baSNick Chan		reg = <0x80328 4>;
639*bd89a1baSNick Chan		#power-domain-cells = <0>;
640*bd89a1baSNick Chan		#reset-cells = <0>;
641*bd89a1baSNick Chan		label = "pcie_link1";
642*bd89a1baSNick Chan		power-domains = <&ps_pcie>;
643*bd89a1baSNick Chan	};
644*bd89a1baSNick Chan
645*bd89a1baSNick Chan	ps_pcie_link2: power-controller@80330 {
646*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
647*bd89a1baSNick Chan		reg = <0x80330 4>;
648*bd89a1baSNick Chan		#power-domain-cells = <0>;
649*bd89a1baSNick Chan		#reset-cells = <0>;
650*bd89a1baSNick Chan		label = "pcie_link2";
651*bd89a1baSNick Chan		power-domains = <&ps_pcie>;
652*bd89a1baSNick Chan	};
653*bd89a1baSNick Chan
654*bd89a1baSNick Chan	ps_pcie_link3: power-controller@80338 {
655*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
656*bd89a1baSNick Chan		reg = <0x80338 4>;
657*bd89a1baSNick Chan		#power-domain-cells = <0>;
658*bd89a1baSNick Chan		#reset-cells = <0>;
659*bd89a1baSNick Chan		label = "pcie_link3";
660*bd89a1baSNick Chan		power-domains = <&ps_pcie>;
661*bd89a1baSNick Chan	};
662*bd89a1baSNick Chan
663*bd89a1baSNick Chan	ps_gfx: power-controller@80340 {
664*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
665*bd89a1baSNick Chan		reg = <0x80340 4>;
666*bd89a1baSNick Chan		#power-domain-cells = <0>;
667*bd89a1baSNick Chan		#reset-cells = <0>;
668*bd89a1baSNick Chan		label = "gfx";
669*bd89a1baSNick Chan	};
670*bd89a1baSNick Chan
671*bd89a1baSNick Chan	ps_sep: power-controller@80400 {
672*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
673*bd89a1baSNick Chan		reg = <0x80400 4>;
674*bd89a1baSNick Chan		#power-domain-cells = <0>;
675*bd89a1baSNick Chan		#reset-cells = <0>;
676*bd89a1baSNick Chan		label = "sep";
677*bd89a1baSNick Chan		apple,always-on; /* Locked on */
678*bd89a1baSNick Chan	};
679*bd89a1baSNick Chan
680*bd89a1baSNick Chan	ps_venc_pipe: power-controller@88000 {
681*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
682*bd89a1baSNick Chan		reg = <0x88000 4>;
683*bd89a1baSNick Chan		#power-domain-cells = <0>;
684*bd89a1baSNick Chan		#reset-cells = <0>;
685*bd89a1baSNick Chan		label = "venc_pipe";
686*bd89a1baSNick Chan		power-domains = <&ps_venc>;
687*bd89a1baSNick Chan	};
688*bd89a1baSNick Chan
689*bd89a1baSNick Chan	ps_venc_me0: power-controller@88008 {
690*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
691*bd89a1baSNick Chan		reg = <0x88008 4>;
692*bd89a1baSNick Chan		#power-domain-cells = <0>;
693*bd89a1baSNick Chan		#reset-cells = <0>;
694*bd89a1baSNick Chan		label = "venc_me0";
695*bd89a1baSNick Chan	};
696*bd89a1baSNick Chan
697*bd89a1baSNick Chan	ps_venc_me1: power-controller@88010 {
698*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
699*bd89a1baSNick Chan		reg = <0x88010 4>;
700*bd89a1baSNick Chan		#power-domain-cells = <0>;
701*bd89a1baSNick Chan		#reset-cells = <0>;
702*bd89a1baSNick Chan		label = "venc_me1";
703*bd89a1baSNick Chan	};
704*bd89a1baSNick Chan};
705*bd89a1baSNick Chan
706*bd89a1baSNick Chan&pmgr_mini {
707*bd89a1baSNick Chan	ps_aop: power-controller@80000 {
708*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
709*bd89a1baSNick Chan		reg = <0x80000 4>;
710*bd89a1baSNick Chan		#power-domain-cells = <0>;
711*bd89a1baSNick Chan		#reset-cells = <0>;
712*bd89a1baSNick Chan		label = "aop";
713*bd89a1baSNick Chan		power-domains = <&ps_aop_busif &ps_aop_cpu &ps_aop_filter>;
714*bd89a1baSNick Chan		apple,always-on; /* Always on processor */
715*bd89a1baSNick Chan	};
716*bd89a1baSNick Chan
717*bd89a1baSNick Chan	ps_debug: power-controller@80008 {
718*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
719*bd89a1baSNick Chan		reg = <0x80008 4>;
720*bd89a1baSNick Chan		#power-domain-cells = <0>;
721*bd89a1baSNick Chan		#reset-cells = <0>;
722*bd89a1baSNick Chan		label = "debug";
723*bd89a1baSNick Chan	};
724*bd89a1baSNick Chan
725*bd89a1baSNick Chan	ps_aop_gpio: power-controller@80010 {
726*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
727*bd89a1baSNick Chan		reg = <0x80010 4>;
728*bd89a1baSNick Chan		#power-domain-cells = <0>;
729*bd89a1baSNick Chan		#reset-cells = <0>;
730*bd89a1baSNick Chan		label = "aop_gpio";
731*bd89a1baSNick Chan		power-domains = <&ps_aop>;
732*bd89a1baSNick Chan	};
733*bd89a1baSNick Chan
734*bd89a1baSNick Chan	ps_aop_cpu: power-controller@80040 {
735*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
736*bd89a1baSNick Chan		reg = <0x80040 4>;
737*bd89a1baSNick Chan		#power-domain-cells = <0>;
738*bd89a1baSNick Chan		#reset-cells = <0>;
739*bd89a1baSNick Chan		label = "aop_cpu";
740*bd89a1baSNick Chan	};
741*bd89a1baSNick Chan
742*bd89a1baSNick Chan	ps_aop_filter: power-controller@80048 {
743*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
744*bd89a1baSNick Chan		reg = <0x80048 4>;
745*bd89a1baSNick Chan		#power-domain-cells = <0>;
746*bd89a1baSNick Chan		#reset-cells = <0>;
747*bd89a1baSNick Chan		label = "aop_filter";
748*bd89a1baSNick Chan	};
749*bd89a1baSNick Chan
750*bd89a1baSNick Chan	ps_aop_busif: power-controller@80050 {
751*bd89a1baSNick Chan		compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate";
752*bd89a1baSNick Chan		reg = <0x80050 4>;
753*bd89a1baSNick Chan		#power-domain-cells = <0>;
754*bd89a1baSNick Chan		#reset-cells = <0>;
755*bd89a1baSNick Chan		label = "aop_busif";
756*bd89a1baSNick Chan	};
757*bd89a1baSNick Chan};
758