1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2/* 3 * PMGR Power domains for the Apple S8000/3 "A9" SoC 4 * 5 * Copyright (c) 2024 Nick Chan <towinchenmi@gmail.com> 6 */ 7 8&pmgr { 9 ps_cpu0: power-controller@80000 { 10 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 11 reg = <0x80000 4>; 12 #power-domain-cells = <0>; 13 #reset-cells = <0>; 14 label = "cpu0"; 15 apple,always-on; /* Core device */ 16 }; 17 18 ps_cpu1: power-controller@80008 { 19 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 20 reg = <0x80008 4>; 21 #power-domain-cells = <0>; 22 #reset-cells = <0>; 23 label = "cpu1"; 24 apple,always-on; /* Core device */ 25 }; 26 27 ps_cpm: power-controller@80040 { 28 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 29 reg = <0x80040 4>; 30 #power-domain-cells = <0>; 31 #reset-cells = <0>; 32 label = "cpm"; 33 apple,always-on; /* Core device */ 34 }; 35 36 ps_sio_busif: power-controller@80150 { 37 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 38 reg = <0x80150 4>; 39 #power-domain-cells = <0>; 40 #reset-cells = <0>; 41 label = "sio_busif"; 42 }; 43 44 ps_sio_p: power-controller@80158 { 45 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 46 reg = <0x80158 4>; 47 #power-domain-cells = <0>; 48 #reset-cells = <0>; 49 label = "sio_p"; 50 power-domains = <&ps_sio_busif>; 51 }; 52 53 ps_sbr: power-controller@80100 { 54 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 55 reg = <0x80100 4>; 56 #power-domain-cells = <0>; 57 #reset-cells = <0>; 58 label = "sbr"; 59 apple,always-on; /* Apple fabric, critical block */ 60 }; 61 62 ps_aic: power-controller@80108 { 63 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 64 reg = <0x80108 4>; 65 #power-domain-cells = <0>; 66 #reset-cells = <0>; 67 label = "aic"; 68 apple,always-on; /* Core device */ 69 }; 70 71 ps_dwi: power-controller@80110 { 72 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 73 reg = <0x80110 4>; 74 #power-domain-cells = <0>; 75 #reset-cells = <0>; 76 label = "dwi"; 77 }; 78 79 ps_gpio: power-controller@80118 { 80 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 81 reg = <0x80118 4>; 82 #power-domain-cells = <0>; 83 #reset-cells = <0>; 84 label = "gpio"; 85 }; 86 87 ps_pms: power-controller@80120 { 88 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 89 reg = <0x80120 4>; 90 #power-domain-cells = <0>; 91 #reset-cells = <0>; 92 label = "pms"; 93 apple,always-on; /* Core device */ 94 }; 95 96 ps_pcie_ref: power-controller@80148 { 97 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 98 reg = <0x80148 4>; 99 #power-domain-cells = <0>; 100 #reset-cells = <0>; 101 label = "pcie_ref"; 102 }; 103 104 ps_mca0: power-controller@80168 { 105 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 106 reg = <0x80168 4>; 107 #power-domain-cells = <0>; 108 #reset-cells = <0>; 109 label = "mca0"; 110 power-domains = <&ps_sio_p>; 111 }; 112 113 ps_mca1: power-controller@80170 { 114 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 115 reg = <0x80170 4>; 116 #power-domain-cells = <0>; 117 #reset-cells = <0>; 118 label = "mca1"; 119 power-domains = <&ps_sio_p>; 120 }; 121 122 ps_mca2: power-controller@80178 { 123 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 124 reg = <0x80178 4>; 125 #power-domain-cells = <0>; 126 #reset-cells = <0>; 127 label = "mca2"; 128 power-domains = <&ps_sio_p>; 129 }; 130 131 ps_mca3: power-controller@80180 { 132 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 133 reg = <0x80180 4>; 134 #power-domain-cells = <0>; 135 #reset-cells = <0>; 136 label = "mca3"; 137 power-domains = <&ps_sio_p>; 138 }; 139 140 ps_mca4: power-controller@80188 { 141 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 142 reg = <0x80188 4>; 143 #power-domain-cells = <0>; 144 #reset-cells = <0>; 145 label = "mca4"; 146 power-domains = <&ps_sio_p>; 147 }; 148 149 ps_pwm0: power-controller@80190 { 150 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 151 reg = <0x80190 4>; 152 #power-domain-cells = <0>; 153 #reset-cells = <0>; 154 label = "pwm0"; 155 power-domains = <&ps_sio_p>; 156 }; 157 158 ps_i2c0: power-controller@80198 { 159 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 160 reg = <0x80198 4>; 161 #power-domain-cells = <0>; 162 #reset-cells = <0>; 163 label = "i2c0"; 164 power-domains = <&ps_sio_p>; 165 }; 166 167 ps_i2c1: power-controller@801a0 { 168 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 169 reg = <0x801a0 4>; 170 #power-domain-cells = <0>; 171 #reset-cells = <0>; 172 label = "i2c1"; 173 power-domains = <&ps_sio_p>; 174 }; 175 176 ps_i2c2: power-controller@801a8 { 177 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 178 reg = <0x801a8 4>; 179 #power-domain-cells = <0>; 180 #reset-cells = <0>; 181 label = "i2c2"; 182 power-domains = <&ps_sio_p>; 183 }; 184 185 ps_i2c3: power-controller@801b0 { 186 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 187 reg = <0x801b0 4>; 188 #power-domain-cells = <0>; 189 #reset-cells = <0>; 190 label = "i2c3"; 191 power-domains = <&ps_sio_p>; 192 }; 193 194 ps_spi0: power-controller@801b8 { 195 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 196 reg = <0x801b8 4>; 197 #power-domain-cells = <0>; 198 #reset-cells = <0>; 199 label = "spi0"; 200 power-domains = <&ps_sio_p>; 201 }; 202 203 ps_spi1: power-controller@801c0 { 204 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 205 reg = <0x801c0 4>; 206 #power-domain-cells = <0>; 207 #reset-cells = <0>; 208 label = "spi1"; 209 power-domains = <&ps_sio_p>; 210 }; 211 212 ps_spi2: power-controller@801c8 { 213 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 214 reg = <0x801c8 4>; 215 #power-domain-cells = <0>; 216 #reset-cells = <0>; 217 label = "spi2"; 218 power-domains = <&ps_sio_p>; 219 }; 220 221 ps_spi3: power-controller@801d0 { 222 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 223 reg = <0x801d0 4>; 224 #power-domain-cells = <0>; 225 #reset-cells = <0>; 226 label = "spi3"; 227 power-domains = <&ps_sio_p>; 228 }; 229 230 ps_uart0: power-controller@801d8 { 231 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 232 reg = <0x801d8 4>; 233 #power-domain-cells = <0>; 234 #reset-cells = <0>; 235 label = "uart0"; 236 power-domains = <&ps_sio_p>; 237 }; 238 239 ps_uart1: power-controller@801e0 { 240 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 241 reg = <0x801e0 4>; 242 #power-domain-cells = <0>; 243 #reset-cells = <0>; 244 label = "uart1"; 245 power-domains = <&ps_sio_p>; 246 }; 247 248 ps_uart2: power-controller@801e8 { 249 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 250 reg = <0x801e8 4>; 251 #power-domain-cells = <0>; 252 #reset-cells = <0>; 253 label = "uart2"; 254 power-domains = <&ps_sio_p>; 255 }; 256 257 ps_uart3: power-controller@801f0 { 258 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 259 reg = <0x801f0 4>; 260 #power-domain-cells = <0>; 261 #reset-cells = <0>; 262 label = "uart3"; 263 power-domains = <&ps_sio_p>; 264 }; 265 266 ps_uart4: power-controller@801f8 { 267 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 268 reg = <0x801f8 4>; 269 #power-domain-cells = <0>; 270 #reset-cells = <0>; 271 label = "uart4"; 272 power-domains = <&ps_sio_p>; 273 }; 274 275 ps_sio: power-controller@80160 { 276 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 277 reg = <0x80160 4>; 278 #power-domain-cells = <0>; 279 #reset-cells = <0>; 280 label = "sio"; 281 power-domains = <&ps_sio_p>; 282 apple,always-on; /* Core device */ 283 }; 284 285 ps_hsic0_phy: power-controller@80128 { 286 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 287 reg = <0x80128 4>; 288 #power-domain-cells = <0>; 289 #reset-cells = <0>; 290 label = "hsic0_phy"; 291 power-domains = <&ps_usb2host1>; 292 }; 293 294 ps_hsic1_phy: power-controller@80130 { 295 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 296 reg = <0x80130 4>; 297 #power-domain-cells = <0>; 298 #reset-cells = <0>; 299 label = "hsic1_phy"; 300 power-domains = <&ps_usb2host2>; 301 }; 302 303 ps_isp_sens0: power-controller@80138 { 304 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 305 reg = <0x80138 4>; 306 #power-domain-cells = <0>; 307 #reset-cells = <0>; 308 label = "isp_sens0"; 309 }; 310 311 ps_isp_sens1: power-controller@80140 { 312 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 313 reg = <0x80140 4>; 314 #power-domain-cells = <0>; 315 #reset-cells = <0>; 316 label = "isp_sens1"; 317 }; 318 319 ps_usb: power-controller@80250 { 320 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 321 reg = <0x80250 4>; 322 #power-domain-cells = <0>; 323 #reset-cells = <0>; 324 label = "usb"; 325 }; 326 327 ps_usbctrl: power-controller@80258 { 328 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 329 reg = <0x80258 4>; 330 #power-domain-cells = <0>; 331 #reset-cells = <0>; 332 label = "usbctrl"; 333 power-domains = <&ps_usb>; 334 }; 335 336 ps_usb2host0: power-controller@80260 { 337 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 338 reg = <0x80260 4>; 339 #power-domain-cells = <0>; 340 #reset-cells = <0>; 341 label = "usb2host0"; 342 power-domains = <&ps_usbctrl>; 343 }; 344 345 ps_usb2host1: power-controller@80270 { 346 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 347 reg = <0x80270 4>; 348 #power-domain-cells = <0>; 349 #reset-cells = <0>; 350 label = "usb2host1"; 351 power-domains = <&ps_usbctrl>; 352 }; 353 354 ps_usb2host2: power-controller@80280 { 355 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 356 reg = <0x80280 4>; 357 #power-domain-cells = <0>; 358 #reset-cells = <0>; 359 label = "usb2host2"; 360 power-domains = <&ps_usbctrl>; 361 }; 362 363 ps_rtmux: power-controller@802a8 { 364 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 365 reg = <0x802a8 4>; 366 #power-domain-cells = <0>; 367 #reset-cells = <0>; 368 label = "rtmux"; 369 }; 370 371 ps_media: power-controller@802d0 { 372 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 373 reg = <0x802d0 4>; 374 #power-domain-cells = <0>; 375 #reset-cells = <0>; 376 label = "media"; 377 }; 378 379 ps_isp: power-controller@802c8 { 380 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 381 reg = <0x802c8 4>; 382 #power-domain-cells = <0>; 383 #reset-cells = <0>; 384 label = "isp"; 385 power-domains = <&ps_rtmux>; 386 }; 387 388 ps_msr: power-controller@802e0 { 389 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 390 reg = <0x802e0 4>; 391 #power-domain-cells = <0>; 392 #reset-cells = <0>; 393 label = "msr"; 394 power-domains = <&ps_media>; 395 }; 396 397 ps_jpg: power-controller@802d8 { 398 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 399 reg = <0x802d8 4>; 400 #power-domain-cells = <0>; 401 #reset-cells = <0>; 402 label = "jpg"; 403 power-domains = <&ps_media>; 404 }; 405 406 ps_disp0: power-controller@802b0 { 407 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 408 reg = <0x802b0 4>; 409 #power-domain-cells = <0>; 410 #reset-cells = <0>; 411 label = "disp0"; 412 power-domains = <&ps_rtmux>; 413 }; 414 415 ps_pmp: power-controller@802e8 { 416 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 417 reg = <0x802e8 4>; 418 #power-domain-cells = <0>; 419 #reset-cells = <0>; 420 label = "pmp"; 421 }; 422 423 ps_pms_sram: power-controller@802f0 { 424 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 425 reg = <0x802f0 4>; 426 #power-domain-cells = <0>; 427 #reset-cells = <0>; 428 label = "pms_sram"; 429 }; 430 431 ps_uart5: power-controller@80200 { 432 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 433 reg = <0x80200 4>; 434 #power-domain-cells = <0>; 435 #reset-cells = <0>; 436 label = "uart5"; 437 power-domains = <&ps_sio_p>; 438 }; 439 440 ps_uart6: power-controller@80208 { 441 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 442 reg = <0x80208 4>; 443 #power-domain-cells = <0>; 444 #reset-cells = <0>; 445 label = "uart6"; 446 power-domains = <&ps_sio_p>; 447 }; 448 449 ps_uart7: power-controller@80210 { 450 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 451 reg = <0x80210 4>; 452 #power-domain-cells = <0>; 453 #reset-cells = <0>; 454 label = "uart7"; 455 power-domains = <&ps_sio_p>; 456 }; 457 458 ps_uart8: power-controller@80218 { 459 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 460 reg = <0x80218 4>; 461 #power-domain-cells = <0>; 462 #reset-cells = <0>; 463 label = "uart8"; 464 power-domains = <&ps_sio_p>; 465 }; 466 467 ps_aes0: power-controller@80220 { 468 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 469 reg = <0x80220 4>; 470 #power-domain-cells = <0>; 471 #reset-cells = <0>; 472 label = "aes0"; 473 power-domains = <&ps_sio_p>; 474 }; 475 476 ps_mcc: power-controller@80228 { 477 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 478 reg = <0x80228 4>; 479 #power-domain-cells = <0>; 480 #reset-cells = <0>; 481 label = "mcc"; 482 apple,always-on; /* Memory cache controller */ 483 }; 484 485 ps_dcs0: power-controller@80230 { 486 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 487 reg = <0x80230 4>; 488 #power-domain-cells = <0>; 489 #reset-cells = <0>; 490 label = "dcs0"; 491 apple,always-on; /* LPDDR4 interface */ 492 }; 493 494 ps_dcs1: power-controller@80238 { 495 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 496 reg = <0x80238 4>; 497 #power-domain-cells = <0>; 498 #reset-cells = <0>; 499 label = "dcs1"; 500 apple,always-on; /* LPDDR4 interface */ 501 }; 502 503 ps_dcs2: power-controller@80240 { 504 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 505 reg = <0x80240 4>; 506 #power-domain-cells = <0>; 507 #reset-cells = <0>; 508 label = "dcs2"; 509 apple,always-on; /* LPDDR4 interface */ 510 }; 511 512 ps_dcs3: power-controller@80248 { 513 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 514 reg = <0x80248 4>; 515 #power-domain-cells = <0>; 516 #reset-cells = <0>; 517 label = "dcs3"; 518 apple,always-on; /* LPDDR4 interface */ 519 }; 520 521 ps_usb2host0_ohci: power-controller@80268 { 522 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 523 reg = <0x80268 4>; 524 #power-domain-cells = <0>; 525 #reset-cells = <0>; 526 label = "usb2host0_ohci"; 527 power-domains = <&ps_usb2host0>; 528 }; 529 530 ps_usb2host1_ohci: power-controller@80278 { 531 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 532 reg = <0x80278 4>; 533 #power-domain-cells = <0>; 534 #reset-cells = <0>; 535 label = "usb2host1_ohci"; 536 power-domains = <&ps_usb2host1>; 537 }; 538 539 ps_usb2host2_ohci: power-controller@80288 { 540 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 541 reg = <0x80288 4>; 542 #power-domain-cells = <0>; 543 #reset-cells = <0>; 544 label = "usb2host2_ohci"; 545 power-domains = <&ps_usb2host2>; 546 }; 547 548 ps_usbotg: power-controller@80290 { 549 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 550 reg = <0x80290 4>; 551 #power-domain-cells = <0>; 552 #reset-cells = <0>; 553 label = "usbotg"; 554 power-domains = <&ps_usbctrl>; 555 }; 556 557 ps_smx: power-controller@80298 { 558 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 559 reg = <0x80298 4>; 560 #power-domain-cells = <0>; 561 #reset-cells = <0>; 562 label = "smx"; 563 apple,always-on; /* Apple fabric, critical block */ 564 }; 565 566 ps_sf: power-controller@802a0 { 567 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 568 reg = <0x802a0 4>; 569 #power-domain-cells = <0>; 570 #reset-cells = <0>; 571 label = "sf"; 572 apple,always-on; /* Apple fabric, critical block */ 573 }; 574 575 ps_mipi_dsi: power-controller@802b8 { 576 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 577 reg = <0x802b8 4>; 578 #power-domain-cells = <0>; 579 #reset-cells = <0>; 580 label = "mipi_dsi"; 581 power-domains = <&ps_rtmux>; 582 }; 583 584 ps_dp: power-controller@802c0 { 585 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 586 reg = <0x802c0 4>; 587 #power-domain-cells = <0>; 588 #reset-cells = <0>; 589 label = "dp"; 590 power-domains = <&ps_disp0>; 591 }; 592 593 ps_vdec: power-controller@802f8 { 594 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 595 reg = <0x802f8 4>; 596 #power-domain-cells = <0>; 597 #reset-cells = <0>; 598 label = "vdec"; 599 power-domains = <&ps_media>; 600 }; 601 602 ps_venc: power-controller@80308 { 603 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 604 reg = <0x80308 4>; 605 #power-domain-cells = <0>; 606 #reset-cells = <0>; 607 label = "venc"; 608 power-domains = <&ps_media>; 609 }; 610 611 ps_pcie: power-controller@80310 { 612 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 613 reg = <0x80310 4>; 614 #power-domain-cells = <0>; 615 #reset-cells = <0>; 616 label = "pcie"; 617 }; 618 619 ps_pcie_aux: power-controller@80318 { 620 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 621 reg = <0x80318 4>; 622 #power-domain-cells = <0>; 623 #reset-cells = <0>; 624 label = "pcie_aux"; 625 }; 626 627 ps_pcie_link0: power-controller@80320 { 628 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 629 reg = <0x80320 4>; 630 #power-domain-cells = <0>; 631 #reset-cells = <0>; 632 label = "pcie_link0"; 633 power-domains = <&ps_pcie>; 634 }; 635 636 ps_pcie_link1: power-controller@80328 { 637 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 638 reg = <0x80328 4>; 639 #power-domain-cells = <0>; 640 #reset-cells = <0>; 641 label = "pcie_link1"; 642 power-domains = <&ps_pcie>; 643 }; 644 645 ps_pcie_link2: power-controller@80330 { 646 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 647 reg = <0x80330 4>; 648 #power-domain-cells = <0>; 649 #reset-cells = <0>; 650 label = "pcie_link2"; 651 power-domains = <&ps_pcie>; 652 }; 653 654 ps_pcie_link3: power-controller@80338 { 655 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 656 reg = <0x80338 4>; 657 #power-domain-cells = <0>; 658 #reset-cells = <0>; 659 label = "pcie_link3"; 660 power-domains = <&ps_pcie>; 661 }; 662 663 ps_gfx: power-controller@80340 { 664 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 665 reg = <0x80340 4>; 666 #power-domain-cells = <0>; 667 #reset-cells = <0>; 668 label = "gfx"; 669 }; 670 671 ps_sep: power-controller@80400 { 672 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 673 reg = <0x80400 4>; 674 #power-domain-cells = <0>; 675 #reset-cells = <0>; 676 label = "sep"; 677 apple,always-on; /* Locked on */ 678 }; 679 680 ps_venc_pipe: power-controller@88000 { 681 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 682 reg = <0x88000 4>; 683 #power-domain-cells = <0>; 684 #reset-cells = <0>; 685 label = "venc_pipe"; 686 power-domains = <&ps_venc>; 687 }; 688 689 ps_venc_me0: power-controller@88008 { 690 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 691 reg = <0x88008 4>; 692 #power-domain-cells = <0>; 693 #reset-cells = <0>; 694 label = "venc_me0"; 695 }; 696 697 ps_venc_me1: power-controller@88010 { 698 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 699 reg = <0x88010 4>; 700 #power-domain-cells = <0>; 701 #reset-cells = <0>; 702 label = "venc_me1"; 703 }; 704}; 705 706&pmgr_mini { 707 ps_aop: power-controller@80000 { 708 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 709 reg = <0x80000 4>; 710 #power-domain-cells = <0>; 711 #reset-cells = <0>; 712 label = "aop"; 713 power-domains = <&ps_aop_busif &ps_aop_cpu &ps_aop_filter>; 714 apple,always-on; /* Always on processor */ 715 }; 716 717 ps_debug: power-controller@80008 { 718 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 719 reg = <0x80008 4>; 720 #power-domain-cells = <0>; 721 #reset-cells = <0>; 722 label = "debug"; 723 }; 724 725 ps_aop_gpio: power-controller@80010 { 726 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 727 reg = <0x80010 4>; 728 #power-domain-cells = <0>; 729 #reset-cells = <0>; 730 label = "aop_gpio"; 731 power-domains = <&ps_aop>; 732 }; 733 734 ps_aop_cpu: power-controller@80040 { 735 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 736 reg = <0x80040 4>; 737 #power-domain-cells = <0>; 738 #reset-cells = <0>; 739 label = "aop_cpu"; 740 }; 741 742 ps_aop_filter: power-controller@80048 { 743 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 744 reg = <0x80048 4>; 745 #power-domain-cells = <0>; 746 #reset-cells = <0>; 747 label = "aop_filter"; 748 }; 749 750 ps_aop_busif: power-controller@80050 { 751 compatible = "apple,s8000-pmgr-pwrstate", "apple,pmgr-pwrstate"; 752 reg = <0x80050 4>; 753 #power-domain-cells = <0>; 754 #reset-cells = <0>; 755 label = "aop_busif"; 756 }; 757}; 758