1a654af36SXianwei Zhao// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2a654af36SXianwei Zhao/* 3a654af36SXianwei Zhao * Copyright (c) 2024 Amlogic, Inc. All rights reserved. 4a654af36SXianwei Zhao */ 5a654af36SXianwei Zhao 6a654af36SXianwei Zhao#include "amlogic-a4-common.dtsi" 7*f0911f29SZelong Dong#include "amlogic-a5-reset.h" 8d08c5613SXianwei Zhao#include <dt-bindings/power/amlogic,a5-pwrc.h> 9a654af36SXianwei Zhao/ { 10a654af36SXianwei Zhao cpus { 11a654af36SXianwei Zhao #address-cells = <2>; 12a654af36SXianwei Zhao #size-cells = <0>; 13a654af36SXianwei Zhao 14a654af36SXianwei Zhao cpu0: cpu@0 { 15a654af36SXianwei Zhao device_type = "cpu"; 16a654af36SXianwei Zhao compatible = "arm,cortex-a55"; 17a654af36SXianwei Zhao reg = <0x0 0x0>; 18a654af36SXianwei Zhao enable-method = "psci"; 19a654af36SXianwei Zhao }; 20a654af36SXianwei Zhao 21a654af36SXianwei Zhao cpu1: cpu@100 { 22a654af36SXianwei Zhao device_type = "cpu"; 23a654af36SXianwei Zhao compatible = "arm,cortex-a55"; 24a654af36SXianwei Zhao reg = <0x0 0x100>; 25a654af36SXianwei Zhao enable-method = "psci"; 26a654af36SXianwei Zhao }; 27a654af36SXianwei Zhao 28a654af36SXianwei Zhao cpu2: cpu@200 { 29a654af36SXianwei Zhao device_type = "cpu"; 30a654af36SXianwei Zhao compatible = "arm,cortex-a55"; 31a654af36SXianwei Zhao reg = <0x0 0x200>; 32a654af36SXianwei Zhao enable-method = "psci"; 33a654af36SXianwei Zhao }; 34a654af36SXianwei Zhao 35a654af36SXianwei Zhao cpu3: cpu@300 { 36a654af36SXianwei Zhao device_type = "cpu"; 37a654af36SXianwei Zhao compatible = "arm,cortex-a55"; 38a654af36SXianwei Zhao reg = <0x0 0x300>; 39a654af36SXianwei Zhao enable-method = "psci"; 40a654af36SXianwei Zhao }; 41a654af36SXianwei Zhao }; 42d08c5613SXianwei Zhao 43d08c5613SXianwei Zhao sm: secure-monitor { 44d08c5613SXianwei Zhao compatible = "amlogic,meson-gxbb-sm"; 45d08c5613SXianwei Zhao 46d08c5613SXianwei Zhao pwrc: power-controller { 47d08c5613SXianwei Zhao compatible = "amlogic,a5-pwrc"; 48d08c5613SXianwei Zhao #power-domain-cells = <1>; 49d08c5613SXianwei Zhao }; 50d08c5613SXianwei Zhao }; 51a654af36SXianwei Zhao}; 5267c2799bSXianwei Zhao 5367c2799bSXianwei Zhao&apb { 54*f0911f29SZelong Dong reset: reset-controller@2000 { 55*f0911f29SZelong Dong compatible = "amlogic,a5-reset", 56*f0911f29SZelong Dong "amlogic,meson-s4-reset"; 57*f0911f29SZelong Dong reg = <0x0 0x2000 0x0 0x98>; 58*f0911f29SZelong Dong #reset-cells = <1>; 59*f0911f29SZelong Dong }; 60*f0911f29SZelong Dong 6167c2799bSXianwei Zhao gpio_intc: interrupt-controller@4080 { 6267c2799bSXianwei Zhao compatible = "amlogic,a5-gpio-intc", 6367c2799bSXianwei Zhao "amlogic,meson-gpio-intc"; 6467c2799bSXianwei Zhao reg = <0x0 0x4080 0x0 0x20>; 6567c2799bSXianwei Zhao interrupt-controller; 6667c2799bSXianwei Zhao #interrupt-cells = <2>; 6767c2799bSXianwei Zhao amlogic,channel-interrupts = 6867c2799bSXianwei Zhao <10 11 12 13 14 15 16 17 18 19 20 21>; 6967c2799bSXianwei Zhao }; 7067c2799bSXianwei Zhao}; 71