xref: /linux/scripts/dtc/include-prefixes/arm64/amlogic/amlogic-a5.dtsi (revision ec71f661a572a770d7c861cd52a50cbbb0e1a8d1)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2024 Amlogic, Inc. All rights reserved.
4 */
5
6#include "amlogic-a4-common.dtsi"
7#include "amlogic-a5-reset.h"
8#include <dt-bindings/power/amlogic,a5-pwrc.h>
9/ {
10	cpus {
11		#address-cells = <2>;
12		#size-cells = <0>;
13
14		cpu0: cpu@0 {
15			device_type = "cpu";
16			compatible = "arm,cortex-a55";
17			reg = <0x0 0x0>;
18			enable-method = "psci";
19		};
20
21		cpu1: cpu@100 {
22			device_type = "cpu";
23			compatible = "arm,cortex-a55";
24			reg = <0x0 0x100>;
25			enable-method = "psci";
26		};
27
28		cpu2: cpu@200 {
29			device_type = "cpu";
30			compatible = "arm,cortex-a55";
31			reg = <0x0 0x200>;
32			enable-method = "psci";
33		};
34
35		cpu3: cpu@300 {
36			device_type = "cpu";
37			compatible = "arm,cortex-a55";
38			reg = <0x0 0x300>;
39			enable-method = "psci";
40		};
41	};
42
43	sm: secure-monitor {
44		compatible = "amlogic,meson-gxbb-sm";
45
46		pwrc: power-controller {
47			compatible = "amlogic,a5-pwrc";
48			#power-domain-cells = <1>;
49		};
50	};
51};
52
53&apb {
54	reset: reset-controller@2000 {
55		compatible = "amlogic,a5-reset",
56			     "amlogic,meson-s4-reset";
57		reg = <0x0 0x2000 0x0 0x98>;
58		#reset-cells = <1>;
59	};
60
61	gpio_intc: interrupt-controller@4080 {
62		compatible = "amlogic,a5-gpio-intc",
63			     "amlogic,meson-gpio-intc";
64		reg = <0x0 0x4080 0x0 0x20>;
65		interrupt-controller;
66		#interrupt-cells = <2>;
67		amlogic,channel-interrupts =
68			<10 11 12 13 14 15 16 17 18 19 20 21>;
69	};
70};
71