xref: /linux/scripts/dtc/include-prefixes/arm/rockchip/rk3288-veyron-tiger.dts (revision cdd5b5a9761fd66d17586e4f4ba6588c70e640ea)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Google Veyron Tiger Rev 0+ board device tree source
4 *
5 * Copyright 2016 Google, Inc
6 */
7
8/dts-v1/;
9#include "rk3288-veyron-fievel.dts"
10#include "rk3288-veyron-edp.dtsi"
11
12/ {
13	model = "Google Tiger";
14	compatible = "google,veyron-tiger-rev8", "google,veyron-tiger-rev7",
15		     "google,veyron-tiger-rev6", "google,veyron-tiger-rev5",
16		     "google,veyron-tiger-rev4", "google,veyron-tiger-rev3",
17		     "google,veyron-tiger-rev2", "google,veyron-tiger-rev1",
18		     "google,veyron-tiger-rev0", "google,veyron-tiger",
19		     "google,veyron", "rockchip,rk3288";
20
21	/delete-node/ vcc18-lcd;
22};
23
24&backlight {
25	/* Tiger panel PWM must be >= 1%, so start non-zero brightness at 3 */
26	brightness-levels = <3 255>;
27	num-interpolated-steps = <252>;
28};
29
30&backlight_regulator {
31	vin-supply = <&vccsys>;
32};
33
34&i2c3 {
35	status = "okay";
36
37	clock-frequency = <400000>;
38	i2c-scl-falling-time-ns = <50>;
39	i2c-scl-rising-time-ns = <300>;
40
41	touchscreen@10 {
42		compatible = "elan,ekth3500";
43		reg = <0x10>;
44		interrupt-parent = <&gpio2>;
45		interrupts = <RK_PB6 IRQ_TYPE_EDGE_FALLING>;
46		pinctrl-names = "default";
47		pinctrl-0 = <&touch_int &touch_rst>;
48		reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
49		vcc33-supply = <&vcc33_io>;
50		vccio-supply = <&vcc33_io>;
51		wakeup-source;
52	};
53};
54
55&panel {
56	compatible = "auo,b101ean01";
57
58	/delete-node/ panel-timing;
59
60	panel-timing {
61		clock-frequency = <66666667>;
62		hactive = <1280>;
63		hfront-porch = <18>;
64		hback-porch = <21>;
65		hsync-len = <32>;
66		vactive = <800>;
67		vfront-porch = <4>;
68		vback-porch = <8>;
69		vsync-len = <18>;
70	};
71};
72
73&pinctrl {
74	lcd {
75		/delete-node/ avdd-1v8-disp-en;
76	};
77
78	touchscreen {
79		touch_int: touch-int {
80			rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
81		};
82
83		touch_rst: touch-rst {
84			rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
85		};
86	};
87};
88