xref: /linux/scripts/dtc/include-prefixes/arm/rockchip/rk3288-veyron-edp.dtsi (revision c34e9ab9a612ee8b18273398ef75c207b01f516d)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Google Veyron (and derivatives) fragment for the edp displays
4 *
5 * Copyright 2019 Google LLC
6 */
7
8/ {
9	backlight_regulator: regulator-backlight {
10		compatible = "regulator-fixed";
11		enable-active-high;
12		gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
13		pinctrl-names = "default";
14		pinctrl-0 = <&bl_pwr_en>;
15		regulator-name = "backlight_regulator";
16		vin-supply = <&vcc33_sys>;
17		startup-delay-us = <15000>;
18	};
19
20	panel_regulator: regulator-panel {
21		compatible = "regulator-fixed";
22		enable-active-high;
23		gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
24		pinctrl-names = "default";
25		pinctrl-0 = <&lcd_enable_h>;
26		regulator-name = "panel_regulator";
27		vin-supply = <&vcc33_sys>;
28	};
29
30	vcc18_lcd: vcc18-lcd {
31		compatible = "regulator-fixed";
32		enable-active-high;
33		gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
34		pinctrl-names = "default";
35		pinctrl-0 = <&avdd_1v8_disp_en>;
36		regulator-name = "vcc18_lcd";
37		regulator-always-on;
38		regulator-boot-on;
39		vin-supply = <&vcc18_wl>;
40	};
41
42	backlight: backlight {
43		compatible = "pwm-backlight";
44		brightness-levels = <0 255>;
45		num-interpolated-steps = <255>;
46		default-brightness-level = <128>;
47		enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
48		pinctrl-names = "default";
49		pinctrl-0 = <&bl_en>;
50		pwms = <&pwm0 0 1000000 0>;
51		post-pwm-on-delay-ms = <10>;
52		pwm-off-delay-ms = <10>;
53		power-supply = <&backlight_regulator>;
54	};
55
56	panel: panel {
57		compatible = "innolux,n116bge";
58		status = "okay";
59		power-supply = <&panel_regulator>;
60		backlight = <&backlight>;
61
62		panel-timing {
63			clock-frequency = <74250000>;
64			hactive = <1366>;
65			hfront-porch = <136>;
66			hback-porch = <60>;
67			hsync-len = <30>;
68			hsync-active = <0>;
69			vactive = <768>;
70			vfront-porch = <8>;
71			vback-porch = <12>;
72			vsync-len = <12>;
73			vsync-active = <0>;
74		};
75
76		ports {
77			panel_in: port {
78				panel_in_edp: endpoint {
79					remote-endpoint = <&edp_out_panel>;
80				};
81			};
82		};
83	};
84};
85
86&edp {
87	status = "okay";
88
89	pinctrl-names = "default";
90	pinctrl-0 = <&edp_hpd>;
91
92	ports {
93		edp_out: port@1 {
94			reg = <1>;
95			#address-cells = <1>;
96			#size-cells = <0>;
97			edp_out_panel: endpoint@0 {
98				reg = <0>;
99				remote-endpoint = <&panel_in_edp>;
100			};
101		};
102	};
103};
104
105&edp_phy {
106	status = "okay";
107};
108
109&pwm0 {
110	status = "okay";
111};
112
113&vopl {
114	status = "okay";
115};
116
117&vopl_mmu {
118	status = "okay";
119};
120
121&pinctrl {
122	backlight {
123		bl_pwr_en: bl_pwr_en {
124			rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
125		};
126
127		bl_en: bl-en {
128			rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
129		};
130	};
131
132	lcd {
133		lcd_enable_h: lcd-en {
134			rockchip,pins = <7 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
135		};
136
137		avdd_1v8_disp_en: avdd-1v8-disp-en {
138			rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
139		};
140	};
141};
142