1// SPDX-License-Identifier: (GPL-2.0-only OR MIT) 2/* 3 * Copyright 2013-2017 Lothar Waßmann <LW@KARO-electronics.de> 4 */ 5 6/dts-v1/; 7#include "imx53-tx53.dtsi" 8#include <dt-bindings/input/input.h> 9 10/ { 11 model = "Ka-Ro electronics TX53 module (LVDS)"; 12 compatible = "karo,tx53", "fsl,imx53"; 13 14 aliases { 15 display = &lvds0; 16 lvds0 = &lvds0; 17 lvds1 = &lvds1; 18 }; 19 20 backlight0: backlight0 { 21 compatible = "pwm-backlight"; 22 pwms = <&pwm2 0 500000 0>; 23 power-supply = <®_3v3>; 24 brightness-levels = < 25 0 1 2 3 4 5 6 7 8 9 26 10 11 12 13 14 15 16 17 18 19 27 20 21 22 23 24 25 26 27 28 29 28 30 31 32 33 34 35 36 37 38 39 29 40 41 42 43 44 45 46 47 48 49 30 50 51 52 53 54 55 56 57 58 59 31 60 61 62 63 64 65 66 67 68 69 32 70 71 72 73 74 75 76 77 78 79 33 80 81 82 83 84 85 86 87 88 89 34 90 91 92 93 94 95 96 97 98 99 35 100 36 >; 37 default-brightness-level = <50>; 38 }; 39 40 backlight1: backlight1 { 41 compatible = "pwm-backlight"; 42 pwms = <&pwm1 0 500000 0>; 43 power-supply = <®_3v3>; 44 brightness-levels = < 45 0 1 2 3 4 5 6 7 8 9 46 10 11 12 13 14 15 16 17 18 19 47 20 21 22 23 24 25 26 27 28 29 48 30 31 32 33 34 35 36 37 38 39 49 40 41 42 43 44 45 46 47 48 49 50 50 51 52 53 54 55 56 57 58 59 51 60 61 62 63 64 65 66 67 68 69 52 70 71 72 73 74 75 76 77 78 79 53 80 81 82 83 84 85 86 87 88 89 54 90 91 92 93 94 95 96 97 98 99 55 100 56 >; 57 default-brightness-level = <50>; 58 }; 59 60 reg_lcd_pwr0: regulator-lvds0-pwr { 61 compatible = "regulator-fixed"; 62 regulator-name = "LVDS0 POWER"; 63 regulator-min-microvolt = <3300000>; 64 regulator-max-microvolt = <3300000>; 65 gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>; 66 enable-active-high; 67 regulator-boot-on; 68 }; 69 70 reg_lcd_pwr1: regulator-lvds1-pwr { 71 compatible = "regulator-fixed"; 72 regulator-name = "LVDS1 POWER"; 73 regulator-min-microvolt = <3300000>; 74 regulator-max-microvolt = <3300000>; 75 gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>; 76 enable-active-high; 77 regulator-boot-on; 78 }; 79}; 80 81&i2c3 { 82 pinctrl-names = "default", "gpio"; 83 pinctrl-0 = <&pinctrl_i2c3>; 84 pinctrl-1 = <&pinctrl_i2c3_gpio>; 85 scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; 86 sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; 87 status = "okay"; 88 89 sgtl5000: codec@a { 90 compatible = "fsl,sgtl5000"; 91 reg = <0x0a>; 92 #sound-dai-cells = <0>; 93 VDDA-supply = <®_2v5>; 94 VDDIO-supply = <®_3v3>; 95 clocks = <&mclk>; 96 }; 97}; 98 99&iomuxc { 100 pinctrl_lvds0: lvds0grp { 101 fsl,pins = < 102 MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000 103 MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000 104 MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000 105 MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000 106 MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000 107 >; 108 }; 109 110 pinctrl_lvds1: lvds1grp { 111 fsl,pins = < 112 MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000 113 MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000 114 MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000 115 MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000 116 MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000 117 >; 118 }; 119 120 pinctrl_pwm1: pwm1grp { 121 fsl,pins = <MX53_PAD_GPIO_9__PWM1_PWMO 0x04>; 122 }; 123 124 pinctrl_eeti1: eeti1grp { 125 fsl,pins = < 126 MX53_PAD_EIM_D22__GPIO3_22 0x1f0 /* Interrupt */ 127 >; 128 }; 129 130 pinctrl_eeti2: eeti2grp { 131 fsl,pins = < 132 MX53_PAD_EIM_D23__GPIO3_23 0x1f0 /* Interrupt */ 133 >; 134 }; 135}; 136 137&ldb { 138 pinctrl-names = "default"; 139 pinctrl-0 = <&pinctrl_lvds0 &pinctrl_lvds1>; 140 status = "okay"; 141 142 lvds0: lvds-channel@0 { 143 fsl,data-mapping = "spwg"; 144 fsl,data-width = <18>; 145 status = "okay"; 146 147 display-timings { 148 native-mode = <&lvds0_timing0>; 149 150 lvds0_timing0: timing-hsd100pxn1 { 151 clock-frequency = <65000000>; 152 hactive = <1024>; 153 vactive = <768>; 154 hback-porch = <220>; 155 hsync-len = <60>; 156 hfront-porch = <40>; 157 vback-porch = <21>; 158 vsync-len = <10>; 159 vfront-porch = <7>; 160 hsync-active = <0>; 161 vsync-active = <0>; 162 de-active = <1>; 163 pixelclk-active = <1>; 164 }; 165 166 lvds0_timing1: timing-nl12880bc20 { 167 clock-frequency = <71000000>; 168 hactive = <1280>; 169 vactive = <800>; 170 hback-porch = <50>; 171 hsync-len = <60>; 172 hfront-porch = <50>; 173 vback-porch = <5>; 174 vsync-len = <13>; 175 vfront-porch = <5>; 176 hsync-active = <0>; 177 vsync-active = <0>; 178 de-active = <1>; 179 pixelclk-active = <1>; 180 }; 181 }; 182 }; 183 184 lvds1: lvds-channel@1 { 185 fsl,data-mapping = "spwg"; 186 fsl,data-width = <18>; 187 status = "okay"; 188 189 display-timings { 190 native-mode = <&lvds1_timing0>; 191 192 lvds1_timing0: timing-hsd100pxn1 { 193 clock-frequency = <65000000>; 194 hactive = <1024>; 195 vactive = <768>; 196 hback-porch = <220>; 197 hsync-len = <60>; 198 hfront-porch = <40>; 199 vback-porch = <21>; 200 vsync-len = <10>; 201 vfront-porch = <7>; 202 hsync-active = <0>; 203 vsync-active = <0>; 204 de-active = <1>; 205 pixelclk-active = <1>; 206 }; 207 }; 208 }; 209}; 210 211&pwm1 { 212 pinctrl-names = "default"; 213 pinctrl-0 = <&pinctrl_pwm1>; 214}; 215 216&sata { 217 status = "okay"; 218}; 219