xref: /linux/include/uapi/linux/qemu_fw_cfg.h (revision c1144d29f405ce1f4e6ede6482beb3d0d09750c6)
1 /* SPDX-License-Identifier: BSD-3-Clause */
2 #ifndef _LINUX_FW_CFG_H
3 #define _LINUX_FW_CFG_H
4 
5 #include <linux/types.h>
6 
7 #define FW_CFG_ACPI_DEVICE_ID	"QEMU0002"
8 
9 /* selector key values for "well-known" fw_cfg entries */
10 #define FW_CFG_SIGNATURE	0x00
11 #define FW_CFG_ID		0x01
12 #define FW_CFG_UUID		0x02
13 #define FW_CFG_RAM_SIZE		0x03
14 #define FW_CFG_NOGRAPHIC	0x04
15 #define FW_CFG_NB_CPUS		0x05
16 #define FW_CFG_MACHINE_ID	0x06
17 #define FW_CFG_KERNEL_ADDR	0x07
18 #define FW_CFG_KERNEL_SIZE	0x08
19 #define FW_CFG_KERNEL_CMDLINE	0x09
20 #define FW_CFG_INITRD_ADDR	0x0a
21 #define FW_CFG_INITRD_SIZE	0x0b
22 #define FW_CFG_BOOT_DEVICE	0x0c
23 #define FW_CFG_NUMA		0x0d
24 #define FW_CFG_BOOT_MENU	0x0e
25 #define FW_CFG_MAX_CPUS		0x0f
26 #define FW_CFG_KERNEL_ENTRY	0x10
27 #define FW_CFG_KERNEL_DATA	0x11
28 #define FW_CFG_INITRD_DATA	0x12
29 #define FW_CFG_CMDLINE_ADDR	0x13
30 #define FW_CFG_CMDLINE_SIZE	0x14
31 #define FW_CFG_CMDLINE_DATA	0x15
32 #define FW_CFG_SETUP_ADDR	0x16
33 #define FW_CFG_SETUP_SIZE	0x17
34 #define FW_CFG_SETUP_DATA	0x18
35 #define FW_CFG_FILE_DIR		0x19
36 
37 #define FW_CFG_FILE_FIRST	0x20
38 #define FW_CFG_FILE_SLOTS_MIN	0x10
39 
40 #define FW_CFG_WRITE_CHANNEL	0x4000
41 #define FW_CFG_ARCH_LOCAL	0x8000
42 #define FW_CFG_ENTRY_MASK	(~(FW_CFG_WRITE_CHANNEL | FW_CFG_ARCH_LOCAL))
43 
44 #define FW_CFG_INVALID		0xffff
45 
46 /* width in bytes of fw_cfg control register */
47 #define FW_CFG_CTL_SIZE		0x02
48 
49 /* fw_cfg "file name" is up to 56 characters (including terminating nul) */
50 #define FW_CFG_MAX_FILE_PATH	56
51 
52 /* size in bytes of fw_cfg signature */
53 #define FW_CFG_SIG_SIZE 4
54 
55 /* FW_CFG_ID bits */
56 #define FW_CFG_VERSION		0x01
57 #define FW_CFG_VERSION_DMA	0x02
58 
59 /* fw_cfg file directory entry type */
60 struct fw_cfg_file {
61 	__be32 size;
62 	__be16 select;
63 	__u16 reserved;
64 	char name[FW_CFG_MAX_FILE_PATH];
65 };
66 
67 /* FW_CFG_DMA_CONTROL bits */
68 #define FW_CFG_DMA_CTL_ERROR	0x01
69 #define FW_CFG_DMA_CTL_READ	0x02
70 #define FW_CFG_DMA_CTL_SKIP	0x04
71 #define FW_CFG_DMA_CTL_SELECT	0x08
72 #define FW_CFG_DMA_CTL_WRITE	0x10
73 
74 #define FW_CFG_DMA_SIGNATURE    0x51454d5520434647ULL /* "QEMU CFG" */
75 
76 /* Control as first field allows for different structures selected by this
77  * field, which might be useful in the future
78  */
79 struct fw_cfg_dma_access {
80 	__be32 control;
81 	__be32 length;
82 	__be64 address;
83 };
84 
85 #define FW_CFG_VMCOREINFO_FILENAME "etc/vmcoreinfo"
86 
87 #define FW_CFG_VMCOREINFO_FORMAT_NONE 0x0
88 #define FW_CFG_VMCOREINFO_FORMAT_ELF 0x1
89 
90 struct fw_cfg_vmcoreinfo {
91 	__le16 host_format;
92 	__le16 guest_format;
93 	__le32 size;
94 	__le64 paddr;
95 };
96 
97 #endif
98