1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* Copyright 2023-2026 NXP */ 3 4 #ifndef __PHY_FSL_LYNX_H_ 5 #define __PHY_FSL_LYNX_H_ 6 7 enum lynx_lane_mode { 8 LANE_MODE_UNKNOWN, 9 LANE_MODE_1000BASEX_SGMII, 10 LANE_MODE_2500BASEX, 11 LANE_MODE_QSGMII, 12 LANE_MODE_10G_QXGMII, 13 LANE_MODE_10GBASER, 14 LANE_MODE_USXGMII, 15 LANE_MODE_25GBASER, 16 LANE_MODE_MAX, 17 }; 18 19 static inline bool lynx_lane_mode_uses_gmii_mac(enum lynx_lane_mode mode) 20 { 21 switch (mode) { 22 case LANE_MODE_1000BASEX_SGMII: 23 case LANE_MODE_2500BASEX: 24 case LANE_MODE_QSGMII: 25 case LANE_MODE_10G_QXGMII: 26 return true; 27 default: 28 return false; 29 } 30 } 31 32 static inline bool lynx_lane_mode_uses_xgmii_mac(enum lynx_lane_mode mode) 33 { 34 switch (mode) { 35 case LANE_MODE_10GBASER: 36 case LANE_MODE_USXGMII: 37 return true; 38 default: 39 return false; 40 } 41 } 42 43 #endif /* __PHY_FSL_LYNX_H_ */ 44