1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ 2 /* Copyright (c) 2026, NVIDIA CORPORATION. All rights reserved. */ 3 4 #ifndef DT_BINDINGS_MEMORY_TEGRA238_MC_H 5 #define DT_BINDINGS_MEMORY_TEGRA238_MC_H 6 7 /* special clients */ 8 #define TEGRA238_SID_INVALID 0x0 9 #define TEGRA238_SID_PASSTHROUGH 0x7f 10 11 /* ISO stream IDs */ 12 #define TEGRA238_SID_ISO_NVDISPLAY 0x1 13 #define TEGRA238_SID_ISO_APE0 0x2 14 #define TEGRA238_SID_ISO_APE1 0x3 15 16 /* NISO stream IDs */ 17 #define TEGRA238_SID_AON 0x1 18 #define TEGRA238_SID_BPMP 0x2 19 #define TEGRA238_SID_ETR 0x3 20 #define TEGRA238_SID_FDE 0x4 21 #define TEGRA238_SID_HC 0x5 22 #define TEGRA238_SID_HDA 0x6 23 #define TEGRA238_SID_NVDEC 0x7 24 #define TEGRA238_SID_NVDISPLAY 0x8 25 #define TEGRA238_SID_NVENC 0x9 26 #define TEGRA238_SID_OFA 0xa 27 #define TEGRA238_SID_PCIE0 0xb 28 #define TEGRA238_SID_PCIE1 0xc 29 #define TEGRA238_SID_PCIE2 0xd 30 #define TEGRA238_SID_PCIE3 0xe 31 #define TEGRA238_SID_HWMP_PMA 0xf 32 #define TEGRA238_SID_PSC 0x10 33 #define TEGRA238_SID_SDMMC1A 0x11 34 #define TEGRA238_SID_SDMMC4A 0x12 35 #define TEGRA238_SID_SES_SE0 0x13 36 #define TEGRA238_SID_SES_SE1 0x14 37 #define TEGRA238_SID_SES_SE2 0x15 38 #define TEGRA238_SID_SEU1_SE0 0x16 39 #define TEGRA238_SID_SEU1_SE1 0x17 40 #define TEGRA238_SID_SEU1_SE2 0x18 41 #define TEGRA238_SID_TSEC 0x19 42 #define TEGRA238_SID_UFSHC 0x1a 43 #define TEGRA238_SID_VIC 0x1b 44 #define TEGRA238_SID_XUSB_HOST 0x1c 45 #define TEGRA238_SID_XUSB_DEV 0x1d 46 #define TEGRA238_SID_GPCDMA_0 0x1e 47 #define TEGRA238_SID_SMMU_TEST 0x1f 48 49 /* Host1x virtualization clients. */ 50 #define TEGRA238_SID_HOST1X_CTX0 0x20 51 #define TEGRA238_SID_HOST1X_CTX1 0x21 52 #define TEGRA238_SID_HOST1X_CTX2 0x22 53 #define TEGRA238_SID_HOST1X_CTX3 0x23 54 #define TEGRA238_SID_HOST1X_CTX4 0x24 55 #define TEGRA238_SID_HOST1X_CTX5 0x25 56 #define TEGRA238_SID_HOST1X_CTX6 0x26 57 #define TEGRA238_SID_HOST1X_CTX7 0x27 58 59 #define TEGRA238_SID_XUSB_VF0 0x28 60 #define TEGRA238_SID_XUSB_VF1 0x29 61 #define TEGRA238_SID_XUSB_VF2 0x2a 62 #define TEGRA238_SID_XUSB_VF3 0x2b 63 64 /* Host1x command buffers */ 65 #define TEGRA238_SID_HC_VM0 0x2c 66 #define TEGRA238_SID_HC_VM1 0x2d 67 #define TEGRA238_SID_HC_VM2 0x2e 68 #define TEGRA238_SID_HC_VM3 0x2f 69 #define TEGRA238_SID_HC_VM4 0x30 70 #define TEGRA238_SID_HC_VM5 0x31 71 #define TEGRA238_SID_HC_VM6 0x32 72 #define TEGRA238_SID_HC_VM7 0x33 73 74 #endif 75