1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4 */ 5 6 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_ELIZA_H 7 #define __DT_BINDINGS_INTERCONNECT_QCOM_ELIZA_H 8 9 #define MASTER_QSPI_0 0 10 #define MASTER_QUP_1 1 11 #define MASTER_UFS_MEM 2 12 #define MASTER_USB3_0 3 13 #define SLAVE_A1NOC_SNOC 4 14 15 #define MASTER_QUP_2 0 16 #define MASTER_CRYPTO 1 17 #define MASTER_IPA 2 18 #define MASTER_SOCCP_AGGR_NOC 3 19 #define MASTER_QDSS_ETR 4 20 #define MASTER_QDSS_ETR_1 5 21 #define MASTER_SDCC_1 6 22 #define MASTER_SDCC_2 7 23 #define SLAVE_A2NOC_SNOC 8 24 25 #define MASTER_QUP_CORE_1 0 26 #define MASTER_QUP_CORE_2 1 27 #define SLAVE_QUP_CORE_1 2 28 #define SLAVE_QUP_CORE_2 3 29 30 #define MASTER_CNOC_CFG 0 31 #define SLAVE_AHB2PHY_SOUTH 1 32 #define SLAVE_AHB2PHY_NORTH 2 33 #define SLAVE_CAMERA_CFG 3 34 #define SLAVE_CLK_CTL 4 35 #define SLAVE_CRYPTO_0_CFG 5 36 #define SLAVE_DISPLAY_CFG 6 37 #define SLAVE_GFX3D_CFG 7 38 #define SLAVE_I3C_IBI0_CFG 8 39 #define SLAVE_I3C_IBI1_CFG 9 40 #define SLAVE_IMEM_CFG 10 41 #define SLAVE_CNOC_MSS 11 42 #define SLAVE_PCIE_0_CFG 12 43 #define SLAVE_PRNG 13 44 #define SLAVE_QDSS_CFG 14 45 #define SLAVE_QSPI_0 15 46 #define SLAVE_QUP_1 16 47 #define SLAVE_QUP_2 17 48 #define SLAVE_SDCC_2 18 49 #define SLAVE_TCSR 19 50 #define SLAVE_TLMM 20 51 #define SLAVE_UFS_MEM_CFG 21 52 #define SLAVE_USB3_0 22 53 #define SLAVE_VENUS_CFG 23 54 #define SLAVE_VSENSE_CTRL_CFG 24 55 #define SLAVE_CNOC_MNOC_HF_CFG 25 56 #define SLAVE_CNOC_MNOC_SF_CFG 26 57 #define SLAVE_PCIE_ANOC_CFG 27 58 #define SLAVE_QDSS_STM 28 59 #define SLAVE_TCU 29 60 61 #define MASTER_GEM_NOC_CNOC 0 62 #define MASTER_GEM_NOC_PCIE_SNOC 1 63 #define SLAVE_AOSS 2 64 #define SLAVE_IPA_CFG 3 65 #define SLAVE_IPC_ROUTER_CFG 4 66 #define SLAVE_SOCCP 5 67 #define SLAVE_TME_CFG 6 68 #define SLAVE_APPSS 7 69 #define SLAVE_CNOC_CFG 8 70 #define SLAVE_DDRSS_CFG 9 71 #define SLAVE_BOOT_IMEM 10 72 #define SLAVE_IMEM 11 73 #define SLAVE_BOOT_IMEM_2 12 74 #define SLAVE_SERVICE_CNOC 13 75 #define SLAVE_PCIE_0 14 76 #define SLAVE_PCIE_1 15 77 78 #define MASTER_GPU_TCU 0 79 #define MASTER_SYS_TCU 1 80 #define MASTER_APPSS_PROC 2 81 #define MASTER_GFX3D 3 82 #define MASTER_LPASS_GEM_NOC 4 83 #define MASTER_MSS_PROC 5 84 #define MASTER_MNOC_HF_MEM_NOC 6 85 #define MASTER_MNOC_SF_MEM_NOC 7 86 #define MASTER_COMPUTE_NOC 8 87 #define MASTER_ANOC_PCIE_GEM_NOC 9 88 #define MASTER_SNOC_SF_MEM_NOC 10 89 #define MASTER_WLAN_Q6 11 90 #define MASTER_GIC 12 91 #define SLAVE_GEM_NOC_CNOC 13 92 #define SLAVE_LLCC 14 93 #define SLAVE_MEM_NOC_PCIE_SNOC 15 94 95 #define MASTER_LPIAON_NOC 0 96 #define SLAVE_LPASS_GEM_NOC 1 97 98 #define MASTER_LPASS_LPINOC 0 99 #define SLAVE_LPIAON_NOC_LPASS_AG_NOC 1 100 101 #define MASTER_LPASS_PROC 0 102 #define SLAVE_LPICX_NOC_LPIAON_NOC 1 103 104 #define MASTER_LLCC 0 105 #define SLAVE_EBI1 1 106 107 #define MASTER_CAMNOC_NRT_ICP_SF 0 108 #define MASTER_CAMNOC_RT_CDM_SF 1 109 #define MASTER_CAMNOC_SF 2 110 #define MASTER_VIDEO_MVP 3 111 #define MASTER_VIDEO_V_PROC 4 112 #define MASTER_CNOC_MNOC_SF_CFG 5 113 #define MASTER_CAMNOC_HF 6 114 #define MASTER_MDP 7 115 #define MASTER_CNOC_MNOC_HF_CFG 8 116 #define SLAVE_MNOC_SF_MEM_NOC 9 117 #define SLAVE_SERVICE_MNOC_SF 10 118 #define SLAVE_MNOC_HF_MEM_NOC 11 119 #define SLAVE_SERVICE_MNOC_HF 12 120 121 #define MASTER_CDSP_PROC 0 122 #define SLAVE_CDSP_MEM_NOC 1 123 124 #define MASTER_PCIE_ANOC_CFG 0 125 #define MASTER_PCIE_0 1 126 #define MASTER_PCIE_1 2 127 #define SLAVE_ANOC_PCIE_GEM_NOC 3 128 #define SLAVE_SERVICE_PCIE_ANOC 4 129 130 #define MASTER_A1NOC_SNOC 0 131 #define MASTER_A2NOC_SNOC 1 132 #define MASTER_CNOC_SNOC 2 133 #define MASTER_NSINOC_SNOC 3 134 #define SLAVE_SNOC_GEM_NOC_SF 4 135 136 #endif 137