1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (c) 2025 Collabora Ltd. 4 * AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> 5 */ 6 7 #ifndef __DT_BINDINGS_INTERCONNECT_MEDIATEK_MT8196_H 8 #define __DT_BINDINGS_INTERCONNECT_MEDIATEK_MT8196_H 9 10 #define SLAVE_DDR_EMI 0 11 #define MASTER_MCUSYS 1 12 #define MASTER_MCU_0 2 13 #define MASTER_MCU_1 3 14 #define MASTER_MCU_2 4 15 #define MASTER_MCU_3 5 16 #define MASTER_MCU_4 6 17 #define MASTER_GPUSYS 7 18 #define MASTER_MMSYS 8 19 #define MASTER_MM_VPU 9 20 #define MASTER_MM_DISP 10 21 #define MASTER_MM_VDEC 11 22 #define MASTER_MM_VENC 12 23 #define MASTER_MM_CAM 13 24 #define MASTER_MM_IMG 14 25 #define MASTER_MM_MDP 15 26 #define MASTER_VPUSYS 16 27 #define MASTER_VPU_0 17 28 #define MASTER_VPU_1 18 29 #define MASTER_MDLASYS 19 30 #define MASTER_MDLA_0 20 31 #define MASTER_UFS 21 32 #define MASTER_PCIE 22 33 #define MASTER_USB 23 34 #define MASTER_WIFI 24 35 #define MASTER_BT 25 36 #define MASTER_NETSYS 26 37 #define MASTER_DBGIF 27 38 #define SLAVE_HRT_DDR_EMI 28 39 #define MASTER_HRT_MMSYS 29 40 #define MASTER_HRT_MM_DISP 30 41 #define MASTER_HRT_MM_VDEC 31 42 #define MASTER_HRT_MM_VENC 32 43 #define MASTER_HRT_MM_CAM 33 44 #define MASTER_HRT_MM_IMG 34 45 #define MASTER_HRT_MM_MDP 35 46 #define MASTER_HRT_ADSP 36 47 #define MASTER_HRT_DBGIF 37 48 #endif 49