1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */ 2 /* 3 * Copyright (C) 2024 StarFive Technology Co., Ltd. 4 * Author: Changhuang Liang <changhuang.liang@starfivetech.com> 5 * 6 */ 7 8 #ifndef __DT_BINDINGS_CLOCK_STARFIVE_JHB100_H__ 9 #define __DT_BINDINGS_CLOCK_STARFIVE_JHB100_H__ 10 11 /* SYS0PLL clocks */ 12 #define JHB100_SYS0PLL_PLL2_OUT 0 13 #define JHB100_SYS0PLL_PLL3_OUT 1 14 #define JHB100_SYS0PLL_PLL4_OUT 2 15 #define JHB100_SYS0PLL_PLL5_OUT 3 16 17 /* PER0PLL clocks */ 18 #define JHB100_PER0PLL_PLL6_OUT 0 19 20 /* PER1PLL clocks */ 21 #define JHB100_PER1PLL_PLL7_OUT 0 22 23 /* SYS0CRG clocks */ 24 #define JHB100_SYS0CLK_BMCPCIERP_NCNOC_MAIN 17 25 #define JHB100_SYS0CLK_BMCPCIERP_NCNOC_CFG 18 26 27 #define JHB100_SYS0CLK_PCIE_REF_CML 20 28 #define JHB100_SYS0CLK_BMCPCIERP_NCNOC_DATA_INIT 21 29 #define JHB100_SYS0CLK_BMCPCIERP_NCNOC_CFG_INIT 22 30 #define JHB100_SYS0CLK_BMCPCIERP_NCNOC_TARG 23 31 32 #define JHB100_SYS0CLK_BMCPCIERP_PCU 26 33 #define JHB100_SYS0CLK_HOSTSS0_NCNOC_CFG 27 34 #define JHB100_SYS0CLK_HOSTSS0_NCNOC_DATA 28 35 #define JHB100_SYS0CLK_HOSTSS0_PHY_SCAN_400 29 36 #define JHB100_SYS0CLK_GPIO_ESPI0_EXT 30 37 38 #define JHB100_SYS0CLK_BMCUSB_NCNOC_INIT 34 39 #define JHB100_SYS0CLK_BMCUSB_NCNOC_TARG 35 40 #define JHB100_SYS0CLK_BMCUSB_SCANCLK 36 41 #define JHB100_SYS0CLK_BMCUSB_480M_SCANCLK 37 42 43 #define JHB100_SYS0CLK_VCE_NCNOC_INIT 50 44 #define JHB100_SYS0CLK_VCE_NCNOC_TARG 51 45 #define JHB100_SYS0CLK_BMCPER2_NCNOC_INIT 52 46 #define JHB100_SYS0CLK_BMCPER2_NCNOC_TARG 53 47 #define JHB100_SYS0CLK_BMCPER2_CFG_400 54 48 #define JHB100_SYS0CLK_BMCPER2_CFG_125 55 49 50 #define JHB100_SYS0CLK_HOSTSS1_NCNOC_DATA 58 51 #define JHB100_SYS0CLK_HOSTSS1_PHY_SCAN_400 59 52 #define JHB100_SYS0CLK_HOSTSS1_PHY_SCAN_400_ICG_BUF 60 53 #define JHB100_SYS0CLK_NPU_NCNOC_INIT 61 54 #define JHB100_SYS0CLK_VOUT_NCNOC_INIT 62 55 #define JHB100_SYS0CLK_VOUT_AUX 63 56 57 #define JHB100_SYS0CLK_BMCPER3_NCNOC_INIT 65 58 #define JHB100_SYS0CLK_HOSTUSB_NCNOC_INIT 66 59 #define JHB100_SYS0CLK_HOSTUSBCMN_CFG_480 67 60 #define JHB100_SYS0CLK_BMCPER1_NCNOC_INIT 68 61 #define JHB100_SYS0CLK_BMCPER1_CFG_800 69 62 #define JHB100_SYS0CLK_BMCPER0_NCNOC_INIT 70 63 #define JHB100_SYS0CLK_BMCPER0_CFG_400 71 64 #define JHB100_SYS0CLK_BMCPER0_CFG_800 72 65 #define JHB100_SYS0CLK_GPU0_NCNOC_INIT 73 66 #define JHB100_SYS0CLK_GPU1_NCNOC_INIT 74 67 68 /* SYS1CRG clocks */ 69 #define JHB100_SYS1CLK_APB_MAIN_SYS1 0 70 #define JHB100_SYS1CLK_APB_SENSOR_ICG_BUF 1 71 72 #define JHB100_SYS1CLK_GPIO_ESPI1_EXT 5 73 74 #define JHB100_SYS1CLK_HOSTSS1_NCNOC_CFG 7 75 #define JHB100_SYS1CLK_HOSTSS1_PHY_SCAN_1000_ICG_BUF 8 76 #define JHB100_SYS1CLK_NPU_NCNOC_CFG 9 77 #define JHB100_SYS1CLK_NPU_CORE_DIV 10 78 #define JHB100_SYS1CLK_DOM_NPU_CORE_CLK 11 79 #define JHB100_SYS1CLK_DOM_NPU_BUS_CLK 12 80 #define JHB100_SYS1CLK_DOM_NPU_INIT_CLK 13 81 #define JHB100_SYS1CLK_DOM_NPU_OSC_CLK 14 82 #define JHB100_SYS1CLK_VOUT_NCNOC_TARG 15 83 #define JHB100_SYS1CLK_VOUT_PIX0 16 84 #define JHB100_SYS1CLK_VOUT_PIX1 17 85 #define JHB100_SYS1CLK_BMCPER3_NCNOC_TARG 18 86 #define JHB100_SYS1CLK_BMCPER3_CFG_125 19 87 88 /* SYS2CRG clocks */ 89 #define JHB100_SYS2CLK_JTAGM0_HCLK 3 90 #define JHB100_SYS2CLK_JTAGM1_HCLK 4 91 #define JHB100_SYS2CLK_JTAGM0_ATPG 5 92 #define JHB100_SYS2CLK_JTAGM1_ATPG 6 93 #define JHB100_SYS2CLK_JTAGM0_ATPG_TCLOCK 7 94 #define JHB100_SYS2CLK_JTAGM1_ATPG_TCLOCK 8 95 #define JHB100_SYS2CLK_JTAG0_MST_WRAP_HCLK 9 96 #define JHB100_SYS2CLK_JTAG0_MST_WRAP_CLK_JTAG 10 97 #define JHB100_SYS2CLK_JTAG0_MST_WRAP_APB_PCLK 11 98 #define JHB100_SYS2CLK_JTAG0_MST_WRAP_ATPG_TCLOCK 12 99 #define JHB100_SYS2CLK_JTAG1_MST_WRAP_HCLK 13 100 #define JHB100_SYS2CLK_JTAG1_MST_WRAP_CLK_JTAG 14 101 #define JHB100_SYS2CLK_JTAG1_MST_WRAP_APB_PCLK 15 102 #define JHB100_SYS2CLK_JTAG1_MST_WRAP_ATPG_TCLOCK 16 103 #define JHB100_SYS2CLK_HOSTUSB_NCNOC_TARG 17 104 #define JHB100_SYS2CLK_HOSTUSBCMN_CFG_500 18 105 #define JHB100_SYS2CLK_BMCPER1_NCNOC_TARG 19 106 #define JHB100_SYS2CLK_BMCPER1_CFG_250 20 107 #define JHB100_SYS2CLK_BMCPER1_CFG_143_DFT 21 108 #define JHB100_SYS2CLK_BMCPER1_CFG_143 22 109 #define JHB100_SYS2CLK_BMCPER0_NCNOC_TARG 23 110 #define JHB100_SYS2CLK_GPU0_NCNOC_TARG 24 111 #define JHB100_SYS2CLK_GPU0_BUS_CLK 25 112 #define JHB100_SYS2CLK_GPU0_APB_CLK 26 113 #define JHB100_SYS2CLK_GPU0_OSC_CLK 27 114 #define JHB100_SYS2CLK_GPU1_NCNOC_TARG 28 115 #define JHB100_SYS2CLK_GPU1_BUS_CLK 29 116 #define JHB100_SYS2CLK_GPU1_APB_CLK 30 117 #define JHB100_SYS2CLK_GPU1_OSC_CLK 31 118 #define JHB100_SYS2CLK_MAIN_ICG_EN_JTAG0 32 119 #define JHB100_SYS2CLK_MAIN_ICG_EN_JTAG1 33 120 121 /* PER0CRG clocks */ 122 #define JHB100_PER0CLK_CDR_I3C0 0 123 #define JHB100_PER0CLK_CDR_I3C1 1 124 #define JHB100_PER0CLK_CDR_I3C2 2 125 #define JHB100_PER0CLK_CDR_I3C3 3 126 #define JHB100_PER0CLK_CDR_I3C4 4 127 #define JHB100_PER0CLK_CDR_I3C5 5 128 #define JHB100_PER0CLK_CDR_I3C6 6 129 #define JHB100_PER0CLK_CDR_I3C7 7 130 #define JHB100_PER0CLK_CDR_I3C8 8 131 #define JHB100_PER0CLK_CDR_I3C9 9 132 #define JHB100_PER0CLK_CDR_I3C10 10 133 #define JHB100_PER0CLK_CDR_I3C11 11 134 #define JHB100_PER0CLK_CDR_I3C12 12 135 #define JHB100_PER0CLK_CDR_I3C13 13 136 #define JHB100_PER0CLK_CDR_I3C14 14 137 #define JHB100_PER0CLK_CDR_I3C15 15 138 #define JHB100_PER0CLK_200 16 139 #define JHB100_PER0CLK_600_DIV6 17 140 #define JHB100_PER0CLK_600_DIV6_DIV5 18 141 #define JHB100_PER0CLK_TIMER0_DUALTIMER0 19 142 #define JHB100_PER0CLK_TIMER1_DUALTIMER0 20 143 #define JHB100_PER0CLK_TIMER0_DUALTIMER1 21 144 #define JHB100_PER0CLK_TIMER1_DUALTIMER1 22 145 #define JHB100_PER0CLK_TIMER0_DUALTIMER2 23 146 #define JHB100_PER0CLK_TIMER1_DUALTIMER2 24 147 #define JHB100_PER0CLK_1200_PH0_LVDS0 25 148 #define JHB100_PER0CLK_1200_PH0_LVDS1 26 149 #define JHB100_PER0CLK_1200_CORE0 27 150 #define JHB100_PER0CLK_1200_CORE1 28 151 #define JHB100_PER0CLK_1200_SHIFT90_LVDS0 29 152 #define JHB100_PER0CLK_1200_SHIFT90_LVDS1 30 153 #define JHB100_PER0CLK_1200_DIV5_CORE0 31 154 #define JHB100_PER0CLK_1200_DIV5_CORE1 32 155 #define JHB100_PER0CLK_PH0_LTPI0 33 156 157 #define JHB100_PER0CLK_PH0_LTPI1 35 158 159 #define JHB100_PER0CLK_PH90_LTPI0 37 160 161 #define JHB100_PER0CLK_PH90_LTPI1 39 162 163 #define JHB100_PER0CLK_240_CORE_LTPI0 41 164 165 #define JHB100_PER0CLK_240_CORE_LTPI1 43 166 167 #define JHB100_PER0CLK_AXI_DMA_I2C_INIT 45 168 #define JHB100_PER0CLK_AXI_DMA_I3C_INIT 46 169 #define JHB100_PER0CLK_AXI_DMA_UART_INIT 47 170 #define JHB100_PER0CLK_CORE_DMAC0 48 171 #define JHB100_PER0CLK_CORE_DMAC1 49 172 #define JHB100_PER0CLK_CORE_DMAC2 50 173 174 #define JHB100_PER0CLK_HDR_TX_I3C0 78 175 #define JHB100_PER0CLK_HDR_TX_I3C1 79 176 #define JHB100_PER0CLK_HDR_TX_I3C2 80 177 #define JHB100_PER0CLK_HDR_TX_I3C3 81 178 #define JHB100_PER0CLK_HDR_TX_I3C4 82 179 #define JHB100_PER0CLK_HDR_TX_I3C5 83 180 #define JHB100_PER0CLK_HDR_TX_I3C6 84 181 #define JHB100_PER0CLK_HDR_TX_I3C7 85 182 #define JHB100_PER0CLK_HDR_TX_I3C8 86 183 #define JHB100_PER0CLK_HDR_TX_I3C9 87 184 #define JHB100_PER0CLK_HDR_TX_I3C10 88 185 #define JHB100_PER0CLK_HDR_TX_I3C11 89 186 #define JHB100_PER0CLK_HDR_TX_I3C12 90 187 #define JHB100_PER0CLK_HDR_TX_I3C13 91 188 #define JHB100_PER0CLK_HDR_TX_I3C14 92 189 #define JHB100_PER0CLK_HDR_TX_I3C15 93 190 #define JHB100_PER0CLK_CORE_I2C0 94 191 #define JHB100_PER0CLK_CORE_I2C1 95 192 #define JHB100_PER0CLK_CORE_I2C2 96 193 #define JHB100_PER0CLK_CORE_I2C3 97 194 #define JHB100_PER0CLK_CORE_I2C4 98 195 #define JHB100_PER0CLK_CORE_I2C5 99 196 #define JHB100_PER0CLK_CORE_I2C6 100 197 #define JHB100_PER0CLK_CORE_I2C7 101 198 #define JHB100_PER0CLK_CORE_I2C8 102 199 #define JHB100_PER0CLK_CORE_I2C9 103 200 #define JHB100_PER0CLK_CORE_I2C10 104 201 #define JHB100_PER0CLK_CORE_I2C11 105 202 #define JHB100_PER0CLK_CORE_I2C12 106 203 #define JHB100_PER0CLK_CORE_I2C13 107 204 #define JHB100_PER0CLK_CORE_I2C14 108 205 #define JHB100_PER0CLK_CORE_I2C15 109 206 207 #define JHB100_PER0CLK_WDOGCLK_WDT0 126 208 #define JHB100_PER0CLK_WDOGCLK_WDT1 127 209 #define JHB100_PER0CLK_WDOGCLK_WDT2 128 210 #define JHB100_PER0CLK_WDOGCLK_WDT3 129 211 #define JHB100_PER0CLK_WDOGCLK_WDT_EXTERNAL 130 212 #define JHB100_PER0CLK_SCLK_UART4 131 213 #define JHB100_PER0CLK_SCLK_UART5 132 214 #define JHB100_PER0CLK_SCLK_UART6 133 215 #define JHB100_PER0CLK_SCLK_UART7 134 216 #define JHB100_PER0CLK_SCLK_UART8 135 217 #define JHB100_PER0CLK_SCLK_UART9 136 218 #define JHB100_PER0CLK_SCLK_UART10 137 219 #define JHB100_PER0CLK_SCLK_UART11 138 220 #define JHB100_PER0CLK_SCLK_UART12 139 221 #define JHB100_PER0CLK_SCLK_UART13 140 222 #define JHB100_PER0CLK_SCLK_UART14 141 223 224 #define JHB100_PER0CLK_PCLK_DMA_UART_CFG 148 225 #define JHB100_PER0CLK_PCLK_DMA_I2C_CFG 149 226 #define JHB100_PER0CLK_PCLK_DMA_I3C_CFG 150 227 #define JHB100_PER0CLK_PCLK_DUALTIMER0 151 228 #define JHB100_PER0CLK_PCLK_DUALTIMER1 152 229 #define JHB100_PER0CLK_PCLK_DUALTIMER2 153 230 231 #define JHB100_PER0CLK_HCLK_TRNG 156 232 #define JHB100_PER0CLK_APB_I2C0 157 233 #define JHB100_PER0CLK_APB_I2C1 158 234 #define JHB100_PER0CLK_APB_I2C2 159 235 #define JHB100_PER0CLK_APB_I2C3 160 236 #define JHB100_PER0CLK_APB_I2C4 161 237 #define JHB100_PER0CLK_APB_I2C5 162 238 #define JHB100_PER0CLK_APB_I2C6 163 239 #define JHB100_PER0CLK_APB_I2C7 164 240 #define JHB100_PER0CLK_APB_I2C8 165 241 #define JHB100_PER0CLK_APB_I2C9 166 242 #define JHB100_PER0CLK_APB_I2C10 167 243 #define JHB100_PER0CLK_APB_I2C11 168 244 #define JHB100_PER0CLK_APB_I2C12 169 245 #define JHB100_PER0CLK_APB_I2C13 170 246 #define JHB100_PER0CLK_APB_I2C14 171 247 #define JHB100_PER0CLK_APB_I2C15 172 248 #define JHB100_PER0CLK_APB_I2CF0 173 249 #define JHB100_PER0CLK_APB_I2CF1 174 250 #define JHB100_PER0CLK_APB_I2CF2 175 251 #define JHB100_PER0CLK_APB_I2CF3 176 252 #define JHB100_PER0CLK_APB_I2CF4 177 253 #define JHB100_PER0CLK_APB_I2CF5 178 254 #define JHB100_PER0CLK_APB_I2CF6 179 255 #define JHB100_PER0CLK_APB_I2CF7 180 256 #define JHB100_PER0CLK_APB_I2CF8 181 257 #define JHB100_PER0CLK_APB_I2CF9 182 258 #define JHB100_PER0CLK_APB_I2CF10 183 259 #define JHB100_PER0CLK_APB_I2CF11 184 260 #define JHB100_PER0CLK_APB_I2CF12 185 261 #define JHB100_PER0CLK_APB_I2CF13 186 262 #define JHB100_PER0CLK_APB_I2CF14 187 263 #define JHB100_PER0CLK_APB_I2CF15 188 264 #define JHB100_PER0CLK_APB_I3C0 189 265 #define JHB100_PER0CLK_APB_I3C1 190 266 #define JHB100_PER0CLK_APB_I3C2 191 267 #define JHB100_PER0CLK_APB_I3C3 192 268 #define JHB100_PER0CLK_APB_I3C4 193 269 #define JHB100_PER0CLK_APB_I3C5 194 270 #define JHB100_PER0CLK_APB_I3C6 195 271 #define JHB100_PER0CLK_APB_I3C7 196 272 #define JHB100_PER0CLK_APB_I3C8 197 273 #define JHB100_PER0CLK_APB_I3C9 198 274 #define JHB100_PER0CLK_APB_I3C10 199 275 #define JHB100_PER0CLK_APB_I3C11 200 276 #define JHB100_PER0CLK_APB_I3C12 201 277 #define JHB100_PER0CLK_APB_I3C13 202 278 #define JHB100_PER0CLK_APB_I3C14 203 279 #define JHB100_PER0CLK_APB_I3C15 204 280 #define JHB100_PER0CLK_APB_UART0 205 281 #define JHB100_PER0CLK_APB_UART1 206 282 #define JHB100_PER0CLK_APB_UART2 207 283 #define JHB100_PER0CLK_APB_UART3 208 284 #define JHB100_PER0CLK_APB_UART4 209 285 #define JHB100_PER0CLK_APB_UART5 210 286 #define JHB100_PER0CLK_APB_UART6 211 287 #define JHB100_PER0CLK_APB_UART7 212 288 #define JHB100_PER0CLK_APB_UART8 213 289 #define JHB100_PER0CLK_APB_UART9 214 290 #define JHB100_PER0CLK_APB_UART10 215 291 #define JHB100_PER0CLK_APB_UART11 216 292 #define JHB100_PER0CLK_APB_UART12 217 293 #define JHB100_PER0CLK_APB_UART13 218 294 #define JHB100_PER0CLK_APB_UART14 219 295 #define JHB100_PER0CLK_DMA_I3C0 220 296 #define JHB100_PER0CLK_DMA_I3C1 221 297 #define JHB100_PER0CLK_DMA_I3C2 222 298 #define JHB100_PER0CLK_DMA_I3C3 223 299 #define JHB100_PER0CLK_DMA_I3C4 224 300 #define JHB100_PER0CLK_DMA_I3C5 225 301 #define JHB100_PER0CLK_DMA_I3C6 226 302 #define JHB100_PER0CLK_DMA_I3C7 227 303 #define JHB100_PER0CLK_DMA_I3C8 228 304 #define JHB100_PER0CLK_DMA_I3C9 229 305 #define JHB100_PER0CLK_DMA_I3C10 230 306 #define JHB100_PER0CLK_DMA_I3C11 231 307 #define JHB100_PER0CLK_DMA_I3C12 232 308 #define JHB100_PER0CLK_DMA_I3C13 233 309 #define JHB100_PER0CLK_DMA_I3C14 234 310 #define JHB100_PER0CLK_DMA_I3C15 235 311 #define JHB100_PER0CLK_CORE_I3C0 236 312 #define JHB100_PER0CLK_CORE_I3C1 237 313 #define JHB100_PER0CLK_CORE_I3C2 238 314 #define JHB100_PER0CLK_CORE_I3C3 239 315 #define JHB100_PER0CLK_CORE_I3C4 240 316 #define JHB100_PER0CLK_CORE_I3C5 241 317 #define JHB100_PER0CLK_CORE_I3C6 242 318 #define JHB100_PER0CLK_CORE_I3C7 243 319 #define JHB100_PER0CLK_CORE_I3C8 244 320 #define JHB100_PER0CLK_CORE_I3C9 245 321 #define JHB100_PER0CLK_CORE_I3C10 246 322 #define JHB100_PER0CLK_CORE_I3C11 247 323 #define JHB100_PER0CLK_CORE_I3C12 248 324 #define JHB100_PER0CLK_CORE_I3C13 249 325 #define JHB100_PER0CLK_CORE_I3C14 250 326 #define JHB100_PER0CLK_CORE_I3C15 251 327 #define JHB100_PER0CLK_DMAC_AXI_PERIPH0_HS_CLK_I2C 252 328 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C0 253 329 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C1 254 330 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C2 255 331 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C3 256 332 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C4 257 333 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C5 258 334 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C6 259 335 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C7 260 336 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C8 261 337 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C9 262 338 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C10 263 339 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C11 264 340 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C12 265 341 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C13 266 342 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C14 267 343 #define JHB100_PER0CLK_MAIN_ICG_EN_I3C15 268 344 #define JHB100_PER0CLK_MAIN_ICG_EN_DUALTIMER0 269 345 #define JHB100_PER0CLK_MAIN_ICG_EN_DUALTIMER1 270 346 #define JHB100_PER0CLK_MAIN_ICG_EN_DUALTIMER2 271 347 #define JHB100_PER0CLK_MAIN_ICG_EN_LTPI0 272 348 #define JHB100_PER0CLK_MAIN_ICG_EN_LTPI1 273 349 #define JHB100_PER0CLK_MAIN_ICG_EN_DMAC_I2C 274 350 #define JHB100_PER0CLK_MAIN_ICG_EN_DMAC_I3C 275 351 #define JHB100_PER0CLK_MAIN_ICG_EN_DMAC_UART 276 352 #define JHB100_PER0CLK_MAIN_ICG_EN_SOL4 277 353 #define JHB100_PER0CLK_MAIN_ICG_EN_SOL5 278 354 #define JHB100_PER0CLK_MAIN_ICG_EN_SOL6 279 355 #define JHB100_PER0CLK_MAIN_ICG_EN_SOL7 280 356 #define JHB100_PER0CLK_MAIN_ICG_EN_SOL8 281 357 #define JHB100_PER0CLK_MAIN_ICG_EN_SOL9 282 358 #define JHB100_PER0CLK_MAIN_ICG_EN_SOL10 283 359 #define JHB100_PER0CLK_MAIN_ICG_EN_SOL11 284 360 #define JHB100_PER0CLK_MAIN_ICG_EN_SOL12 285 361 #define JHB100_PER0CLK_MAIN_ICG_EN_SOL13 286 362 #define JHB100_PER0CLK_MAIN_ICG_EN_SOL14 287 363 364 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C0 304 365 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C1 305 366 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C2 306 367 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C3 307 368 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C4 308 369 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C5 309 370 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C6 310 371 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C7 311 372 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C8 312 373 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C9 313 374 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C10 314 375 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C11 315 376 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C12 316 377 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C13 317 378 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C14 318 379 #define JHB100_PER0CLK_MAIN_ICG_EN_I2C15 319 380 #define JHB100_PER0CLK_MAIN_ICG_EN_WDT0 320 381 #define JHB100_PER0CLK_MAIN_ICG_EN_WDT1 321 382 #define JHB100_PER0CLK_MAIN_ICG_EN_WDT2 322 383 #define JHB100_PER0CLK_MAIN_ICG_EN_WDT3 323 384 #define JHB100_PER0CLK_MAIN_ICG_EN_WDT_EXTERNAL 324 385 #define JHB100_PER0CLK_MAIN_ICG_EN_UART4 325 386 #define JHB100_PER0CLK_MAIN_ICG_EN_UART5 326 387 #define JHB100_PER0CLK_MAIN_ICG_EN_UART6 327 388 #define JHB100_PER0CLK_MAIN_ICG_EN_UART7 328 389 #define JHB100_PER0CLK_MAIN_ICG_EN_UART8 329 390 #define JHB100_PER0CLK_MAIN_ICG_EN_UART9 330 391 #define JHB100_PER0CLK_MAIN_ICG_EN_UART10 331 392 #define JHB100_PER0CLK_MAIN_ICG_EN_UART11 332 393 #define JHB100_PER0CLK_MAIN_ICG_EN_UART12 333 394 #define JHB100_PER0CLK_MAIN_ICG_EN_UART13 334 395 #define JHB100_PER0CLK_MAIN_ICG_EN_UART14 335 396 #define JHB100_PER0CLK_MAIN_ICG_EN_LDO0 336 397 #define JHB100_PER0CLK_MAIN_ICG_EN_LDO1 337 398 #define JHB100_PER0CLK_MAIN_ICG_EN_SENSORS_PERIPH0 338 399 #define JHB100_PER0CLK_MAIN_ICG_EN_SENSORS_DMAC 339 400 #define JHB100_PER0CLK_MAIN_ICG_EN_TRNG 340 401 402 /* PER1CRG clocks */ 403 #define JHB100_PER1CLK_100 0 404 #define JHB100_PER1CLK_1 1 405 #define JHB100_PER1CLK_200_DIVN0 2 406 #define JHB100_PER1CLK_200_DIVN1 3 407 #define JHB100_PER1CLK_200_DIVN2 4 408 #define JHB100_PER1CLK_200_DIVN3 5 409 #define JHB100_PER1CLK_200_CCLK_DIV 6 410 411 #define JHB100_PER1CLK_SGPIO0_PCLK 15 412 #define JHB100_PER1CLK_SGPIO0_DCLK 16 413 #define JHB100_PER1CLK_SGPIO1_PCLK 17 414 #define JHB100_PER1CLK_SGPIO1_DCLK 18 415 416 #define JHB100_PER1CLK_EMMC0_BCLK 22 417 418 #define JHB100_PER1CLK_EMMC0_CCLK 25 419 420 #define JHB100_PER1CLK_DMAC1_1CH_CORE 29 421 422 #define JHB100_PER1CLK_DMAC1_1CH_ACLK 31 423 424 #define JHB100_PER1CLK_DMAC2_1CH_CORE 33 425 426 #define JHB100_PER1CLK_DMAC2_1CH_ACLK 35 427 428 #define JHB100_PER1CLK_DMAC3_1CH_CORE 37 429 430 #define JHB100_PER1CLK_DMAC3_1CH_ACLK 39 431 432 #define JHB100_PER1CLK_DMAC0_2CH_CORE 41 433 434 #define JHB100_PER1CLK_DMAC0_2CH_ACLK 43 435 436 #define JHB100_PER1CLK_UFS_REF 45 437 #define JHB100_PER1CLK_UFS_300 46 438 #define JHB100_PER1CLK_UFS_150 47 439 #define JHB100_PER1CLK_UFS_400 48 440 #define JHB100_PER1CLK_UFS_75 49 441 #define JHB100_PER1CLK_UFS_37_5 50 442 #define JHB100_PER1CLK_UFS_7_5 51 443 #define JHB100_PER1CLK_UFS_1_875 52 444 #define JHB100_PER1CLK_UFS_7_143 53 445 #define JHB100_PER1CLK_UFS_3_5715 54 446 447 #define JHB100_PER1CLK_MAIN_ICG_EN_SFC0 63 448 #define JHB100_PER1CLK_MAIN_ICG_EN_SFC1 64 449 #define JHB100_PER1CLK_MAIN_ICG_EN_SFC2 65 450 #define JHB100_PER1CLK_MAIN_ICG_EN_SPI0 66 451 #define JHB100_PER1CLK_MAIN_ICG_EN_SGPIO0 67 452 #define JHB100_PER1CLK_MAIN_ICG_EN_SGPIO1 68 453 #define JHB100_PER1CLK_MAIN_ICG_EN_SENSORS_PERIPH1 69 454 #define JHB100_PER1CLK_MAIN_ICG_EN_EMMC0 70 455 #define JHB100_PER1CLK_MAIN_ICG_EN_DMAC_SFC0 71 456 #define JHB100_PER1CLK_MAIN_ICG_EN_DMAC_SFC1 72 457 #define JHB100_PER1CLK_MAIN_ICG_EN_DMAC_SFC2 73 458 #define JHB100_PER1CLK_MAIN_ICG_EN_DMAC_SPI0 74 459 #define JHB100_PER1CLK_MAIN_ICG_EN_RAS 75 460 #define JHB100_PER1CLK_MAIN_ICG_EN_UFS 76 461 462 /* PER2CRG clocks */ 463 #define JHB100_PER2CLK_300 0 464 #define JHB100_PER2CLK_100 1 465 #define JHB100_PER2CLK_50 2 466 #define JHB100_PER2CLK_GMAC2_RMII_50 3 467 #define JHB100_PER2CLK_CAN0_CORE_DIV 4 468 #define JHB100_PER2CLK_CAN1_CORE_DIV 5 469 #define JHB100_PER2CLK_CAN0_TIMER 6 470 #define JHB100_PER2CLK_CAN1_TIMER 7 471 472 #define JHB100_PER2CLK_RTC_CORE_DIV 11 473 #define JHB100_PER2CLK_GMAC2_RMII_MUX_DLY 12 474 #define JHB100_PER2CLK_GMAC2_RMII_DIV 13 475 476 #define JHB100_PER2CLK_GMAC2_RGMII_125_MUX 15 477 #define JHB100_PER2CLK_GMAC2_RGMII_DIV 16 478 #define JHB100_PER2CLK_GMAC2_TX_MUX 17 479 #define JHB100_PER2CLK_GMAC2_TX_180_BUF 18 480 #define JHB100_PER2CLK_GMAC2_RX_MUX_DLY 19 481 #define JHB100_PER2CLK_GMAC2_RX_180_BUF 20 482 #define JHB100_PER2CLK_GMAC2_TXCK_MUX_DLY 21 483 #define JHB100_PER2CLK_GMAC3_TX_125_MUX 22 484 #define JHB100_PER2CLK_GMAC3_RX_125_MUX 23 485 #define JHB100_PER2CLK_GMAC3_TX_DIV 24 486 #define JHB100_PER2CLK_GMAC3_RX_DIV 25 487 #define JHB100_PER2CLK_SENSORS_PERIPH2 26 488 489 #define JHB100_PER2CLK_FAN_TACH_PCLK 33 490 491 #define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_TX_I 44 492 #define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_RX_I 45 493 #define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_TX_180_I 46 494 #define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_RX_180_I 47 495 #define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_PTP_REF_I 48 496 #define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_RMII_I 49 497 #define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_CSR_I 50 498 #define JHB100_PER2CLK_ETHER0_RMIIANDRGMII_ACLK_I 51 499 #define JHB100_PER2CLK_RMIIANDRGMII_IOMUX_GMAC2_TXCK 52 500 #define JHB100_PER2CLK_ETHER1_SGMII_TX_I 53 501 #define JHB100_PER2CLK_ETHER1_SGMII_RX_I 54 502 #define JHB100_PER2CLK_ETHER1_SGMII_TX_125_I 55 503 #define JHB100_PER2CLK_ETHER1_SGMII_RX_125_I 56 504 #define JHB100_PER2CLK_ETHER1_SGMII_PTP_REF_I 57 505 #define JHB100_PER2CLK_ETHER1_SGMII_CSR_I 58 506 #define JHB100_PER2CLK_ETHER1_SGMII_ACLK_I 59 507 #define JHB100_PER2CLK_ETHER1_SGMII_PHY_PCLK_I 60 508 #define JHB100_PER2CLK_ETHER1_SGMII_REF_25_I 61 509 #define JHB100_PER2CLK_MAIN_ICG_EN_CAN0 62 510 #define JHB100_PER2CLK_MAIN_ICG_EN_CAN1 63 511 512 #define JHB100_PER2CLK_MAIN_ICG_EN_DMAC_8CH 65 513 #define JHB100_PER2CLK_MAIN_ICG_EN_RTC_SCAN 66 514 #define JHB100_PER2CLK_MAIN_ICG_EN_ADC0 67 515 #define JHB100_PER2CLK_MAIN_ICG_EN_ADC1 68 516 #define JHB100_PER2CLK_MAIN_ICG_EN_GMAC2 69 517 #define JHB100_PER2CLK_MAIN_ICG_EN_GMAC3 70 518 519 /* PER3CRG clocks */ 520 #define JHB100_PER3CLK_300 0 521 #define JHB100_PER3CLK_200 1 522 #define JHB100_PER3CLK_GMAC1_PTP_REF 2 523 #define JHB100_PER3CLK_GMAC1_TX_125_MUX 3 524 #define JHB100_PER3CLK_GMAC1_TX 4 525 #define JHB100_PER3CLK_GMAC1_RX_125_MUX 5 526 #define JHB100_PER3CLK_GMAC1_RX 6 527 #define JHB100_PER3CLK_GMAC0_PTP_REF 7 528 #define JHB100_PER3CLK_GMAC0_RMII_PLL 8 529 #define JHB100_PER3CLK_GMAC0_RMII_MUX 9 530 #define JHB100_PER3CLK_GMAC0_RMII_MUX_DIV2 10 531 532 #define JHB100_PER3CLK_ETHER0_RMII_CLK_TX_I 17 533 #define JHB100_PER3CLK_ETHER0_RMII_CLK_RX_I 18 534 #define JHB100_PER3CLK_ETHER0_RMII_CLK_PTP_REF_I 19 535 #define JHB100_PER3CLK_ETHER0_RMII_CLK_RMII_I 20 536 #define JHB100_PER3CLK_ETHER0_RMII_CLK_CSR_I 21 537 #define JHB100_PER3CLK_ETHER0_RMII_ACLK_I 22 538 #define JHB100_PER3CLK_GMAC0_RMII_RCLKO 23 539 #define JHB100_PER3CLK_ETHER0_SGMII_CLK_TX_I 24 540 #define JHB100_PER3CLK_ETHER0_SGMII_CLK_RX_I 25 541 #define JHB100_PER3CLK_ETHER0_SGMII_CLK_TX_125_I 26 542 #define JHB100_PER3CLK_ETHER0_SGMII_CLK_RX_125_I 27 543 #define JHB100_PER3CLK_ETHER0_SGMII_CLK_PTP_REF_I 28 544 #define JHB100_PER3CLK_ETHER0_SGMII_CLK_REF_25_I 29 545 #define JHB100_PER3CLK_ETHER0_SGMII_CLK_CSR_I 30 546 #define JHB100_PER3CLK_ETHER0_SGMII_ACLK_I 31 547 #define JHB100_PER3CLK_ETHER0_SGMII_PHY_PCLK_I 32 548 #define JHB100_PER3CLK_MAIN_ICG_EN_SENSORS_PERIPH3 33 549 #define JHB100_PER3CLK_MAIN_ICG_EN_PECI0 34 550 #define JHB100_PER3CLK_MAIN_ICG_EN_PECI1 35 551 #define JHB100_PER3CLK_MAIN_ICG_EN_GMAC0 36 552 #define JHB100_PER3CLK_MAIN_ICG_EN_GMAC1 37 553 554 #endif /* __DT_BINDINGS_CLOCK_STARFIVE_JHB100_H__ */ 555