xref: /linux/include/dt-bindings/clock/qcom,x1p42100-videocc.h (revision 2ed2e359dea752e7758d29a423033031a0b96584)
1*9ae38c69SJagadeesh Kona /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*9ae38c69SJagadeesh Kona /*
3*9ae38c69SJagadeesh Kona  * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
4*9ae38c69SJagadeesh Kona  */
5*9ae38c69SJagadeesh Kona 
6*9ae38c69SJagadeesh Kona #ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_X1P42100_H
7*9ae38c69SJagadeesh Kona #define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_X1P42100_H
8*9ae38c69SJagadeesh Kona 
9*9ae38c69SJagadeesh Kona /* VIDEO_CC clocks */
10*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS0_CLK					0
11*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS0_CLK_SRC					1
12*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS0_DIV_CLK_SRC				2
13*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS0C_CLK					3
14*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC				4
15*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS1_CLK					5
16*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS1_CLK_SRC					6
17*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS1_DIV_CLK_SRC				7
18*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS1C_CLK					8
19*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS1C_DIV2_DIV_CLK_SRC				9
20*9ae38c69SJagadeesh Kona #define VIDEO_CC_PLL0						10
21*9ae38c69SJagadeesh Kona #define VIDEO_CC_PLL1						11
22*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS0_SHIFT_CLK					12
23*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS0C_SHIFT_CLK				13
24*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS1_SHIFT_CLK					14
25*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS1C_SHIFT_CLK				15
26*9ae38c69SJagadeesh Kona #define VIDEO_CC_XO_CLK_SRC					16
27*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS0_BSE_CLK					17
28*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS0_BSE_CLK_SRC				18
29*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS0_BSE_DIV4_DIV_CLK_SRC			19
30*9ae38c69SJagadeesh Kona 
31*9ae38c69SJagadeesh Kona /* VIDEO_CC power domains */
32*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS0C_GDSC					0
33*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS0_GDSC					1
34*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS1C_GDSC					2
35*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS1_GDSC					3
36*9ae38c69SJagadeesh Kona 
37*9ae38c69SJagadeesh Kona /* VIDEO_CC resets */
38*9ae38c69SJagadeesh Kona #define CVP_VIDEO_CC_INTERFACE_BCR				0
39*9ae38c69SJagadeesh Kona #define CVP_VIDEO_CC_MVS0_BCR					1
40*9ae38c69SJagadeesh Kona #define CVP_VIDEO_CC_MVS0C_BCR					2
41*9ae38c69SJagadeesh Kona #define CVP_VIDEO_CC_MVS1_BCR					3
42*9ae38c69SJagadeesh Kona #define CVP_VIDEO_CC_MVS1C_BCR					4
43*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS0C_CLK_ARES					5
44*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS1C_CLK_ARES					6
45*9ae38c69SJagadeesh Kona #define VIDEO_CC_XO_CLK_ARES					7
46*9ae38c69SJagadeesh Kona #define VIDEO_CC_MVS0_BSE_BCR					8
47*9ae38c69SJagadeesh Kona 
48*9ae38c69SJagadeesh Kona #endif
49