1*3590dfbdSTaniya Das /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*3590dfbdSTaniya Das /* 3*3590dfbdSTaniya Das * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 4*3590dfbdSTaniya Das */ 5*3590dfbdSTaniya Das 6*3590dfbdSTaniya Das #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_QCS615_H 7*3590dfbdSTaniya Das #define _DT_BINDINGS_CLK_QCOM_GPU_CC_QCS615_H 8*3590dfbdSTaniya Das 9*3590dfbdSTaniya Das /* GPU_CC clocks */ 10*3590dfbdSTaniya Das #define CRC_DIV_PLL0 0 11*3590dfbdSTaniya Das #define CRC_DIV_PLL1 1 12*3590dfbdSTaniya Das #define GPU_CC_PLL0 2 13*3590dfbdSTaniya Das #define GPU_CC_PLL1 3 14*3590dfbdSTaniya Das #define GPU_CC_CRC_AHB_CLK 4 15*3590dfbdSTaniya Das #define GPU_CC_CX_GFX3D_CLK 5 16*3590dfbdSTaniya Das #define GPU_CC_CX_GFX3D_SLV_CLK 6 17*3590dfbdSTaniya Das #define GPU_CC_CX_GMU_CLK 7 18*3590dfbdSTaniya Das #define GPU_CC_CX_SNOC_DVM_CLK 8 19*3590dfbdSTaniya Das #define GPU_CC_CXO_AON_CLK 9 20*3590dfbdSTaniya Das #define GPU_CC_CXO_CLK 10 21*3590dfbdSTaniya Das #define GPU_CC_GMU_CLK_SRC 11 22*3590dfbdSTaniya Das #define GPU_CC_GX_GFX3D_CLK 12 23*3590dfbdSTaniya Das #define GPU_CC_GX_GFX3D_CLK_SRC 13 24*3590dfbdSTaniya Das #define GPU_CC_GX_GMU_CLK 14 25*3590dfbdSTaniya Das #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 15 26*3590dfbdSTaniya Das #define GPU_CC_SLEEP_CLK 16 27*3590dfbdSTaniya Das 28*3590dfbdSTaniya Das /* GPU_CC power domains */ 29*3590dfbdSTaniya Das #define CX_GDSC 0 30*3590dfbdSTaniya Das #define GX_GDSC 1 31*3590dfbdSTaniya Das 32*3590dfbdSTaniya Das /* GPU_CC resets */ 33*3590dfbdSTaniya Das #define GPU_CC_CX_BCR 0 34*3590dfbdSTaniya Das #define GPU_CC_GFX3D_AON_BCR 1 35*3590dfbdSTaniya Das #define GPU_CC_GMU_BCR 2 36*3590dfbdSTaniya Das #define GPU_CC_GX_BCR 3 37*3590dfbdSTaniya Das #define GPU_CC_XO_BCR 4 38*3590dfbdSTaniya Das 39*3590dfbdSTaniya Das #endif 40