1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_QCS615_H 7 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_QCS615_H 8 9 /* GPU_CC clocks */ 10 #define CRC_DIV_PLL0 0 11 #define CRC_DIV_PLL1 1 12 #define GPU_CC_PLL0 2 13 #define GPU_CC_PLL1 3 14 #define GPU_CC_CRC_AHB_CLK 4 15 #define GPU_CC_CX_GFX3D_CLK 5 16 #define GPU_CC_CX_GFX3D_SLV_CLK 6 17 #define GPU_CC_CX_GMU_CLK 7 18 #define GPU_CC_CX_SNOC_DVM_CLK 8 19 #define GPU_CC_CXO_AON_CLK 9 20 #define GPU_CC_CXO_CLK 10 21 #define GPU_CC_GMU_CLK_SRC 11 22 #define GPU_CC_GX_GFX3D_CLK 12 23 #define GPU_CC_GX_GFX3D_CLK_SRC 13 24 #define GPU_CC_GX_GMU_CLK 14 25 #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 15 26 #define GPU_CC_SLEEP_CLK 16 27 28 /* GPU_CC power domains */ 29 #define CX_GDSC 0 30 #define GX_GDSC 1 31 32 /* GPU_CC resets */ 33 #define GPU_CC_CX_BCR 0 34 #define GPU_CC_GFX3D_AON_BCR 1 35 #define GPU_CC_GMU_BCR 2 36 #define GPU_CC_GX_BCR 3 37 #define GPU_CC_XO_BCR 4 38 39 #endif 40