xref: /linux/include/dt-bindings/clock/qcom,milos-videocc.h (revision 8d2b0853add1d7534dc0794e3c8e0b9e8c4ec640)
1*a4937e97SLuca Weiss /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*a4937e97SLuca Weiss /*
3*a4937e97SLuca Weiss  * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
4*a4937e97SLuca Weiss  * Copyright (c) 2025, Luca Weiss <luca.weiss@fairphone.com>
5*a4937e97SLuca Weiss  */
6*a4937e97SLuca Weiss 
7*a4937e97SLuca Weiss #ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_MILOS_H
8*a4937e97SLuca Weiss #define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_MILOS_H
9*a4937e97SLuca Weiss 
10*a4937e97SLuca Weiss /* VIDEO_CC clocks */
11*a4937e97SLuca Weiss #define VIDEO_CC_PLL0						0
12*a4937e97SLuca Weiss #define VIDEO_CC_AHB_CLK					1
13*a4937e97SLuca Weiss #define VIDEO_CC_AHB_CLK_SRC					2
14*a4937e97SLuca Weiss #define VIDEO_CC_MVS0_CLK					3
15*a4937e97SLuca Weiss #define VIDEO_CC_MVS0_CLK_SRC					4
16*a4937e97SLuca Weiss #define VIDEO_CC_MVS0_DIV_CLK_SRC				5
17*a4937e97SLuca Weiss #define VIDEO_CC_MVS0_SHIFT_CLK					6
18*a4937e97SLuca Weiss #define VIDEO_CC_MVS0C_CLK					7
19*a4937e97SLuca Weiss #define VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC				8
20*a4937e97SLuca Weiss #define VIDEO_CC_MVS0C_SHIFT_CLK				9
21*a4937e97SLuca Weiss #define VIDEO_CC_SLEEP_CLK					10
22*a4937e97SLuca Weiss #define VIDEO_CC_SLEEP_CLK_SRC					11
23*a4937e97SLuca Weiss #define VIDEO_CC_XO_CLK						12
24*a4937e97SLuca Weiss #define VIDEO_CC_XO_CLK_SRC					13
25*a4937e97SLuca Weiss 
26*a4937e97SLuca Weiss /* VIDEO_CC resets */
27*a4937e97SLuca Weiss #define VIDEO_CC_INTERFACE_BCR					0
28*a4937e97SLuca Weiss #define VIDEO_CC_MVS0_BCR					1
29*a4937e97SLuca Weiss #define VIDEO_CC_MVS0C_CLK_ARES					2
30*a4937e97SLuca Weiss #define VIDEO_CC_MVS0C_BCR					3
31*a4937e97SLuca Weiss 
32*a4937e97SLuca Weiss /* VIDEO_CC power domains */
33*a4937e97SLuca Weiss #define VIDEO_CC_MVS0_GDSC					0
34*a4937e97SLuca Weiss #define VIDEO_CC_MVS0C_GDSC					1
35*a4937e97SLuca Weiss 
36*a4937e97SLuca Weiss #endif
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