xref: /linux/include/dt-bindings/clock/qcom,milos-videocc.h (revision 8d2b0853add1d7534dc0794e3c8e0b9e8c4ec640)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /*
3  * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved.
4  * Copyright (c) 2025, Luca Weiss <luca.weiss@fairphone.com>
5  */
6 
7 #ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_MILOS_H
8 #define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_MILOS_H
9 
10 /* VIDEO_CC clocks */
11 #define VIDEO_CC_PLL0						0
12 #define VIDEO_CC_AHB_CLK					1
13 #define VIDEO_CC_AHB_CLK_SRC					2
14 #define VIDEO_CC_MVS0_CLK					3
15 #define VIDEO_CC_MVS0_CLK_SRC					4
16 #define VIDEO_CC_MVS0_DIV_CLK_SRC				5
17 #define VIDEO_CC_MVS0_SHIFT_CLK					6
18 #define VIDEO_CC_MVS0C_CLK					7
19 #define VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC				8
20 #define VIDEO_CC_MVS0C_SHIFT_CLK				9
21 #define VIDEO_CC_SLEEP_CLK					10
22 #define VIDEO_CC_SLEEP_CLK_SRC					11
23 #define VIDEO_CC_XO_CLK						12
24 #define VIDEO_CC_XO_CLK_SRC					13
25 
26 /* VIDEO_CC resets */
27 #define VIDEO_CC_INTERFACE_BCR					0
28 #define VIDEO_CC_MVS0_BCR					1
29 #define VIDEO_CC_MVS0C_CLK_ARES					2
30 #define VIDEO_CC_MVS0C_BCR					3
31 
32 /* VIDEO_CC power domains */
33 #define VIDEO_CC_MVS0_GDSC					0
34 #define VIDEO_CC_MVS0C_GDSC					1
35 
36 #endif
37