1*4aff230cSTaniya Das /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*4aff230cSTaniya Das /* 3*4aff230cSTaniya Das * Copyright (c) 2025, Qualcomm Technologies, Inc. and/or its subsidiaries. 4*4aff230cSTaniya Das */ 5*4aff230cSTaniya Das 6*4aff230cSTaniya Das #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_GLYMUR_H 7*4aff230cSTaniya Das #define _DT_BINDINGS_CLK_QCOM_GPU_CC_GLYMUR_H 8*4aff230cSTaniya Das 9*4aff230cSTaniya Das /* GPU_CC clocks */ 10*4aff230cSTaniya Das #define GPU_CC_AHB_CLK 0 11*4aff230cSTaniya Das #define GPU_CC_CB_CLK 1 12*4aff230cSTaniya Das #define GPU_CC_CX_ACCU_SHIFT_CLK 2 13*4aff230cSTaniya Das #define GPU_CC_CX_FF_CLK 3 14*4aff230cSTaniya Das #define GPU_CC_CX_GMU_CLK 4 15*4aff230cSTaniya Das #define GPU_CC_CXO_AON_CLK 5 16*4aff230cSTaniya Das #define GPU_CC_CXO_CLK 6 17*4aff230cSTaniya Das #define GPU_CC_DEMET_CLK 7 18*4aff230cSTaniya Das #define GPU_CC_DPM_CLK 8 19*4aff230cSTaniya Das #define GPU_CC_FF_CLK_SRC 9 20*4aff230cSTaniya Das #define GPU_CC_FREQ_MEASURE_CLK 10 21*4aff230cSTaniya Das #define GPU_CC_GMU_CLK_SRC 11 22*4aff230cSTaniya Das #define GPU_CC_GPU_SMMU_VOTE_CLK 12 23*4aff230cSTaniya Das #define GPU_CC_GX_ACCU_SHIFT_CLK 13 24*4aff230cSTaniya Das #define GPU_CC_GX_ACD_AHB_FF_CLK 14 25*4aff230cSTaniya Das #define GPU_CC_GX_AHB_FF_CLK 15 26*4aff230cSTaniya Das #define GPU_CC_GX_GMU_CLK 16 27*4aff230cSTaniya Das #define GPU_CC_GX_RCG_AHB_FF_CLK 17 28*4aff230cSTaniya Das #define GPU_CC_HUB_AON_CLK 18 29*4aff230cSTaniya Das #define GPU_CC_HUB_CLK_SRC 19 30*4aff230cSTaniya Das #define GPU_CC_HUB_CX_INT_CLK 20 31*4aff230cSTaniya Das #define GPU_CC_HUB_DIV_CLK_SRC 21 32*4aff230cSTaniya Das #define GPU_CC_MEMNOC_GFX_CLK 22 33*4aff230cSTaniya Das #define GPU_CC_PLL0 23 34*4aff230cSTaniya Das #define GPU_CC_PLL0_OUT_EVEN 24 35*4aff230cSTaniya Das #define GPU_CC_RSCC_HUB_AON_CLK 25 36*4aff230cSTaniya Das #define GPU_CC_RSCC_XO_AON_CLK 26 37*4aff230cSTaniya Das #define GPU_CC_SLEEP_CLK 27 38*4aff230cSTaniya Das 39*4aff230cSTaniya Das /* GPU_CC power domains */ 40*4aff230cSTaniya Das #define GPU_CC_CX_GDSC 0 41*4aff230cSTaniya Das 42*4aff230cSTaniya Das /* GPU_CC resets */ 43*4aff230cSTaniya Das #define GPU_CC_CB_BCR 0 44*4aff230cSTaniya Das #define GPU_CC_CX_BCR 1 45*4aff230cSTaniya Das #define GPU_CC_FAST_HUB_BCR 2 46*4aff230cSTaniya Das #define GPU_CC_FF_BCR 3 47*4aff230cSTaniya Das #define GPU_CC_GMU_BCR 4 48*4aff230cSTaniya Das #define GPU_CC_GX_BCR 5 49*4aff230cSTaniya Das #define GPU_CC_XO_BCR 6 50*4aff230cSTaniya Das 51*4aff230cSTaniya Das #endif 52