1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (c) 2025, Qualcomm Technologies, Inc. and/or its subsidiaries. 4 */ 5 6 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_GLYMUR_H 7 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_GLYMUR_H 8 9 /* GPU_CC clocks */ 10 #define GPU_CC_AHB_CLK 0 11 #define GPU_CC_CB_CLK 1 12 #define GPU_CC_CX_ACCU_SHIFT_CLK 2 13 #define GPU_CC_CX_FF_CLK 3 14 #define GPU_CC_CX_GMU_CLK 4 15 #define GPU_CC_CXO_AON_CLK 5 16 #define GPU_CC_CXO_CLK 6 17 #define GPU_CC_DEMET_CLK 7 18 #define GPU_CC_DPM_CLK 8 19 #define GPU_CC_FF_CLK_SRC 9 20 #define GPU_CC_FREQ_MEASURE_CLK 10 21 #define GPU_CC_GMU_CLK_SRC 11 22 #define GPU_CC_GPU_SMMU_VOTE_CLK 12 23 #define GPU_CC_GX_ACCU_SHIFT_CLK 13 24 #define GPU_CC_GX_ACD_AHB_FF_CLK 14 25 #define GPU_CC_GX_AHB_FF_CLK 15 26 #define GPU_CC_GX_GMU_CLK 16 27 #define GPU_CC_GX_RCG_AHB_FF_CLK 17 28 #define GPU_CC_HUB_AON_CLK 18 29 #define GPU_CC_HUB_CLK_SRC 19 30 #define GPU_CC_HUB_CX_INT_CLK 20 31 #define GPU_CC_HUB_DIV_CLK_SRC 21 32 #define GPU_CC_MEMNOC_GFX_CLK 22 33 #define GPU_CC_PLL0 23 34 #define GPU_CC_PLL0_OUT_EVEN 24 35 #define GPU_CC_RSCC_HUB_AON_CLK 25 36 #define GPU_CC_RSCC_XO_AON_CLK 26 37 #define GPU_CC_SLEEP_CLK 27 38 39 /* GPU_CC power domains */ 40 #define GPU_CC_CX_GDSC 0 41 42 /* GPU_CC resets */ 43 #define GPU_CC_CB_BCR 0 44 #define GPU_CC_CX_BCR 1 45 #define GPU_CC_FAST_HUB_BCR 2 46 #define GPU_CC_FF_BCR 3 47 #define GPU_CC_GMU_BCR 4 48 #define GPU_CC_GX_BCR 5 49 #define GPU_CC_XO_BCR 6 50 51 #endif 52