xref: /linux/include/dt-bindings/clock/qcom,sm8750-gpucc.h (revision 0fc8f6200d2313278fbf4539bbab74677c685531)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /*
3  * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
4  */
5 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8750_H
6 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8750_H
7 
8 /* GPU_CC clocks */
9 #define GPU_CC_AHB_CLK						0
10 #define GPU_CC_CB_CLK						1
11 #define GPU_CC_CX_ACCU_SHIFT_CLK				2
12 #define GPU_CC_CX_FF_CLK					3
13 #define GPU_CC_CX_GMU_CLK					4
14 #define GPU_CC_CXO_AON_CLK					5
15 #define GPU_CC_CXO_CLK						6
16 #define GPU_CC_DEMET_CLK					7
17 #define GPU_CC_DPM_CLK						8
18 #define GPU_CC_FF_CLK_SRC					9
19 #define GPU_CC_FREQ_MEASURE_CLK					10
20 #define GPU_CC_GMU_CLK_SRC					11
21 #define GPU_CC_GX_ACCU_SHIFT_CLK				12
22 #define GPU_CC_GX_ACD_AHB_FF_CLK				13
23 #define GPU_CC_GX_AHB_FF_CLK					14
24 #define GPU_CC_GX_GMU_CLK					15
25 #define GPU_CC_GX_RCG_AHB_FF_CLK				16
26 #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK				17
27 #define GPU_CC_HUB_AON_CLK					18
28 #define GPU_CC_HUB_CLK_SRC					19
29 #define GPU_CC_HUB_CX_INT_CLK					20
30 #define GPU_CC_HUB_DIV_CLK_SRC					21
31 #define GPU_CC_MEMNOC_GFX_CLK					22
32 #define GPU_CC_PLL0						23
33 #define GPU_CC_PLL0_OUT_EVEN					24
34 #define GPU_CC_RSCC_HUB_AON_CLK					25
35 #define GPU_CC_RSCC_XO_AON_CLK					26
36 #define GPU_CC_SLEEP_CLK					27
37 
38 /* GPU_CC power domains */
39 #define GPU_CC_CX_GDSC						0
40 
41 /* GPU_CC resets */
42 #define GPU_CC_GPU_CC_CB_BCR					0
43 #define GPU_CC_GPU_CC_CX_BCR					1
44 #define GPU_CC_GPU_CC_FAST_HUB_BCR				2
45 #define GPU_CC_GPU_CC_FF_BCR					3
46 #define GPU_CC_GPU_CC_GMU_BCR					4
47 #define GPU_CC_GPU_CC_GX_BCR					5
48 #define GPU_CC_GPU_CC_XO_BCR					6
49 
50 #endif
51