xref: /linux/include/dt-bindings/clock/qcom,nord-gpucc.h (revision 502d45774af09f1c681c754c4b7cdfb5d7f72fd9)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /*
3  * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
4  */
5 
6 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_NORD_H
7 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_NORD_H
8 
9 /* GPU_CC clocks */
10 #define GPU_CC_ACD_GFX3D_CLK					0
11 #define GPU_CC_ACMU_CLK						1
12 #define GPU_CC_AHB_CLK						2
13 #define GPU_CC_CRC_AHB_CLK					3
14 #define GPU_CC_CX_ACCU_SHIFT_CLK				4
15 #define GPU_CC_CX_FF_CLK					5
16 #define GPU_CC_CX_GMU_CLK					6
17 #define GPU_CC_CXO_AON_CLK					7
18 #define GPU_CC_CXO_CLK						8
19 #define GPU_CC_DEMET_CLK					9
20 #define GPU_CC_DPM_CLK						10
21 #define GPU_CC_FF_CLK_SRC					11
22 #define GPU_CC_FREQ_MEASURE_CLK					12
23 #define GPU_CC_GMU_CLK_SRC					13
24 #define GPU_CC_GPU_SMMU_VOTE_CLK				14
25 #define GPU_CC_HUB_AON_CLK					15
26 #define GPU_CC_HUB_CLK_SRC					16
27 #define GPU_CC_HUB_CX_INT_CLK					17
28 #define GPU_CC_HUB_DIV_CLK_SRC					18
29 #define GPU_CC_MEMNOC_GFX_CLK					19
30 #define GPU_CC_MND1X_GFX3D_CLK					20
31 #define GPU_CC_PLL0						21
32 #define GPU_CC_PLL1						22
33 #define GPU_CC_SLEEP_CLK					23
34 
35 /* GPU_CC power domains */
36 #define GPU_CC_CX_GDSC						0
37 #define GPU_CC_GX_GDSC						1
38 
39 /* GPU_CC resets */
40 #define GPU_CC_ACD_BCR						0
41 #define GPU_CC_CB_BCR						1
42 #define GPU_CC_CX_BCR						2
43 #define GPU_CC_FAST_HUB_BCR					3
44 #define GPU_CC_GFX3D_AON_BCR					4
45 #define GPU_CC_GX_BCR						5
46 #define GPU_CC_XO_BCR						6
47 
48 #endif
49