1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. 4 * Copyright (c) 2025, Luca Weiss <luca.weiss@fairphone.com> 5 */ 6 7 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_MILOS_H 8 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_MILOS_H 9 10 /* GPU_CC clocks */ 11 #define GPU_CC_PLL0 0 12 #define GPU_CC_PLL0_OUT_EVEN 1 13 #define GPU_CC_AHB_CLK 2 14 #define GPU_CC_CB_CLK 3 15 #define GPU_CC_CX_ACCU_SHIFT_CLK 4 16 #define GPU_CC_CX_FF_CLK 5 17 #define GPU_CC_CX_GMU_CLK 6 18 #define GPU_CC_CXO_AON_CLK 7 19 #define GPU_CC_CXO_CLK 8 20 #define GPU_CC_DEMET_CLK 9 21 #define GPU_CC_DEMET_DIV_CLK_SRC 10 22 #define GPU_CC_DPM_CLK 11 23 #define GPU_CC_FF_CLK_SRC 12 24 #define GPU_CC_FREQ_MEASURE_CLK 13 25 #define GPU_CC_GMU_CLK_SRC 14 26 #define GPU_CC_GX_ACCU_SHIFT_CLK 15 27 #define GPU_CC_GX_ACD_AHB_FF_CLK 16 28 #define GPU_CC_GX_AHB_FF_CLK 17 29 #define GPU_CC_GX_GMU_CLK 18 30 #define GPU_CC_GX_RCG_AHB_FF_CLK 19 31 #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 20 32 #define GPU_CC_HUB_AON_CLK 21 33 #define GPU_CC_HUB_CLK_SRC 22 34 #define GPU_CC_HUB_CX_INT_CLK 23 35 #define GPU_CC_HUB_DIV_CLK_SRC 24 36 #define GPU_CC_MEMNOC_GFX_CLK 25 37 #define GPU_CC_RSCC_HUB_AON_CLK 26 38 #define GPU_CC_RSCC_XO_AON_CLK 27 39 #define GPU_CC_SLEEP_CLK 28 40 #define GPU_CC_XO_CLK_SRC 29 41 #define GPU_CC_XO_DIV_CLK_SRC 30 42 43 /* GPU_CC resets */ 44 #define GPU_CC_CB_BCR 0 45 #define GPU_CC_CX_BCR 1 46 #define GPU_CC_FAST_HUB_BCR 2 47 #define GPU_CC_FF_BCR 3 48 #define GPU_CC_GMU_BCR 4 49 #define GPU_CC_GX_BCR 5 50 #define GPU_CC_RBCPR_BCR 6 51 #define GPU_CC_XO_BCR 7 52 53 /* GPU_CC power domains */ 54 #define GPU_CC_CX_GDSC 0 55 56 #endif 57