1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4 */ 5 6 #ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_GLYMUR_H 7 #define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_GLYMUR_H 8 9 /* VIDEO_CC clocks */ 10 #define VIDEO_CC_AHB_CLK 0 11 #define VIDEO_CC_AHB_CLK_SRC 1 12 #define VIDEO_CC_MVS0_CLK 2 13 #define VIDEO_CC_MVS0_CLK_SRC 3 14 #define VIDEO_CC_MVS0_DIV_CLK_SRC 4 15 #define VIDEO_CC_MVS0_FREERUN_CLK 5 16 #define VIDEO_CC_MVS0_SHIFT_CLK 6 17 #define VIDEO_CC_MVS0C_CLK 7 18 #define VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC 8 19 #define VIDEO_CC_MVS0C_FREERUN_CLK 9 20 #define VIDEO_CC_MVS0C_SHIFT_CLK 10 21 #define VIDEO_CC_MVS1_CLK 11 22 #define VIDEO_CC_MVS1_DIV_CLK_SRC 12 23 #define VIDEO_CC_MVS1_FREERUN_CLK 13 24 #define VIDEO_CC_MVS1_SHIFT_CLK 14 25 #define VIDEO_CC_PLL0 15 26 #define VIDEO_CC_SLEEP_CLK 16 27 #define VIDEO_CC_SLEEP_CLK_SRC 17 28 #define VIDEO_CC_XO_CLK 18 29 #define VIDEO_CC_XO_CLK_SRC 19 30 31 /* VIDEO_CC power domains */ 32 #define VIDEO_CC_MVS0_GDSC 0 33 #define VIDEO_CC_MVS0C_GDSC 1 34 #define VIDEO_CC_MVS1_GDSC 2 35 36 /* VIDEO_CC resets */ 37 #define VIDEO_CC_INTERFACE_BCR 0 38 #define VIDEO_CC_MVS0_BCR 1 39 #define VIDEO_CC_MVS0C_BCR 2 40 #define VIDEO_CC_MVS0C_FREERUN_CLK_ARES 3 41 #define VIDEO_CC_MVS0_FREERUN_CLK_ARES 4 42 #define VIDEO_CC_MVS1_FREERUN_CLK_ARES 5 43 #define VIDEO_CC_XO_CLK_ARES 6 44 #define VIDEO_CC_MVS1_BCR 7 45 #endif 46