1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (C) 2026 Amlogic, Inc. All rights reserved. 4 */ 5 6 #ifndef __AMLOGIC_A9_SCMI_CLKC_H 7 #define __AMLOGIC_A9_SCMI_CLKC_H 8 9 #define CLKID_GP0_PLL_OSC 0 10 #define CLKID_GP1_PLL_OSC 1 11 #define CLKID_HIFI_PLL_OSC 2 12 #define CLKID_GP2_PLL_OSC 3 13 #define CLKID_MCLK_PLL_OSC 4 14 #define CLKID_FIXED_PLL 5 15 #define CLKID_FCLK_50M_PREDIV 6 16 #define CLKID_FCLK_50M_DIV 7 17 #define CLKID_FCLK_50M 8 18 #define CLKID_FCLK_DIV2_DIV 9 19 #define CLKID_FCLK_DIV2 10 20 #define CLKID_FCLK_DIV2P5_DIV 11 21 #define CLKID_FCLK_DIV2P5 12 22 #define CLKID_FCLK_DIV3_DIV 13 23 #define CLKID_FCLK_DIV3 14 24 #define CLKID_FCLK_DIV4_DIV 15 25 #define CLKID_FCLK_DIV4 16 26 #define CLKID_FCLK_DIV5_DIV 17 27 #define CLKID_FCLK_DIV5 18 28 #define CLKID_FCLK_DIV7_DIV 19 29 #define CLKID_FCLK_DIV7 20 30 #define CLKID_SYS_CLK 21 31 #define CLKID_SYS_AO_SYS 22 32 #define CLKID_SYS_MMC_APB 23 33 #define CLKID_SYS_CPU_APB 24 34 #define CLKID_SYS_GIC 25 35 #define CLKID_AXI_CLK 26 36 #define CLKID_AXI_SYS_NIC 27 37 #define CLKID_AXI_RAMA 28 38 #define CLKID_CPU_CLK 29 39 #define CLKID_A78_CLK 30 40 #define CLKID_DSU_CLK 31 41 #define CLKID_ACLKM 32 42 #define CLKID_GP1_PLL 33 43 #define CLKID_GP2_PLL 34 44 #define CLKID_SYS_PLL_DIV16 35 45 #define CLKID_CPU_CLK_DIV16 36 46 #define CLKID_A78_CLK_DIV16 37 47 #define CLKID_DSU_CLK_DIV16 38 48 #define CLKID_GIC_CLK 39 49 #define CLKID_RTC 40 50 51 #endif /* __AMLOGIC_A9_SCMI_CLKC_H */ 52