1 /* SPDX-License-Identifier: MIT */ 2 /* Copyright © 2026 Intel Corporation */ 3 4 #ifndef _INTEL_GMD_MISC_REGS_H_ 5 #define _INTEL_GMD_MISC_REGS_H_ 6 7 #define DISP_ARB_CTL _MMIO(0x45000) 8 #define DISP_FBC_MEMORY_WAKE REG_BIT(31) 9 #define DISP_TILE_SURFACE_SWIZZLING REG_BIT(13) 10 #define DISP_FBC_WM_DIS REG_BIT(15) 11 12 #define INSTPM _MMIO(0x20c0) 13 #define INSTPM_SELF_EN (1 << 12) /* 915GM only */ 14 #define INSTPM_AGPBUSY_INT_EN (1 << 11) /* gen3: when disabled, pending interrupts 15 will not assert AGPBUSY# and will only 16 be delivered when out of C3. */ 17 #define INSTPM_FORCE_ORDERING (1 << 7) /* GEN6+ */ 18 #define INSTPM_TLB_INVALIDATE (1 << 9) 19 #define INSTPM_SYNC_FLUSH (1 << 5) 20 21 #endif 22