1 /* SPDX-License-Identifier: MIT */ 2 /* Copyright © 2026 Intel Corporation */ 3 4 #ifndef _INTEL_GMD_INTERRUPT_REGS_H_ 5 #define _INTEL_GMD_INTERRUPT_REGS_H_ 6 7 #define I915_PM_INTERRUPT (1 << 31) 8 #define I915_ISP_INTERRUPT (1 << 22) 9 #define I915_LPE_PIPE_B_INTERRUPT (1 << 21) 10 #define I915_LPE_PIPE_A_INTERRUPT (1 << 20) 11 #define I915_MIPIC_INTERRUPT (1 << 19) 12 #define I915_MIPIA_INTERRUPT (1 << 18) 13 #define I915_PIPE_CONTROL_NOTIFY_INTERRUPT (1 << 18) 14 #define I915_DISPLAY_PORT_INTERRUPT (1 << 17) 15 #define I915_DISPLAY_PIPE_C_HBLANK_INTERRUPT (1 << 16) 16 #define I915_MASTER_ERROR_INTERRUPT (1 << 15) 17 #define I915_DISPLAY_PIPE_B_HBLANK_INTERRUPT (1 << 14) 18 #define I915_GMCH_THERMAL_SENSOR_EVENT_INTERRUPT (1 << 14) /* p-state */ 19 #define I915_DISPLAY_PIPE_A_HBLANK_INTERRUPT (1 << 13) 20 #define I915_HWB_OOM_INTERRUPT (1 << 13) 21 #define I915_LPE_PIPE_C_INTERRUPT (1 << 12) 22 #define I915_SYNC_STATUS_INTERRUPT (1 << 12) 23 #define I915_MISC_INTERRUPT (1 << 11) 24 #define I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT (1 << 11) 25 #define I915_DISPLAY_PIPE_C_VBLANK_INTERRUPT (1 << 10) 26 #define I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT (1 << 10) 27 #define I915_DISPLAY_PIPE_C_EVENT_INTERRUPT (1 << 9) 28 #define I915_OVERLAY_PLANE_FLIP_PENDING_INTERRUPT (1 << 9) 29 #define I915_DISPLAY_PIPE_C_DPBM_INTERRUPT (1 << 8) 30 #define I915_DISPLAY_PLANE_C_FLIP_PENDING_INTERRUPT (1 << 8) 31 #define I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT (1 << 7) 32 #define I915_DISPLAY_PIPE_A_EVENT_INTERRUPT (1 << 6) 33 #define I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT (1 << 5) 34 #define I915_DISPLAY_PIPE_B_EVENT_INTERRUPT (1 << 4) 35 #define I915_DISPLAY_PIPE_A_DPBM_INTERRUPT (1 << 3) 36 #define I915_DISPLAY_PIPE_B_DPBM_INTERRUPT (1 << 2) 37 #define I915_DEBUG_INTERRUPT (1 << 2) 38 #define I915_WINVALID_INTERRUPT (1 << 1) 39 #define I915_USER_INTERRUPT (1 << 1) 40 #define I915_ASLE_INTERRUPT (1 << 0) 41 #define I915_BSD_USER_INTERRUPT (1 << 25) 42 43 #endif 44