1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * UHCI HCD (Host Controller Driver) for GRLIB GRUSBHC
4 *
5 * Copyright (c) 2011 Jan Andersson <jan@gaisler.com>
6 *
7 * This file is based on UHCI PCI HCD:
8 * (C) Copyright 1999 Linus Torvalds
9 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
10 * (C) Copyright 1999 Randy Dunlap
11 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
12 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
13 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
14 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
15 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
16 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
17 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
18 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
19 */
20
21 #include <linux/device.h>
22 #include <linux/of_irq.h>
23 #include <linux/of_address.h>
24 #include <linux/of_platform.h>
25 #include <linux/platform_device.h>
26
uhci_grlib_init(struct usb_hcd * hcd)27 static int uhci_grlib_init(struct usb_hcd *hcd)
28 {
29 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
30
31 /*
32 * Probe to determine the endianness of the controller.
33 * We know that bit 7 of the PORTSC1 register is always set
34 * and bit 15 is always clear. If uhci_readw() yields a value
35 * with bit 7 (0x80) turned on then the current little-endian
36 * setting is correct. Otherwise we assume the value was
37 * byte-swapped; hence the register interface and presumably
38 * also the descriptors are big-endian.
39 */
40 if (!(uhci_readw(uhci, USBPORTSC1) & 0x80)) {
41 uhci->big_endian_mmio = 1;
42 uhci->big_endian_desc = 1;
43 }
44
45 uhci->rh_numports = uhci_count_ports(hcd);
46
47 /* Set up pointers to generic functions */
48 uhci->reset_hc = uhci_generic_reset_hc;
49 uhci->check_and_reset_hc = uhci_generic_check_and_reset_hc;
50 /* No special actions need to be taken for the functions below */
51 uhci->configure_hc = NULL;
52 uhci->resume_detect_interrupts_are_broken = NULL;
53 uhci->global_suspend_mode_is_broken = NULL;
54
55 /* Reset if the controller isn't already safely quiescent. */
56 check_and_reset_hc(uhci);
57 return 0;
58 }
59
60 static const struct hc_driver uhci_grlib_hc_driver = {
61 .description = hcd_name,
62 .product_desc = "GRLIB GRUSBHC UHCI Host Controller",
63 .hcd_priv_size = sizeof(struct uhci_hcd),
64
65 /* Generic hardware linkage */
66 .irq = uhci_irq,
67 .flags = HCD_MEMORY | HCD_DMA | HCD_USB11,
68
69 /* Basic lifecycle operations */
70 .reset = uhci_grlib_init,
71 .start = uhci_start,
72 #ifdef CONFIG_PM
73 .pci_suspend = NULL,
74 .pci_resume = NULL,
75 .bus_suspend = uhci_rh_suspend,
76 .bus_resume = uhci_rh_resume,
77 #endif
78 .stop = uhci_stop,
79
80 .urb_enqueue = uhci_urb_enqueue,
81 .urb_dequeue = uhci_urb_dequeue,
82
83 .endpoint_disable = uhci_hcd_endpoint_disable,
84 .get_frame_number = uhci_hcd_get_frame_number,
85
86 .hub_status_data = uhci_hub_status_data,
87 .hub_control = uhci_hub_control,
88 };
89
90
uhci_hcd_grlib_probe(struct platform_device * op)91 static int uhci_hcd_grlib_probe(struct platform_device *op)
92 {
93 struct device_node *dn = op->dev.of_node;
94 struct usb_hcd *hcd;
95 struct uhci_hcd *uhci = NULL;
96 struct resource res;
97 int irq;
98 int rv;
99
100 if (usb_disabled())
101 return -ENODEV;
102
103 dev_dbg(&op->dev, "initializing GRUSBHC UHCI USB Controller\n");
104
105 rv = of_address_to_resource(dn, 0, &res);
106 if (rv)
107 return rv;
108
109 /* usb_create_hcd requires dma_mask != NULL */
110 op->dev.dma_mask = &op->dev.coherent_dma_mask;
111 hcd = usb_create_hcd(&uhci_grlib_hc_driver, &op->dev,
112 "GRUSBHC UHCI USB");
113 if (!hcd)
114 return -ENOMEM;
115
116 hcd->rsrc_start = res.start;
117 hcd->rsrc_len = resource_size(&res);
118
119 irq = irq_of_parse_and_map(dn, 0);
120 if (!irq) {
121 printk(KERN_ERR "%s: irq_of_parse_and_map failed\n", __FILE__);
122 rv = -EBUSY;
123 goto err_usb;
124 }
125
126 hcd->regs = devm_ioremap_resource(&op->dev, &res);
127 if (IS_ERR(hcd->regs)) {
128 rv = PTR_ERR(hcd->regs);
129 goto err_irq;
130 }
131
132 uhci = hcd_to_uhci(hcd);
133
134 uhci->regs = hcd->regs;
135
136 rv = usb_add_hcd(hcd, irq, 0);
137 if (rv)
138 goto err_irq;
139
140 device_wakeup_enable(hcd->self.controller);
141 return 0;
142
143 err_irq:
144 irq_dispose_mapping(irq);
145 err_usb:
146 usb_put_hcd(hcd);
147
148 return rv;
149 }
150
uhci_hcd_grlib_remove(struct platform_device * op)151 static void uhci_hcd_grlib_remove(struct platform_device *op)
152 {
153 struct usb_hcd *hcd = platform_get_drvdata(op);
154
155 dev_dbg(&op->dev, "stopping GRLIB GRUSBHC UHCI USB Controller\n");
156
157 usb_remove_hcd(hcd);
158
159 irq_dispose_mapping(hcd->irq);
160 usb_put_hcd(hcd);
161 }
162
163 /* Make sure the controller is quiescent and that we're not using it
164 * any more. This is mainly for the benefit of programs which, like kexec,
165 * expect the hardware to be idle: not doing DMA or generating IRQs.
166 *
167 * This routine may be called in a damaged or failing kernel. Hence we
168 * do not acquire the spinlock before shutting down the controller.
169 */
uhci_hcd_grlib_shutdown(struct platform_device * op)170 static void uhci_hcd_grlib_shutdown(struct platform_device *op)
171 {
172 struct usb_hcd *hcd = platform_get_drvdata(op);
173
174 uhci_hc_died(hcd_to_uhci(hcd));
175 }
176
177 static const struct of_device_id uhci_hcd_grlib_of_match[] = {
178 { .name = "GAISLER_UHCI", },
179 { .name = "01_027", },
180 {},
181 };
182 MODULE_DEVICE_TABLE(of, uhci_hcd_grlib_of_match);
183
184
185 static struct platform_driver uhci_grlib_driver = {
186 .probe = uhci_hcd_grlib_probe,
187 .remove_new = uhci_hcd_grlib_remove,
188 .shutdown = uhci_hcd_grlib_shutdown,
189 .driver = {
190 .name = "grlib-uhci",
191 .of_match_table = uhci_hcd_grlib_of_match,
192 },
193 };
194