1824a1566SKashyap Desai // SPDX-License-Identifier: GPL-2.0-or-later 2824a1566SKashyap Desai /* 3824a1566SKashyap Desai * Driver for Broadcom MPI3 Storage Controllers 4824a1566SKashyap Desai * 521401408SSreekanth Reddy * Copyright (C) 2017-2022 Broadcom Inc. 6824a1566SKashyap Desai * (mailto: mpi3mr-linuxdrv.pdl@broadcom.com) 7824a1566SKashyap Desai * 8824a1566SKashyap Desai */ 9824a1566SKashyap Desai 10824a1566SKashyap Desai #include "mpi3mr.h" 11824a1566SKashyap Desai #include <linux/io-64-nonatomic-lo-hi.h> 12824a1566SKashyap Desai 1359bd9cfeSSreekanth Reddy static int 1459bd9cfeSSreekanth Reddy mpi3mr_issue_reset(struct mpi3mr_ioc *mrioc, u16 reset_type, u32 reset_reason); 1559bd9cfeSSreekanth Reddy static int mpi3mr_setup_admin_qpair(struct mpi3mr_ioc *mrioc); 16c5758fc7SSreekanth Reddy static void mpi3mr_process_factsdata(struct mpi3mr_ioc *mrioc, 17c5758fc7SSreekanth Reddy struct mpi3_ioc_facts_data *facts_data); 1843ca1100SSumit Saxena static void mpi3mr_pel_wait_complete(struct mpi3mr_ioc *mrioc, 1943ca1100SSumit Saxena struct mpi3mr_drv_cmd *drv_cmd); 2059bd9cfeSSreekanth Reddy 21afd3a579SSreekanth Reddy static int poll_queues; 22afd3a579SSreekanth Reddy module_param(poll_queues, int, 0444); 23afd3a579SSreekanth Reddy MODULE_PARM_DESC(poll_queues, "Number of queues for io_uring poll mode. (Range 1 - 126)"); 24afd3a579SSreekanth Reddy 25824a1566SKashyap Desai #if defined(writeq) && defined(CONFIG_64BIT) 26824a1566SKashyap Desai static inline void mpi3mr_writeq(__u64 b, volatile void __iomem *addr) 27824a1566SKashyap Desai { 28824a1566SKashyap Desai writeq(b, addr); 29824a1566SKashyap Desai } 30824a1566SKashyap Desai #else 31824a1566SKashyap Desai static inline void mpi3mr_writeq(__u64 b, volatile void __iomem *addr) 32824a1566SKashyap Desai { 33824a1566SKashyap Desai __u64 data_out = b; 34824a1566SKashyap Desai 35824a1566SKashyap Desai writel((u32)(data_out), addr); 36824a1566SKashyap Desai writel((u32)(data_out >> 32), (addr + 4)); 37824a1566SKashyap Desai } 38824a1566SKashyap Desai #endif 39824a1566SKashyap Desai 40023ab2a9SKashyap Desai static inline bool 41023ab2a9SKashyap Desai mpi3mr_check_req_qfull(struct op_req_qinfo *op_req_q) 42023ab2a9SKashyap Desai { 43023ab2a9SKashyap Desai u16 pi, ci, max_entries; 44023ab2a9SKashyap Desai bool is_qfull = false; 45023ab2a9SKashyap Desai 46023ab2a9SKashyap Desai pi = op_req_q->pi; 47023ab2a9SKashyap Desai ci = READ_ONCE(op_req_q->ci); 48023ab2a9SKashyap Desai max_entries = op_req_q->num_requests; 49023ab2a9SKashyap Desai 50023ab2a9SKashyap Desai if ((ci == (pi + 1)) || ((!ci) && (pi == (max_entries - 1)))) 51023ab2a9SKashyap Desai is_qfull = true; 52023ab2a9SKashyap Desai 53023ab2a9SKashyap Desai return is_qfull; 54023ab2a9SKashyap Desai } 55023ab2a9SKashyap Desai 56824a1566SKashyap Desai static void mpi3mr_sync_irqs(struct mpi3mr_ioc *mrioc) 57824a1566SKashyap Desai { 58824a1566SKashyap Desai u16 i, max_vectors; 59824a1566SKashyap Desai 60824a1566SKashyap Desai max_vectors = mrioc->intr_info_count; 61824a1566SKashyap Desai 62824a1566SKashyap Desai for (i = 0; i < max_vectors; i++) 63824a1566SKashyap Desai synchronize_irq(pci_irq_vector(mrioc->pdev, i)); 64824a1566SKashyap Desai } 65824a1566SKashyap Desai 66824a1566SKashyap Desai void mpi3mr_ioc_disable_intr(struct mpi3mr_ioc *mrioc) 67824a1566SKashyap Desai { 68824a1566SKashyap Desai mrioc->intr_enabled = 0; 69824a1566SKashyap Desai mpi3mr_sync_irqs(mrioc); 70824a1566SKashyap Desai } 71824a1566SKashyap Desai 72824a1566SKashyap Desai void mpi3mr_ioc_enable_intr(struct mpi3mr_ioc *mrioc) 73824a1566SKashyap Desai { 74824a1566SKashyap Desai mrioc->intr_enabled = 1; 75824a1566SKashyap Desai } 76824a1566SKashyap Desai 77824a1566SKashyap Desai static void mpi3mr_cleanup_isr(struct mpi3mr_ioc *mrioc) 78824a1566SKashyap Desai { 79824a1566SKashyap Desai u16 i; 80824a1566SKashyap Desai 81824a1566SKashyap Desai mpi3mr_ioc_disable_intr(mrioc); 82824a1566SKashyap Desai 83824a1566SKashyap Desai if (!mrioc->intr_info) 84824a1566SKashyap Desai return; 85824a1566SKashyap Desai 86824a1566SKashyap Desai for (i = 0; i < mrioc->intr_info_count; i++) 87824a1566SKashyap Desai free_irq(pci_irq_vector(mrioc->pdev, i), 88824a1566SKashyap Desai (mrioc->intr_info + i)); 89824a1566SKashyap Desai 90824a1566SKashyap Desai kfree(mrioc->intr_info); 91824a1566SKashyap Desai mrioc->intr_info = NULL; 92824a1566SKashyap Desai mrioc->intr_info_count = 0; 93fe6db615SSreekanth Reddy mrioc->is_intr_info_set = false; 94824a1566SKashyap Desai pci_free_irq_vectors(mrioc->pdev); 95824a1566SKashyap Desai } 96824a1566SKashyap Desai 97824a1566SKashyap Desai void mpi3mr_add_sg_single(void *paddr, u8 flags, u32 length, 98824a1566SKashyap Desai dma_addr_t dma_addr) 99824a1566SKashyap Desai { 100824a1566SKashyap Desai struct mpi3_sge_common *sgel = paddr; 101824a1566SKashyap Desai 102824a1566SKashyap Desai sgel->flags = flags; 103824a1566SKashyap Desai sgel->length = cpu_to_le32(length); 104824a1566SKashyap Desai sgel->address = cpu_to_le64(dma_addr); 105824a1566SKashyap Desai } 106824a1566SKashyap Desai 107824a1566SKashyap Desai void mpi3mr_build_zero_len_sge(void *paddr) 108824a1566SKashyap Desai { 109824a1566SKashyap Desai u8 sgl_flags = MPI3MR_SGEFLAGS_SYSTEM_SIMPLE_END_OF_LIST; 110824a1566SKashyap Desai 111824a1566SKashyap Desai mpi3mr_add_sg_single(paddr, sgl_flags, 0, -1); 112824a1566SKashyap Desai } 113824a1566SKashyap Desai 114824a1566SKashyap Desai void *mpi3mr_get_reply_virt_addr(struct mpi3mr_ioc *mrioc, 115824a1566SKashyap Desai dma_addr_t phys_addr) 116824a1566SKashyap Desai { 117824a1566SKashyap Desai if (!phys_addr) 118824a1566SKashyap Desai return NULL; 119824a1566SKashyap Desai 120824a1566SKashyap Desai if ((phys_addr < mrioc->reply_buf_dma) || 121824a1566SKashyap Desai (phys_addr > mrioc->reply_buf_dma_max_address)) 122824a1566SKashyap Desai return NULL; 123824a1566SKashyap Desai 124824a1566SKashyap Desai return mrioc->reply_buf + (phys_addr - mrioc->reply_buf_dma); 125824a1566SKashyap Desai } 126824a1566SKashyap Desai 127824a1566SKashyap Desai void *mpi3mr_get_sensebuf_virt_addr(struct mpi3mr_ioc *mrioc, 128824a1566SKashyap Desai dma_addr_t phys_addr) 129824a1566SKashyap Desai { 130824a1566SKashyap Desai if (!phys_addr) 131824a1566SKashyap Desai return NULL; 132824a1566SKashyap Desai 133824a1566SKashyap Desai return mrioc->sense_buf + (phys_addr - mrioc->sense_buf_dma); 134824a1566SKashyap Desai } 135824a1566SKashyap Desai 136824a1566SKashyap Desai static void mpi3mr_repost_reply_buf(struct mpi3mr_ioc *mrioc, 137824a1566SKashyap Desai u64 reply_dma) 138824a1566SKashyap Desai { 139824a1566SKashyap Desai u32 old_idx = 0; 140a83ec831SSreekanth Reddy unsigned long flags; 141824a1566SKashyap Desai 142a83ec831SSreekanth Reddy spin_lock_irqsave(&mrioc->reply_free_queue_lock, flags); 143824a1566SKashyap Desai old_idx = mrioc->reply_free_queue_host_index; 144824a1566SKashyap Desai mrioc->reply_free_queue_host_index = ( 145824a1566SKashyap Desai (mrioc->reply_free_queue_host_index == 146824a1566SKashyap Desai (mrioc->reply_free_qsz - 1)) ? 0 : 147824a1566SKashyap Desai (mrioc->reply_free_queue_host_index + 1)); 148824a1566SKashyap Desai mrioc->reply_free_q[old_idx] = cpu_to_le64(reply_dma); 149824a1566SKashyap Desai writel(mrioc->reply_free_queue_host_index, 150824a1566SKashyap Desai &mrioc->sysif_regs->reply_free_host_index); 151a83ec831SSreekanth Reddy spin_unlock_irqrestore(&mrioc->reply_free_queue_lock, flags); 152824a1566SKashyap Desai } 153824a1566SKashyap Desai 154824a1566SKashyap Desai void mpi3mr_repost_sense_buf(struct mpi3mr_ioc *mrioc, 155824a1566SKashyap Desai u64 sense_buf_dma) 156824a1566SKashyap Desai { 157824a1566SKashyap Desai u32 old_idx = 0; 158a83ec831SSreekanth Reddy unsigned long flags; 159824a1566SKashyap Desai 160a83ec831SSreekanth Reddy spin_lock_irqsave(&mrioc->sbq_lock, flags); 161824a1566SKashyap Desai old_idx = mrioc->sbq_host_index; 162824a1566SKashyap Desai mrioc->sbq_host_index = ((mrioc->sbq_host_index == 163824a1566SKashyap Desai (mrioc->sense_buf_q_sz - 1)) ? 0 : 164824a1566SKashyap Desai (mrioc->sbq_host_index + 1)); 165824a1566SKashyap Desai mrioc->sense_buf_q[old_idx] = cpu_to_le64(sense_buf_dma); 166824a1566SKashyap Desai writel(mrioc->sbq_host_index, 167824a1566SKashyap Desai &mrioc->sysif_regs->sense_buffer_free_host_index); 168a83ec831SSreekanth Reddy spin_unlock_irqrestore(&mrioc->sbq_lock, flags); 169824a1566SKashyap Desai } 170824a1566SKashyap Desai 1719fc4abfeSKashyap Desai static void mpi3mr_print_event_data(struct mpi3mr_ioc *mrioc, 1729fc4abfeSKashyap Desai struct mpi3_event_notification_reply *event_reply) 1739fc4abfeSKashyap Desai { 1749fc4abfeSKashyap Desai char *desc = NULL; 1759fc4abfeSKashyap Desai u16 event; 1769fc4abfeSKashyap Desai 1779fc4abfeSKashyap Desai event = event_reply->event; 1789fc4abfeSKashyap Desai 1799fc4abfeSKashyap Desai switch (event) { 1809fc4abfeSKashyap Desai case MPI3_EVENT_LOG_DATA: 1819fc4abfeSKashyap Desai desc = "Log Data"; 1829fc4abfeSKashyap Desai break; 1839fc4abfeSKashyap Desai case MPI3_EVENT_CHANGE: 1849fc4abfeSKashyap Desai desc = "Event Change"; 1859fc4abfeSKashyap Desai break; 1869fc4abfeSKashyap Desai case MPI3_EVENT_GPIO_INTERRUPT: 1879fc4abfeSKashyap Desai desc = "GPIO Interrupt"; 1889fc4abfeSKashyap Desai break; 1899fc4abfeSKashyap Desai case MPI3_EVENT_CABLE_MGMT: 1909fc4abfeSKashyap Desai desc = "Cable Management"; 1919fc4abfeSKashyap Desai break; 1929fc4abfeSKashyap Desai case MPI3_EVENT_ENERGY_PACK_CHANGE: 1939fc4abfeSKashyap Desai desc = "Energy Pack Change"; 1949fc4abfeSKashyap Desai break; 1959fc4abfeSKashyap Desai case MPI3_EVENT_DEVICE_ADDED: 1969fc4abfeSKashyap Desai { 1979fc4abfeSKashyap Desai struct mpi3_device_page0 *event_data = 1989fc4abfeSKashyap Desai (struct mpi3_device_page0 *)event_reply->event_data; 1999fc4abfeSKashyap Desai ioc_info(mrioc, "Device Added: dev=0x%04x Form=0x%x\n", 2009fc4abfeSKashyap Desai event_data->dev_handle, event_data->device_form); 2019fc4abfeSKashyap Desai return; 2029fc4abfeSKashyap Desai } 2039fc4abfeSKashyap Desai case MPI3_EVENT_DEVICE_INFO_CHANGED: 2049fc4abfeSKashyap Desai { 2059fc4abfeSKashyap Desai struct mpi3_device_page0 *event_data = 2069fc4abfeSKashyap Desai (struct mpi3_device_page0 *)event_reply->event_data; 2079fc4abfeSKashyap Desai ioc_info(mrioc, "Device Info Changed: dev=0x%04x Form=0x%x\n", 2089fc4abfeSKashyap Desai event_data->dev_handle, event_data->device_form); 2099fc4abfeSKashyap Desai return; 2109fc4abfeSKashyap Desai } 2119fc4abfeSKashyap Desai case MPI3_EVENT_DEVICE_STATUS_CHANGE: 2129fc4abfeSKashyap Desai { 2139fc4abfeSKashyap Desai struct mpi3_event_data_device_status_change *event_data = 2149fc4abfeSKashyap Desai (struct mpi3_event_data_device_status_change *)event_reply->event_data; 2159fc4abfeSKashyap Desai ioc_info(mrioc, "Device status Change: dev=0x%04x RC=0x%x\n", 2169fc4abfeSKashyap Desai event_data->dev_handle, event_data->reason_code); 2179fc4abfeSKashyap Desai return; 2189fc4abfeSKashyap Desai } 2199fc4abfeSKashyap Desai case MPI3_EVENT_SAS_DISCOVERY: 2209fc4abfeSKashyap Desai { 2219fc4abfeSKashyap Desai struct mpi3_event_data_sas_discovery *event_data = 2229fc4abfeSKashyap Desai (struct mpi3_event_data_sas_discovery *)event_reply->event_data; 2239fc4abfeSKashyap Desai ioc_info(mrioc, "SAS Discovery: (%s) status (0x%08x)\n", 2249fc4abfeSKashyap Desai (event_data->reason_code == MPI3_EVENT_SAS_DISC_RC_STARTED) ? 2259fc4abfeSKashyap Desai "start" : "stop", 2269fc4abfeSKashyap Desai le32_to_cpu(event_data->discovery_status)); 2279fc4abfeSKashyap Desai return; 2289fc4abfeSKashyap Desai } 2299fc4abfeSKashyap Desai case MPI3_EVENT_SAS_BROADCAST_PRIMITIVE: 2309fc4abfeSKashyap Desai desc = "SAS Broadcast Primitive"; 2319fc4abfeSKashyap Desai break; 2329fc4abfeSKashyap Desai case MPI3_EVENT_SAS_NOTIFY_PRIMITIVE: 2339fc4abfeSKashyap Desai desc = "SAS Notify Primitive"; 2349fc4abfeSKashyap Desai break; 2359fc4abfeSKashyap Desai case MPI3_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE: 2369fc4abfeSKashyap Desai desc = "SAS Init Device Status Change"; 2379fc4abfeSKashyap Desai break; 2389fc4abfeSKashyap Desai case MPI3_EVENT_SAS_INIT_TABLE_OVERFLOW: 2399fc4abfeSKashyap Desai desc = "SAS Init Table Overflow"; 2409fc4abfeSKashyap Desai break; 2419fc4abfeSKashyap Desai case MPI3_EVENT_SAS_TOPOLOGY_CHANGE_LIST: 2429fc4abfeSKashyap Desai desc = "SAS Topology Change List"; 2439fc4abfeSKashyap Desai break; 2449fc4abfeSKashyap Desai case MPI3_EVENT_ENCL_DEVICE_STATUS_CHANGE: 2459fc4abfeSKashyap Desai desc = "Enclosure Device Status Change"; 2469fc4abfeSKashyap Desai break; 2477188c03fSSreekanth Reddy case MPI3_EVENT_ENCL_DEVICE_ADDED: 2487188c03fSSreekanth Reddy desc = "Enclosure Added"; 2497188c03fSSreekanth Reddy break; 2509fc4abfeSKashyap Desai case MPI3_EVENT_HARD_RESET_RECEIVED: 2519fc4abfeSKashyap Desai desc = "Hard Reset Received"; 2529fc4abfeSKashyap Desai break; 2539fc4abfeSKashyap Desai case MPI3_EVENT_SAS_PHY_COUNTER: 2549fc4abfeSKashyap Desai desc = "SAS PHY Counter"; 2559fc4abfeSKashyap Desai break; 2569fc4abfeSKashyap Desai case MPI3_EVENT_SAS_DEVICE_DISCOVERY_ERROR: 2579fc4abfeSKashyap Desai desc = "SAS Device Discovery Error"; 2589fc4abfeSKashyap Desai break; 2599fc4abfeSKashyap Desai case MPI3_EVENT_PCIE_TOPOLOGY_CHANGE_LIST: 2609fc4abfeSKashyap Desai desc = "PCIE Topology Change List"; 2619fc4abfeSKashyap Desai break; 2629fc4abfeSKashyap Desai case MPI3_EVENT_PCIE_ENUMERATION: 2639fc4abfeSKashyap Desai { 2649fc4abfeSKashyap Desai struct mpi3_event_data_pcie_enumeration *event_data = 2659fc4abfeSKashyap Desai (struct mpi3_event_data_pcie_enumeration *)event_reply->event_data; 2669fc4abfeSKashyap Desai ioc_info(mrioc, "PCIE Enumeration: (%s)", 2679fc4abfeSKashyap Desai (event_data->reason_code == 2689fc4abfeSKashyap Desai MPI3_EVENT_PCIE_ENUM_RC_STARTED) ? "start" : "stop"); 2699fc4abfeSKashyap Desai if (event_data->enumeration_status) 2709fc4abfeSKashyap Desai ioc_info(mrioc, "enumeration_status(0x%08x)\n", 2719fc4abfeSKashyap Desai le32_to_cpu(event_data->enumeration_status)); 2729fc4abfeSKashyap Desai return; 2739fc4abfeSKashyap Desai } 2749fc4abfeSKashyap Desai case MPI3_EVENT_PREPARE_FOR_RESET: 2759fc4abfeSKashyap Desai desc = "Prepare For Reset"; 2769fc4abfeSKashyap Desai break; 2779fc4abfeSKashyap Desai } 2789fc4abfeSKashyap Desai 2799fc4abfeSKashyap Desai if (!desc) 2809fc4abfeSKashyap Desai return; 2819fc4abfeSKashyap Desai 2829fc4abfeSKashyap Desai ioc_info(mrioc, "%s\n", desc); 2839fc4abfeSKashyap Desai } 2849fc4abfeSKashyap Desai 285824a1566SKashyap Desai static void mpi3mr_handle_events(struct mpi3mr_ioc *mrioc, 286824a1566SKashyap Desai struct mpi3_default_reply *def_reply) 287824a1566SKashyap Desai { 288824a1566SKashyap Desai struct mpi3_event_notification_reply *event_reply = 289824a1566SKashyap Desai (struct mpi3_event_notification_reply *)def_reply; 290824a1566SKashyap Desai 291824a1566SKashyap Desai mrioc->change_count = le16_to_cpu(event_reply->ioc_change_count); 2929fc4abfeSKashyap Desai mpi3mr_print_event_data(mrioc, event_reply); 29313ef29eaSKashyap Desai mpi3mr_os_handle_events(mrioc, event_reply); 294824a1566SKashyap Desai } 295824a1566SKashyap Desai 296824a1566SKashyap Desai static struct mpi3mr_drv_cmd * 297824a1566SKashyap Desai mpi3mr_get_drv_cmd(struct mpi3mr_ioc *mrioc, u16 host_tag, 298824a1566SKashyap Desai struct mpi3_default_reply *def_reply) 299824a1566SKashyap Desai { 30013ef29eaSKashyap Desai u16 idx; 30113ef29eaSKashyap Desai 302824a1566SKashyap Desai switch (host_tag) { 303824a1566SKashyap Desai case MPI3MR_HOSTTAG_INITCMDS: 304824a1566SKashyap Desai return &mrioc->init_cmds; 30532d457d5SSreekanth Reddy case MPI3MR_HOSTTAG_CFG_CMDS: 30632d457d5SSreekanth Reddy return &mrioc->cfg_cmds; 307f5e6d5a3SSumit Saxena case MPI3MR_HOSTTAG_BSG_CMDS: 308f5e6d5a3SSumit Saxena return &mrioc->bsg_cmds; 309e844adb1SKashyap Desai case MPI3MR_HOSTTAG_BLK_TMS: 310e844adb1SKashyap Desai return &mrioc->host_tm_cmds; 31143ca1100SSumit Saxena case MPI3MR_HOSTTAG_PEL_ABORT: 31243ca1100SSumit Saxena return &mrioc->pel_abort_cmd; 31343ca1100SSumit Saxena case MPI3MR_HOSTTAG_PEL_WAIT: 31443ca1100SSumit Saxena return &mrioc->pel_cmds; 3152bd37e28SSreekanth Reddy case MPI3MR_HOSTTAG_TRANSPORT_CMDS: 3162bd37e28SSreekanth Reddy return &mrioc->transport_cmds; 317824a1566SKashyap Desai case MPI3MR_HOSTTAG_INVALID: 318824a1566SKashyap Desai if (def_reply && def_reply->function == 319824a1566SKashyap Desai MPI3_FUNCTION_EVENT_NOTIFICATION) 320824a1566SKashyap Desai mpi3mr_handle_events(mrioc, def_reply); 321824a1566SKashyap Desai return NULL; 322824a1566SKashyap Desai default: 323824a1566SKashyap Desai break; 324824a1566SKashyap Desai } 32513ef29eaSKashyap Desai if (host_tag >= MPI3MR_HOSTTAG_DEVRMCMD_MIN && 32613ef29eaSKashyap Desai host_tag <= MPI3MR_HOSTTAG_DEVRMCMD_MAX) { 32713ef29eaSKashyap Desai idx = host_tag - MPI3MR_HOSTTAG_DEVRMCMD_MIN; 32813ef29eaSKashyap Desai return &mrioc->dev_rmhs_cmds[idx]; 32913ef29eaSKashyap Desai } 330824a1566SKashyap Desai 331c1af985dSSreekanth Reddy if (host_tag >= MPI3MR_HOSTTAG_EVTACKCMD_MIN && 332c1af985dSSreekanth Reddy host_tag <= MPI3MR_HOSTTAG_EVTACKCMD_MAX) { 333c1af985dSSreekanth Reddy idx = host_tag - MPI3MR_HOSTTAG_EVTACKCMD_MIN; 334c1af985dSSreekanth Reddy return &mrioc->evtack_cmds[idx]; 335c1af985dSSreekanth Reddy } 336c1af985dSSreekanth Reddy 337824a1566SKashyap Desai return NULL; 338824a1566SKashyap Desai } 339824a1566SKashyap Desai 340824a1566SKashyap Desai static void mpi3mr_process_admin_reply_desc(struct mpi3mr_ioc *mrioc, 341824a1566SKashyap Desai struct mpi3_default_reply_descriptor *reply_desc, u64 *reply_dma) 342824a1566SKashyap Desai { 343824a1566SKashyap Desai u16 reply_desc_type, host_tag = 0; 344824a1566SKashyap Desai u16 ioc_status = MPI3_IOCSTATUS_SUCCESS; 345824a1566SKashyap Desai u32 ioc_loginfo = 0; 346824a1566SKashyap Desai struct mpi3_status_reply_descriptor *status_desc; 347824a1566SKashyap Desai struct mpi3_address_reply_descriptor *addr_desc; 348824a1566SKashyap Desai struct mpi3_success_reply_descriptor *success_desc; 349824a1566SKashyap Desai struct mpi3_default_reply *def_reply = NULL; 350824a1566SKashyap Desai struct mpi3mr_drv_cmd *cmdptr = NULL; 351824a1566SKashyap Desai struct mpi3_scsi_io_reply *scsi_reply; 352824a1566SKashyap Desai u8 *sense_buf = NULL; 353824a1566SKashyap Desai 354824a1566SKashyap Desai *reply_dma = 0; 355824a1566SKashyap Desai reply_desc_type = le16_to_cpu(reply_desc->reply_flags) & 356824a1566SKashyap Desai MPI3_REPLY_DESCRIPT_FLAGS_TYPE_MASK; 357824a1566SKashyap Desai switch (reply_desc_type) { 358824a1566SKashyap Desai case MPI3_REPLY_DESCRIPT_FLAGS_TYPE_STATUS: 359824a1566SKashyap Desai status_desc = (struct mpi3_status_reply_descriptor *)reply_desc; 360824a1566SKashyap Desai host_tag = le16_to_cpu(status_desc->host_tag); 361824a1566SKashyap Desai ioc_status = le16_to_cpu(status_desc->ioc_status); 362824a1566SKashyap Desai if (ioc_status & 363824a1566SKashyap Desai MPI3_REPLY_DESCRIPT_STATUS_IOCSTATUS_LOGINFOAVAIL) 364824a1566SKashyap Desai ioc_loginfo = le32_to_cpu(status_desc->ioc_log_info); 365824a1566SKashyap Desai ioc_status &= MPI3_REPLY_DESCRIPT_STATUS_IOCSTATUS_STATUS_MASK; 366824a1566SKashyap Desai break; 367824a1566SKashyap Desai case MPI3_REPLY_DESCRIPT_FLAGS_TYPE_ADDRESS_REPLY: 368824a1566SKashyap Desai addr_desc = (struct mpi3_address_reply_descriptor *)reply_desc; 369824a1566SKashyap Desai *reply_dma = le64_to_cpu(addr_desc->reply_frame_address); 370824a1566SKashyap Desai def_reply = mpi3mr_get_reply_virt_addr(mrioc, *reply_dma); 371824a1566SKashyap Desai if (!def_reply) 372824a1566SKashyap Desai goto out; 373824a1566SKashyap Desai host_tag = le16_to_cpu(def_reply->host_tag); 374824a1566SKashyap Desai ioc_status = le16_to_cpu(def_reply->ioc_status); 375824a1566SKashyap Desai if (ioc_status & 376824a1566SKashyap Desai MPI3_REPLY_DESCRIPT_STATUS_IOCSTATUS_LOGINFOAVAIL) 377824a1566SKashyap Desai ioc_loginfo = le32_to_cpu(def_reply->ioc_log_info); 378824a1566SKashyap Desai ioc_status &= MPI3_REPLY_DESCRIPT_STATUS_IOCSTATUS_STATUS_MASK; 379824a1566SKashyap Desai if (def_reply->function == MPI3_FUNCTION_SCSI_IO) { 380824a1566SKashyap Desai scsi_reply = (struct mpi3_scsi_io_reply *)def_reply; 381824a1566SKashyap Desai sense_buf = mpi3mr_get_sensebuf_virt_addr(mrioc, 382824a1566SKashyap Desai le64_to_cpu(scsi_reply->sense_data_buffer_address)); 383824a1566SKashyap Desai } 384824a1566SKashyap Desai break; 385824a1566SKashyap Desai case MPI3_REPLY_DESCRIPT_FLAGS_TYPE_SUCCESS: 386824a1566SKashyap Desai success_desc = (struct mpi3_success_reply_descriptor *)reply_desc; 387824a1566SKashyap Desai host_tag = le16_to_cpu(success_desc->host_tag); 388824a1566SKashyap Desai break; 389824a1566SKashyap Desai default: 390824a1566SKashyap Desai break; 391824a1566SKashyap Desai } 392824a1566SKashyap Desai 393824a1566SKashyap Desai cmdptr = mpi3mr_get_drv_cmd(mrioc, host_tag, def_reply); 394824a1566SKashyap Desai if (cmdptr) { 395824a1566SKashyap Desai if (cmdptr->state & MPI3MR_CMD_PENDING) { 396824a1566SKashyap Desai cmdptr->state |= MPI3MR_CMD_COMPLETE; 397824a1566SKashyap Desai cmdptr->ioc_loginfo = ioc_loginfo; 398824a1566SKashyap Desai cmdptr->ioc_status = ioc_status; 399824a1566SKashyap Desai cmdptr->state &= ~MPI3MR_CMD_PENDING; 400824a1566SKashyap Desai if (def_reply) { 401824a1566SKashyap Desai cmdptr->state |= MPI3MR_CMD_REPLY_VALID; 402824a1566SKashyap Desai memcpy((u8 *)cmdptr->reply, (u8 *)def_reply, 403c5758fc7SSreekanth Reddy mrioc->reply_sz); 404824a1566SKashyap Desai } 405824a1566SKashyap Desai if (cmdptr->is_waiting) { 406824a1566SKashyap Desai complete(&cmdptr->done); 407824a1566SKashyap Desai cmdptr->is_waiting = 0; 408824a1566SKashyap Desai } else if (cmdptr->callback) 409824a1566SKashyap Desai cmdptr->callback(mrioc, cmdptr); 410824a1566SKashyap Desai } 411824a1566SKashyap Desai } 412824a1566SKashyap Desai out: 413824a1566SKashyap Desai if (sense_buf) 414824a1566SKashyap Desai mpi3mr_repost_sense_buf(mrioc, 415824a1566SKashyap Desai le64_to_cpu(scsi_reply->sense_data_buffer_address)); 416824a1566SKashyap Desai } 417824a1566SKashyap Desai 418824a1566SKashyap Desai static int mpi3mr_process_admin_reply_q(struct mpi3mr_ioc *mrioc) 419824a1566SKashyap Desai { 420824a1566SKashyap Desai u32 exp_phase = mrioc->admin_reply_ephase; 421824a1566SKashyap Desai u32 admin_reply_ci = mrioc->admin_reply_ci; 422824a1566SKashyap Desai u32 num_admin_replies = 0; 423824a1566SKashyap Desai u64 reply_dma = 0; 424824a1566SKashyap Desai struct mpi3_default_reply_descriptor *reply_desc; 425824a1566SKashyap Desai 426824a1566SKashyap Desai reply_desc = (struct mpi3_default_reply_descriptor *)mrioc->admin_reply_base + 427824a1566SKashyap Desai admin_reply_ci; 428824a1566SKashyap Desai 429824a1566SKashyap Desai if ((le16_to_cpu(reply_desc->reply_flags) & 430824a1566SKashyap Desai MPI3_REPLY_DESCRIPT_FLAGS_PHASE_MASK) != exp_phase) 431824a1566SKashyap Desai return 0; 432824a1566SKashyap Desai 433824a1566SKashyap Desai do { 434824a1566SKashyap Desai mrioc->admin_req_ci = le16_to_cpu(reply_desc->request_queue_ci); 435824a1566SKashyap Desai mpi3mr_process_admin_reply_desc(mrioc, reply_desc, &reply_dma); 436824a1566SKashyap Desai if (reply_dma) 437824a1566SKashyap Desai mpi3mr_repost_reply_buf(mrioc, reply_dma); 438824a1566SKashyap Desai num_admin_replies++; 439824a1566SKashyap Desai if (++admin_reply_ci == mrioc->num_admin_replies) { 440824a1566SKashyap Desai admin_reply_ci = 0; 441824a1566SKashyap Desai exp_phase ^= 1; 442824a1566SKashyap Desai } 443824a1566SKashyap Desai reply_desc = 444824a1566SKashyap Desai (struct mpi3_default_reply_descriptor *)mrioc->admin_reply_base + 445824a1566SKashyap Desai admin_reply_ci; 446824a1566SKashyap Desai if ((le16_to_cpu(reply_desc->reply_flags) & 447824a1566SKashyap Desai MPI3_REPLY_DESCRIPT_FLAGS_PHASE_MASK) != exp_phase) 448824a1566SKashyap Desai break; 449824a1566SKashyap Desai } while (1); 450824a1566SKashyap Desai 451824a1566SKashyap Desai writel(admin_reply_ci, &mrioc->sysif_regs->admin_reply_queue_ci); 452824a1566SKashyap Desai mrioc->admin_reply_ci = admin_reply_ci; 453824a1566SKashyap Desai mrioc->admin_reply_ephase = exp_phase; 454824a1566SKashyap Desai 455824a1566SKashyap Desai return num_admin_replies; 456824a1566SKashyap Desai } 457824a1566SKashyap Desai 458023ab2a9SKashyap Desai /** 459023ab2a9SKashyap Desai * mpi3mr_get_reply_desc - get reply descriptor frame corresponding to 460023ab2a9SKashyap Desai * queue's consumer index from operational reply descriptor queue. 461023ab2a9SKashyap Desai * @op_reply_q: op_reply_qinfo object 462023ab2a9SKashyap Desai * @reply_ci: operational reply descriptor's queue consumer index 463023ab2a9SKashyap Desai * 464023ab2a9SKashyap Desai * Returns reply descriptor frame address 465023ab2a9SKashyap Desai */ 466023ab2a9SKashyap Desai static inline struct mpi3_default_reply_descriptor * 467023ab2a9SKashyap Desai mpi3mr_get_reply_desc(struct op_reply_qinfo *op_reply_q, u32 reply_ci) 468023ab2a9SKashyap Desai { 469023ab2a9SKashyap Desai void *segment_base_addr; 470023ab2a9SKashyap Desai struct segments *segments = op_reply_q->q_segments; 471023ab2a9SKashyap Desai struct mpi3_default_reply_descriptor *reply_desc = NULL; 472023ab2a9SKashyap Desai 473023ab2a9SKashyap Desai segment_base_addr = 474023ab2a9SKashyap Desai segments[reply_ci / op_reply_q->segment_qd].segment; 475023ab2a9SKashyap Desai reply_desc = (struct mpi3_default_reply_descriptor *)segment_base_addr + 476023ab2a9SKashyap Desai (reply_ci % op_reply_q->segment_qd); 477023ab2a9SKashyap Desai return reply_desc; 478023ab2a9SKashyap Desai } 479023ab2a9SKashyap Desai 480afd3a579SSreekanth Reddy /** 481afd3a579SSreekanth Reddy * mpi3mr_process_op_reply_q - Operational reply queue handler 482afd3a579SSreekanth Reddy * @mrioc: Adapter instance reference 483afd3a579SSreekanth Reddy * @op_reply_q: Operational reply queue info 484afd3a579SSreekanth Reddy * 485afd3a579SSreekanth Reddy * Checks the specific operational reply queue and drains the 486afd3a579SSreekanth Reddy * reply queue entries until the queue is empty and process the 487afd3a579SSreekanth Reddy * individual reply descriptors. 488afd3a579SSreekanth Reddy * 489afd3a579SSreekanth Reddy * Return: 0 if queue is already processed,or number of reply 490afd3a579SSreekanth Reddy * descriptors processed. 491afd3a579SSreekanth Reddy */ 492afd3a579SSreekanth Reddy int mpi3mr_process_op_reply_q(struct mpi3mr_ioc *mrioc, 493afd3a579SSreekanth Reddy struct op_reply_qinfo *op_reply_q) 494023ab2a9SKashyap Desai { 495023ab2a9SKashyap Desai struct op_req_qinfo *op_req_q; 496023ab2a9SKashyap Desai u32 exp_phase; 497023ab2a9SKashyap Desai u32 reply_ci; 498023ab2a9SKashyap Desai u32 num_op_reply = 0; 499023ab2a9SKashyap Desai u64 reply_dma = 0; 500023ab2a9SKashyap Desai struct mpi3_default_reply_descriptor *reply_desc; 501023ab2a9SKashyap Desai u16 req_q_idx = 0, reply_qidx; 502023ab2a9SKashyap Desai 503023ab2a9SKashyap Desai reply_qidx = op_reply_q->qid - 1; 504023ab2a9SKashyap Desai 505463429f8SKashyap Desai if (!atomic_add_unless(&op_reply_q->in_use, 1, 1)) 506463429f8SKashyap Desai return 0; 507463429f8SKashyap Desai 508023ab2a9SKashyap Desai exp_phase = op_reply_q->ephase; 509023ab2a9SKashyap Desai reply_ci = op_reply_q->ci; 510023ab2a9SKashyap Desai 511023ab2a9SKashyap Desai reply_desc = mpi3mr_get_reply_desc(op_reply_q, reply_ci); 512023ab2a9SKashyap Desai if ((le16_to_cpu(reply_desc->reply_flags) & 513023ab2a9SKashyap Desai MPI3_REPLY_DESCRIPT_FLAGS_PHASE_MASK) != exp_phase) { 514463429f8SKashyap Desai atomic_dec(&op_reply_q->in_use); 515023ab2a9SKashyap Desai return 0; 516023ab2a9SKashyap Desai } 517023ab2a9SKashyap Desai 518023ab2a9SKashyap Desai do { 519023ab2a9SKashyap Desai req_q_idx = le16_to_cpu(reply_desc->request_queue_id) - 1; 520023ab2a9SKashyap Desai op_req_q = &mrioc->req_qinfo[req_q_idx]; 521023ab2a9SKashyap Desai 522023ab2a9SKashyap Desai WRITE_ONCE(op_req_q->ci, le16_to_cpu(reply_desc->request_queue_ci)); 523023ab2a9SKashyap Desai mpi3mr_process_op_reply_desc(mrioc, reply_desc, &reply_dma, 524023ab2a9SKashyap Desai reply_qidx); 525463429f8SKashyap Desai atomic_dec(&op_reply_q->pend_ios); 526023ab2a9SKashyap Desai if (reply_dma) 527023ab2a9SKashyap Desai mpi3mr_repost_reply_buf(mrioc, reply_dma); 528023ab2a9SKashyap Desai num_op_reply++; 529023ab2a9SKashyap Desai 530023ab2a9SKashyap Desai if (++reply_ci == op_reply_q->num_replies) { 531023ab2a9SKashyap Desai reply_ci = 0; 532023ab2a9SKashyap Desai exp_phase ^= 1; 533023ab2a9SKashyap Desai } 534023ab2a9SKashyap Desai 535023ab2a9SKashyap Desai reply_desc = mpi3mr_get_reply_desc(op_reply_q, reply_ci); 536023ab2a9SKashyap Desai 537023ab2a9SKashyap Desai if ((le16_to_cpu(reply_desc->reply_flags) & 538023ab2a9SKashyap Desai MPI3_REPLY_DESCRIPT_FLAGS_PHASE_MASK) != exp_phase) 539023ab2a9SKashyap Desai break; 540*7f9f953dSSreekanth Reddy #ifndef CONFIG_PREEMPT_RT 541463429f8SKashyap Desai /* 542463429f8SKashyap Desai * Exit completion loop to avoid CPU lockup 543463429f8SKashyap Desai * Ensure remaining completion happens from threaded ISR. 544463429f8SKashyap Desai */ 545463429f8SKashyap Desai if (num_op_reply > mrioc->max_host_ios) { 546afd3a579SSreekanth Reddy op_reply_q->enable_irq_poll = true; 547463429f8SKashyap Desai break; 548463429f8SKashyap Desai } 549*7f9f953dSSreekanth Reddy #endif 550023ab2a9SKashyap Desai } while (1); 551023ab2a9SKashyap Desai 552023ab2a9SKashyap Desai writel(reply_ci, 553023ab2a9SKashyap Desai &mrioc->sysif_regs->oper_queue_indexes[reply_qidx].consumer_index); 554023ab2a9SKashyap Desai op_reply_q->ci = reply_ci; 555023ab2a9SKashyap Desai op_reply_q->ephase = exp_phase; 556023ab2a9SKashyap Desai 557463429f8SKashyap Desai atomic_dec(&op_reply_q->in_use); 558023ab2a9SKashyap Desai return num_op_reply; 559023ab2a9SKashyap Desai } 560023ab2a9SKashyap Desai 561afd3a579SSreekanth Reddy /** 562afd3a579SSreekanth Reddy * mpi3mr_blk_mq_poll - Operational reply queue handler 563afd3a579SSreekanth Reddy * @shost: SCSI Host reference 564afd3a579SSreekanth Reddy * @queue_num: Request queue number (w.r.t OS it is hardware context number) 565afd3a579SSreekanth Reddy * 566afd3a579SSreekanth Reddy * Checks the specific operational reply queue and drains the 567afd3a579SSreekanth Reddy * reply queue entries until the queue is empty and process the 568afd3a579SSreekanth Reddy * individual reply descriptors. 569afd3a579SSreekanth Reddy * 570afd3a579SSreekanth Reddy * Return: 0 if queue is already processed,or number of reply 571afd3a579SSreekanth Reddy * descriptors processed. 572afd3a579SSreekanth Reddy */ 573afd3a579SSreekanth Reddy int mpi3mr_blk_mq_poll(struct Scsi_Host *shost, unsigned int queue_num) 574afd3a579SSreekanth Reddy { 575afd3a579SSreekanth Reddy int num_entries = 0; 576afd3a579SSreekanth Reddy struct mpi3mr_ioc *mrioc; 577afd3a579SSreekanth Reddy 578afd3a579SSreekanth Reddy mrioc = (struct mpi3mr_ioc *)shost->hostdata; 579afd3a579SSreekanth Reddy 580afd3a579SSreekanth Reddy if ((mrioc->reset_in_progress || mrioc->prepare_for_reset)) 581afd3a579SSreekanth Reddy return 0; 582afd3a579SSreekanth Reddy 583afd3a579SSreekanth Reddy num_entries = mpi3mr_process_op_reply_q(mrioc, 584afd3a579SSreekanth Reddy &mrioc->op_reply_qinfo[queue_num]); 585afd3a579SSreekanth Reddy 586afd3a579SSreekanth Reddy return num_entries; 587afd3a579SSreekanth Reddy } 588afd3a579SSreekanth Reddy 589824a1566SKashyap Desai static irqreturn_t mpi3mr_isr_primary(int irq, void *privdata) 590824a1566SKashyap Desai { 591824a1566SKashyap Desai struct mpi3mr_intr_info *intr_info = privdata; 592824a1566SKashyap Desai struct mpi3mr_ioc *mrioc; 593824a1566SKashyap Desai u16 midx; 594463429f8SKashyap Desai u32 num_admin_replies = 0, num_op_reply = 0; 595824a1566SKashyap Desai 596824a1566SKashyap Desai if (!intr_info) 597824a1566SKashyap Desai return IRQ_NONE; 598824a1566SKashyap Desai 599824a1566SKashyap Desai mrioc = intr_info->mrioc; 600824a1566SKashyap Desai 601824a1566SKashyap Desai if (!mrioc->intr_enabled) 602824a1566SKashyap Desai return IRQ_NONE; 603824a1566SKashyap Desai 604824a1566SKashyap Desai midx = intr_info->msix_index; 605824a1566SKashyap Desai 606824a1566SKashyap Desai if (!midx) 607824a1566SKashyap Desai num_admin_replies = mpi3mr_process_admin_reply_q(mrioc); 608463429f8SKashyap Desai if (intr_info->op_reply_q) 609afd3a579SSreekanth Reddy num_op_reply = mpi3mr_process_op_reply_q(mrioc, 610afd3a579SSreekanth Reddy intr_info->op_reply_q); 611824a1566SKashyap Desai 612463429f8SKashyap Desai if (num_admin_replies || num_op_reply) 613824a1566SKashyap Desai return IRQ_HANDLED; 614824a1566SKashyap Desai else 615824a1566SKashyap Desai return IRQ_NONE; 616824a1566SKashyap Desai } 617824a1566SKashyap Desai 618*7f9f953dSSreekanth Reddy #ifndef CONFIG_PREEMPT_RT 619*7f9f953dSSreekanth Reddy 620824a1566SKashyap Desai static irqreturn_t mpi3mr_isr(int irq, void *privdata) 621824a1566SKashyap Desai { 622824a1566SKashyap Desai struct mpi3mr_intr_info *intr_info = privdata; 623463429f8SKashyap Desai struct mpi3mr_ioc *mrioc; 624463429f8SKashyap Desai u16 midx; 625824a1566SKashyap Desai int ret; 626824a1566SKashyap Desai 627824a1566SKashyap Desai if (!intr_info) 628824a1566SKashyap Desai return IRQ_NONE; 629824a1566SKashyap Desai 630463429f8SKashyap Desai mrioc = intr_info->mrioc; 631463429f8SKashyap Desai midx = intr_info->msix_index; 632824a1566SKashyap Desai /* Call primary ISR routine */ 633824a1566SKashyap Desai ret = mpi3mr_isr_primary(irq, privdata); 634824a1566SKashyap Desai 635463429f8SKashyap Desai /* 636463429f8SKashyap Desai * If more IOs are expected, schedule IRQ polling thread. 637463429f8SKashyap Desai * Otherwise exit from ISR. 638463429f8SKashyap Desai */ 639463429f8SKashyap Desai if (!intr_info->op_reply_q) 640824a1566SKashyap Desai return ret; 641463429f8SKashyap Desai 642463429f8SKashyap Desai if (!intr_info->op_reply_q->enable_irq_poll || 643463429f8SKashyap Desai !atomic_read(&intr_info->op_reply_q->pend_ios)) 644463429f8SKashyap Desai return ret; 645463429f8SKashyap Desai 646463429f8SKashyap Desai disable_irq_nosync(pci_irq_vector(mrioc->pdev, midx)); 647463429f8SKashyap Desai 648463429f8SKashyap Desai return IRQ_WAKE_THREAD; 649824a1566SKashyap Desai } 650824a1566SKashyap Desai 651824a1566SKashyap Desai /** 652824a1566SKashyap Desai * mpi3mr_isr_poll - Reply queue polling routine 653824a1566SKashyap Desai * @irq: IRQ 654824a1566SKashyap Desai * @privdata: Interrupt info 655824a1566SKashyap Desai * 656824a1566SKashyap Desai * poll for pending I/O completions in a loop until pending I/Os 657824a1566SKashyap Desai * present or controller queue depth I/Os are processed. 658824a1566SKashyap Desai * 659824a1566SKashyap Desai * Return: IRQ_NONE or IRQ_HANDLED 660824a1566SKashyap Desai */ 661824a1566SKashyap Desai static irqreturn_t mpi3mr_isr_poll(int irq, void *privdata) 662824a1566SKashyap Desai { 663463429f8SKashyap Desai struct mpi3mr_intr_info *intr_info = privdata; 664463429f8SKashyap Desai struct mpi3mr_ioc *mrioc; 665463429f8SKashyap Desai u16 midx; 666463429f8SKashyap Desai u32 num_op_reply = 0; 667463429f8SKashyap Desai 668463429f8SKashyap Desai if (!intr_info || !intr_info->op_reply_q) 669463429f8SKashyap Desai return IRQ_NONE; 670463429f8SKashyap Desai 671463429f8SKashyap Desai mrioc = intr_info->mrioc; 672463429f8SKashyap Desai midx = intr_info->msix_index; 673463429f8SKashyap Desai 674463429f8SKashyap Desai /* Poll for pending IOs completions */ 675463429f8SKashyap Desai do { 676463429f8SKashyap Desai if (!mrioc->intr_enabled) 677463429f8SKashyap Desai break; 678463429f8SKashyap Desai 679463429f8SKashyap Desai if (!midx) 680463429f8SKashyap Desai mpi3mr_process_admin_reply_q(mrioc); 681463429f8SKashyap Desai if (intr_info->op_reply_q) 682463429f8SKashyap Desai num_op_reply += 683afd3a579SSreekanth Reddy mpi3mr_process_op_reply_q(mrioc, 684afd3a579SSreekanth Reddy intr_info->op_reply_q); 685463429f8SKashyap Desai 686afd3a579SSreekanth Reddy usleep_range(MPI3MR_IRQ_POLL_SLEEP, 10 * MPI3MR_IRQ_POLL_SLEEP); 687463429f8SKashyap Desai 688463429f8SKashyap Desai } while (atomic_read(&intr_info->op_reply_q->pend_ios) && 689463429f8SKashyap Desai (num_op_reply < mrioc->max_host_ios)); 690463429f8SKashyap Desai 691463429f8SKashyap Desai intr_info->op_reply_q->enable_irq_poll = false; 692463429f8SKashyap Desai enable_irq(pci_irq_vector(mrioc->pdev, midx)); 693463429f8SKashyap Desai 694824a1566SKashyap Desai return IRQ_HANDLED; 695824a1566SKashyap Desai } 696824a1566SKashyap Desai 697*7f9f953dSSreekanth Reddy #endif 698*7f9f953dSSreekanth Reddy 699824a1566SKashyap Desai /** 700824a1566SKashyap Desai * mpi3mr_request_irq - Request IRQ and register ISR 701824a1566SKashyap Desai * @mrioc: Adapter instance reference 702824a1566SKashyap Desai * @index: IRQ vector index 703824a1566SKashyap Desai * 704824a1566SKashyap Desai * Request threaded ISR with primary ISR and secondary 705824a1566SKashyap Desai * 706824a1566SKashyap Desai * Return: 0 on success and non zero on failures. 707824a1566SKashyap Desai */ 708824a1566SKashyap Desai static inline int mpi3mr_request_irq(struct mpi3mr_ioc *mrioc, u16 index) 709824a1566SKashyap Desai { 710824a1566SKashyap Desai struct pci_dev *pdev = mrioc->pdev; 711824a1566SKashyap Desai struct mpi3mr_intr_info *intr_info = mrioc->intr_info + index; 712824a1566SKashyap Desai int retval = 0; 713824a1566SKashyap Desai 714824a1566SKashyap Desai intr_info->mrioc = mrioc; 715824a1566SKashyap Desai intr_info->msix_index = index; 716824a1566SKashyap Desai intr_info->op_reply_q = NULL; 717824a1566SKashyap Desai 718824a1566SKashyap Desai snprintf(intr_info->name, MPI3MR_NAME_LENGTH, "%s%d-msix%d", 719824a1566SKashyap Desai mrioc->driver_name, mrioc->id, index); 720824a1566SKashyap Desai 721*7f9f953dSSreekanth Reddy #ifndef CONFIG_PREEMPT_RT 722824a1566SKashyap Desai retval = request_threaded_irq(pci_irq_vector(pdev, index), mpi3mr_isr, 723824a1566SKashyap Desai mpi3mr_isr_poll, IRQF_SHARED, intr_info->name, intr_info); 724*7f9f953dSSreekanth Reddy #else 725*7f9f953dSSreekanth Reddy retval = request_threaded_irq(pci_irq_vector(pdev, index), mpi3mr_isr_primary, 726*7f9f953dSSreekanth Reddy NULL, IRQF_SHARED, intr_info->name, intr_info); 727*7f9f953dSSreekanth Reddy #endif 728824a1566SKashyap Desai if (retval) { 729824a1566SKashyap Desai ioc_err(mrioc, "%s: Unable to allocate interrupt %d!\n", 730824a1566SKashyap Desai intr_info->name, pci_irq_vector(pdev, index)); 731824a1566SKashyap Desai return retval; 732824a1566SKashyap Desai } 733824a1566SKashyap Desai 734824a1566SKashyap Desai return retval; 735824a1566SKashyap Desai } 736824a1566SKashyap Desai 737afd3a579SSreekanth Reddy static void mpi3mr_calc_poll_queues(struct mpi3mr_ioc *mrioc, u16 max_vectors) 738afd3a579SSreekanth Reddy { 739afd3a579SSreekanth Reddy if (!mrioc->requested_poll_qcount) 740afd3a579SSreekanth Reddy return; 741afd3a579SSreekanth Reddy 742afd3a579SSreekanth Reddy /* Reserved for Admin and Default Queue */ 743afd3a579SSreekanth Reddy if (max_vectors > 2 && 744afd3a579SSreekanth Reddy (mrioc->requested_poll_qcount < max_vectors - 2)) { 745afd3a579SSreekanth Reddy ioc_info(mrioc, 746afd3a579SSreekanth Reddy "enabled polled queues (%d) msix (%d)\n", 747afd3a579SSreekanth Reddy mrioc->requested_poll_qcount, max_vectors); 748afd3a579SSreekanth Reddy } else { 749afd3a579SSreekanth Reddy ioc_info(mrioc, 750afd3a579SSreekanth Reddy "disabled polled queues (%d) msix (%d) because of no resources for default queue\n", 751afd3a579SSreekanth Reddy mrioc->requested_poll_qcount, max_vectors); 752afd3a579SSreekanth Reddy mrioc->requested_poll_qcount = 0; 753afd3a579SSreekanth Reddy } 754afd3a579SSreekanth Reddy } 755afd3a579SSreekanth Reddy 756824a1566SKashyap Desai /** 757824a1566SKashyap Desai * mpi3mr_setup_isr - Setup ISR for the controller 758824a1566SKashyap Desai * @mrioc: Adapter instance reference 759824a1566SKashyap Desai * @setup_one: Request one IRQ or more 760824a1566SKashyap Desai * 761824a1566SKashyap Desai * Allocate IRQ vectors and call mpi3mr_request_irq to setup ISR 762824a1566SKashyap Desai * 763824a1566SKashyap Desai * Return: 0 on success and non zero on failures. 764824a1566SKashyap Desai */ 765824a1566SKashyap Desai static int mpi3mr_setup_isr(struct mpi3mr_ioc *mrioc, u8 setup_one) 766824a1566SKashyap Desai { 767824a1566SKashyap Desai unsigned int irq_flags = PCI_IRQ_MSIX; 768afd3a579SSreekanth Reddy int max_vectors, min_vec; 7692938beddSDan Carpenter int retval; 7702938beddSDan Carpenter int i; 771afd3a579SSreekanth Reddy struct irq_affinity desc = { .pre_vectors = 1, .post_vectors = 1 }; 772824a1566SKashyap Desai 773fe6db615SSreekanth Reddy if (mrioc->is_intr_info_set) 774fe6db615SSreekanth Reddy return 0; 775fe6db615SSreekanth Reddy 776824a1566SKashyap Desai mpi3mr_cleanup_isr(mrioc); 777824a1566SKashyap Desai 778afd3a579SSreekanth Reddy if (setup_one || reset_devices) { 779824a1566SKashyap Desai max_vectors = 1; 780afd3a579SSreekanth Reddy retval = pci_alloc_irq_vectors(mrioc->pdev, 781afd3a579SSreekanth Reddy 1, max_vectors, irq_flags); 782afd3a579SSreekanth Reddy if (retval < 0) { 783afd3a579SSreekanth Reddy ioc_err(mrioc, "cannot allocate irq vectors, ret %d\n", 784afd3a579SSreekanth Reddy retval); 785afd3a579SSreekanth Reddy goto out_failed; 786afd3a579SSreekanth Reddy } 787afd3a579SSreekanth Reddy } else { 788824a1566SKashyap Desai max_vectors = 789afd3a579SSreekanth Reddy min_t(int, mrioc->cpu_count + 1 + 790afd3a579SSreekanth Reddy mrioc->requested_poll_qcount, mrioc->msix_count); 791afd3a579SSreekanth Reddy 792afd3a579SSreekanth Reddy mpi3mr_calc_poll_queues(mrioc, max_vectors); 793824a1566SKashyap Desai 794824a1566SKashyap Desai ioc_info(mrioc, 795824a1566SKashyap Desai "MSI-X vectors supported: %d, no of cores: %d,", 796824a1566SKashyap Desai mrioc->msix_count, mrioc->cpu_count); 797824a1566SKashyap Desai ioc_info(mrioc, 798afd3a579SSreekanth Reddy "MSI-x vectors requested: %d poll_queues %d\n", 799afd3a579SSreekanth Reddy max_vectors, mrioc->requested_poll_qcount); 800824a1566SKashyap Desai 801afd3a579SSreekanth Reddy desc.post_vectors = mrioc->requested_poll_qcount; 802afd3a579SSreekanth Reddy min_vec = desc.pre_vectors + desc.post_vectors; 803824a1566SKashyap Desai irq_flags |= PCI_IRQ_AFFINITY | PCI_IRQ_ALL_TYPES; 804824a1566SKashyap Desai 8052938beddSDan Carpenter retval = pci_alloc_irq_vectors_affinity(mrioc->pdev, 806afd3a579SSreekanth Reddy min_vec, max_vectors, irq_flags, &desc); 807afd3a579SSreekanth Reddy 8082938beddSDan Carpenter if (retval < 0) { 809afd3a579SSreekanth Reddy ioc_err(mrioc, "cannot allocate irq vectors, ret %d\n", 810afd3a579SSreekanth Reddy retval); 811824a1566SKashyap Desai goto out_failed; 812824a1566SKashyap Desai } 813afd3a579SSreekanth Reddy 814afd3a579SSreekanth Reddy 815c9566231SKashyap Desai /* 816c9566231SKashyap Desai * If only one MSI-x is allocated, then MSI-x 0 will be shared 817c9566231SKashyap Desai * between Admin queue and operational queue 818c9566231SKashyap Desai */ 819afd3a579SSreekanth Reddy if (retval == min_vec) 820c9566231SKashyap Desai mrioc->op_reply_q_offset = 0; 821afd3a579SSreekanth Reddy else if (retval != (max_vectors)) { 822afd3a579SSreekanth Reddy ioc_info(mrioc, 823afd3a579SSreekanth Reddy "allocated vectors (%d) are less than configured (%d)\n", 824afd3a579SSreekanth Reddy retval, max_vectors); 825afd3a579SSreekanth Reddy } 826824a1566SKashyap Desai 8272938beddSDan Carpenter max_vectors = retval; 828afd3a579SSreekanth Reddy mrioc->op_reply_q_offset = (max_vectors > 1) ? 1 : 0; 829afd3a579SSreekanth Reddy 830afd3a579SSreekanth Reddy mpi3mr_calc_poll_queues(mrioc, max_vectors); 831afd3a579SSreekanth Reddy 832824a1566SKashyap Desai } 833afd3a579SSreekanth Reddy 834824a1566SKashyap Desai mrioc->intr_info = kzalloc(sizeof(struct mpi3mr_intr_info) * max_vectors, 835824a1566SKashyap Desai GFP_KERNEL); 836824a1566SKashyap Desai if (!mrioc->intr_info) { 8372938beddSDan Carpenter retval = -ENOMEM; 838824a1566SKashyap Desai pci_free_irq_vectors(mrioc->pdev); 839824a1566SKashyap Desai goto out_failed; 840824a1566SKashyap Desai } 841824a1566SKashyap Desai for (i = 0; i < max_vectors; i++) { 842824a1566SKashyap Desai retval = mpi3mr_request_irq(mrioc, i); 843824a1566SKashyap Desai if (retval) { 844824a1566SKashyap Desai mrioc->intr_info_count = i; 845824a1566SKashyap Desai goto out_failed; 846824a1566SKashyap Desai } 847824a1566SKashyap Desai } 848fe6db615SSreekanth Reddy if (reset_devices || !setup_one) 849fe6db615SSreekanth Reddy mrioc->is_intr_info_set = true; 850824a1566SKashyap Desai mrioc->intr_info_count = max_vectors; 851824a1566SKashyap Desai mpi3mr_ioc_enable_intr(mrioc); 8522938beddSDan Carpenter return 0; 8532938beddSDan Carpenter 854824a1566SKashyap Desai out_failed: 855824a1566SKashyap Desai mpi3mr_cleanup_isr(mrioc); 856824a1566SKashyap Desai 857824a1566SKashyap Desai return retval; 858824a1566SKashyap Desai } 859824a1566SKashyap Desai 860824a1566SKashyap Desai static const struct { 861824a1566SKashyap Desai enum mpi3mr_iocstate value; 862824a1566SKashyap Desai char *name; 863824a1566SKashyap Desai } mrioc_states[] = { 864824a1566SKashyap Desai { MRIOC_STATE_READY, "ready" }, 865824a1566SKashyap Desai { MRIOC_STATE_FAULT, "fault" }, 866824a1566SKashyap Desai { MRIOC_STATE_RESET, "reset" }, 867824a1566SKashyap Desai { MRIOC_STATE_BECOMING_READY, "becoming ready" }, 868824a1566SKashyap Desai { MRIOC_STATE_RESET_REQUESTED, "reset requested" }, 869824a1566SKashyap Desai { MRIOC_STATE_UNRECOVERABLE, "unrecoverable error" }, 870824a1566SKashyap Desai }; 871824a1566SKashyap Desai 872824a1566SKashyap Desai static const char *mpi3mr_iocstate_name(enum mpi3mr_iocstate mrioc_state) 873824a1566SKashyap Desai { 874824a1566SKashyap Desai int i; 875824a1566SKashyap Desai char *name = NULL; 876824a1566SKashyap Desai 877824a1566SKashyap Desai for (i = 0; i < ARRAY_SIZE(mrioc_states); i++) { 878824a1566SKashyap Desai if (mrioc_states[i].value == mrioc_state) { 879824a1566SKashyap Desai name = mrioc_states[i].name; 880824a1566SKashyap Desai break; 881824a1566SKashyap Desai } 882824a1566SKashyap Desai } 883824a1566SKashyap Desai return name; 884824a1566SKashyap Desai } 885824a1566SKashyap Desai 886f061178eSKashyap Desai /* Reset reason to name mapper structure*/ 887f061178eSKashyap Desai static const struct { 888f061178eSKashyap Desai enum mpi3mr_reset_reason value; 889f061178eSKashyap Desai char *name; 890f061178eSKashyap Desai } mpi3mr_reset_reason_codes[] = { 891f061178eSKashyap Desai { MPI3MR_RESET_FROM_BRINGUP, "timeout in bringup" }, 892f061178eSKashyap Desai { MPI3MR_RESET_FROM_FAULT_WATCH, "fault" }, 893f5e6d5a3SSumit Saxena { MPI3MR_RESET_FROM_APP, "application invocation" }, 894f061178eSKashyap Desai { MPI3MR_RESET_FROM_EH_HOS, "error handling" }, 895f061178eSKashyap Desai { MPI3MR_RESET_FROM_TM_TIMEOUT, "TM timeout" }, 896f5e6d5a3SSumit Saxena { MPI3MR_RESET_FROM_APP_TIMEOUT, "application command timeout" }, 897f061178eSKashyap Desai { MPI3MR_RESET_FROM_MUR_FAILURE, "MUR failure" }, 898f061178eSKashyap Desai { MPI3MR_RESET_FROM_CTLR_CLEANUP, "timeout in controller cleanup" }, 899f061178eSKashyap Desai { MPI3MR_RESET_FROM_CIACTIV_FAULT, "component image activation fault" }, 900f061178eSKashyap Desai { MPI3MR_RESET_FROM_PE_TIMEOUT, "port enable timeout" }, 901f061178eSKashyap Desai { MPI3MR_RESET_FROM_TSU_TIMEOUT, "time stamp update timeout" }, 902f061178eSKashyap Desai { MPI3MR_RESET_FROM_DELREQQ_TIMEOUT, "delete request queue timeout" }, 903f061178eSKashyap Desai { MPI3MR_RESET_FROM_DELREPQ_TIMEOUT, "delete reply queue timeout" }, 904f061178eSKashyap Desai { 905f061178eSKashyap Desai MPI3MR_RESET_FROM_CREATEREPQ_TIMEOUT, 906f061178eSKashyap Desai "create request queue timeout" 907f061178eSKashyap Desai }, 908f061178eSKashyap Desai { 909f061178eSKashyap Desai MPI3MR_RESET_FROM_CREATEREQQ_TIMEOUT, 910f061178eSKashyap Desai "create reply queue timeout" 911f061178eSKashyap Desai }, 912f061178eSKashyap Desai { MPI3MR_RESET_FROM_IOCFACTS_TIMEOUT, "IOC facts timeout" }, 913f061178eSKashyap Desai { MPI3MR_RESET_FROM_IOCINIT_TIMEOUT, "IOC init timeout" }, 914f061178eSKashyap Desai { MPI3MR_RESET_FROM_EVTNOTIFY_TIMEOUT, "event notify timeout" }, 915f061178eSKashyap Desai { MPI3MR_RESET_FROM_EVTACK_TIMEOUT, "event acknowledgment timeout" }, 916f061178eSKashyap Desai { 917f061178eSKashyap Desai MPI3MR_RESET_FROM_CIACTVRST_TIMER, 918f061178eSKashyap Desai "component image activation timeout" 919f061178eSKashyap Desai }, 920f061178eSKashyap Desai { 921f061178eSKashyap Desai MPI3MR_RESET_FROM_GETPKGVER_TIMEOUT, 922f061178eSKashyap Desai "get package version timeout" 923f061178eSKashyap Desai }, 924f061178eSKashyap Desai { MPI3MR_RESET_FROM_SYSFS, "sysfs invocation" }, 925f061178eSKashyap Desai { MPI3MR_RESET_FROM_SYSFS_TIMEOUT, "sysfs TM timeout" }, 9265867b856SColin Ian King { MPI3MR_RESET_FROM_FIRMWARE, "firmware asynchronous reset" }, 92732d457d5SSreekanth Reddy { MPI3MR_RESET_FROM_CFG_REQ_TIMEOUT, "configuration request timeout"}, 9282bd37e28SSreekanth Reddy { MPI3MR_RESET_FROM_SAS_TRANSPORT_TIMEOUT, "timeout of a SAS transport layer request" }, 929f061178eSKashyap Desai }; 930f061178eSKashyap Desai 931f061178eSKashyap Desai /** 932f061178eSKashyap Desai * mpi3mr_reset_rc_name - get reset reason code name 933f061178eSKashyap Desai * @reason_code: reset reason code value 934f061178eSKashyap Desai * 935f061178eSKashyap Desai * Map reset reason to an NULL terminated ASCII string 936f061178eSKashyap Desai * 937f061178eSKashyap Desai * Return: name corresponding to reset reason value or NULL. 938f061178eSKashyap Desai */ 939f061178eSKashyap Desai static const char *mpi3mr_reset_rc_name(enum mpi3mr_reset_reason reason_code) 940f061178eSKashyap Desai { 941f061178eSKashyap Desai int i; 942f061178eSKashyap Desai char *name = NULL; 943f061178eSKashyap Desai 944f061178eSKashyap Desai for (i = 0; i < ARRAY_SIZE(mpi3mr_reset_reason_codes); i++) { 945f061178eSKashyap Desai if (mpi3mr_reset_reason_codes[i].value == reason_code) { 946f061178eSKashyap Desai name = mpi3mr_reset_reason_codes[i].name; 947f061178eSKashyap Desai break; 948f061178eSKashyap Desai } 949f061178eSKashyap Desai } 950f061178eSKashyap Desai return name; 951f061178eSKashyap Desai } 952f061178eSKashyap Desai 953f061178eSKashyap Desai /* Reset type to name mapper structure*/ 954f061178eSKashyap Desai static const struct { 955f061178eSKashyap Desai u16 reset_type; 956f061178eSKashyap Desai char *name; 957f061178eSKashyap Desai } mpi3mr_reset_types[] = { 958f061178eSKashyap Desai { MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET, "soft" }, 959f061178eSKashyap Desai { MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, "diag fault" }, 960f061178eSKashyap Desai }; 961f061178eSKashyap Desai 962f061178eSKashyap Desai /** 963f061178eSKashyap Desai * mpi3mr_reset_type_name - get reset type name 964f061178eSKashyap Desai * @reset_type: reset type value 965f061178eSKashyap Desai * 966f061178eSKashyap Desai * Map reset type to an NULL terminated ASCII string 967f061178eSKashyap Desai * 968f061178eSKashyap Desai * Return: name corresponding to reset type value or NULL. 969f061178eSKashyap Desai */ 970f061178eSKashyap Desai static const char *mpi3mr_reset_type_name(u16 reset_type) 971f061178eSKashyap Desai { 972f061178eSKashyap Desai int i; 973f061178eSKashyap Desai char *name = NULL; 974f061178eSKashyap Desai 975f061178eSKashyap Desai for (i = 0; i < ARRAY_SIZE(mpi3mr_reset_types); i++) { 976f061178eSKashyap Desai if (mpi3mr_reset_types[i].reset_type == reset_type) { 977f061178eSKashyap Desai name = mpi3mr_reset_types[i].name; 978f061178eSKashyap Desai break; 979f061178eSKashyap Desai } 980f061178eSKashyap Desai } 981f061178eSKashyap Desai return name; 982f061178eSKashyap Desai } 983f061178eSKashyap Desai 984824a1566SKashyap Desai /** 985824a1566SKashyap Desai * mpi3mr_print_fault_info - Display fault information 986824a1566SKashyap Desai * @mrioc: Adapter instance reference 987824a1566SKashyap Desai * 988824a1566SKashyap Desai * Display the controller fault information if there is a 989824a1566SKashyap Desai * controller fault. 990824a1566SKashyap Desai * 991824a1566SKashyap Desai * Return: Nothing. 992824a1566SKashyap Desai */ 993b64845a7SSreekanth Reddy void mpi3mr_print_fault_info(struct mpi3mr_ioc *mrioc) 994824a1566SKashyap Desai { 995824a1566SKashyap Desai u32 ioc_status, code, code1, code2, code3; 996824a1566SKashyap Desai 997824a1566SKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 998824a1566SKashyap Desai 999824a1566SKashyap Desai if (ioc_status & MPI3_SYSIF_IOC_STATUS_FAULT) { 1000824a1566SKashyap Desai code = readl(&mrioc->sysif_regs->fault); 1001824a1566SKashyap Desai code1 = readl(&mrioc->sysif_regs->fault_info[0]); 1002824a1566SKashyap Desai code2 = readl(&mrioc->sysif_regs->fault_info[1]); 1003824a1566SKashyap Desai code3 = readl(&mrioc->sysif_regs->fault_info[2]); 1004824a1566SKashyap Desai 1005824a1566SKashyap Desai ioc_info(mrioc, 1006824a1566SKashyap Desai "fault code(0x%08X): Additional code: (0x%08X:0x%08X:0x%08X)\n", 1007824a1566SKashyap Desai code, code1, code2, code3); 1008824a1566SKashyap Desai } 1009824a1566SKashyap Desai } 1010824a1566SKashyap Desai 1011824a1566SKashyap Desai /** 1012824a1566SKashyap Desai * mpi3mr_get_iocstate - Get IOC State 1013824a1566SKashyap Desai * @mrioc: Adapter instance reference 1014824a1566SKashyap Desai * 1015824a1566SKashyap Desai * Return a proper IOC state enum based on the IOC status and 1016824a1566SKashyap Desai * IOC configuration and unrcoverable state of the controller. 1017824a1566SKashyap Desai * 1018824a1566SKashyap Desai * Return: Current IOC state. 1019824a1566SKashyap Desai */ 1020824a1566SKashyap Desai enum mpi3mr_iocstate mpi3mr_get_iocstate(struct mpi3mr_ioc *mrioc) 1021824a1566SKashyap Desai { 1022824a1566SKashyap Desai u32 ioc_status, ioc_config; 1023824a1566SKashyap Desai u8 ready, enabled; 1024824a1566SKashyap Desai 1025824a1566SKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 1026824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 1027824a1566SKashyap Desai 1028824a1566SKashyap Desai if (mrioc->unrecoverable) 1029824a1566SKashyap Desai return MRIOC_STATE_UNRECOVERABLE; 1030824a1566SKashyap Desai if (ioc_status & MPI3_SYSIF_IOC_STATUS_FAULT) 1031824a1566SKashyap Desai return MRIOC_STATE_FAULT; 1032824a1566SKashyap Desai 1033824a1566SKashyap Desai ready = (ioc_status & MPI3_SYSIF_IOC_STATUS_READY); 1034824a1566SKashyap Desai enabled = (ioc_config & MPI3_SYSIF_IOC_CONFIG_ENABLE_IOC); 1035824a1566SKashyap Desai 1036824a1566SKashyap Desai if (ready && enabled) 1037824a1566SKashyap Desai return MRIOC_STATE_READY; 1038824a1566SKashyap Desai if ((!ready) && (!enabled)) 1039824a1566SKashyap Desai return MRIOC_STATE_RESET; 1040824a1566SKashyap Desai if ((!ready) && (enabled)) 1041824a1566SKashyap Desai return MRIOC_STATE_BECOMING_READY; 1042824a1566SKashyap Desai 1043824a1566SKashyap Desai return MRIOC_STATE_RESET_REQUESTED; 1044824a1566SKashyap Desai } 1045824a1566SKashyap Desai 1046824a1566SKashyap Desai /** 1047824a1566SKashyap Desai * mpi3mr_clear_reset_history - clear reset history 1048824a1566SKashyap Desai * @mrioc: Adapter instance reference 1049824a1566SKashyap Desai * 1050824a1566SKashyap Desai * Write the reset history bit in IOC status to clear the bit, 1051824a1566SKashyap Desai * if it is already set. 1052824a1566SKashyap Desai * 1053824a1566SKashyap Desai * Return: Nothing. 1054824a1566SKashyap Desai */ 1055824a1566SKashyap Desai static inline void mpi3mr_clear_reset_history(struct mpi3mr_ioc *mrioc) 1056824a1566SKashyap Desai { 1057824a1566SKashyap Desai u32 ioc_status; 1058824a1566SKashyap Desai 1059824a1566SKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 1060824a1566SKashyap Desai if (ioc_status & MPI3_SYSIF_IOC_STATUS_RESET_HISTORY) 1061824a1566SKashyap Desai writel(ioc_status, &mrioc->sysif_regs->ioc_status); 1062824a1566SKashyap Desai } 1063824a1566SKashyap Desai 1064824a1566SKashyap Desai /** 1065824a1566SKashyap Desai * mpi3mr_issue_and_process_mur - Message unit Reset handler 1066824a1566SKashyap Desai * @mrioc: Adapter instance reference 1067824a1566SKashyap Desai * @reset_reason: Reset reason code 1068824a1566SKashyap Desai * 1069824a1566SKashyap Desai * Issue Message unit Reset to the controller and wait for it to 1070824a1566SKashyap Desai * be complete. 1071824a1566SKashyap Desai * 1072824a1566SKashyap Desai * Return: 0 on success, -1 on failure. 1073824a1566SKashyap Desai */ 1074824a1566SKashyap Desai static int mpi3mr_issue_and_process_mur(struct mpi3mr_ioc *mrioc, 1075824a1566SKashyap Desai u32 reset_reason) 1076824a1566SKashyap Desai { 1077824a1566SKashyap Desai u32 ioc_config, timeout, ioc_status; 1078824a1566SKashyap Desai int retval = -1; 1079824a1566SKashyap Desai 1080824a1566SKashyap Desai ioc_info(mrioc, "Issuing Message unit Reset(MUR)\n"); 1081824a1566SKashyap Desai if (mrioc->unrecoverable) { 1082824a1566SKashyap Desai ioc_info(mrioc, "IOC is unrecoverable MUR not issued\n"); 1083824a1566SKashyap Desai return retval; 1084824a1566SKashyap Desai } 1085824a1566SKashyap Desai mpi3mr_clear_reset_history(mrioc); 1086824a1566SKashyap Desai writel(reset_reason, &mrioc->sysif_regs->scratchpad[0]); 1087824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 1088824a1566SKashyap Desai ioc_config &= ~MPI3_SYSIF_IOC_CONFIG_ENABLE_IOC; 1089824a1566SKashyap Desai writel(ioc_config, &mrioc->sysif_regs->ioc_configuration); 1090824a1566SKashyap Desai 1091b64845a7SSreekanth Reddy timeout = MPI3MR_RESET_ACK_TIMEOUT * 10; 1092824a1566SKashyap Desai do { 1093824a1566SKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 1094824a1566SKashyap Desai if ((ioc_status & MPI3_SYSIF_IOC_STATUS_RESET_HISTORY)) { 1095824a1566SKashyap Desai mpi3mr_clear_reset_history(mrioc); 1096824a1566SKashyap Desai break; 1097824a1566SKashyap Desai } 1098b64845a7SSreekanth Reddy if (ioc_status & MPI3_SYSIF_IOC_STATUS_FAULT) { 1099b64845a7SSreekanth Reddy mpi3mr_print_fault_info(mrioc); 1100b64845a7SSreekanth Reddy break; 1101824a1566SKashyap Desai } 1102824a1566SKashyap Desai msleep(100); 1103824a1566SKashyap Desai } while (--timeout); 1104824a1566SKashyap Desai 1105824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 1106b64845a7SSreekanth Reddy if (timeout && !((ioc_status & MPI3_SYSIF_IOC_STATUS_READY) || 1107b64845a7SSreekanth Reddy (ioc_status & MPI3_SYSIF_IOC_STATUS_FAULT) || 1108b64845a7SSreekanth Reddy (ioc_config & MPI3_SYSIF_IOC_CONFIG_ENABLE_IOC))) 1109b64845a7SSreekanth Reddy retval = 0; 1110824a1566SKashyap Desai 1111824a1566SKashyap Desai ioc_info(mrioc, "Base IOC Sts/Config after %s MUR is (0x%x)/(0x%x)\n", 1112824a1566SKashyap Desai (!retval) ? "successful" : "failed", ioc_status, ioc_config); 1113824a1566SKashyap Desai return retval; 1114824a1566SKashyap Desai } 1115824a1566SKashyap Desai 1116824a1566SKashyap Desai /** 1117c5758fc7SSreekanth Reddy * mpi3mr_revalidate_factsdata - validate IOCFacts parameters 1118c5758fc7SSreekanth Reddy * during reset/resume 1119c5758fc7SSreekanth Reddy * @mrioc: Adapter instance reference 1120c5758fc7SSreekanth Reddy * 1121c5758fc7SSreekanth Reddy * Return zero if the new IOCFacts parameters value is compatible with 1122c5758fc7SSreekanth Reddy * older values else return -EPERM 1123c5758fc7SSreekanth Reddy */ 1124c5758fc7SSreekanth Reddy static int 1125c5758fc7SSreekanth Reddy mpi3mr_revalidate_factsdata(struct mpi3mr_ioc *mrioc) 1126c5758fc7SSreekanth Reddy { 1127c5758fc7SSreekanth Reddy u16 dev_handle_bitmap_sz; 1128c5758fc7SSreekanth Reddy void *removepend_bitmap; 1129c5758fc7SSreekanth Reddy 1130c5758fc7SSreekanth Reddy if (mrioc->facts.reply_sz > mrioc->reply_sz) { 1131c5758fc7SSreekanth Reddy ioc_err(mrioc, 1132c5758fc7SSreekanth Reddy "cannot increase reply size from %d to %d\n", 1133c5758fc7SSreekanth Reddy mrioc->reply_sz, mrioc->facts.reply_sz); 1134c5758fc7SSreekanth Reddy return -EPERM; 1135c5758fc7SSreekanth Reddy } 1136c5758fc7SSreekanth Reddy 1137c5758fc7SSreekanth Reddy if (mrioc->facts.max_op_reply_q < mrioc->num_op_reply_q) { 1138c5758fc7SSreekanth Reddy ioc_err(mrioc, 1139c5758fc7SSreekanth Reddy "cannot reduce number of operational reply queues from %d to %d\n", 1140c5758fc7SSreekanth Reddy mrioc->num_op_reply_q, 1141c5758fc7SSreekanth Reddy mrioc->facts.max_op_reply_q); 1142c5758fc7SSreekanth Reddy return -EPERM; 1143c5758fc7SSreekanth Reddy } 1144c5758fc7SSreekanth Reddy 1145c5758fc7SSreekanth Reddy if (mrioc->facts.max_op_req_q < mrioc->num_op_req_q) { 1146c5758fc7SSreekanth Reddy ioc_err(mrioc, 1147c5758fc7SSreekanth Reddy "cannot reduce number of operational request queues from %d to %d\n", 1148c5758fc7SSreekanth Reddy mrioc->num_op_req_q, mrioc->facts.max_op_req_q); 1149c5758fc7SSreekanth Reddy return -EPERM; 1150c5758fc7SSreekanth Reddy } 1151c5758fc7SSreekanth Reddy 1152c4723e68SSreekanth Reddy if ((mrioc->sas_transport_enabled) && (mrioc->facts.ioc_capabilities & 1153c4723e68SSreekanth Reddy MPI3_IOCFACTS_CAPABILITY_MULTIPATH_ENABLED)) 1154c4723e68SSreekanth Reddy ioc_err(mrioc, 1155c4723e68SSreekanth Reddy "critical error: multipath capability is enabled at the\n" 1156c4723e68SSreekanth Reddy "\tcontroller while sas transport support is enabled at the\n" 1157c4723e68SSreekanth Reddy "\tdriver, please reboot the system or reload the driver\n"); 1158c4723e68SSreekanth Reddy 1159c5758fc7SSreekanth Reddy dev_handle_bitmap_sz = mrioc->facts.max_devhandle / 8; 1160c5758fc7SSreekanth Reddy if (mrioc->facts.max_devhandle % 8) 1161c5758fc7SSreekanth Reddy dev_handle_bitmap_sz++; 1162c5758fc7SSreekanth Reddy if (dev_handle_bitmap_sz > mrioc->dev_handle_bitmap_sz) { 1163c5758fc7SSreekanth Reddy removepend_bitmap = krealloc(mrioc->removepend_bitmap, 1164c5758fc7SSreekanth Reddy dev_handle_bitmap_sz, GFP_KERNEL); 1165c5758fc7SSreekanth Reddy if (!removepend_bitmap) { 1166c5758fc7SSreekanth Reddy ioc_err(mrioc, 1167c5758fc7SSreekanth Reddy "failed to increase removepend_bitmap sz from: %d to %d\n", 1168c5758fc7SSreekanth Reddy mrioc->dev_handle_bitmap_sz, dev_handle_bitmap_sz); 1169c5758fc7SSreekanth Reddy return -EPERM; 1170c5758fc7SSreekanth Reddy } 1171c5758fc7SSreekanth Reddy memset(removepend_bitmap + mrioc->dev_handle_bitmap_sz, 0, 1172c5758fc7SSreekanth Reddy dev_handle_bitmap_sz - mrioc->dev_handle_bitmap_sz); 1173c5758fc7SSreekanth Reddy mrioc->removepend_bitmap = removepend_bitmap; 1174c5758fc7SSreekanth Reddy ioc_info(mrioc, 1175c5758fc7SSreekanth Reddy "increased dev_handle_bitmap_sz from %d to %d\n", 1176c5758fc7SSreekanth Reddy mrioc->dev_handle_bitmap_sz, dev_handle_bitmap_sz); 1177c5758fc7SSreekanth Reddy mrioc->dev_handle_bitmap_sz = dev_handle_bitmap_sz; 1178c5758fc7SSreekanth Reddy } 1179c5758fc7SSreekanth Reddy 1180c5758fc7SSreekanth Reddy return 0; 1181c5758fc7SSreekanth Reddy } 1182c5758fc7SSreekanth Reddy 1183c5758fc7SSreekanth Reddy /** 1184824a1566SKashyap Desai * mpi3mr_bring_ioc_ready - Bring controller to ready state 1185824a1566SKashyap Desai * @mrioc: Adapter instance reference 1186824a1566SKashyap Desai * 1187824a1566SKashyap Desai * Set Enable IOC bit in IOC configuration register and wait for 1188824a1566SKashyap Desai * the controller to become ready. 1189824a1566SKashyap Desai * 119059bd9cfeSSreekanth Reddy * Return: 0 on success, appropriate error on failure. 1191824a1566SKashyap Desai */ 1192824a1566SKashyap Desai static int mpi3mr_bring_ioc_ready(struct mpi3mr_ioc *mrioc) 1193824a1566SKashyap Desai { 119459bd9cfeSSreekanth Reddy u32 ioc_config, ioc_status, timeout; 119559bd9cfeSSreekanth Reddy int retval = 0; 119659bd9cfeSSreekanth Reddy enum mpi3mr_iocstate ioc_state; 119759bd9cfeSSreekanth Reddy u64 base_info; 1198824a1566SKashyap Desai 119959bd9cfeSSreekanth Reddy ioc_status = readl(&mrioc->sysif_regs->ioc_status); 120059bd9cfeSSreekanth Reddy ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 120159bd9cfeSSreekanth Reddy base_info = lo_hi_readq(&mrioc->sysif_regs->ioc_information); 120259bd9cfeSSreekanth Reddy ioc_info(mrioc, "ioc_status(0x%08x), ioc_config(0x%08x), ioc_info(0x%016llx) at the bringup\n", 120359bd9cfeSSreekanth Reddy ioc_status, ioc_config, base_info); 120459bd9cfeSSreekanth Reddy 120559bd9cfeSSreekanth Reddy /*The timeout value is in 2sec unit, changing it to seconds*/ 120659bd9cfeSSreekanth Reddy mrioc->ready_timeout = 120759bd9cfeSSreekanth Reddy ((base_info & MPI3_SYSIF_IOC_INFO_LOW_TIMEOUT_MASK) >> 120859bd9cfeSSreekanth Reddy MPI3_SYSIF_IOC_INFO_LOW_TIMEOUT_SHIFT) * 2; 120959bd9cfeSSreekanth Reddy 121059bd9cfeSSreekanth Reddy ioc_info(mrioc, "ready timeout: %d seconds\n", mrioc->ready_timeout); 121159bd9cfeSSreekanth Reddy 121259bd9cfeSSreekanth Reddy ioc_state = mpi3mr_get_iocstate(mrioc); 121359bd9cfeSSreekanth Reddy ioc_info(mrioc, "controller is in %s state during detection\n", 121459bd9cfeSSreekanth Reddy mpi3mr_iocstate_name(ioc_state)); 121559bd9cfeSSreekanth Reddy 121659bd9cfeSSreekanth Reddy if (ioc_state == MRIOC_STATE_BECOMING_READY || 121759bd9cfeSSreekanth Reddy ioc_state == MRIOC_STATE_RESET_REQUESTED) { 121859bd9cfeSSreekanth Reddy timeout = mrioc->ready_timeout * 10; 121959bd9cfeSSreekanth Reddy do { 122059bd9cfeSSreekanth Reddy msleep(100); 122159bd9cfeSSreekanth Reddy } while (--timeout); 122259bd9cfeSSreekanth Reddy 122359bd9cfeSSreekanth Reddy ioc_state = mpi3mr_get_iocstate(mrioc); 122459bd9cfeSSreekanth Reddy ioc_info(mrioc, 122559bd9cfeSSreekanth Reddy "controller is in %s state after waiting to reset\n", 122659bd9cfeSSreekanth Reddy mpi3mr_iocstate_name(ioc_state)); 122759bd9cfeSSreekanth Reddy } 122859bd9cfeSSreekanth Reddy 122959bd9cfeSSreekanth Reddy if (ioc_state == MRIOC_STATE_READY) { 123059bd9cfeSSreekanth Reddy ioc_info(mrioc, "issuing message unit reset (MUR) to bring to reset state\n"); 123159bd9cfeSSreekanth Reddy retval = mpi3mr_issue_and_process_mur(mrioc, 123259bd9cfeSSreekanth Reddy MPI3MR_RESET_FROM_BRINGUP); 123359bd9cfeSSreekanth Reddy ioc_state = mpi3mr_get_iocstate(mrioc); 123459bd9cfeSSreekanth Reddy if (retval) 123559bd9cfeSSreekanth Reddy ioc_err(mrioc, 123659bd9cfeSSreekanth Reddy "message unit reset failed with error %d current state %s\n", 123759bd9cfeSSreekanth Reddy retval, mpi3mr_iocstate_name(ioc_state)); 123859bd9cfeSSreekanth Reddy } 123959bd9cfeSSreekanth Reddy if (ioc_state != MRIOC_STATE_RESET) { 124059bd9cfeSSreekanth Reddy mpi3mr_print_fault_info(mrioc); 124159bd9cfeSSreekanth Reddy ioc_info(mrioc, "issuing soft reset to bring to reset state\n"); 124259bd9cfeSSreekanth Reddy retval = mpi3mr_issue_reset(mrioc, 124359bd9cfeSSreekanth Reddy MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET, 124459bd9cfeSSreekanth Reddy MPI3MR_RESET_FROM_BRINGUP); 124559bd9cfeSSreekanth Reddy if (retval) { 124659bd9cfeSSreekanth Reddy ioc_err(mrioc, 124759bd9cfeSSreekanth Reddy "soft reset failed with error %d\n", retval); 124859bd9cfeSSreekanth Reddy goto out_failed; 124959bd9cfeSSreekanth Reddy } 125059bd9cfeSSreekanth Reddy } 125159bd9cfeSSreekanth Reddy ioc_state = mpi3mr_get_iocstate(mrioc); 125259bd9cfeSSreekanth Reddy if (ioc_state != MRIOC_STATE_RESET) { 125359bd9cfeSSreekanth Reddy ioc_err(mrioc, 125459bd9cfeSSreekanth Reddy "cannot bring controller to reset state, current state: %s\n", 125559bd9cfeSSreekanth Reddy mpi3mr_iocstate_name(ioc_state)); 125659bd9cfeSSreekanth Reddy goto out_failed; 125759bd9cfeSSreekanth Reddy } 125859bd9cfeSSreekanth Reddy mpi3mr_clear_reset_history(mrioc); 125959bd9cfeSSreekanth Reddy retval = mpi3mr_setup_admin_qpair(mrioc); 126059bd9cfeSSreekanth Reddy if (retval) { 126159bd9cfeSSreekanth Reddy ioc_err(mrioc, "failed to setup admin queues: error %d\n", 126259bd9cfeSSreekanth Reddy retval); 126359bd9cfeSSreekanth Reddy goto out_failed; 126459bd9cfeSSreekanth Reddy } 126559bd9cfeSSreekanth Reddy 126659bd9cfeSSreekanth Reddy ioc_info(mrioc, "bringing controller to ready state\n"); 1267824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 1268824a1566SKashyap Desai ioc_config |= MPI3_SYSIF_IOC_CONFIG_ENABLE_IOC; 1269824a1566SKashyap Desai writel(ioc_config, &mrioc->sysif_regs->ioc_configuration); 1270824a1566SKashyap Desai 1271824a1566SKashyap Desai timeout = mrioc->ready_timeout * 10; 1272824a1566SKashyap Desai do { 127359bd9cfeSSreekanth Reddy ioc_state = mpi3mr_get_iocstate(mrioc); 127459bd9cfeSSreekanth Reddy if (ioc_state == MRIOC_STATE_READY) { 127559bd9cfeSSreekanth Reddy ioc_info(mrioc, 12765867b856SColin Ian King "successfully transitioned to %s state\n", 127759bd9cfeSSreekanth Reddy mpi3mr_iocstate_name(ioc_state)); 1278824a1566SKashyap Desai return 0; 127959bd9cfeSSreekanth Reddy } 1280824a1566SKashyap Desai msleep(100); 1281824a1566SKashyap Desai } while (--timeout); 1282824a1566SKashyap Desai 128359bd9cfeSSreekanth Reddy out_failed: 128459bd9cfeSSreekanth Reddy ioc_state = mpi3mr_get_iocstate(mrioc); 128559bd9cfeSSreekanth Reddy ioc_err(mrioc, 128659bd9cfeSSreekanth Reddy "failed to bring to ready state, current state: %s\n", 128759bd9cfeSSreekanth Reddy mpi3mr_iocstate_name(ioc_state)); 128859bd9cfeSSreekanth Reddy return retval; 1289824a1566SKashyap Desai } 1290824a1566SKashyap Desai 1291824a1566SKashyap Desai /** 1292f061178eSKashyap Desai * mpi3mr_soft_reset_success - Check softreset is success or not 1293f061178eSKashyap Desai * @ioc_status: IOC status register value 1294f061178eSKashyap Desai * @ioc_config: IOC config register value 1295f061178eSKashyap Desai * 1296f061178eSKashyap Desai * Check whether the soft reset is successful or not based on 1297f061178eSKashyap Desai * IOC status and IOC config register values. 1298f061178eSKashyap Desai * 1299f061178eSKashyap Desai * Return: True when the soft reset is success, false otherwise. 1300f061178eSKashyap Desai */ 1301f061178eSKashyap Desai static inline bool 1302f061178eSKashyap Desai mpi3mr_soft_reset_success(u32 ioc_status, u32 ioc_config) 1303f061178eSKashyap Desai { 1304f061178eSKashyap Desai if (!((ioc_status & MPI3_SYSIF_IOC_STATUS_READY) || 1305f061178eSKashyap Desai (ioc_config & MPI3_SYSIF_IOC_CONFIG_ENABLE_IOC))) 1306f061178eSKashyap Desai return true; 1307f061178eSKashyap Desai return false; 1308f061178eSKashyap Desai } 1309f061178eSKashyap Desai 1310f061178eSKashyap Desai /** 1311f061178eSKashyap Desai * mpi3mr_diagfault_success - Check diag fault is success or not 1312f061178eSKashyap Desai * @mrioc: Adapter reference 1313f061178eSKashyap Desai * @ioc_status: IOC status register value 1314f061178eSKashyap Desai * 1315f061178eSKashyap Desai * Check whether the controller hit diag reset fault code. 1316f061178eSKashyap Desai * 1317f061178eSKashyap Desai * Return: True when there is diag fault, false otherwise. 1318f061178eSKashyap Desai */ 1319f061178eSKashyap Desai static inline bool mpi3mr_diagfault_success(struct mpi3mr_ioc *mrioc, 1320f061178eSKashyap Desai u32 ioc_status) 1321f061178eSKashyap Desai { 1322f061178eSKashyap Desai u32 fault; 1323f061178eSKashyap Desai 1324f061178eSKashyap Desai if (!(ioc_status & MPI3_SYSIF_IOC_STATUS_FAULT)) 1325f061178eSKashyap Desai return false; 1326f061178eSKashyap Desai fault = readl(&mrioc->sysif_regs->fault) & MPI3_SYSIF_FAULT_CODE_MASK; 1327b64845a7SSreekanth Reddy if (fault == MPI3_SYSIF_FAULT_CODE_DIAG_FAULT_RESET) { 1328b64845a7SSreekanth Reddy mpi3mr_print_fault_info(mrioc); 1329f061178eSKashyap Desai return true; 1330b64845a7SSreekanth Reddy } 1331f061178eSKashyap Desai return false; 1332f061178eSKashyap Desai } 1333f061178eSKashyap Desai 1334f061178eSKashyap Desai /** 1335824a1566SKashyap Desai * mpi3mr_set_diagsave - Set diag save bit for snapdump 1336824a1566SKashyap Desai * @mrioc: Adapter reference 1337824a1566SKashyap Desai * 1338824a1566SKashyap Desai * Set diag save bit in IOC configuration register to enable 1339824a1566SKashyap Desai * snapdump. 1340824a1566SKashyap Desai * 1341824a1566SKashyap Desai * Return: Nothing. 1342824a1566SKashyap Desai */ 1343824a1566SKashyap Desai static inline void mpi3mr_set_diagsave(struct mpi3mr_ioc *mrioc) 1344824a1566SKashyap Desai { 1345824a1566SKashyap Desai u32 ioc_config; 1346824a1566SKashyap Desai 1347824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 1348824a1566SKashyap Desai ioc_config |= MPI3_SYSIF_IOC_CONFIG_DIAG_SAVE; 1349824a1566SKashyap Desai writel(ioc_config, &mrioc->sysif_regs->ioc_configuration); 1350824a1566SKashyap Desai } 1351824a1566SKashyap Desai 1352824a1566SKashyap Desai /** 1353824a1566SKashyap Desai * mpi3mr_issue_reset - Issue reset to the controller 1354824a1566SKashyap Desai * @mrioc: Adapter reference 1355824a1566SKashyap Desai * @reset_type: Reset type 1356824a1566SKashyap Desai * @reset_reason: Reset reason code 1357824a1566SKashyap Desai * 1358f061178eSKashyap Desai * Unlock the host diagnostic registers and write the specific 1359f061178eSKashyap Desai * reset type to that, wait for reset acknowledgment from the 1360f061178eSKashyap Desai * controller, if the reset is not successful retry for the 1361f061178eSKashyap Desai * predefined number of times. 1362824a1566SKashyap Desai * 1363824a1566SKashyap Desai * Return: 0 on success, non-zero on failure. 1364824a1566SKashyap Desai */ 1365824a1566SKashyap Desai static int mpi3mr_issue_reset(struct mpi3mr_ioc *mrioc, u16 reset_type, 1366824a1566SKashyap Desai u32 reset_reason) 1367824a1566SKashyap Desai { 1368f061178eSKashyap Desai int retval = -1; 1369b64845a7SSreekanth Reddy u8 unlock_retry_count = 0; 1370b64845a7SSreekanth Reddy u32 host_diagnostic, ioc_status, ioc_config; 1371b64845a7SSreekanth Reddy u32 timeout = MPI3MR_RESET_ACK_TIMEOUT * 10; 1372f061178eSKashyap Desai 1373f061178eSKashyap Desai if ((reset_type != MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET) && 1374f061178eSKashyap Desai (reset_type != MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT)) 1375b64845a7SSreekanth Reddy return retval; 1376f061178eSKashyap Desai if (mrioc->unrecoverable) 1377b64845a7SSreekanth Reddy return retval; 1378b64845a7SSreekanth Reddy if (reset_reason == MPI3MR_RESET_FROM_FIRMWARE) { 1379b64845a7SSreekanth Reddy retval = 0; 1380b64845a7SSreekanth Reddy return retval; 1381b64845a7SSreekanth Reddy } 1382b64845a7SSreekanth Reddy 1383b64845a7SSreekanth Reddy ioc_info(mrioc, "%s reset due to %s(0x%x)\n", 1384b64845a7SSreekanth Reddy mpi3mr_reset_type_name(reset_type), 1385b64845a7SSreekanth Reddy mpi3mr_reset_rc_name(reset_reason), reset_reason); 1386b64845a7SSreekanth Reddy 1387f061178eSKashyap Desai mpi3mr_clear_reset_history(mrioc); 1388f061178eSKashyap Desai do { 1389f061178eSKashyap Desai ioc_info(mrioc, 1390f061178eSKashyap Desai "Write magic sequence to unlock host diag register (retry=%d)\n", 1391f061178eSKashyap Desai ++unlock_retry_count); 1392f061178eSKashyap Desai if (unlock_retry_count >= MPI3MR_HOSTDIAG_UNLOCK_RETRY_COUNT) { 1393b64845a7SSreekanth Reddy ioc_err(mrioc, 1394b64845a7SSreekanth Reddy "%s reset failed due to unlock failure, host_diagnostic(0x%08x)\n", 1395b64845a7SSreekanth Reddy mpi3mr_reset_type_name(reset_type), 1396b64845a7SSreekanth Reddy host_diagnostic); 1397f061178eSKashyap Desai mrioc->unrecoverable = 1; 1398b64845a7SSreekanth Reddy return retval; 1399f061178eSKashyap Desai } 1400f061178eSKashyap Desai 1401f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_FLUSH, 1402f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1403f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_1ST, 1404f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1405f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_2ND, 1406f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1407f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_3RD, 1408f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1409f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_4TH, 1410f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1411f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_5TH, 1412f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1413f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_6TH, 1414f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1415f061178eSKashyap Desai usleep_range(1000, 1100); 1416f061178eSKashyap Desai host_diagnostic = readl(&mrioc->sysif_regs->host_diagnostic); 1417f061178eSKashyap Desai ioc_info(mrioc, 1418f061178eSKashyap Desai "wrote magic sequence: retry_count(%d), host_diagnostic(0x%08x)\n", 1419f061178eSKashyap Desai unlock_retry_count, host_diagnostic); 1420f061178eSKashyap Desai } while (!(host_diagnostic & MPI3_SYSIF_HOST_DIAG_DIAG_WRITE_ENABLE)); 1421f061178eSKashyap Desai 1422f061178eSKashyap Desai writel(reset_reason, &mrioc->sysif_regs->scratchpad[0]); 1423f061178eSKashyap Desai writel(host_diagnostic | reset_type, 1424f061178eSKashyap Desai &mrioc->sysif_regs->host_diagnostic); 1425b64845a7SSreekanth Reddy switch (reset_type) { 1426b64845a7SSreekanth Reddy case MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET: 1427f061178eSKashyap Desai do { 1428f061178eSKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 1429f061178eSKashyap Desai ioc_config = 1430f061178eSKashyap Desai readl(&mrioc->sysif_regs->ioc_configuration); 1431b64845a7SSreekanth Reddy if ((ioc_status & MPI3_SYSIF_IOC_STATUS_RESET_HISTORY) 1432b64845a7SSreekanth Reddy && mpi3mr_soft_reset_success(ioc_status, ioc_config) 1433b64845a7SSreekanth Reddy ) { 1434b64845a7SSreekanth Reddy mpi3mr_clear_reset_history(mrioc); 1435f061178eSKashyap Desai retval = 0; 1436f061178eSKashyap Desai break; 1437f061178eSKashyap Desai } 1438f061178eSKashyap Desai msleep(100); 1439f061178eSKashyap Desai } while (--timeout); 1440b64845a7SSreekanth Reddy mpi3mr_print_fault_info(mrioc); 1441b64845a7SSreekanth Reddy break; 1442b64845a7SSreekanth Reddy case MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT: 1443f061178eSKashyap Desai do { 1444f061178eSKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 1445f061178eSKashyap Desai if (mpi3mr_diagfault_success(mrioc, ioc_status)) { 1446f061178eSKashyap Desai retval = 0; 1447f061178eSKashyap Desai break; 1448f061178eSKashyap Desai } 1449f061178eSKashyap Desai msleep(100); 1450f061178eSKashyap Desai } while (--timeout); 1451b64845a7SSreekanth Reddy break; 1452b64845a7SSreekanth Reddy default: 1453b64845a7SSreekanth Reddy break; 1454b64845a7SSreekanth Reddy } 1455b64845a7SSreekanth Reddy 1456f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_2ND, 1457f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1458f061178eSKashyap Desai 1459f061178eSKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 1460b64845a7SSreekanth Reddy ioc_status = readl(&mrioc->sysif_regs->ioc_status); 1461f061178eSKashyap Desai ioc_info(mrioc, 1462b64845a7SSreekanth Reddy "ioc_status/ioc_onfig after %s reset is (0x%x)/(0x%x)\n", 1463f061178eSKashyap Desai (!retval)?"successful":"failed", ioc_status, 1464f061178eSKashyap Desai ioc_config); 1465b64845a7SSreekanth Reddy if (retval) 1466b64845a7SSreekanth Reddy mrioc->unrecoverable = 1; 1467f061178eSKashyap Desai return retval; 1468824a1566SKashyap Desai } 1469824a1566SKashyap Desai 1470824a1566SKashyap Desai /** 1471824a1566SKashyap Desai * mpi3mr_admin_request_post - Post request to admin queue 1472824a1566SKashyap Desai * @mrioc: Adapter reference 1473824a1566SKashyap Desai * @admin_req: MPI3 request 1474824a1566SKashyap Desai * @admin_req_sz: Request size 1475824a1566SKashyap Desai * @ignore_reset: Ignore reset in process 1476824a1566SKashyap Desai * 1477824a1566SKashyap Desai * Post the MPI3 request into admin request queue and 1478824a1566SKashyap Desai * inform the controller, if the queue is full return 1479824a1566SKashyap Desai * appropriate error. 1480824a1566SKashyap Desai * 1481824a1566SKashyap Desai * Return: 0 on success, non-zero on failure. 1482824a1566SKashyap Desai */ 1483824a1566SKashyap Desai int mpi3mr_admin_request_post(struct mpi3mr_ioc *mrioc, void *admin_req, 1484824a1566SKashyap Desai u16 admin_req_sz, u8 ignore_reset) 1485824a1566SKashyap Desai { 1486824a1566SKashyap Desai u16 areq_pi = 0, areq_ci = 0, max_entries = 0; 1487824a1566SKashyap Desai int retval = 0; 1488824a1566SKashyap Desai unsigned long flags; 1489824a1566SKashyap Desai u8 *areq_entry; 1490824a1566SKashyap Desai 1491824a1566SKashyap Desai if (mrioc->unrecoverable) { 1492824a1566SKashyap Desai ioc_err(mrioc, "%s : Unrecoverable controller\n", __func__); 1493824a1566SKashyap Desai return -EFAULT; 1494824a1566SKashyap Desai } 1495824a1566SKashyap Desai 1496824a1566SKashyap Desai spin_lock_irqsave(&mrioc->admin_req_lock, flags); 1497824a1566SKashyap Desai areq_pi = mrioc->admin_req_pi; 1498824a1566SKashyap Desai areq_ci = mrioc->admin_req_ci; 1499824a1566SKashyap Desai max_entries = mrioc->num_admin_req; 1500824a1566SKashyap Desai if ((areq_ci == (areq_pi + 1)) || ((!areq_ci) && 1501824a1566SKashyap Desai (areq_pi == (max_entries - 1)))) { 1502824a1566SKashyap Desai ioc_err(mrioc, "AdminReqQ full condition detected\n"); 1503824a1566SKashyap Desai retval = -EAGAIN; 1504824a1566SKashyap Desai goto out; 1505824a1566SKashyap Desai } 1506824a1566SKashyap Desai if (!ignore_reset && mrioc->reset_in_progress) { 1507824a1566SKashyap Desai ioc_err(mrioc, "AdminReqQ submit reset in progress\n"); 1508824a1566SKashyap Desai retval = -EAGAIN; 1509824a1566SKashyap Desai goto out; 1510824a1566SKashyap Desai } 1511824a1566SKashyap Desai areq_entry = (u8 *)mrioc->admin_req_base + 1512824a1566SKashyap Desai (areq_pi * MPI3MR_ADMIN_REQ_FRAME_SZ); 1513824a1566SKashyap Desai memset(areq_entry, 0, MPI3MR_ADMIN_REQ_FRAME_SZ); 1514824a1566SKashyap Desai memcpy(areq_entry, (u8 *)admin_req, admin_req_sz); 1515824a1566SKashyap Desai 1516824a1566SKashyap Desai if (++areq_pi == max_entries) 1517824a1566SKashyap Desai areq_pi = 0; 1518824a1566SKashyap Desai mrioc->admin_req_pi = areq_pi; 1519824a1566SKashyap Desai 1520824a1566SKashyap Desai writel(mrioc->admin_req_pi, &mrioc->sysif_regs->admin_request_queue_pi); 1521824a1566SKashyap Desai 1522824a1566SKashyap Desai out: 1523824a1566SKashyap Desai spin_unlock_irqrestore(&mrioc->admin_req_lock, flags); 1524824a1566SKashyap Desai 1525824a1566SKashyap Desai return retval; 1526824a1566SKashyap Desai } 1527824a1566SKashyap Desai 1528824a1566SKashyap Desai /** 1529c9566231SKashyap Desai * mpi3mr_free_op_req_q_segments - free request memory segments 1530c9566231SKashyap Desai * @mrioc: Adapter instance reference 1531c9566231SKashyap Desai * @q_idx: operational request queue index 1532c9566231SKashyap Desai * 1533c9566231SKashyap Desai * Free memory segments allocated for operational request queue 1534c9566231SKashyap Desai * 1535c9566231SKashyap Desai * Return: Nothing. 1536c9566231SKashyap Desai */ 1537c9566231SKashyap Desai static void mpi3mr_free_op_req_q_segments(struct mpi3mr_ioc *mrioc, u16 q_idx) 1538c9566231SKashyap Desai { 1539c9566231SKashyap Desai u16 j; 1540c9566231SKashyap Desai int size; 1541c9566231SKashyap Desai struct segments *segments; 1542c9566231SKashyap Desai 1543c9566231SKashyap Desai segments = mrioc->req_qinfo[q_idx].q_segments; 1544c9566231SKashyap Desai if (!segments) 1545c9566231SKashyap Desai return; 1546c9566231SKashyap Desai 1547c9566231SKashyap Desai if (mrioc->enable_segqueue) { 1548c9566231SKashyap Desai size = MPI3MR_OP_REQ_Q_SEG_SIZE; 1549c9566231SKashyap Desai if (mrioc->req_qinfo[q_idx].q_segment_list) { 1550c9566231SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, 1551c9566231SKashyap Desai MPI3MR_MAX_SEG_LIST_SIZE, 1552c9566231SKashyap Desai mrioc->req_qinfo[q_idx].q_segment_list, 1553c9566231SKashyap Desai mrioc->req_qinfo[q_idx].q_segment_list_dma); 1554d44b5fefSSreekanth Reddy mrioc->req_qinfo[q_idx].q_segment_list = NULL; 1555c9566231SKashyap Desai } 1556c9566231SKashyap Desai } else 1557243bcc8eSSreekanth Reddy size = mrioc->req_qinfo[q_idx].segment_qd * 1558c9566231SKashyap Desai mrioc->facts.op_req_sz; 1559c9566231SKashyap Desai 1560c9566231SKashyap Desai for (j = 0; j < mrioc->req_qinfo[q_idx].num_segments; j++) { 1561c9566231SKashyap Desai if (!segments[j].segment) 1562c9566231SKashyap Desai continue; 1563c9566231SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, 1564c9566231SKashyap Desai size, segments[j].segment, segments[j].segment_dma); 1565c9566231SKashyap Desai segments[j].segment = NULL; 1566c9566231SKashyap Desai } 1567c9566231SKashyap Desai kfree(mrioc->req_qinfo[q_idx].q_segments); 1568c9566231SKashyap Desai mrioc->req_qinfo[q_idx].q_segments = NULL; 1569c9566231SKashyap Desai mrioc->req_qinfo[q_idx].qid = 0; 1570c9566231SKashyap Desai } 1571c9566231SKashyap Desai 1572c9566231SKashyap Desai /** 1573c9566231SKashyap Desai * mpi3mr_free_op_reply_q_segments - free reply memory segments 1574c9566231SKashyap Desai * @mrioc: Adapter instance reference 1575c9566231SKashyap Desai * @q_idx: operational reply queue index 1576c9566231SKashyap Desai * 1577c9566231SKashyap Desai * Free memory segments allocated for operational reply queue 1578c9566231SKashyap Desai * 1579c9566231SKashyap Desai * Return: Nothing. 1580c9566231SKashyap Desai */ 1581c9566231SKashyap Desai static void mpi3mr_free_op_reply_q_segments(struct mpi3mr_ioc *mrioc, u16 q_idx) 1582c9566231SKashyap Desai { 1583c9566231SKashyap Desai u16 j; 1584c9566231SKashyap Desai int size; 1585c9566231SKashyap Desai struct segments *segments; 1586c9566231SKashyap Desai 1587c9566231SKashyap Desai segments = mrioc->op_reply_qinfo[q_idx].q_segments; 1588c9566231SKashyap Desai if (!segments) 1589c9566231SKashyap Desai return; 1590c9566231SKashyap Desai 1591c9566231SKashyap Desai if (mrioc->enable_segqueue) { 1592c9566231SKashyap Desai size = MPI3MR_OP_REP_Q_SEG_SIZE; 1593c9566231SKashyap Desai if (mrioc->op_reply_qinfo[q_idx].q_segment_list) { 1594c9566231SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, 1595c9566231SKashyap Desai MPI3MR_MAX_SEG_LIST_SIZE, 1596c9566231SKashyap Desai mrioc->op_reply_qinfo[q_idx].q_segment_list, 1597c9566231SKashyap Desai mrioc->op_reply_qinfo[q_idx].q_segment_list_dma); 1598c9566231SKashyap Desai mrioc->op_reply_qinfo[q_idx].q_segment_list = NULL; 1599c9566231SKashyap Desai } 1600c9566231SKashyap Desai } else 1601c9566231SKashyap Desai size = mrioc->op_reply_qinfo[q_idx].segment_qd * 1602c9566231SKashyap Desai mrioc->op_reply_desc_sz; 1603c9566231SKashyap Desai 1604c9566231SKashyap Desai for (j = 0; j < mrioc->op_reply_qinfo[q_idx].num_segments; j++) { 1605c9566231SKashyap Desai if (!segments[j].segment) 1606c9566231SKashyap Desai continue; 1607c9566231SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, 1608c9566231SKashyap Desai size, segments[j].segment, segments[j].segment_dma); 1609c9566231SKashyap Desai segments[j].segment = NULL; 1610c9566231SKashyap Desai } 1611c9566231SKashyap Desai 1612c9566231SKashyap Desai kfree(mrioc->op_reply_qinfo[q_idx].q_segments); 1613c9566231SKashyap Desai mrioc->op_reply_qinfo[q_idx].q_segments = NULL; 1614c9566231SKashyap Desai mrioc->op_reply_qinfo[q_idx].qid = 0; 1615c9566231SKashyap Desai } 1616c9566231SKashyap Desai 1617c9566231SKashyap Desai /** 1618c9566231SKashyap Desai * mpi3mr_delete_op_reply_q - delete operational reply queue 1619c9566231SKashyap Desai * @mrioc: Adapter instance reference 1620c9566231SKashyap Desai * @qidx: operational reply queue index 1621c9566231SKashyap Desai * 1622c9566231SKashyap Desai * Delete operatinal reply queue by issuing MPI request 1623c9566231SKashyap Desai * through admin queue. 1624c9566231SKashyap Desai * 1625c9566231SKashyap Desai * Return: 0 on success, non-zero on failure. 1626c9566231SKashyap Desai */ 1627c9566231SKashyap Desai static int mpi3mr_delete_op_reply_q(struct mpi3mr_ioc *mrioc, u16 qidx) 1628c9566231SKashyap Desai { 1629c9566231SKashyap Desai struct mpi3_delete_reply_queue_request delq_req; 1630afd3a579SSreekanth Reddy struct op_reply_qinfo *op_reply_q = mrioc->op_reply_qinfo + qidx; 1631c9566231SKashyap Desai int retval = 0; 1632c9566231SKashyap Desai u16 reply_qid = 0, midx; 1633c9566231SKashyap Desai 1634afd3a579SSreekanth Reddy reply_qid = op_reply_q->qid; 1635c9566231SKashyap Desai 1636c9566231SKashyap Desai midx = REPLY_QUEUE_IDX_TO_MSIX_IDX(qidx, mrioc->op_reply_q_offset); 1637c9566231SKashyap Desai 1638c9566231SKashyap Desai if (!reply_qid) { 1639c9566231SKashyap Desai retval = -1; 1640c9566231SKashyap Desai ioc_err(mrioc, "Issue DelRepQ: called with invalid ReqQID\n"); 1641c9566231SKashyap Desai goto out; 1642c9566231SKashyap Desai } 1643c9566231SKashyap Desai 1644afd3a579SSreekanth Reddy (op_reply_q->qtype == MPI3MR_DEFAULT_QUEUE) ? mrioc->default_qcount-- : 1645afd3a579SSreekanth Reddy mrioc->active_poll_qcount--; 1646afd3a579SSreekanth Reddy 1647c9566231SKashyap Desai memset(&delq_req, 0, sizeof(delq_req)); 1648c9566231SKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 1649c9566231SKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 1650c9566231SKashyap Desai retval = -1; 1651c9566231SKashyap Desai ioc_err(mrioc, "Issue DelRepQ: Init command is in use\n"); 1652c9566231SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 1653c9566231SKashyap Desai goto out; 1654c9566231SKashyap Desai } 1655c9566231SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 1656c9566231SKashyap Desai mrioc->init_cmds.is_waiting = 1; 1657c9566231SKashyap Desai mrioc->init_cmds.callback = NULL; 1658c9566231SKashyap Desai delq_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 1659c9566231SKashyap Desai delq_req.function = MPI3_FUNCTION_DELETE_REPLY_QUEUE; 1660c9566231SKashyap Desai delq_req.queue_id = cpu_to_le16(reply_qid); 1661c9566231SKashyap Desai 1662c9566231SKashyap Desai init_completion(&mrioc->init_cmds.done); 1663c9566231SKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &delq_req, sizeof(delq_req), 1664c9566231SKashyap Desai 1); 1665c9566231SKashyap Desai if (retval) { 1666c9566231SKashyap Desai ioc_err(mrioc, "Issue DelRepQ: Admin Post failed\n"); 1667c9566231SKashyap Desai goto out_unlock; 1668c9566231SKashyap Desai } 1669c9566231SKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 1670c9566231SKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 1671c9566231SKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 1672a6856cc4SSreekanth Reddy ioc_err(mrioc, "delete reply queue timed out\n"); 1673a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 1674c9566231SKashyap Desai MPI3MR_RESET_FROM_DELREPQ_TIMEOUT); 1675c9566231SKashyap Desai retval = -1; 1676c9566231SKashyap Desai goto out_unlock; 1677c9566231SKashyap Desai } 1678c9566231SKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 1679c9566231SKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 1680c9566231SKashyap Desai ioc_err(mrioc, 1681c9566231SKashyap Desai "Issue DelRepQ: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 1682c9566231SKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 1683c9566231SKashyap Desai mrioc->init_cmds.ioc_loginfo); 1684c9566231SKashyap Desai retval = -1; 1685c9566231SKashyap Desai goto out_unlock; 1686c9566231SKashyap Desai } 1687c9566231SKashyap Desai mrioc->intr_info[midx].op_reply_q = NULL; 1688c9566231SKashyap Desai 1689c9566231SKashyap Desai mpi3mr_free_op_reply_q_segments(mrioc, qidx); 1690c9566231SKashyap Desai out_unlock: 1691c9566231SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 1692c9566231SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 1693c9566231SKashyap Desai out: 1694c9566231SKashyap Desai 1695c9566231SKashyap Desai return retval; 1696c9566231SKashyap Desai } 1697c9566231SKashyap Desai 1698c9566231SKashyap Desai /** 1699c9566231SKashyap Desai * mpi3mr_alloc_op_reply_q_segments -Alloc segmented reply pool 1700c9566231SKashyap Desai * @mrioc: Adapter instance reference 1701c9566231SKashyap Desai * @qidx: request queue index 1702c9566231SKashyap Desai * 1703c9566231SKashyap Desai * Allocate segmented memory pools for operational reply 1704c9566231SKashyap Desai * queue. 1705c9566231SKashyap Desai * 1706c9566231SKashyap Desai * Return: 0 on success, non-zero on failure. 1707c9566231SKashyap Desai */ 1708c9566231SKashyap Desai static int mpi3mr_alloc_op_reply_q_segments(struct mpi3mr_ioc *mrioc, u16 qidx) 1709c9566231SKashyap Desai { 1710c9566231SKashyap Desai struct op_reply_qinfo *op_reply_q = mrioc->op_reply_qinfo + qidx; 1711c9566231SKashyap Desai int i, size; 1712c9566231SKashyap Desai u64 *q_segment_list_entry = NULL; 1713c9566231SKashyap Desai struct segments *segments; 1714c9566231SKashyap Desai 1715c9566231SKashyap Desai if (mrioc->enable_segqueue) { 1716c9566231SKashyap Desai op_reply_q->segment_qd = 1717c9566231SKashyap Desai MPI3MR_OP_REP_Q_SEG_SIZE / mrioc->op_reply_desc_sz; 1718c9566231SKashyap Desai 1719c9566231SKashyap Desai size = MPI3MR_OP_REP_Q_SEG_SIZE; 1720c9566231SKashyap Desai 1721c9566231SKashyap Desai op_reply_q->q_segment_list = dma_alloc_coherent(&mrioc->pdev->dev, 1722c9566231SKashyap Desai MPI3MR_MAX_SEG_LIST_SIZE, &op_reply_q->q_segment_list_dma, 1723c9566231SKashyap Desai GFP_KERNEL); 1724c9566231SKashyap Desai if (!op_reply_q->q_segment_list) 1725c9566231SKashyap Desai return -ENOMEM; 1726c9566231SKashyap Desai q_segment_list_entry = (u64 *)op_reply_q->q_segment_list; 1727c9566231SKashyap Desai } else { 1728c9566231SKashyap Desai op_reply_q->segment_qd = op_reply_q->num_replies; 1729c9566231SKashyap Desai size = op_reply_q->num_replies * mrioc->op_reply_desc_sz; 1730c9566231SKashyap Desai } 1731c9566231SKashyap Desai 1732c9566231SKashyap Desai op_reply_q->num_segments = DIV_ROUND_UP(op_reply_q->num_replies, 1733c9566231SKashyap Desai op_reply_q->segment_qd); 1734c9566231SKashyap Desai 1735c9566231SKashyap Desai op_reply_q->q_segments = kcalloc(op_reply_q->num_segments, 1736c9566231SKashyap Desai sizeof(struct segments), GFP_KERNEL); 1737c9566231SKashyap Desai if (!op_reply_q->q_segments) 1738c9566231SKashyap Desai return -ENOMEM; 1739c9566231SKashyap Desai 1740c9566231SKashyap Desai segments = op_reply_q->q_segments; 1741c9566231SKashyap Desai for (i = 0; i < op_reply_q->num_segments; i++) { 1742c9566231SKashyap Desai segments[i].segment = 1743c9566231SKashyap Desai dma_alloc_coherent(&mrioc->pdev->dev, 1744c9566231SKashyap Desai size, &segments[i].segment_dma, GFP_KERNEL); 1745c9566231SKashyap Desai if (!segments[i].segment) 1746c9566231SKashyap Desai return -ENOMEM; 1747c9566231SKashyap Desai if (mrioc->enable_segqueue) 1748c9566231SKashyap Desai q_segment_list_entry[i] = 1749c9566231SKashyap Desai (unsigned long)segments[i].segment_dma; 1750c9566231SKashyap Desai } 1751c9566231SKashyap Desai 1752c9566231SKashyap Desai return 0; 1753c9566231SKashyap Desai } 1754c9566231SKashyap Desai 1755c9566231SKashyap Desai /** 1756c9566231SKashyap Desai * mpi3mr_alloc_op_req_q_segments - Alloc segmented req pool. 1757c9566231SKashyap Desai * @mrioc: Adapter instance reference 1758c9566231SKashyap Desai * @qidx: request queue index 1759c9566231SKashyap Desai * 1760c9566231SKashyap Desai * Allocate segmented memory pools for operational request 1761c9566231SKashyap Desai * queue. 1762c9566231SKashyap Desai * 1763c9566231SKashyap Desai * Return: 0 on success, non-zero on failure. 1764c9566231SKashyap Desai */ 1765c9566231SKashyap Desai static int mpi3mr_alloc_op_req_q_segments(struct mpi3mr_ioc *mrioc, u16 qidx) 1766c9566231SKashyap Desai { 1767c9566231SKashyap Desai struct op_req_qinfo *op_req_q = mrioc->req_qinfo + qidx; 1768c9566231SKashyap Desai int i, size; 1769c9566231SKashyap Desai u64 *q_segment_list_entry = NULL; 1770c9566231SKashyap Desai struct segments *segments; 1771c9566231SKashyap Desai 1772c9566231SKashyap Desai if (mrioc->enable_segqueue) { 1773c9566231SKashyap Desai op_req_q->segment_qd = 1774c9566231SKashyap Desai MPI3MR_OP_REQ_Q_SEG_SIZE / mrioc->facts.op_req_sz; 1775c9566231SKashyap Desai 1776c9566231SKashyap Desai size = MPI3MR_OP_REQ_Q_SEG_SIZE; 1777c9566231SKashyap Desai 1778c9566231SKashyap Desai op_req_q->q_segment_list = dma_alloc_coherent(&mrioc->pdev->dev, 1779c9566231SKashyap Desai MPI3MR_MAX_SEG_LIST_SIZE, &op_req_q->q_segment_list_dma, 1780c9566231SKashyap Desai GFP_KERNEL); 1781c9566231SKashyap Desai if (!op_req_q->q_segment_list) 1782c9566231SKashyap Desai return -ENOMEM; 1783c9566231SKashyap Desai q_segment_list_entry = (u64 *)op_req_q->q_segment_list; 1784c9566231SKashyap Desai 1785c9566231SKashyap Desai } else { 1786c9566231SKashyap Desai op_req_q->segment_qd = op_req_q->num_requests; 1787c9566231SKashyap Desai size = op_req_q->num_requests * mrioc->facts.op_req_sz; 1788c9566231SKashyap Desai } 1789c9566231SKashyap Desai 1790c9566231SKashyap Desai op_req_q->num_segments = DIV_ROUND_UP(op_req_q->num_requests, 1791c9566231SKashyap Desai op_req_q->segment_qd); 1792c9566231SKashyap Desai 1793c9566231SKashyap Desai op_req_q->q_segments = kcalloc(op_req_q->num_segments, 1794c9566231SKashyap Desai sizeof(struct segments), GFP_KERNEL); 1795c9566231SKashyap Desai if (!op_req_q->q_segments) 1796c9566231SKashyap Desai return -ENOMEM; 1797c9566231SKashyap Desai 1798c9566231SKashyap Desai segments = op_req_q->q_segments; 1799c9566231SKashyap Desai for (i = 0; i < op_req_q->num_segments; i++) { 1800c9566231SKashyap Desai segments[i].segment = 1801c9566231SKashyap Desai dma_alloc_coherent(&mrioc->pdev->dev, 1802c9566231SKashyap Desai size, &segments[i].segment_dma, GFP_KERNEL); 1803c9566231SKashyap Desai if (!segments[i].segment) 1804c9566231SKashyap Desai return -ENOMEM; 1805c9566231SKashyap Desai if (mrioc->enable_segqueue) 1806c9566231SKashyap Desai q_segment_list_entry[i] = 1807c9566231SKashyap Desai (unsigned long)segments[i].segment_dma; 1808c9566231SKashyap Desai } 1809c9566231SKashyap Desai 1810c9566231SKashyap Desai return 0; 1811c9566231SKashyap Desai } 1812c9566231SKashyap Desai 1813c9566231SKashyap Desai /** 1814c9566231SKashyap Desai * mpi3mr_create_op_reply_q - create operational reply queue 1815c9566231SKashyap Desai * @mrioc: Adapter instance reference 1816c9566231SKashyap Desai * @qidx: operational reply queue index 1817c9566231SKashyap Desai * 1818c9566231SKashyap Desai * Create operatinal reply queue by issuing MPI request 1819c9566231SKashyap Desai * through admin queue. 1820c9566231SKashyap Desai * 1821c9566231SKashyap Desai * Return: 0 on success, non-zero on failure. 1822c9566231SKashyap Desai */ 1823c9566231SKashyap Desai static int mpi3mr_create_op_reply_q(struct mpi3mr_ioc *mrioc, u16 qidx) 1824c9566231SKashyap Desai { 1825c9566231SKashyap Desai struct mpi3_create_reply_queue_request create_req; 1826c9566231SKashyap Desai struct op_reply_qinfo *op_reply_q = mrioc->op_reply_qinfo + qidx; 1827c9566231SKashyap Desai int retval = 0; 1828c9566231SKashyap Desai u16 reply_qid = 0, midx; 1829c9566231SKashyap Desai 1830c9566231SKashyap Desai reply_qid = op_reply_q->qid; 1831c9566231SKashyap Desai 1832c9566231SKashyap Desai midx = REPLY_QUEUE_IDX_TO_MSIX_IDX(qidx, mrioc->op_reply_q_offset); 1833c9566231SKashyap Desai 1834c9566231SKashyap Desai if (reply_qid) { 1835c9566231SKashyap Desai retval = -1; 1836c9566231SKashyap Desai ioc_err(mrioc, "CreateRepQ: called for duplicate qid %d\n", 1837c9566231SKashyap Desai reply_qid); 1838c9566231SKashyap Desai 1839c9566231SKashyap Desai return retval; 1840c9566231SKashyap Desai } 1841c9566231SKashyap Desai 1842c9566231SKashyap Desai reply_qid = qidx + 1; 1843c9566231SKashyap Desai op_reply_q->num_replies = MPI3MR_OP_REP_Q_QD; 1844243bcc8eSSreekanth Reddy if (!mrioc->pdev->revision) 1845243bcc8eSSreekanth Reddy op_reply_q->num_replies = MPI3MR_OP_REP_Q_QD4K; 1846c9566231SKashyap Desai op_reply_q->ci = 0; 1847c9566231SKashyap Desai op_reply_q->ephase = 1; 1848463429f8SKashyap Desai atomic_set(&op_reply_q->pend_ios, 0); 1849463429f8SKashyap Desai atomic_set(&op_reply_q->in_use, 0); 1850463429f8SKashyap Desai op_reply_q->enable_irq_poll = false; 1851c9566231SKashyap Desai 1852c9566231SKashyap Desai if (!op_reply_q->q_segments) { 1853c9566231SKashyap Desai retval = mpi3mr_alloc_op_reply_q_segments(mrioc, qidx); 1854c9566231SKashyap Desai if (retval) { 1855c9566231SKashyap Desai mpi3mr_free_op_reply_q_segments(mrioc, qidx); 1856c9566231SKashyap Desai goto out; 1857c9566231SKashyap Desai } 1858c9566231SKashyap Desai } 1859c9566231SKashyap Desai 1860c9566231SKashyap Desai memset(&create_req, 0, sizeof(create_req)); 1861c9566231SKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 1862c9566231SKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 1863c9566231SKashyap Desai retval = -1; 1864c9566231SKashyap Desai ioc_err(mrioc, "CreateRepQ: Init command is in use\n"); 1865f9dc034dSYang Yingliang goto out_unlock; 1866c9566231SKashyap Desai } 1867c9566231SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 1868c9566231SKashyap Desai mrioc->init_cmds.is_waiting = 1; 1869c9566231SKashyap Desai mrioc->init_cmds.callback = NULL; 1870c9566231SKashyap Desai create_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 1871c9566231SKashyap Desai create_req.function = MPI3_FUNCTION_CREATE_REPLY_QUEUE; 1872c9566231SKashyap Desai create_req.queue_id = cpu_to_le16(reply_qid); 1873afd3a579SSreekanth Reddy 1874afd3a579SSreekanth Reddy if (midx < (mrioc->intr_info_count - mrioc->requested_poll_qcount)) 1875afd3a579SSreekanth Reddy op_reply_q->qtype = MPI3MR_DEFAULT_QUEUE; 1876afd3a579SSreekanth Reddy else 1877afd3a579SSreekanth Reddy op_reply_q->qtype = MPI3MR_POLL_QUEUE; 1878afd3a579SSreekanth Reddy 1879afd3a579SSreekanth Reddy if (op_reply_q->qtype == MPI3MR_DEFAULT_QUEUE) { 1880afd3a579SSreekanth Reddy create_req.flags = 1881afd3a579SSreekanth Reddy MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_ENABLE; 1882afd3a579SSreekanth Reddy create_req.msix_index = 1883afd3a579SSreekanth Reddy cpu_to_le16(mrioc->intr_info[midx].msix_index); 1884afd3a579SSreekanth Reddy } else { 1885afd3a579SSreekanth Reddy create_req.msix_index = cpu_to_le16(mrioc->intr_info_count - 1); 1886afd3a579SSreekanth Reddy ioc_info(mrioc, "create reply queue(polled): for qid(%d), midx(%d)\n", 1887afd3a579SSreekanth Reddy reply_qid, midx); 1888afd3a579SSreekanth Reddy if (!mrioc->active_poll_qcount) 1889afd3a579SSreekanth Reddy disable_irq_nosync(pci_irq_vector(mrioc->pdev, 1890afd3a579SSreekanth Reddy mrioc->intr_info_count - 1)); 1891afd3a579SSreekanth Reddy } 1892afd3a579SSreekanth Reddy 1893c9566231SKashyap Desai if (mrioc->enable_segqueue) { 1894c9566231SKashyap Desai create_req.flags |= 1895c9566231SKashyap Desai MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_SEGMENTED; 1896c9566231SKashyap Desai create_req.base_address = cpu_to_le64( 1897c9566231SKashyap Desai op_reply_q->q_segment_list_dma); 1898c9566231SKashyap Desai } else 1899c9566231SKashyap Desai create_req.base_address = cpu_to_le64( 1900c9566231SKashyap Desai op_reply_q->q_segments[0].segment_dma); 1901c9566231SKashyap Desai 1902c9566231SKashyap Desai create_req.size = cpu_to_le16(op_reply_q->num_replies); 1903c9566231SKashyap Desai 1904c9566231SKashyap Desai init_completion(&mrioc->init_cmds.done); 1905c9566231SKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &create_req, 1906c9566231SKashyap Desai sizeof(create_req), 1); 1907c9566231SKashyap Desai if (retval) { 1908c9566231SKashyap Desai ioc_err(mrioc, "CreateRepQ: Admin Post failed\n"); 1909c9566231SKashyap Desai goto out_unlock; 1910c9566231SKashyap Desai } 1911c9566231SKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 1912c9566231SKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 1913c9566231SKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 1914a6856cc4SSreekanth Reddy ioc_err(mrioc, "create reply queue timed out\n"); 1915a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 1916c9566231SKashyap Desai MPI3MR_RESET_FROM_CREATEREPQ_TIMEOUT); 1917c9566231SKashyap Desai retval = -1; 1918c9566231SKashyap Desai goto out_unlock; 1919c9566231SKashyap Desai } 1920c9566231SKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 1921c9566231SKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 1922c9566231SKashyap Desai ioc_err(mrioc, 1923c9566231SKashyap Desai "CreateRepQ: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 1924c9566231SKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 1925c9566231SKashyap Desai mrioc->init_cmds.ioc_loginfo); 1926c9566231SKashyap Desai retval = -1; 1927c9566231SKashyap Desai goto out_unlock; 1928c9566231SKashyap Desai } 1929c9566231SKashyap Desai op_reply_q->qid = reply_qid; 1930fe6db615SSreekanth Reddy if (midx < mrioc->intr_info_count) 1931c9566231SKashyap Desai mrioc->intr_info[midx].op_reply_q = op_reply_q; 1932c9566231SKashyap Desai 1933afd3a579SSreekanth Reddy (op_reply_q->qtype == MPI3MR_DEFAULT_QUEUE) ? mrioc->default_qcount++ : 1934afd3a579SSreekanth Reddy mrioc->active_poll_qcount++; 1935afd3a579SSreekanth Reddy 1936c9566231SKashyap Desai out_unlock: 1937c9566231SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 1938c9566231SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 1939c9566231SKashyap Desai out: 1940c9566231SKashyap Desai 1941c9566231SKashyap Desai return retval; 1942c9566231SKashyap Desai } 1943c9566231SKashyap Desai 1944c9566231SKashyap Desai /** 1945c9566231SKashyap Desai * mpi3mr_create_op_req_q - create operational request queue 1946c9566231SKashyap Desai * @mrioc: Adapter instance reference 1947c9566231SKashyap Desai * @idx: operational request queue index 1948c9566231SKashyap Desai * @reply_qid: Reply queue ID 1949c9566231SKashyap Desai * 1950c9566231SKashyap Desai * Create operatinal request queue by issuing MPI request 1951c9566231SKashyap Desai * through admin queue. 1952c9566231SKashyap Desai * 1953c9566231SKashyap Desai * Return: 0 on success, non-zero on failure. 1954c9566231SKashyap Desai */ 1955c9566231SKashyap Desai static int mpi3mr_create_op_req_q(struct mpi3mr_ioc *mrioc, u16 idx, 1956c9566231SKashyap Desai u16 reply_qid) 1957c9566231SKashyap Desai { 1958c9566231SKashyap Desai struct mpi3_create_request_queue_request create_req; 1959c9566231SKashyap Desai struct op_req_qinfo *op_req_q = mrioc->req_qinfo + idx; 1960c9566231SKashyap Desai int retval = 0; 1961c9566231SKashyap Desai u16 req_qid = 0; 1962c9566231SKashyap Desai 1963c9566231SKashyap Desai req_qid = op_req_q->qid; 1964c9566231SKashyap Desai 1965c9566231SKashyap Desai if (req_qid) { 1966c9566231SKashyap Desai retval = -1; 1967c9566231SKashyap Desai ioc_err(mrioc, "CreateReqQ: called for duplicate qid %d\n", 1968c9566231SKashyap Desai req_qid); 1969c9566231SKashyap Desai 1970c9566231SKashyap Desai return retval; 1971c9566231SKashyap Desai } 1972c9566231SKashyap Desai req_qid = idx + 1; 1973c9566231SKashyap Desai 1974c9566231SKashyap Desai op_req_q->num_requests = MPI3MR_OP_REQ_Q_QD; 1975c9566231SKashyap Desai op_req_q->ci = 0; 1976c9566231SKashyap Desai op_req_q->pi = 0; 1977c9566231SKashyap Desai op_req_q->reply_qid = reply_qid; 1978c9566231SKashyap Desai spin_lock_init(&op_req_q->q_lock); 1979c9566231SKashyap Desai 1980c9566231SKashyap Desai if (!op_req_q->q_segments) { 1981c9566231SKashyap Desai retval = mpi3mr_alloc_op_req_q_segments(mrioc, idx); 1982c9566231SKashyap Desai if (retval) { 1983c9566231SKashyap Desai mpi3mr_free_op_req_q_segments(mrioc, idx); 1984c9566231SKashyap Desai goto out; 1985c9566231SKashyap Desai } 1986c9566231SKashyap Desai } 1987c9566231SKashyap Desai 1988c9566231SKashyap Desai memset(&create_req, 0, sizeof(create_req)); 1989c9566231SKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 1990c9566231SKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 1991c9566231SKashyap Desai retval = -1; 1992c9566231SKashyap Desai ioc_err(mrioc, "CreateReqQ: Init command is in use\n"); 1993f9dc034dSYang Yingliang goto out_unlock; 1994c9566231SKashyap Desai } 1995c9566231SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 1996c9566231SKashyap Desai mrioc->init_cmds.is_waiting = 1; 1997c9566231SKashyap Desai mrioc->init_cmds.callback = NULL; 1998c9566231SKashyap Desai create_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 1999c9566231SKashyap Desai create_req.function = MPI3_FUNCTION_CREATE_REQUEST_QUEUE; 2000c9566231SKashyap Desai create_req.queue_id = cpu_to_le16(req_qid); 2001c9566231SKashyap Desai if (mrioc->enable_segqueue) { 2002c9566231SKashyap Desai create_req.flags = 2003c9566231SKashyap Desai MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_SEGMENTED; 2004c9566231SKashyap Desai create_req.base_address = cpu_to_le64( 2005c9566231SKashyap Desai op_req_q->q_segment_list_dma); 2006c9566231SKashyap Desai } else 2007c9566231SKashyap Desai create_req.base_address = cpu_to_le64( 2008c9566231SKashyap Desai op_req_q->q_segments[0].segment_dma); 2009c9566231SKashyap Desai create_req.reply_queue_id = cpu_to_le16(reply_qid); 2010c9566231SKashyap Desai create_req.size = cpu_to_le16(op_req_q->num_requests); 2011c9566231SKashyap Desai 2012c9566231SKashyap Desai init_completion(&mrioc->init_cmds.done); 2013c9566231SKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &create_req, 2014c9566231SKashyap Desai sizeof(create_req), 1); 2015c9566231SKashyap Desai if (retval) { 2016c9566231SKashyap Desai ioc_err(mrioc, "CreateReqQ: Admin Post failed\n"); 2017c9566231SKashyap Desai goto out_unlock; 2018c9566231SKashyap Desai } 2019c9566231SKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 2020c9566231SKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 2021c9566231SKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 2022a6856cc4SSreekanth Reddy ioc_err(mrioc, "create request queue timed out\n"); 2023a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 2024a6856cc4SSreekanth Reddy MPI3MR_RESET_FROM_CREATEREQQ_TIMEOUT); 2025c9566231SKashyap Desai retval = -1; 2026c9566231SKashyap Desai goto out_unlock; 2027c9566231SKashyap Desai } 2028c9566231SKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 2029c9566231SKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 2030c9566231SKashyap Desai ioc_err(mrioc, 2031c9566231SKashyap Desai "CreateReqQ: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 2032c9566231SKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 2033c9566231SKashyap Desai mrioc->init_cmds.ioc_loginfo); 2034c9566231SKashyap Desai retval = -1; 2035c9566231SKashyap Desai goto out_unlock; 2036c9566231SKashyap Desai } 2037c9566231SKashyap Desai op_req_q->qid = req_qid; 2038c9566231SKashyap Desai 2039c9566231SKashyap Desai out_unlock: 2040c9566231SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 2041c9566231SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 2042c9566231SKashyap Desai out: 2043c9566231SKashyap Desai 2044c9566231SKashyap Desai return retval; 2045c9566231SKashyap Desai } 2046c9566231SKashyap Desai 2047c9566231SKashyap Desai /** 2048c9566231SKashyap Desai * mpi3mr_create_op_queues - create operational queue pairs 2049c9566231SKashyap Desai * @mrioc: Adapter instance reference 2050c9566231SKashyap Desai * 2051c9566231SKashyap Desai * Allocate memory for operational queue meta data and call 2052c9566231SKashyap Desai * create request and reply queue functions. 2053c9566231SKashyap Desai * 2054c9566231SKashyap Desai * Return: 0 on success, non-zero on failures. 2055c9566231SKashyap Desai */ 2056c9566231SKashyap Desai static int mpi3mr_create_op_queues(struct mpi3mr_ioc *mrioc) 2057c9566231SKashyap Desai { 2058c9566231SKashyap Desai int retval = 0; 2059c9566231SKashyap Desai u16 num_queues = 0, i = 0, msix_count_op_q = 1; 2060c9566231SKashyap Desai 2061c9566231SKashyap Desai num_queues = min_t(int, mrioc->facts.max_op_reply_q, 2062c9566231SKashyap Desai mrioc->facts.max_op_req_q); 2063c9566231SKashyap Desai 2064c9566231SKashyap Desai msix_count_op_q = 2065c9566231SKashyap Desai mrioc->intr_info_count - mrioc->op_reply_q_offset; 2066c9566231SKashyap Desai if (!mrioc->num_queues) 2067c9566231SKashyap Desai mrioc->num_queues = min_t(int, num_queues, msix_count_op_q); 2068c5758fc7SSreekanth Reddy /* 2069c5758fc7SSreekanth Reddy * During reset set the num_queues to the number of queues 2070c5758fc7SSreekanth Reddy * that was set before the reset. 2071c5758fc7SSreekanth Reddy */ 2072c5758fc7SSreekanth Reddy num_queues = mrioc->num_op_reply_q ? 2073c5758fc7SSreekanth Reddy mrioc->num_op_reply_q : mrioc->num_queues; 2074c5758fc7SSreekanth Reddy ioc_info(mrioc, "trying to create %d operational queue pairs\n", 2075c9566231SKashyap Desai num_queues); 2076c9566231SKashyap Desai 2077c9566231SKashyap Desai if (!mrioc->req_qinfo) { 2078c9566231SKashyap Desai mrioc->req_qinfo = kcalloc(num_queues, 2079c9566231SKashyap Desai sizeof(struct op_req_qinfo), GFP_KERNEL); 2080c9566231SKashyap Desai if (!mrioc->req_qinfo) { 2081c9566231SKashyap Desai retval = -1; 2082c9566231SKashyap Desai goto out_failed; 2083c9566231SKashyap Desai } 2084c9566231SKashyap Desai 2085c9566231SKashyap Desai mrioc->op_reply_qinfo = kzalloc(sizeof(struct op_reply_qinfo) * 2086c9566231SKashyap Desai num_queues, GFP_KERNEL); 2087c9566231SKashyap Desai if (!mrioc->op_reply_qinfo) { 2088c9566231SKashyap Desai retval = -1; 2089c9566231SKashyap Desai goto out_failed; 2090c9566231SKashyap Desai } 2091c9566231SKashyap Desai } 2092c9566231SKashyap Desai 2093c9566231SKashyap Desai if (mrioc->enable_segqueue) 2094c9566231SKashyap Desai ioc_info(mrioc, 2095c9566231SKashyap Desai "allocating operational queues through segmented queues\n"); 2096c9566231SKashyap Desai 2097c9566231SKashyap Desai for (i = 0; i < num_queues; i++) { 2098c9566231SKashyap Desai if (mpi3mr_create_op_reply_q(mrioc, i)) { 2099c9566231SKashyap Desai ioc_err(mrioc, "Cannot create OP RepQ %d\n", i); 2100c9566231SKashyap Desai break; 2101c9566231SKashyap Desai } 2102c9566231SKashyap Desai if (mpi3mr_create_op_req_q(mrioc, i, 2103c9566231SKashyap Desai mrioc->op_reply_qinfo[i].qid)) { 2104c9566231SKashyap Desai ioc_err(mrioc, "Cannot create OP ReqQ %d\n", i); 2105c9566231SKashyap Desai mpi3mr_delete_op_reply_q(mrioc, i); 2106c9566231SKashyap Desai break; 2107c9566231SKashyap Desai } 2108c9566231SKashyap Desai } 2109c9566231SKashyap Desai 2110c9566231SKashyap Desai if (i == 0) { 2111c9566231SKashyap Desai /* Not even one queue is created successfully*/ 2112c9566231SKashyap Desai retval = -1; 2113c9566231SKashyap Desai goto out_failed; 2114c9566231SKashyap Desai } 2115c9566231SKashyap Desai mrioc->num_op_reply_q = mrioc->num_op_req_q = i; 2116afd3a579SSreekanth Reddy ioc_info(mrioc, 2117afd3a579SSreekanth Reddy "successfully created %d operational queue pairs(default/polled) queue = (%d/%d)\n", 2118afd3a579SSreekanth Reddy mrioc->num_op_reply_q, mrioc->default_qcount, 2119afd3a579SSreekanth Reddy mrioc->active_poll_qcount); 2120c9566231SKashyap Desai 2121c9566231SKashyap Desai return retval; 2122c9566231SKashyap Desai out_failed: 2123c9566231SKashyap Desai kfree(mrioc->req_qinfo); 2124c9566231SKashyap Desai mrioc->req_qinfo = NULL; 2125c9566231SKashyap Desai 2126c9566231SKashyap Desai kfree(mrioc->op_reply_qinfo); 2127c9566231SKashyap Desai mrioc->op_reply_qinfo = NULL; 2128c9566231SKashyap Desai 2129c9566231SKashyap Desai return retval; 2130c9566231SKashyap Desai } 2131c9566231SKashyap Desai 2132c9566231SKashyap Desai /** 2133023ab2a9SKashyap Desai * mpi3mr_op_request_post - Post request to operational queue 2134023ab2a9SKashyap Desai * @mrioc: Adapter reference 2135023ab2a9SKashyap Desai * @op_req_q: Operational request queue info 2136023ab2a9SKashyap Desai * @req: MPI3 request 2137023ab2a9SKashyap Desai * 2138023ab2a9SKashyap Desai * Post the MPI3 request into operational request queue and 2139023ab2a9SKashyap Desai * inform the controller, if the queue is full return 2140023ab2a9SKashyap Desai * appropriate error. 2141023ab2a9SKashyap Desai * 2142023ab2a9SKashyap Desai * Return: 0 on success, non-zero on failure. 2143023ab2a9SKashyap Desai */ 2144023ab2a9SKashyap Desai int mpi3mr_op_request_post(struct mpi3mr_ioc *mrioc, 2145023ab2a9SKashyap Desai struct op_req_qinfo *op_req_q, u8 *req) 2146023ab2a9SKashyap Desai { 2147023ab2a9SKashyap Desai u16 pi = 0, max_entries, reply_qidx = 0, midx; 2148023ab2a9SKashyap Desai int retval = 0; 2149023ab2a9SKashyap Desai unsigned long flags; 2150023ab2a9SKashyap Desai u8 *req_entry; 2151023ab2a9SKashyap Desai void *segment_base_addr; 2152023ab2a9SKashyap Desai u16 req_sz = mrioc->facts.op_req_sz; 2153023ab2a9SKashyap Desai struct segments *segments = op_req_q->q_segments; 2154023ab2a9SKashyap Desai 2155023ab2a9SKashyap Desai reply_qidx = op_req_q->reply_qid - 1; 2156023ab2a9SKashyap Desai 2157023ab2a9SKashyap Desai if (mrioc->unrecoverable) 2158023ab2a9SKashyap Desai return -EFAULT; 2159023ab2a9SKashyap Desai 2160023ab2a9SKashyap Desai spin_lock_irqsave(&op_req_q->q_lock, flags); 2161023ab2a9SKashyap Desai pi = op_req_q->pi; 2162023ab2a9SKashyap Desai max_entries = op_req_q->num_requests; 2163023ab2a9SKashyap Desai 2164023ab2a9SKashyap Desai if (mpi3mr_check_req_qfull(op_req_q)) { 2165023ab2a9SKashyap Desai midx = REPLY_QUEUE_IDX_TO_MSIX_IDX( 2166023ab2a9SKashyap Desai reply_qidx, mrioc->op_reply_q_offset); 2167afd3a579SSreekanth Reddy mpi3mr_process_op_reply_q(mrioc, mrioc->intr_info[midx].op_reply_q); 2168023ab2a9SKashyap Desai 2169023ab2a9SKashyap Desai if (mpi3mr_check_req_qfull(op_req_q)) { 2170023ab2a9SKashyap Desai retval = -EAGAIN; 2171023ab2a9SKashyap Desai goto out; 2172023ab2a9SKashyap Desai } 2173023ab2a9SKashyap Desai } 2174023ab2a9SKashyap Desai 2175023ab2a9SKashyap Desai if (mrioc->reset_in_progress) { 2176023ab2a9SKashyap Desai ioc_err(mrioc, "OpReqQ submit reset in progress\n"); 2177023ab2a9SKashyap Desai retval = -EAGAIN; 2178023ab2a9SKashyap Desai goto out; 2179023ab2a9SKashyap Desai } 2180023ab2a9SKashyap Desai 2181023ab2a9SKashyap Desai segment_base_addr = segments[pi / op_req_q->segment_qd].segment; 2182023ab2a9SKashyap Desai req_entry = (u8 *)segment_base_addr + 2183023ab2a9SKashyap Desai ((pi % op_req_q->segment_qd) * req_sz); 2184023ab2a9SKashyap Desai 2185023ab2a9SKashyap Desai memset(req_entry, 0, req_sz); 2186023ab2a9SKashyap Desai memcpy(req_entry, req, MPI3MR_ADMIN_REQ_FRAME_SZ); 2187023ab2a9SKashyap Desai 2188023ab2a9SKashyap Desai if (++pi == max_entries) 2189023ab2a9SKashyap Desai pi = 0; 2190023ab2a9SKashyap Desai op_req_q->pi = pi; 2191023ab2a9SKashyap Desai 2192*7f9f953dSSreekanth Reddy #ifndef CONFIG_PREEMPT_RT 2193463429f8SKashyap Desai if (atomic_inc_return(&mrioc->op_reply_qinfo[reply_qidx].pend_ios) 2194463429f8SKashyap Desai > MPI3MR_IRQ_POLL_TRIGGER_IOCOUNT) 2195463429f8SKashyap Desai mrioc->op_reply_qinfo[reply_qidx].enable_irq_poll = true; 2196*7f9f953dSSreekanth Reddy #else 2197*7f9f953dSSreekanth Reddy atomic_inc_return(&mrioc->op_reply_qinfo[reply_qidx].pend_ios); 2198*7f9f953dSSreekanth Reddy #endif 2199463429f8SKashyap Desai 2200023ab2a9SKashyap Desai writel(op_req_q->pi, 2201023ab2a9SKashyap Desai &mrioc->sysif_regs->oper_queue_indexes[reply_qidx].producer_index); 2202023ab2a9SKashyap Desai 2203023ab2a9SKashyap Desai out: 2204023ab2a9SKashyap Desai spin_unlock_irqrestore(&op_req_q->q_lock, flags); 2205023ab2a9SKashyap Desai return retval; 2206023ab2a9SKashyap Desai } 2207023ab2a9SKashyap Desai 2208023ab2a9SKashyap Desai /** 2209a6856cc4SSreekanth Reddy * mpi3mr_check_rh_fault_ioc - check reset history and fault 2210a6856cc4SSreekanth Reddy * controller 2211a6856cc4SSreekanth Reddy * @mrioc: Adapter instance reference 22123bb3c24eSYang Li * @reason_code: reason code for the fault. 2213a6856cc4SSreekanth Reddy * 2214a6856cc4SSreekanth Reddy * This routine will save snapdump and fault the controller with 2215a6856cc4SSreekanth Reddy * the given reason code if it is not already in the fault or 2216a6856cc4SSreekanth Reddy * not asynchronosuly reset. This will be used to handle 2217a6856cc4SSreekanth Reddy * initilaization time faults/resets/timeout as in those cases 2218a6856cc4SSreekanth Reddy * immediate soft reset invocation is not required. 2219a6856cc4SSreekanth Reddy * 2220a6856cc4SSreekanth Reddy * Return: None. 2221a6856cc4SSreekanth Reddy */ 2222a6856cc4SSreekanth Reddy void mpi3mr_check_rh_fault_ioc(struct mpi3mr_ioc *mrioc, u32 reason_code) 2223a6856cc4SSreekanth Reddy { 2224a6856cc4SSreekanth Reddy u32 ioc_status, host_diagnostic, timeout; 2225a6856cc4SSreekanth Reddy 2226a6856cc4SSreekanth Reddy ioc_status = readl(&mrioc->sysif_regs->ioc_status); 2227a6856cc4SSreekanth Reddy if ((ioc_status & MPI3_SYSIF_IOC_STATUS_RESET_HISTORY) || 2228a6856cc4SSreekanth Reddy (ioc_status & MPI3_SYSIF_IOC_STATUS_FAULT)) { 2229a6856cc4SSreekanth Reddy mpi3mr_print_fault_info(mrioc); 2230a6856cc4SSreekanth Reddy return; 2231a6856cc4SSreekanth Reddy } 2232a6856cc4SSreekanth Reddy mpi3mr_set_diagsave(mrioc); 2233a6856cc4SSreekanth Reddy mpi3mr_issue_reset(mrioc, MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, 2234a6856cc4SSreekanth Reddy reason_code); 2235a6856cc4SSreekanth Reddy timeout = MPI3_SYSIF_DIAG_SAVE_TIMEOUT * 10; 2236a6856cc4SSreekanth Reddy do { 2237a6856cc4SSreekanth Reddy host_diagnostic = readl(&mrioc->sysif_regs->host_diagnostic); 2238a6856cc4SSreekanth Reddy if (!(host_diagnostic & MPI3_SYSIF_HOST_DIAG_SAVE_IN_PROGRESS)) 2239a6856cc4SSreekanth Reddy break; 2240a6856cc4SSreekanth Reddy msleep(100); 2241a6856cc4SSreekanth Reddy } while (--timeout); 2242a6856cc4SSreekanth Reddy } 2243a6856cc4SSreekanth Reddy 2244a6856cc4SSreekanth Reddy /** 224554dfcffbSKashyap Desai * mpi3mr_sync_timestamp - Issue time stamp sync request 224654dfcffbSKashyap Desai * @mrioc: Adapter reference 224754dfcffbSKashyap Desai * 224854dfcffbSKashyap Desai * Issue IO unit control MPI request to synchornize firmware 224954dfcffbSKashyap Desai * timestamp with host time. 225054dfcffbSKashyap Desai * 225154dfcffbSKashyap Desai * Return: 0 on success, non-zero on failure. 225254dfcffbSKashyap Desai */ 225354dfcffbSKashyap Desai static int mpi3mr_sync_timestamp(struct mpi3mr_ioc *mrioc) 225454dfcffbSKashyap Desai { 225554dfcffbSKashyap Desai ktime_t current_time; 225654dfcffbSKashyap Desai struct mpi3_iounit_control_request iou_ctrl; 225754dfcffbSKashyap Desai int retval = 0; 225854dfcffbSKashyap Desai 225954dfcffbSKashyap Desai memset(&iou_ctrl, 0, sizeof(iou_ctrl)); 226054dfcffbSKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 226154dfcffbSKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 226254dfcffbSKashyap Desai retval = -1; 226354dfcffbSKashyap Desai ioc_err(mrioc, "Issue IOUCTL time_stamp: command is in use\n"); 226454dfcffbSKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 226554dfcffbSKashyap Desai goto out; 226654dfcffbSKashyap Desai } 226754dfcffbSKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 226854dfcffbSKashyap Desai mrioc->init_cmds.is_waiting = 1; 226954dfcffbSKashyap Desai mrioc->init_cmds.callback = NULL; 227054dfcffbSKashyap Desai iou_ctrl.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 227154dfcffbSKashyap Desai iou_ctrl.function = MPI3_FUNCTION_IO_UNIT_CONTROL; 227254dfcffbSKashyap Desai iou_ctrl.operation = MPI3_CTRL_OP_UPDATE_TIMESTAMP; 227354dfcffbSKashyap Desai current_time = ktime_get_real(); 227454dfcffbSKashyap Desai iou_ctrl.param64[0] = cpu_to_le64(ktime_to_ms(current_time)); 227554dfcffbSKashyap Desai 227654dfcffbSKashyap Desai init_completion(&mrioc->init_cmds.done); 227754dfcffbSKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &iou_ctrl, 227854dfcffbSKashyap Desai sizeof(iou_ctrl), 0); 227954dfcffbSKashyap Desai if (retval) { 228054dfcffbSKashyap Desai ioc_err(mrioc, "Issue IOUCTL time_stamp: Admin Post failed\n"); 228154dfcffbSKashyap Desai goto out_unlock; 228254dfcffbSKashyap Desai } 228354dfcffbSKashyap Desai 228454dfcffbSKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 228554dfcffbSKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 228654dfcffbSKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 228754dfcffbSKashyap Desai ioc_err(mrioc, "Issue IOUCTL time_stamp: command timed out\n"); 228854dfcffbSKashyap Desai mrioc->init_cmds.is_waiting = 0; 2289fbaa9aa4SSreekanth Reddy if (!(mrioc->init_cmds.state & MPI3MR_CMD_RESET)) 229054dfcffbSKashyap Desai mpi3mr_soft_reset_handler(mrioc, 229154dfcffbSKashyap Desai MPI3MR_RESET_FROM_TSU_TIMEOUT, 1); 229254dfcffbSKashyap Desai retval = -1; 229354dfcffbSKashyap Desai goto out_unlock; 229454dfcffbSKashyap Desai } 229554dfcffbSKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 229654dfcffbSKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 229754dfcffbSKashyap Desai ioc_err(mrioc, 229854dfcffbSKashyap Desai "Issue IOUCTL time_stamp: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 229954dfcffbSKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 230054dfcffbSKashyap Desai mrioc->init_cmds.ioc_loginfo); 230154dfcffbSKashyap Desai retval = -1; 230254dfcffbSKashyap Desai goto out_unlock; 230354dfcffbSKashyap Desai } 230454dfcffbSKashyap Desai 230554dfcffbSKashyap Desai out_unlock: 230654dfcffbSKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 230754dfcffbSKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 230854dfcffbSKashyap Desai 230954dfcffbSKashyap Desai out: 231054dfcffbSKashyap Desai return retval; 231154dfcffbSKashyap Desai } 231254dfcffbSKashyap Desai 231354dfcffbSKashyap Desai /** 23142ac794baSSreekanth Reddy * mpi3mr_print_pkg_ver - display controller fw package version 23152ac794baSSreekanth Reddy * @mrioc: Adapter reference 23162ac794baSSreekanth Reddy * 23172ac794baSSreekanth Reddy * Retrieve firmware package version from the component image 23182ac794baSSreekanth Reddy * header of the controller flash and display it. 23192ac794baSSreekanth Reddy * 23202ac794baSSreekanth Reddy * Return: 0 on success and non-zero on failure. 23212ac794baSSreekanth Reddy */ 23222ac794baSSreekanth Reddy static int mpi3mr_print_pkg_ver(struct mpi3mr_ioc *mrioc) 23232ac794baSSreekanth Reddy { 23242ac794baSSreekanth Reddy struct mpi3_ci_upload_request ci_upload; 23252ac794baSSreekanth Reddy int retval = -1; 23262ac794baSSreekanth Reddy void *data = NULL; 23272ac794baSSreekanth Reddy dma_addr_t data_dma; 23282ac794baSSreekanth Reddy struct mpi3_ci_manifest_mpi *manifest; 23292ac794baSSreekanth Reddy u32 data_len = sizeof(struct mpi3_ci_manifest_mpi); 23302ac794baSSreekanth Reddy u8 sgl_flags = MPI3MR_SGEFLAGS_SYSTEM_SIMPLE_END_OF_LIST; 23312ac794baSSreekanth Reddy 23322ac794baSSreekanth Reddy data = dma_alloc_coherent(&mrioc->pdev->dev, data_len, &data_dma, 23332ac794baSSreekanth Reddy GFP_KERNEL); 23342ac794baSSreekanth Reddy if (!data) 23352ac794baSSreekanth Reddy return -ENOMEM; 23362ac794baSSreekanth Reddy 23372ac794baSSreekanth Reddy memset(&ci_upload, 0, sizeof(ci_upload)); 23382ac794baSSreekanth Reddy mutex_lock(&mrioc->init_cmds.mutex); 23392ac794baSSreekanth Reddy if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 23402ac794baSSreekanth Reddy ioc_err(mrioc, "sending get package version failed due to command in use\n"); 23412ac794baSSreekanth Reddy mutex_unlock(&mrioc->init_cmds.mutex); 23422ac794baSSreekanth Reddy goto out; 23432ac794baSSreekanth Reddy } 23442ac794baSSreekanth Reddy mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 23452ac794baSSreekanth Reddy mrioc->init_cmds.is_waiting = 1; 23462ac794baSSreekanth Reddy mrioc->init_cmds.callback = NULL; 23472ac794baSSreekanth Reddy ci_upload.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 23482ac794baSSreekanth Reddy ci_upload.function = MPI3_FUNCTION_CI_UPLOAD; 23492ac794baSSreekanth Reddy ci_upload.msg_flags = MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_PRIMARY; 23502ac794baSSreekanth Reddy ci_upload.signature1 = cpu_to_le32(MPI3_IMAGE_HEADER_SIGNATURE1_MANIFEST); 23512ac794baSSreekanth Reddy ci_upload.image_offset = cpu_to_le32(MPI3_IMAGE_HEADER_SIZE); 23522ac794baSSreekanth Reddy ci_upload.segment_size = cpu_to_le32(data_len); 23532ac794baSSreekanth Reddy 23542ac794baSSreekanth Reddy mpi3mr_add_sg_single(&ci_upload.sgl, sgl_flags, data_len, 23552ac794baSSreekanth Reddy data_dma); 23562ac794baSSreekanth Reddy init_completion(&mrioc->init_cmds.done); 23572ac794baSSreekanth Reddy retval = mpi3mr_admin_request_post(mrioc, &ci_upload, 23582ac794baSSreekanth Reddy sizeof(ci_upload), 1); 23592ac794baSSreekanth Reddy if (retval) { 23602ac794baSSreekanth Reddy ioc_err(mrioc, "posting get package version failed\n"); 23612ac794baSSreekanth Reddy goto out_unlock; 23622ac794baSSreekanth Reddy } 23632ac794baSSreekanth Reddy wait_for_completion_timeout(&mrioc->init_cmds.done, 23642ac794baSSreekanth Reddy (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 23652ac794baSSreekanth Reddy if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 23662ac794baSSreekanth Reddy ioc_err(mrioc, "get package version timed out\n"); 2367a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 2368a6856cc4SSreekanth Reddy MPI3MR_RESET_FROM_GETPKGVER_TIMEOUT); 23692ac794baSSreekanth Reddy retval = -1; 23702ac794baSSreekanth Reddy goto out_unlock; 23712ac794baSSreekanth Reddy } 23722ac794baSSreekanth Reddy if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 23732ac794baSSreekanth Reddy == MPI3_IOCSTATUS_SUCCESS) { 23742ac794baSSreekanth Reddy manifest = (struct mpi3_ci_manifest_mpi *) data; 23752ac794baSSreekanth Reddy if (manifest->manifest_type == MPI3_CI_MANIFEST_TYPE_MPI) { 23762ac794baSSreekanth Reddy ioc_info(mrioc, 23772ac794baSSreekanth Reddy "firmware package version(%d.%d.%d.%d.%05d-%05d)\n", 23782ac794baSSreekanth Reddy manifest->package_version.gen_major, 23792ac794baSSreekanth Reddy manifest->package_version.gen_minor, 23802ac794baSSreekanth Reddy manifest->package_version.phase_major, 23812ac794baSSreekanth Reddy manifest->package_version.phase_minor, 23822ac794baSSreekanth Reddy manifest->package_version.customer_id, 23832ac794baSSreekanth Reddy manifest->package_version.build_num); 23842ac794baSSreekanth Reddy } 23852ac794baSSreekanth Reddy } 23862ac794baSSreekanth Reddy retval = 0; 23872ac794baSSreekanth Reddy out_unlock: 23882ac794baSSreekanth Reddy mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 23892ac794baSSreekanth Reddy mutex_unlock(&mrioc->init_cmds.mutex); 23902ac794baSSreekanth Reddy 23912ac794baSSreekanth Reddy out: 23922ac794baSSreekanth Reddy if (data) 23932ac794baSSreekanth Reddy dma_free_coherent(&mrioc->pdev->dev, data_len, data, 23942ac794baSSreekanth Reddy data_dma); 23952ac794baSSreekanth Reddy return retval; 23962ac794baSSreekanth Reddy } 23972ac794baSSreekanth Reddy 23982ac794baSSreekanth Reddy /** 2399672ae26cSKashyap Desai * mpi3mr_watchdog_work - watchdog thread to monitor faults 2400672ae26cSKashyap Desai * @work: work struct 2401672ae26cSKashyap Desai * 2402672ae26cSKashyap Desai * Watch dog work periodically executed (1 second interval) to 2403672ae26cSKashyap Desai * monitor firmware fault and to issue periodic timer sync to 2404672ae26cSKashyap Desai * the firmware. 2405672ae26cSKashyap Desai * 2406672ae26cSKashyap Desai * Return: Nothing. 2407672ae26cSKashyap Desai */ 2408672ae26cSKashyap Desai static void mpi3mr_watchdog_work(struct work_struct *work) 2409672ae26cSKashyap Desai { 2410672ae26cSKashyap Desai struct mpi3mr_ioc *mrioc = 2411672ae26cSKashyap Desai container_of(work, struct mpi3mr_ioc, watchdog_work.work); 2412672ae26cSKashyap Desai unsigned long flags; 2413672ae26cSKashyap Desai enum mpi3mr_iocstate ioc_state; 241478b76a07SSreekanth Reddy u32 fault, host_diagnostic, ioc_status; 241578b76a07SSreekanth Reddy u32 reset_reason = MPI3MR_RESET_FROM_FAULT_WATCH; 2416672ae26cSKashyap Desai 2417b64845a7SSreekanth Reddy if (mrioc->reset_in_progress || mrioc->unrecoverable) 2418b64845a7SSreekanth Reddy return; 2419b64845a7SSreekanth Reddy 242054dfcffbSKashyap Desai if (mrioc->ts_update_counter++ >= MPI3MR_TSUPDATE_INTERVAL) { 242154dfcffbSKashyap Desai mrioc->ts_update_counter = 0; 242254dfcffbSKashyap Desai mpi3mr_sync_timestamp(mrioc); 242354dfcffbSKashyap Desai } 242454dfcffbSKashyap Desai 242578b76a07SSreekanth Reddy if ((mrioc->prepare_for_reset) && 242678b76a07SSreekanth Reddy ((mrioc->prepare_for_reset_timeout_counter++) >= 242778b76a07SSreekanth Reddy MPI3MR_PREPARE_FOR_RESET_TIMEOUT)) { 242878b76a07SSreekanth Reddy mpi3mr_soft_reset_handler(mrioc, 242978b76a07SSreekanth Reddy MPI3MR_RESET_FROM_CIACTVRST_TIMER, 1); 243078b76a07SSreekanth Reddy return; 243178b76a07SSreekanth Reddy } 243278b76a07SSreekanth Reddy 243378b76a07SSreekanth Reddy ioc_status = readl(&mrioc->sysif_regs->ioc_status); 243478b76a07SSreekanth Reddy if (ioc_status & MPI3_SYSIF_IOC_STATUS_RESET_HISTORY) { 243578b76a07SSreekanth Reddy mpi3mr_soft_reset_handler(mrioc, MPI3MR_RESET_FROM_FIRMWARE, 0); 243678b76a07SSreekanth Reddy return; 243778b76a07SSreekanth Reddy } 243878b76a07SSreekanth Reddy 2439672ae26cSKashyap Desai /*Check for fault state every one second and issue Soft reset*/ 2440672ae26cSKashyap Desai ioc_state = mpi3mr_get_iocstate(mrioc); 244178b76a07SSreekanth Reddy if (ioc_state != MRIOC_STATE_FAULT) 244278b76a07SSreekanth Reddy goto schedule_work; 244378b76a07SSreekanth Reddy 244478b76a07SSreekanth Reddy fault = readl(&mrioc->sysif_regs->fault) & MPI3_SYSIF_FAULT_CODE_MASK; 2445672ae26cSKashyap Desai host_diagnostic = readl(&mrioc->sysif_regs->host_diagnostic); 2446672ae26cSKashyap Desai if (host_diagnostic & MPI3_SYSIF_HOST_DIAG_SAVE_IN_PROGRESS) { 2447672ae26cSKashyap Desai if (!mrioc->diagsave_timeout) { 2448672ae26cSKashyap Desai mpi3mr_print_fault_info(mrioc); 244978b76a07SSreekanth Reddy ioc_warn(mrioc, "diag save in progress\n"); 2450672ae26cSKashyap Desai } 245178b76a07SSreekanth Reddy if ((mrioc->diagsave_timeout++) <= MPI3_SYSIF_DIAG_SAVE_TIMEOUT) 2452672ae26cSKashyap Desai goto schedule_work; 245378b76a07SSreekanth Reddy } 245478b76a07SSreekanth Reddy 2455672ae26cSKashyap Desai mpi3mr_print_fault_info(mrioc); 2456672ae26cSKashyap Desai mrioc->diagsave_timeout = 0; 2457672ae26cSKashyap Desai 245878b76a07SSreekanth Reddy switch (fault) { 245978b76a07SSreekanth Reddy case MPI3_SYSIF_FAULT_CODE_POWER_CYCLE_REQUIRED: 2460672ae26cSKashyap Desai ioc_info(mrioc, 246178b76a07SSreekanth Reddy "controller requires system power cycle, marking controller as unrecoverable\n"); 2462672ae26cSKashyap Desai mrioc->unrecoverable = 1; 246378b76a07SSreekanth Reddy return; 246478b76a07SSreekanth Reddy case MPI3_SYSIF_FAULT_CODE_SOFT_RESET_IN_PROGRESS: 246578b76a07SSreekanth Reddy return; 246678b76a07SSreekanth Reddy case MPI3_SYSIF_FAULT_CODE_CI_ACTIVATION_RESET: 246778b76a07SSreekanth Reddy reset_reason = MPI3MR_RESET_FROM_CIACTIV_FAULT; 246878b76a07SSreekanth Reddy break; 246978b76a07SSreekanth Reddy default: 247078b76a07SSreekanth Reddy break; 2471672ae26cSKashyap Desai } 247278b76a07SSreekanth Reddy mpi3mr_soft_reset_handler(mrioc, reset_reason, 0); 247378b76a07SSreekanth Reddy return; 2474672ae26cSKashyap Desai 2475672ae26cSKashyap Desai schedule_work: 2476672ae26cSKashyap Desai spin_lock_irqsave(&mrioc->watchdog_lock, flags); 2477672ae26cSKashyap Desai if (mrioc->watchdog_work_q) 2478672ae26cSKashyap Desai queue_delayed_work(mrioc->watchdog_work_q, 2479672ae26cSKashyap Desai &mrioc->watchdog_work, 2480672ae26cSKashyap Desai msecs_to_jiffies(MPI3MR_WATCHDOG_INTERVAL)); 2481672ae26cSKashyap Desai spin_unlock_irqrestore(&mrioc->watchdog_lock, flags); 2482672ae26cSKashyap Desai return; 2483672ae26cSKashyap Desai } 2484672ae26cSKashyap Desai 2485672ae26cSKashyap Desai /** 2486672ae26cSKashyap Desai * mpi3mr_start_watchdog - Start watchdog 2487672ae26cSKashyap Desai * @mrioc: Adapter instance reference 2488672ae26cSKashyap Desai * 2489672ae26cSKashyap Desai * Create and start the watchdog thread to monitor controller 2490672ae26cSKashyap Desai * faults. 2491672ae26cSKashyap Desai * 2492672ae26cSKashyap Desai * Return: Nothing. 2493672ae26cSKashyap Desai */ 2494672ae26cSKashyap Desai void mpi3mr_start_watchdog(struct mpi3mr_ioc *mrioc) 2495672ae26cSKashyap Desai { 2496672ae26cSKashyap Desai if (mrioc->watchdog_work_q) 2497672ae26cSKashyap Desai return; 2498672ae26cSKashyap Desai 2499672ae26cSKashyap Desai INIT_DELAYED_WORK(&mrioc->watchdog_work, mpi3mr_watchdog_work); 2500672ae26cSKashyap Desai snprintf(mrioc->watchdog_work_q_name, 2501672ae26cSKashyap Desai sizeof(mrioc->watchdog_work_q_name), "watchdog_%s%d", mrioc->name, 2502672ae26cSKashyap Desai mrioc->id); 2503672ae26cSKashyap Desai mrioc->watchdog_work_q = 2504672ae26cSKashyap Desai create_singlethread_workqueue(mrioc->watchdog_work_q_name); 2505672ae26cSKashyap Desai if (!mrioc->watchdog_work_q) { 2506672ae26cSKashyap Desai ioc_err(mrioc, "%s: failed (line=%d)\n", __func__, __LINE__); 2507672ae26cSKashyap Desai return; 2508672ae26cSKashyap Desai } 2509672ae26cSKashyap Desai 2510672ae26cSKashyap Desai if (mrioc->watchdog_work_q) 2511672ae26cSKashyap Desai queue_delayed_work(mrioc->watchdog_work_q, 2512672ae26cSKashyap Desai &mrioc->watchdog_work, 2513672ae26cSKashyap Desai msecs_to_jiffies(MPI3MR_WATCHDOG_INTERVAL)); 2514672ae26cSKashyap Desai } 2515672ae26cSKashyap Desai 2516672ae26cSKashyap Desai /** 2517672ae26cSKashyap Desai * mpi3mr_stop_watchdog - Stop watchdog 2518672ae26cSKashyap Desai * @mrioc: Adapter instance reference 2519672ae26cSKashyap Desai * 2520672ae26cSKashyap Desai * Stop the watchdog thread created to monitor controller 2521672ae26cSKashyap Desai * faults. 2522672ae26cSKashyap Desai * 2523672ae26cSKashyap Desai * Return: Nothing. 2524672ae26cSKashyap Desai */ 2525672ae26cSKashyap Desai void mpi3mr_stop_watchdog(struct mpi3mr_ioc *mrioc) 2526672ae26cSKashyap Desai { 2527672ae26cSKashyap Desai unsigned long flags; 2528672ae26cSKashyap Desai struct workqueue_struct *wq; 2529672ae26cSKashyap Desai 2530672ae26cSKashyap Desai spin_lock_irqsave(&mrioc->watchdog_lock, flags); 2531672ae26cSKashyap Desai wq = mrioc->watchdog_work_q; 2532672ae26cSKashyap Desai mrioc->watchdog_work_q = NULL; 2533672ae26cSKashyap Desai spin_unlock_irqrestore(&mrioc->watchdog_lock, flags); 2534672ae26cSKashyap Desai if (wq) { 2535672ae26cSKashyap Desai if (!cancel_delayed_work_sync(&mrioc->watchdog_work)) 2536672ae26cSKashyap Desai flush_workqueue(wq); 2537672ae26cSKashyap Desai destroy_workqueue(wq); 2538672ae26cSKashyap Desai } 2539672ae26cSKashyap Desai } 2540672ae26cSKashyap Desai 2541672ae26cSKashyap Desai /** 2542824a1566SKashyap Desai * mpi3mr_setup_admin_qpair - Setup admin queue pair 2543824a1566SKashyap Desai * @mrioc: Adapter instance reference 2544824a1566SKashyap Desai * 2545824a1566SKashyap Desai * Allocate memory for admin queue pair if required and register 2546824a1566SKashyap Desai * the admin queue with the controller. 2547824a1566SKashyap Desai * 2548824a1566SKashyap Desai * Return: 0 on success, non-zero on failures. 2549824a1566SKashyap Desai */ 2550824a1566SKashyap Desai static int mpi3mr_setup_admin_qpair(struct mpi3mr_ioc *mrioc) 2551824a1566SKashyap Desai { 2552824a1566SKashyap Desai int retval = 0; 2553824a1566SKashyap Desai u32 num_admin_entries = 0; 2554824a1566SKashyap Desai 2555824a1566SKashyap Desai mrioc->admin_req_q_sz = MPI3MR_ADMIN_REQ_Q_SIZE; 2556824a1566SKashyap Desai mrioc->num_admin_req = mrioc->admin_req_q_sz / 2557824a1566SKashyap Desai MPI3MR_ADMIN_REQ_FRAME_SZ; 2558824a1566SKashyap Desai mrioc->admin_req_ci = mrioc->admin_req_pi = 0; 2559824a1566SKashyap Desai mrioc->admin_req_base = NULL; 2560824a1566SKashyap Desai 2561824a1566SKashyap Desai mrioc->admin_reply_q_sz = MPI3MR_ADMIN_REPLY_Q_SIZE; 2562824a1566SKashyap Desai mrioc->num_admin_replies = mrioc->admin_reply_q_sz / 2563824a1566SKashyap Desai MPI3MR_ADMIN_REPLY_FRAME_SZ; 2564824a1566SKashyap Desai mrioc->admin_reply_ci = 0; 2565824a1566SKashyap Desai mrioc->admin_reply_ephase = 1; 2566824a1566SKashyap Desai mrioc->admin_reply_base = NULL; 2567824a1566SKashyap Desai 2568824a1566SKashyap Desai if (!mrioc->admin_req_base) { 2569824a1566SKashyap Desai mrioc->admin_req_base = dma_alloc_coherent(&mrioc->pdev->dev, 2570824a1566SKashyap Desai mrioc->admin_req_q_sz, &mrioc->admin_req_dma, GFP_KERNEL); 2571824a1566SKashyap Desai 2572824a1566SKashyap Desai if (!mrioc->admin_req_base) { 2573824a1566SKashyap Desai retval = -1; 2574824a1566SKashyap Desai goto out_failed; 2575824a1566SKashyap Desai } 2576824a1566SKashyap Desai 2577824a1566SKashyap Desai mrioc->admin_reply_base = dma_alloc_coherent(&mrioc->pdev->dev, 2578824a1566SKashyap Desai mrioc->admin_reply_q_sz, &mrioc->admin_reply_dma, 2579824a1566SKashyap Desai GFP_KERNEL); 2580824a1566SKashyap Desai 2581824a1566SKashyap Desai if (!mrioc->admin_reply_base) { 2582824a1566SKashyap Desai retval = -1; 2583824a1566SKashyap Desai goto out_failed; 2584824a1566SKashyap Desai } 2585824a1566SKashyap Desai } 2586824a1566SKashyap Desai 2587824a1566SKashyap Desai num_admin_entries = (mrioc->num_admin_replies << 16) | 2588824a1566SKashyap Desai (mrioc->num_admin_req); 2589824a1566SKashyap Desai writel(num_admin_entries, &mrioc->sysif_regs->admin_queue_num_entries); 2590824a1566SKashyap Desai mpi3mr_writeq(mrioc->admin_req_dma, 2591824a1566SKashyap Desai &mrioc->sysif_regs->admin_request_queue_address); 2592824a1566SKashyap Desai mpi3mr_writeq(mrioc->admin_reply_dma, 2593824a1566SKashyap Desai &mrioc->sysif_regs->admin_reply_queue_address); 2594824a1566SKashyap Desai writel(mrioc->admin_req_pi, &mrioc->sysif_regs->admin_request_queue_pi); 2595824a1566SKashyap Desai writel(mrioc->admin_reply_ci, &mrioc->sysif_regs->admin_reply_queue_ci); 2596824a1566SKashyap Desai return retval; 2597824a1566SKashyap Desai 2598824a1566SKashyap Desai out_failed: 2599824a1566SKashyap Desai 2600824a1566SKashyap Desai if (mrioc->admin_reply_base) { 2601824a1566SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, mrioc->admin_reply_q_sz, 2602824a1566SKashyap Desai mrioc->admin_reply_base, mrioc->admin_reply_dma); 2603824a1566SKashyap Desai mrioc->admin_reply_base = NULL; 2604824a1566SKashyap Desai } 2605824a1566SKashyap Desai if (mrioc->admin_req_base) { 2606824a1566SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, mrioc->admin_req_q_sz, 2607824a1566SKashyap Desai mrioc->admin_req_base, mrioc->admin_req_dma); 2608824a1566SKashyap Desai mrioc->admin_req_base = NULL; 2609824a1566SKashyap Desai } 2610824a1566SKashyap Desai return retval; 2611824a1566SKashyap Desai } 2612824a1566SKashyap Desai 2613824a1566SKashyap Desai /** 2614824a1566SKashyap Desai * mpi3mr_issue_iocfacts - Send IOC Facts 2615824a1566SKashyap Desai * @mrioc: Adapter instance reference 2616824a1566SKashyap Desai * @facts_data: Cached IOC facts data 2617824a1566SKashyap Desai * 2618824a1566SKashyap Desai * Issue IOC Facts MPI request through admin queue and wait for 2619824a1566SKashyap Desai * the completion of it or time out. 2620824a1566SKashyap Desai * 2621824a1566SKashyap Desai * Return: 0 on success, non-zero on failures. 2622824a1566SKashyap Desai */ 2623824a1566SKashyap Desai static int mpi3mr_issue_iocfacts(struct mpi3mr_ioc *mrioc, 2624824a1566SKashyap Desai struct mpi3_ioc_facts_data *facts_data) 2625824a1566SKashyap Desai { 2626824a1566SKashyap Desai struct mpi3_ioc_facts_request iocfacts_req; 2627824a1566SKashyap Desai void *data = NULL; 2628824a1566SKashyap Desai dma_addr_t data_dma; 2629824a1566SKashyap Desai u32 data_len = sizeof(*facts_data); 2630824a1566SKashyap Desai int retval = 0; 2631824a1566SKashyap Desai u8 sgl_flags = MPI3MR_SGEFLAGS_SYSTEM_SIMPLE_END_OF_LIST; 2632824a1566SKashyap Desai 2633824a1566SKashyap Desai data = dma_alloc_coherent(&mrioc->pdev->dev, data_len, &data_dma, 2634824a1566SKashyap Desai GFP_KERNEL); 2635824a1566SKashyap Desai 2636824a1566SKashyap Desai if (!data) { 2637824a1566SKashyap Desai retval = -1; 2638824a1566SKashyap Desai goto out; 2639824a1566SKashyap Desai } 2640824a1566SKashyap Desai 2641824a1566SKashyap Desai memset(&iocfacts_req, 0, sizeof(iocfacts_req)); 2642824a1566SKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 2643824a1566SKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 2644824a1566SKashyap Desai retval = -1; 2645824a1566SKashyap Desai ioc_err(mrioc, "Issue IOCFacts: Init command is in use\n"); 2646824a1566SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 2647824a1566SKashyap Desai goto out; 2648824a1566SKashyap Desai } 2649824a1566SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 2650824a1566SKashyap Desai mrioc->init_cmds.is_waiting = 1; 2651824a1566SKashyap Desai mrioc->init_cmds.callback = NULL; 2652824a1566SKashyap Desai iocfacts_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 2653824a1566SKashyap Desai iocfacts_req.function = MPI3_FUNCTION_IOC_FACTS; 2654824a1566SKashyap Desai 2655824a1566SKashyap Desai mpi3mr_add_sg_single(&iocfacts_req.sgl, sgl_flags, data_len, 2656824a1566SKashyap Desai data_dma); 2657824a1566SKashyap Desai 2658824a1566SKashyap Desai init_completion(&mrioc->init_cmds.done); 2659824a1566SKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &iocfacts_req, 2660824a1566SKashyap Desai sizeof(iocfacts_req), 1); 2661824a1566SKashyap Desai if (retval) { 2662824a1566SKashyap Desai ioc_err(mrioc, "Issue IOCFacts: Admin Post failed\n"); 2663824a1566SKashyap Desai goto out_unlock; 2664824a1566SKashyap Desai } 2665824a1566SKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 2666824a1566SKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 2667824a1566SKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 2668a6856cc4SSreekanth Reddy ioc_err(mrioc, "ioc_facts timed out\n"); 2669a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 2670824a1566SKashyap Desai MPI3MR_RESET_FROM_IOCFACTS_TIMEOUT); 2671824a1566SKashyap Desai retval = -1; 2672824a1566SKashyap Desai goto out_unlock; 2673824a1566SKashyap Desai } 2674824a1566SKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 2675824a1566SKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 2676824a1566SKashyap Desai ioc_err(mrioc, 2677824a1566SKashyap Desai "Issue IOCFacts: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 2678824a1566SKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 2679824a1566SKashyap Desai mrioc->init_cmds.ioc_loginfo); 2680824a1566SKashyap Desai retval = -1; 2681824a1566SKashyap Desai goto out_unlock; 2682824a1566SKashyap Desai } 2683824a1566SKashyap Desai memcpy(facts_data, (u8 *)data, data_len); 2684c5758fc7SSreekanth Reddy mpi3mr_process_factsdata(mrioc, facts_data); 2685824a1566SKashyap Desai out_unlock: 2686824a1566SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 2687824a1566SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 2688824a1566SKashyap Desai 2689824a1566SKashyap Desai out: 2690824a1566SKashyap Desai if (data) 2691824a1566SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, data_len, data, data_dma); 2692824a1566SKashyap Desai 2693824a1566SKashyap Desai return retval; 2694824a1566SKashyap Desai } 2695824a1566SKashyap Desai 2696824a1566SKashyap Desai /** 2697824a1566SKashyap Desai * mpi3mr_check_reset_dma_mask - Process IOC facts data 2698824a1566SKashyap Desai * @mrioc: Adapter instance reference 2699824a1566SKashyap Desai * 2700824a1566SKashyap Desai * Check whether the new DMA mask requested through IOCFacts by 2701824a1566SKashyap Desai * firmware needs to be set, if so set it . 2702824a1566SKashyap Desai * 2703824a1566SKashyap Desai * Return: 0 on success, non-zero on failure. 2704824a1566SKashyap Desai */ 2705824a1566SKashyap Desai static inline int mpi3mr_check_reset_dma_mask(struct mpi3mr_ioc *mrioc) 2706824a1566SKashyap Desai { 2707824a1566SKashyap Desai struct pci_dev *pdev = mrioc->pdev; 2708824a1566SKashyap Desai int r; 2709824a1566SKashyap Desai u64 facts_dma_mask = DMA_BIT_MASK(mrioc->facts.dma_mask); 2710824a1566SKashyap Desai 2711824a1566SKashyap Desai if (!mrioc->facts.dma_mask || (mrioc->dma_mask <= facts_dma_mask)) 2712824a1566SKashyap Desai return 0; 2713824a1566SKashyap Desai 2714824a1566SKashyap Desai ioc_info(mrioc, "Changing DMA mask from 0x%016llx to 0x%016llx\n", 2715824a1566SKashyap Desai mrioc->dma_mask, facts_dma_mask); 2716824a1566SKashyap Desai 2717824a1566SKashyap Desai r = dma_set_mask_and_coherent(&pdev->dev, facts_dma_mask); 2718824a1566SKashyap Desai if (r) { 2719824a1566SKashyap Desai ioc_err(mrioc, "Setting DMA mask to 0x%016llx failed: %d\n", 2720824a1566SKashyap Desai facts_dma_mask, r); 2721824a1566SKashyap Desai return r; 2722824a1566SKashyap Desai } 2723824a1566SKashyap Desai mrioc->dma_mask = facts_dma_mask; 2724824a1566SKashyap Desai return r; 2725824a1566SKashyap Desai } 2726824a1566SKashyap Desai 2727824a1566SKashyap Desai /** 2728824a1566SKashyap Desai * mpi3mr_process_factsdata - Process IOC facts data 2729824a1566SKashyap Desai * @mrioc: Adapter instance reference 2730824a1566SKashyap Desai * @facts_data: Cached IOC facts data 2731824a1566SKashyap Desai * 2732824a1566SKashyap Desai * Convert IOC facts data into cpu endianness and cache it in 2733824a1566SKashyap Desai * the driver . 2734824a1566SKashyap Desai * 2735824a1566SKashyap Desai * Return: Nothing. 2736824a1566SKashyap Desai */ 2737824a1566SKashyap Desai static void mpi3mr_process_factsdata(struct mpi3mr_ioc *mrioc, 2738824a1566SKashyap Desai struct mpi3_ioc_facts_data *facts_data) 2739824a1566SKashyap Desai { 2740824a1566SKashyap Desai u32 ioc_config, req_sz, facts_flags; 2741824a1566SKashyap Desai 2742824a1566SKashyap Desai if ((le16_to_cpu(facts_data->ioc_facts_data_length)) != 2743824a1566SKashyap Desai (sizeof(*facts_data) / 4)) { 2744824a1566SKashyap Desai ioc_warn(mrioc, 2745824a1566SKashyap Desai "IOCFactsdata length mismatch driver_sz(%zu) firmware_sz(%d)\n", 2746824a1566SKashyap Desai sizeof(*facts_data), 2747824a1566SKashyap Desai le16_to_cpu(facts_data->ioc_facts_data_length) * 4); 2748824a1566SKashyap Desai } 2749824a1566SKashyap Desai 2750824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 2751824a1566SKashyap Desai req_sz = 1 << ((ioc_config & MPI3_SYSIF_IOC_CONFIG_OPER_REQ_ENT_SZ) >> 2752824a1566SKashyap Desai MPI3_SYSIF_IOC_CONFIG_OPER_REQ_ENT_SZ_SHIFT); 2753824a1566SKashyap Desai if (le16_to_cpu(facts_data->ioc_request_frame_size) != (req_sz / 4)) { 2754824a1566SKashyap Desai ioc_err(mrioc, 2755824a1566SKashyap Desai "IOCFacts data reqFrameSize mismatch hw_size(%d) firmware_sz(%d)\n", 2756824a1566SKashyap Desai req_sz / 4, le16_to_cpu(facts_data->ioc_request_frame_size)); 2757824a1566SKashyap Desai } 2758824a1566SKashyap Desai 2759824a1566SKashyap Desai memset(&mrioc->facts, 0, sizeof(mrioc->facts)); 2760824a1566SKashyap Desai 2761824a1566SKashyap Desai facts_flags = le32_to_cpu(facts_data->flags); 2762824a1566SKashyap Desai mrioc->facts.op_req_sz = req_sz; 2763824a1566SKashyap Desai mrioc->op_reply_desc_sz = 1 << ((ioc_config & 2764824a1566SKashyap Desai MPI3_SYSIF_IOC_CONFIG_OPER_RPY_ENT_SZ) >> 2765824a1566SKashyap Desai MPI3_SYSIF_IOC_CONFIG_OPER_RPY_ENT_SZ_SHIFT); 2766824a1566SKashyap Desai 2767824a1566SKashyap Desai mrioc->facts.ioc_num = facts_data->ioc_number; 2768824a1566SKashyap Desai mrioc->facts.who_init = facts_data->who_init; 2769824a1566SKashyap Desai mrioc->facts.max_msix_vectors = le16_to_cpu(facts_data->max_msix_vectors); 2770824a1566SKashyap Desai mrioc->facts.personality = (facts_flags & 2771824a1566SKashyap Desai MPI3_IOCFACTS_FLAGS_PERSONALITY_MASK); 2772824a1566SKashyap Desai mrioc->facts.dma_mask = (facts_flags & 2773824a1566SKashyap Desai MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_MASK) >> 2774824a1566SKashyap Desai MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_SHIFT; 2775824a1566SKashyap Desai mrioc->facts.protocol_flags = facts_data->protocol_flags; 2776824a1566SKashyap Desai mrioc->facts.mpi_version = le32_to_cpu(facts_data->mpi_version.word); 277704b27e53SSreekanth Reddy mrioc->facts.max_reqs = le16_to_cpu(facts_data->max_outstanding_requests); 2778824a1566SKashyap Desai mrioc->facts.product_id = le16_to_cpu(facts_data->product_id); 2779824a1566SKashyap Desai mrioc->facts.reply_sz = le16_to_cpu(facts_data->reply_frame_size) * 4; 2780824a1566SKashyap Desai mrioc->facts.exceptions = le16_to_cpu(facts_data->ioc_exceptions); 2781824a1566SKashyap Desai mrioc->facts.max_perids = le16_to_cpu(facts_data->max_persistent_id); 2782824a1566SKashyap Desai mrioc->facts.max_vds = le16_to_cpu(facts_data->max_vds); 2783824a1566SKashyap Desai mrioc->facts.max_hpds = le16_to_cpu(facts_data->max_host_pds); 2784ec5ebd2cSSreekanth Reddy mrioc->facts.max_advhpds = le16_to_cpu(facts_data->max_adv_host_pds); 2785ec5ebd2cSSreekanth Reddy mrioc->facts.max_raid_pds = le16_to_cpu(facts_data->max_raid_pds); 2786824a1566SKashyap Desai mrioc->facts.max_nvme = le16_to_cpu(facts_data->max_nvme); 2787824a1566SKashyap Desai mrioc->facts.max_pcie_switches = 2788ec5ebd2cSSreekanth Reddy le16_to_cpu(facts_data->max_pcie_switches); 2789824a1566SKashyap Desai mrioc->facts.max_sasexpanders = 2790824a1566SKashyap Desai le16_to_cpu(facts_data->max_sas_expanders); 2791824a1566SKashyap Desai mrioc->facts.max_sasinitiators = 2792824a1566SKashyap Desai le16_to_cpu(facts_data->max_sas_initiators); 2793824a1566SKashyap Desai mrioc->facts.max_enclosures = le16_to_cpu(facts_data->max_enclosures); 2794824a1566SKashyap Desai mrioc->facts.min_devhandle = le16_to_cpu(facts_data->min_dev_handle); 2795824a1566SKashyap Desai mrioc->facts.max_devhandle = le16_to_cpu(facts_data->max_dev_handle); 2796824a1566SKashyap Desai mrioc->facts.max_op_req_q = 2797824a1566SKashyap Desai le16_to_cpu(facts_data->max_operational_request_queues); 2798824a1566SKashyap Desai mrioc->facts.max_op_reply_q = 2799824a1566SKashyap Desai le16_to_cpu(facts_data->max_operational_reply_queues); 2800824a1566SKashyap Desai mrioc->facts.ioc_capabilities = 2801824a1566SKashyap Desai le32_to_cpu(facts_data->ioc_capabilities); 2802824a1566SKashyap Desai mrioc->facts.fw_ver.build_num = 2803824a1566SKashyap Desai le16_to_cpu(facts_data->fw_version.build_num); 2804824a1566SKashyap Desai mrioc->facts.fw_ver.cust_id = 2805824a1566SKashyap Desai le16_to_cpu(facts_data->fw_version.customer_id); 2806824a1566SKashyap Desai mrioc->facts.fw_ver.ph_minor = facts_data->fw_version.phase_minor; 2807824a1566SKashyap Desai mrioc->facts.fw_ver.ph_major = facts_data->fw_version.phase_major; 2808824a1566SKashyap Desai mrioc->facts.fw_ver.gen_minor = facts_data->fw_version.gen_minor; 2809824a1566SKashyap Desai mrioc->facts.fw_ver.gen_major = facts_data->fw_version.gen_major; 2810824a1566SKashyap Desai mrioc->msix_count = min_t(int, mrioc->msix_count, 2811824a1566SKashyap Desai mrioc->facts.max_msix_vectors); 2812824a1566SKashyap Desai mrioc->facts.sge_mod_mask = facts_data->sge_modifier_mask; 2813824a1566SKashyap Desai mrioc->facts.sge_mod_value = facts_data->sge_modifier_value; 2814824a1566SKashyap Desai mrioc->facts.sge_mod_shift = facts_data->sge_modifier_shift; 2815824a1566SKashyap Desai mrioc->facts.shutdown_timeout = 2816824a1566SKashyap Desai le16_to_cpu(facts_data->shutdown_timeout); 2817824a1566SKashyap Desai 2818f10af057SSreekanth Reddy mrioc->facts.max_dev_per_tg = 2819f10af057SSreekanth Reddy facts_data->max_devices_per_throttle_group; 2820f10af057SSreekanth Reddy mrioc->facts.io_throttle_data_length = 2821f10af057SSreekanth Reddy le16_to_cpu(facts_data->io_throttle_data_length); 2822f10af057SSreekanth Reddy mrioc->facts.max_io_throttle_group = 2823f10af057SSreekanth Reddy le16_to_cpu(facts_data->max_io_throttle_group); 2824f10af057SSreekanth Reddy mrioc->facts.io_throttle_low = le16_to_cpu(facts_data->io_throttle_low); 2825f10af057SSreekanth Reddy mrioc->facts.io_throttle_high = 2826f10af057SSreekanth Reddy le16_to_cpu(facts_data->io_throttle_high); 2827f10af057SSreekanth Reddy 2828f10af057SSreekanth Reddy /* Store in 512b block count */ 2829f10af057SSreekanth Reddy if (mrioc->facts.io_throttle_data_length) 2830f10af057SSreekanth Reddy mrioc->io_throttle_data_length = 2831f10af057SSreekanth Reddy (mrioc->facts.io_throttle_data_length * 2 * 4); 2832f10af057SSreekanth Reddy else 2833f10af057SSreekanth Reddy /* set the length to 1MB + 1K to disable throttle */ 2834f10af057SSreekanth Reddy mrioc->io_throttle_data_length = MPI3MR_MAX_SECTORS + 2; 2835f10af057SSreekanth Reddy 2836f10af057SSreekanth Reddy mrioc->io_throttle_high = (mrioc->facts.io_throttle_high * 2 * 1024); 2837f10af057SSreekanth Reddy mrioc->io_throttle_low = (mrioc->facts.io_throttle_low * 2 * 1024); 2838f10af057SSreekanth Reddy 2839824a1566SKashyap Desai ioc_info(mrioc, "ioc_num(%d), maxopQ(%d), maxopRepQ(%d), maxdh(%d),", 2840824a1566SKashyap Desai mrioc->facts.ioc_num, mrioc->facts.max_op_req_q, 2841824a1566SKashyap Desai mrioc->facts.max_op_reply_q, mrioc->facts.max_devhandle); 2842824a1566SKashyap Desai ioc_info(mrioc, 2843ec5ebd2cSSreekanth Reddy "maxreqs(%d), mindh(%d) maxvectors(%d) maxperids(%d)\n", 2844824a1566SKashyap Desai mrioc->facts.max_reqs, mrioc->facts.min_devhandle, 2845ec5ebd2cSSreekanth Reddy mrioc->facts.max_msix_vectors, mrioc->facts.max_perids); 2846824a1566SKashyap Desai ioc_info(mrioc, "SGEModMask 0x%x SGEModVal 0x%x SGEModShift 0x%x ", 2847824a1566SKashyap Desai mrioc->facts.sge_mod_mask, mrioc->facts.sge_mod_value, 2848824a1566SKashyap Desai mrioc->facts.sge_mod_shift); 2849824a1566SKashyap Desai ioc_info(mrioc, "DMA mask %d InitialPE status 0x%x\n", 2850824a1566SKashyap Desai mrioc->facts.dma_mask, (facts_flags & 2851824a1566SKashyap Desai MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_MASK)); 2852f10af057SSreekanth Reddy ioc_info(mrioc, 2853f10af057SSreekanth Reddy "max_dev_per_throttle_group(%d), max_throttle_groups(%d)\n", 2854f10af057SSreekanth Reddy mrioc->facts.max_dev_per_tg, mrioc->facts.max_io_throttle_group); 2855f10af057SSreekanth Reddy ioc_info(mrioc, 2856f10af057SSreekanth Reddy "io_throttle_data_len(%dKiB), io_throttle_high(%dMiB), io_throttle_low(%dMiB)\n", 2857f10af057SSreekanth Reddy mrioc->facts.io_throttle_data_length * 4, 2858f10af057SSreekanth Reddy mrioc->facts.io_throttle_high, mrioc->facts.io_throttle_low); 2859824a1566SKashyap Desai } 2860824a1566SKashyap Desai 2861824a1566SKashyap Desai /** 2862824a1566SKashyap Desai * mpi3mr_alloc_reply_sense_bufs - Send IOC Init 2863824a1566SKashyap Desai * @mrioc: Adapter instance reference 2864824a1566SKashyap Desai * 2865824a1566SKashyap Desai * Allocate and initialize the reply free buffers, sense 2866824a1566SKashyap Desai * buffers, reply free queue and sense buffer queue. 2867824a1566SKashyap Desai * 2868824a1566SKashyap Desai * Return: 0 on success, non-zero on failures. 2869824a1566SKashyap Desai */ 2870824a1566SKashyap Desai static int mpi3mr_alloc_reply_sense_bufs(struct mpi3mr_ioc *mrioc) 2871824a1566SKashyap Desai { 2872824a1566SKashyap Desai int retval = 0; 2873824a1566SKashyap Desai u32 sz, i; 2874824a1566SKashyap Desai 2875824a1566SKashyap Desai if (mrioc->init_cmds.reply) 2876e3605f65SSreekanth Reddy return retval; 2877824a1566SKashyap Desai 2878c5758fc7SSreekanth Reddy mrioc->init_cmds.reply = kzalloc(mrioc->reply_sz, GFP_KERNEL); 2879824a1566SKashyap Desai if (!mrioc->init_cmds.reply) 2880824a1566SKashyap Desai goto out_failed; 2881824a1566SKashyap Desai 2882f5e6d5a3SSumit Saxena mrioc->bsg_cmds.reply = kzalloc(mrioc->reply_sz, GFP_KERNEL); 2883f5e6d5a3SSumit Saxena if (!mrioc->bsg_cmds.reply) 2884f5e6d5a3SSumit Saxena goto out_failed; 2885f5e6d5a3SSumit Saxena 28862bd37e28SSreekanth Reddy mrioc->transport_cmds.reply = kzalloc(mrioc->reply_sz, GFP_KERNEL); 28872bd37e28SSreekanth Reddy if (!mrioc->transport_cmds.reply) 28882bd37e28SSreekanth Reddy goto out_failed; 28892bd37e28SSreekanth Reddy 289013ef29eaSKashyap Desai for (i = 0; i < MPI3MR_NUM_DEVRMCMD; i++) { 2891c5758fc7SSreekanth Reddy mrioc->dev_rmhs_cmds[i].reply = kzalloc(mrioc->reply_sz, 289213ef29eaSKashyap Desai GFP_KERNEL); 289313ef29eaSKashyap Desai if (!mrioc->dev_rmhs_cmds[i].reply) 289413ef29eaSKashyap Desai goto out_failed; 289513ef29eaSKashyap Desai } 289613ef29eaSKashyap Desai 2897c1af985dSSreekanth Reddy for (i = 0; i < MPI3MR_NUM_EVTACKCMD; i++) { 2898c1af985dSSreekanth Reddy mrioc->evtack_cmds[i].reply = kzalloc(mrioc->reply_sz, 2899c1af985dSSreekanth Reddy GFP_KERNEL); 2900c1af985dSSreekanth Reddy if (!mrioc->evtack_cmds[i].reply) 2901c1af985dSSreekanth Reddy goto out_failed; 2902c1af985dSSreekanth Reddy } 2903c1af985dSSreekanth Reddy 2904c5758fc7SSreekanth Reddy mrioc->host_tm_cmds.reply = kzalloc(mrioc->reply_sz, GFP_KERNEL); 2905e844adb1SKashyap Desai if (!mrioc->host_tm_cmds.reply) 2906e844adb1SKashyap Desai goto out_failed; 2907e844adb1SKashyap Desai 290843ca1100SSumit Saxena mrioc->pel_cmds.reply = kzalloc(mrioc->reply_sz, GFP_KERNEL); 290943ca1100SSumit Saxena if (!mrioc->pel_cmds.reply) 291043ca1100SSumit Saxena goto out_failed; 291143ca1100SSumit Saxena 291243ca1100SSumit Saxena mrioc->pel_abort_cmd.reply = kzalloc(mrioc->reply_sz, GFP_KERNEL); 291343ca1100SSumit Saxena if (!mrioc->pel_abort_cmd.reply) 291443ca1100SSumit Saxena goto out_failed; 291543ca1100SSumit Saxena 2916e844adb1SKashyap Desai mrioc->dev_handle_bitmap_sz = mrioc->facts.max_devhandle / 8; 2917e844adb1SKashyap Desai if (mrioc->facts.max_devhandle % 8) 2918e844adb1SKashyap Desai mrioc->dev_handle_bitmap_sz++; 2919e844adb1SKashyap Desai mrioc->removepend_bitmap = kzalloc(mrioc->dev_handle_bitmap_sz, 2920e844adb1SKashyap Desai GFP_KERNEL); 2921e844adb1SKashyap Desai if (!mrioc->removepend_bitmap) 2922e844adb1SKashyap Desai goto out_failed; 2923e844adb1SKashyap Desai 2924e844adb1SKashyap Desai mrioc->devrem_bitmap_sz = MPI3MR_NUM_DEVRMCMD / 8; 2925e844adb1SKashyap Desai if (MPI3MR_NUM_DEVRMCMD % 8) 2926e844adb1SKashyap Desai mrioc->devrem_bitmap_sz++; 2927e844adb1SKashyap Desai mrioc->devrem_bitmap = kzalloc(mrioc->devrem_bitmap_sz, 2928e844adb1SKashyap Desai GFP_KERNEL); 2929e844adb1SKashyap Desai if (!mrioc->devrem_bitmap) 2930e844adb1SKashyap Desai goto out_failed; 2931e844adb1SKashyap Desai 2932c1af985dSSreekanth Reddy mrioc->evtack_cmds_bitmap_sz = MPI3MR_NUM_EVTACKCMD / 8; 2933c1af985dSSreekanth Reddy if (MPI3MR_NUM_EVTACKCMD % 8) 2934c1af985dSSreekanth Reddy mrioc->evtack_cmds_bitmap_sz++; 2935c1af985dSSreekanth Reddy mrioc->evtack_cmds_bitmap = kzalloc(mrioc->evtack_cmds_bitmap_sz, 2936c1af985dSSreekanth Reddy GFP_KERNEL); 2937c1af985dSSreekanth Reddy if (!mrioc->evtack_cmds_bitmap) 2938c1af985dSSreekanth Reddy goto out_failed; 2939c1af985dSSreekanth Reddy 2940824a1566SKashyap Desai mrioc->num_reply_bufs = mrioc->facts.max_reqs + MPI3MR_NUM_EVT_REPLIES; 2941824a1566SKashyap Desai mrioc->reply_free_qsz = mrioc->num_reply_bufs + 1; 2942824a1566SKashyap Desai mrioc->num_sense_bufs = mrioc->facts.max_reqs / MPI3MR_SENSEBUF_FACTOR; 2943824a1566SKashyap Desai mrioc->sense_buf_q_sz = mrioc->num_sense_bufs + 1; 2944824a1566SKashyap Desai 2945824a1566SKashyap Desai /* reply buffer pool, 16 byte align */ 2946c5758fc7SSreekanth Reddy sz = mrioc->num_reply_bufs * mrioc->reply_sz; 2947824a1566SKashyap Desai mrioc->reply_buf_pool = dma_pool_create("reply_buf pool", 2948824a1566SKashyap Desai &mrioc->pdev->dev, sz, 16, 0); 2949824a1566SKashyap Desai if (!mrioc->reply_buf_pool) { 2950824a1566SKashyap Desai ioc_err(mrioc, "reply buf pool: dma_pool_create failed\n"); 2951824a1566SKashyap Desai goto out_failed; 2952824a1566SKashyap Desai } 2953824a1566SKashyap Desai 2954824a1566SKashyap Desai mrioc->reply_buf = dma_pool_zalloc(mrioc->reply_buf_pool, GFP_KERNEL, 2955824a1566SKashyap Desai &mrioc->reply_buf_dma); 2956824a1566SKashyap Desai if (!mrioc->reply_buf) 2957824a1566SKashyap Desai goto out_failed; 2958824a1566SKashyap Desai 2959824a1566SKashyap Desai mrioc->reply_buf_dma_max_address = mrioc->reply_buf_dma + sz; 2960824a1566SKashyap Desai 2961824a1566SKashyap Desai /* reply free queue, 8 byte align */ 2962824a1566SKashyap Desai sz = mrioc->reply_free_qsz * 8; 2963824a1566SKashyap Desai mrioc->reply_free_q_pool = dma_pool_create("reply_free_q pool", 2964824a1566SKashyap Desai &mrioc->pdev->dev, sz, 8, 0); 2965824a1566SKashyap Desai if (!mrioc->reply_free_q_pool) { 2966824a1566SKashyap Desai ioc_err(mrioc, "reply_free_q pool: dma_pool_create failed\n"); 2967824a1566SKashyap Desai goto out_failed; 2968824a1566SKashyap Desai } 2969824a1566SKashyap Desai mrioc->reply_free_q = dma_pool_zalloc(mrioc->reply_free_q_pool, 2970824a1566SKashyap Desai GFP_KERNEL, &mrioc->reply_free_q_dma); 2971824a1566SKashyap Desai if (!mrioc->reply_free_q) 2972824a1566SKashyap Desai goto out_failed; 2973824a1566SKashyap Desai 2974824a1566SKashyap Desai /* sense buffer pool, 4 byte align */ 2975ec5ebd2cSSreekanth Reddy sz = mrioc->num_sense_bufs * MPI3MR_SENSE_BUF_SZ; 2976824a1566SKashyap Desai mrioc->sense_buf_pool = dma_pool_create("sense_buf pool", 2977824a1566SKashyap Desai &mrioc->pdev->dev, sz, 4, 0); 2978824a1566SKashyap Desai if (!mrioc->sense_buf_pool) { 2979824a1566SKashyap Desai ioc_err(mrioc, "sense_buf pool: dma_pool_create failed\n"); 2980824a1566SKashyap Desai goto out_failed; 2981824a1566SKashyap Desai } 2982824a1566SKashyap Desai mrioc->sense_buf = dma_pool_zalloc(mrioc->sense_buf_pool, GFP_KERNEL, 2983824a1566SKashyap Desai &mrioc->sense_buf_dma); 2984824a1566SKashyap Desai if (!mrioc->sense_buf) 2985824a1566SKashyap Desai goto out_failed; 2986824a1566SKashyap Desai 2987824a1566SKashyap Desai /* sense buffer queue, 8 byte align */ 2988824a1566SKashyap Desai sz = mrioc->sense_buf_q_sz * 8; 2989824a1566SKashyap Desai mrioc->sense_buf_q_pool = dma_pool_create("sense_buf_q pool", 2990824a1566SKashyap Desai &mrioc->pdev->dev, sz, 8, 0); 2991824a1566SKashyap Desai if (!mrioc->sense_buf_q_pool) { 2992824a1566SKashyap Desai ioc_err(mrioc, "sense_buf_q pool: dma_pool_create failed\n"); 2993824a1566SKashyap Desai goto out_failed; 2994824a1566SKashyap Desai } 2995824a1566SKashyap Desai mrioc->sense_buf_q = dma_pool_zalloc(mrioc->sense_buf_q_pool, 2996824a1566SKashyap Desai GFP_KERNEL, &mrioc->sense_buf_q_dma); 2997824a1566SKashyap Desai if (!mrioc->sense_buf_q) 2998824a1566SKashyap Desai goto out_failed; 2999824a1566SKashyap Desai 3000e3605f65SSreekanth Reddy return retval; 3001e3605f65SSreekanth Reddy 3002e3605f65SSreekanth Reddy out_failed: 3003e3605f65SSreekanth Reddy retval = -1; 3004e3605f65SSreekanth Reddy return retval; 3005e3605f65SSreekanth Reddy } 3006e3605f65SSreekanth Reddy 3007e3605f65SSreekanth Reddy /** 3008e3605f65SSreekanth Reddy * mpimr_initialize_reply_sbuf_queues - initialize reply sense 3009e3605f65SSreekanth Reddy * buffers 3010e3605f65SSreekanth Reddy * @mrioc: Adapter instance reference 3011e3605f65SSreekanth Reddy * 3012e3605f65SSreekanth Reddy * Helper function to initialize reply and sense buffers along 3013e3605f65SSreekanth Reddy * with some debug prints. 3014e3605f65SSreekanth Reddy * 3015e3605f65SSreekanth Reddy * Return: None. 3016e3605f65SSreekanth Reddy */ 3017e3605f65SSreekanth Reddy static void mpimr_initialize_reply_sbuf_queues(struct mpi3mr_ioc *mrioc) 3018e3605f65SSreekanth Reddy { 3019e3605f65SSreekanth Reddy u32 sz, i; 3020e3605f65SSreekanth Reddy dma_addr_t phy_addr; 3021e3605f65SSreekanth Reddy 3022c5758fc7SSreekanth Reddy sz = mrioc->num_reply_bufs * mrioc->reply_sz; 3023824a1566SKashyap Desai ioc_info(mrioc, 3024824a1566SKashyap Desai "reply buf pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB), reply_dma(0x%llx)\n", 3025c5758fc7SSreekanth Reddy mrioc->reply_buf, mrioc->num_reply_bufs, mrioc->reply_sz, 3026824a1566SKashyap Desai (sz / 1024), (unsigned long long)mrioc->reply_buf_dma); 3027824a1566SKashyap Desai sz = mrioc->reply_free_qsz * 8; 3028824a1566SKashyap Desai ioc_info(mrioc, 3029824a1566SKashyap Desai "reply_free_q pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB), reply_dma(0x%llx)\n", 3030824a1566SKashyap Desai mrioc->reply_free_q, mrioc->reply_free_qsz, 8, (sz / 1024), 3031824a1566SKashyap Desai (unsigned long long)mrioc->reply_free_q_dma); 3032ec5ebd2cSSreekanth Reddy sz = mrioc->num_sense_bufs * MPI3MR_SENSE_BUF_SZ; 3033824a1566SKashyap Desai ioc_info(mrioc, 3034824a1566SKashyap Desai "sense_buf pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB), sense_dma(0x%llx)\n", 3035ec5ebd2cSSreekanth Reddy mrioc->sense_buf, mrioc->num_sense_bufs, MPI3MR_SENSE_BUF_SZ, 3036824a1566SKashyap Desai (sz / 1024), (unsigned long long)mrioc->sense_buf_dma); 3037824a1566SKashyap Desai sz = mrioc->sense_buf_q_sz * 8; 3038824a1566SKashyap Desai ioc_info(mrioc, 3039824a1566SKashyap Desai "sense_buf_q pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB), sense_dma(0x%llx)\n", 3040824a1566SKashyap Desai mrioc->sense_buf_q, mrioc->sense_buf_q_sz, 8, (sz / 1024), 3041824a1566SKashyap Desai (unsigned long long)mrioc->sense_buf_q_dma); 3042824a1566SKashyap Desai 3043824a1566SKashyap Desai /* initialize Reply buffer Queue */ 3044824a1566SKashyap Desai for (i = 0, phy_addr = mrioc->reply_buf_dma; 3045c5758fc7SSreekanth Reddy i < mrioc->num_reply_bufs; i++, phy_addr += mrioc->reply_sz) 3046824a1566SKashyap Desai mrioc->reply_free_q[i] = cpu_to_le64(phy_addr); 3047824a1566SKashyap Desai mrioc->reply_free_q[i] = cpu_to_le64(0); 3048824a1566SKashyap Desai 3049824a1566SKashyap Desai /* initialize Sense Buffer Queue */ 3050824a1566SKashyap Desai for (i = 0, phy_addr = mrioc->sense_buf_dma; 3051ec5ebd2cSSreekanth Reddy i < mrioc->num_sense_bufs; i++, phy_addr += MPI3MR_SENSE_BUF_SZ) 3052824a1566SKashyap Desai mrioc->sense_buf_q[i] = cpu_to_le64(phy_addr); 3053824a1566SKashyap Desai mrioc->sense_buf_q[i] = cpu_to_le64(0); 3054824a1566SKashyap Desai } 3055824a1566SKashyap Desai 3056824a1566SKashyap Desai /** 3057824a1566SKashyap Desai * mpi3mr_issue_iocinit - Send IOC Init 3058824a1566SKashyap Desai * @mrioc: Adapter instance reference 3059824a1566SKashyap Desai * 3060824a1566SKashyap Desai * Issue IOC Init MPI request through admin queue and wait for 3061824a1566SKashyap Desai * the completion of it or time out. 3062824a1566SKashyap Desai * 3063824a1566SKashyap Desai * Return: 0 on success, non-zero on failures. 3064824a1566SKashyap Desai */ 3065824a1566SKashyap Desai static int mpi3mr_issue_iocinit(struct mpi3mr_ioc *mrioc) 3066824a1566SKashyap Desai { 3067824a1566SKashyap Desai struct mpi3_ioc_init_request iocinit_req; 3068824a1566SKashyap Desai struct mpi3_driver_info_layout *drv_info; 3069824a1566SKashyap Desai dma_addr_t data_dma; 3070824a1566SKashyap Desai u32 data_len = sizeof(*drv_info); 3071824a1566SKashyap Desai int retval = 0; 3072824a1566SKashyap Desai ktime_t current_time; 3073824a1566SKashyap Desai 3074824a1566SKashyap Desai drv_info = dma_alloc_coherent(&mrioc->pdev->dev, data_len, &data_dma, 3075824a1566SKashyap Desai GFP_KERNEL); 3076824a1566SKashyap Desai if (!drv_info) { 3077824a1566SKashyap Desai retval = -1; 3078824a1566SKashyap Desai goto out; 3079824a1566SKashyap Desai } 3080e3605f65SSreekanth Reddy mpimr_initialize_reply_sbuf_queues(mrioc); 3081e3605f65SSreekanth Reddy 3082824a1566SKashyap Desai drv_info->information_length = cpu_to_le32(data_len); 3083aa0dc6a7SSreekanth Reddy strscpy(drv_info->driver_signature, "Broadcom", sizeof(drv_info->driver_signature)); 3084aa0dc6a7SSreekanth Reddy strscpy(drv_info->os_name, utsname()->sysname, sizeof(drv_info->os_name)); 3085aa0dc6a7SSreekanth Reddy strscpy(drv_info->os_version, utsname()->release, sizeof(drv_info->os_version)); 3086aa0dc6a7SSreekanth Reddy strscpy(drv_info->driver_name, MPI3MR_DRIVER_NAME, sizeof(drv_info->driver_name)); 3087aa0dc6a7SSreekanth Reddy strscpy(drv_info->driver_version, MPI3MR_DRIVER_VERSION, sizeof(drv_info->driver_version)); 3088aa0dc6a7SSreekanth Reddy strscpy(drv_info->driver_release_date, MPI3MR_DRIVER_RELDATE, 3089aa0dc6a7SSreekanth Reddy sizeof(drv_info->driver_release_date)); 3090824a1566SKashyap Desai drv_info->driver_capabilities = 0; 3091824a1566SKashyap Desai memcpy((u8 *)&mrioc->driver_info, (u8 *)drv_info, 3092824a1566SKashyap Desai sizeof(mrioc->driver_info)); 3093824a1566SKashyap Desai 3094824a1566SKashyap Desai memset(&iocinit_req, 0, sizeof(iocinit_req)); 3095824a1566SKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 3096824a1566SKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 3097824a1566SKashyap Desai retval = -1; 3098824a1566SKashyap Desai ioc_err(mrioc, "Issue IOCInit: Init command is in use\n"); 3099824a1566SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 3100824a1566SKashyap Desai goto out; 3101824a1566SKashyap Desai } 3102824a1566SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 3103824a1566SKashyap Desai mrioc->init_cmds.is_waiting = 1; 3104824a1566SKashyap Desai mrioc->init_cmds.callback = NULL; 3105824a1566SKashyap Desai iocinit_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 3106824a1566SKashyap Desai iocinit_req.function = MPI3_FUNCTION_IOC_INIT; 3107824a1566SKashyap Desai iocinit_req.mpi_version.mpi3_version.dev = MPI3_VERSION_DEV; 3108824a1566SKashyap Desai iocinit_req.mpi_version.mpi3_version.unit = MPI3_VERSION_UNIT; 3109824a1566SKashyap Desai iocinit_req.mpi_version.mpi3_version.major = MPI3_VERSION_MAJOR; 3110824a1566SKashyap Desai iocinit_req.mpi_version.mpi3_version.minor = MPI3_VERSION_MINOR; 3111824a1566SKashyap Desai iocinit_req.who_init = MPI3_WHOINIT_HOST_DRIVER; 3112824a1566SKashyap Desai iocinit_req.reply_free_queue_depth = cpu_to_le16(mrioc->reply_free_qsz); 3113824a1566SKashyap Desai iocinit_req.reply_free_queue_address = 3114824a1566SKashyap Desai cpu_to_le64(mrioc->reply_free_q_dma); 3115ec5ebd2cSSreekanth Reddy iocinit_req.sense_buffer_length = cpu_to_le16(MPI3MR_SENSE_BUF_SZ); 3116824a1566SKashyap Desai iocinit_req.sense_buffer_free_queue_depth = 3117824a1566SKashyap Desai cpu_to_le16(mrioc->sense_buf_q_sz); 3118824a1566SKashyap Desai iocinit_req.sense_buffer_free_queue_address = 3119824a1566SKashyap Desai cpu_to_le64(mrioc->sense_buf_q_dma); 3120824a1566SKashyap Desai iocinit_req.driver_information_address = cpu_to_le64(data_dma); 3121824a1566SKashyap Desai 3122824a1566SKashyap Desai current_time = ktime_get_real(); 3123824a1566SKashyap Desai iocinit_req.time_stamp = cpu_to_le64(ktime_to_ms(current_time)); 3124824a1566SKashyap Desai 3125824a1566SKashyap Desai init_completion(&mrioc->init_cmds.done); 3126824a1566SKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &iocinit_req, 3127824a1566SKashyap Desai sizeof(iocinit_req), 1); 3128824a1566SKashyap Desai if (retval) { 3129824a1566SKashyap Desai ioc_err(mrioc, "Issue IOCInit: Admin Post failed\n"); 3130824a1566SKashyap Desai goto out_unlock; 3131824a1566SKashyap Desai } 3132824a1566SKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 3133824a1566SKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 3134824a1566SKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 3135a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 3136824a1566SKashyap Desai MPI3MR_RESET_FROM_IOCINIT_TIMEOUT); 3137a6856cc4SSreekanth Reddy ioc_err(mrioc, "ioc_init timed out\n"); 3138824a1566SKashyap Desai retval = -1; 3139824a1566SKashyap Desai goto out_unlock; 3140824a1566SKashyap Desai } 3141824a1566SKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 3142824a1566SKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 3143824a1566SKashyap Desai ioc_err(mrioc, 3144824a1566SKashyap Desai "Issue IOCInit: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 3145824a1566SKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 3146824a1566SKashyap Desai mrioc->init_cmds.ioc_loginfo); 3147824a1566SKashyap Desai retval = -1; 3148824a1566SKashyap Desai goto out_unlock; 3149824a1566SKashyap Desai } 3150824a1566SKashyap Desai 3151e3605f65SSreekanth Reddy mrioc->reply_free_queue_host_index = mrioc->num_reply_bufs; 3152e3605f65SSreekanth Reddy writel(mrioc->reply_free_queue_host_index, 3153e3605f65SSreekanth Reddy &mrioc->sysif_regs->reply_free_host_index); 3154e3605f65SSreekanth Reddy 3155e3605f65SSreekanth Reddy mrioc->sbq_host_index = mrioc->num_sense_bufs; 3156e3605f65SSreekanth Reddy writel(mrioc->sbq_host_index, 3157e3605f65SSreekanth Reddy &mrioc->sysif_regs->sense_buffer_free_host_index); 3158824a1566SKashyap Desai out_unlock: 3159824a1566SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 3160824a1566SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 3161824a1566SKashyap Desai 3162824a1566SKashyap Desai out: 3163824a1566SKashyap Desai if (drv_info) 3164824a1566SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, data_len, drv_info, 3165824a1566SKashyap Desai data_dma); 3166824a1566SKashyap Desai 3167824a1566SKashyap Desai return retval; 3168824a1566SKashyap Desai } 3169824a1566SKashyap Desai 3170824a1566SKashyap Desai /** 317113ef29eaSKashyap Desai * mpi3mr_unmask_events - Unmask events in event mask bitmap 317213ef29eaSKashyap Desai * @mrioc: Adapter instance reference 317313ef29eaSKashyap Desai * @event: MPI event ID 317413ef29eaSKashyap Desai * 317513ef29eaSKashyap Desai * Un mask the specific event by resetting the event_mask 317613ef29eaSKashyap Desai * bitmap. 317713ef29eaSKashyap Desai * 317813ef29eaSKashyap Desai * Return: 0 on success, non-zero on failures. 317913ef29eaSKashyap Desai */ 318013ef29eaSKashyap Desai static void mpi3mr_unmask_events(struct mpi3mr_ioc *mrioc, u16 event) 318113ef29eaSKashyap Desai { 318213ef29eaSKashyap Desai u32 desired_event; 318313ef29eaSKashyap Desai u8 word; 318413ef29eaSKashyap Desai 318513ef29eaSKashyap Desai if (event >= 128) 318613ef29eaSKashyap Desai return; 318713ef29eaSKashyap Desai 318813ef29eaSKashyap Desai desired_event = (1 << (event % 32)); 318913ef29eaSKashyap Desai word = event / 32; 319013ef29eaSKashyap Desai 319113ef29eaSKashyap Desai mrioc->event_masks[word] &= ~desired_event; 319213ef29eaSKashyap Desai } 319313ef29eaSKashyap Desai 319413ef29eaSKashyap Desai /** 319513ef29eaSKashyap Desai * mpi3mr_issue_event_notification - Send event notification 319613ef29eaSKashyap Desai * @mrioc: Adapter instance reference 319713ef29eaSKashyap Desai * 319813ef29eaSKashyap Desai * Issue event notification MPI request through admin queue and 319913ef29eaSKashyap Desai * wait for the completion of it or time out. 320013ef29eaSKashyap Desai * 320113ef29eaSKashyap Desai * Return: 0 on success, non-zero on failures. 320213ef29eaSKashyap Desai */ 320313ef29eaSKashyap Desai static int mpi3mr_issue_event_notification(struct mpi3mr_ioc *mrioc) 320413ef29eaSKashyap Desai { 320513ef29eaSKashyap Desai struct mpi3_event_notification_request evtnotify_req; 320613ef29eaSKashyap Desai int retval = 0; 320713ef29eaSKashyap Desai u8 i; 320813ef29eaSKashyap Desai 320913ef29eaSKashyap Desai memset(&evtnotify_req, 0, sizeof(evtnotify_req)); 321013ef29eaSKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 321113ef29eaSKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 321213ef29eaSKashyap Desai retval = -1; 321313ef29eaSKashyap Desai ioc_err(mrioc, "Issue EvtNotify: Init command is in use\n"); 321413ef29eaSKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 321513ef29eaSKashyap Desai goto out; 321613ef29eaSKashyap Desai } 321713ef29eaSKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 321813ef29eaSKashyap Desai mrioc->init_cmds.is_waiting = 1; 321913ef29eaSKashyap Desai mrioc->init_cmds.callback = NULL; 322013ef29eaSKashyap Desai evtnotify_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 322113ef29eaSKashyap Desai evtnotify_req.function = MPI3_FUNCTION_EVENT_NOTIFICATION; 322213ef29eaSKashyap Desai for (i = 0; i < MPI3_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 322313ef29eaSKashyap Desai evtnotify_req.event_masks[i] = 322413ef29eaSKashyap Desai cpu_to_le32(mrioc->event_masks[i]); 322513ef29eaSKashyap Desai init_completion(&mrioc->init_cmds.done); 322613ef29eaSKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &evtnotify_req, 322713ef29eaSKashyap Desai sizeof(evtnotify_req), 1); 322813ef29eaSKashyap Desai if (retval) { 322913ef29eaSKashyap Desai ioc_err(mrioc, "Issue EvtNotify: Admin Post failed\n"); 323013ef29eaSKashyap Desai goto out_unlock; 323113ef29eaSKashyap Desai } 323213ef29eaSKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 323313ef29eaSKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 323413ef29eaSKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 3235a6856cc4SSreekanth Reddy ioc_err(mrioc, "event notification timed out\n"); 3236a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 323713ef29eaSKashyap Desai MPI3MR_RESET_FROM_EVTNOTIFY_TIMEOUT); 323813ef29eaSKashyap Desai retval = -1; 323913ef29eaSKashyap Desai goto out_unlock; 324013ef29eaSKashyap Desai } 324113ef29eaSKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 324213ef29eaSKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 324313ef29eaSKashyap Desai ioc_err(mrioc, 324413ef29eaSKashyap Desai "Issue EvtNotify: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 324513ef29eaSKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 324613ef29eaSKashyap Desai mrioc->init_cmds.ioc_loginfo); 324713ef29eaSKashyap Desai retval = -1; 324813ef29eaSKashyap Desai goto out_unlock; 324913ef29eaSKashyap Desai } 325013ef29eaSKashyap Desai 325113ef29eaSKashyap Desai out_unlock: 325213ef29eaSKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 325313ef29eaSKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 325413ef29eaSKashyap Desai out: 325513ef29eaSKashyap Desai return retval; 325613ef29eaSKashyap Desai } 325713ef29eaSKashyap Desai 325813ef29eaSKashyap Desai /** 3259c1af985dSSreekanth Reddy * mpi3mr_process_event_ack - Process event acknowledgment 326013ef29eaSKashyap Desai * @mrioc: Adapter instance reference 326113ef29eaSKashyap Desai * @event: MPI3 event ID 3262c1af985dSSreekanth Reddy * @event_ctx: event context 326313ef29eaSKashyap Desai * 326413ef29eaSKashyap Desai * Send event acknowledgment through admin queue and wait for 326513ef29eaSKashyap Desai * it to complete. 326613ef29eaSKashyap Desai * 326713ef29eaSKashyap Desai * Return: 0 on success, non-zero on failures. 326813ef29eaSKashyap Desai */ 3269c1af985dSSreekanth Reddy int mpi3mr_process_event_ack(struct mpi3mr_ioc *mrioc, u8 event, 327013ef29eaSKashyap Desai u32 event_ctx) 327113ef29eaSKashyap Desai { 327213ef29eaSKashyap Desai struct mpi3_event_ack_request evtack_req; 327313ef29eaSKashyap Desai int retval = 0; 327413ef29eaSKashyap Desai 327513ef29eaSKashyap Desai memset(&evtack_req, 0, sizeof(evtack_req)); 327613ef29eaSKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 327713ef29eaSKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 327813ef29eaSKashyap Desai retval = -1; 327913ef29eaSKashyap Desai ioc_err(mrioc, "Send EvtAck: Init command is in use\n"); 328013ef29eaSKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 328113ef29eaSKashyap Desai goto out; 328213ef29eaSKashyap Desai } 328313ef29eaSKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 328413ef29eaSKashyap Desai mrioc->init_cmds.is_waiting = 1; 328513ef29eaSKashyap Desai mrioc->init_cmds.callback = NULL; 328613ef29eaSKashyap Desai evtack_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 328713ef29eaSKashyap Desai evtack_req.function = MPI3_FUNCTION_EVENT_ACK; 328813ef29eaSKashyap Desai evtack_req.event = event; 328913ef29eaSKashyap Desai evtack_req.event_context = cpu_to_le32(event_ctx); 329013ef29eaSKashyap Desai 329113ef29eaSKashyap Desai init_completion(&mrioc->init_cmds.done); 329213ef29eaSKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &evtack_req, 329313ef29eaSKashyap Desai sizeof(evtack_req), 1); 329413ef29eaSKashyap Desai if (retval) { 329513ef29eaSKashyap Desai ioc_err(mrioc, "Send EvtAck: Admin Post failed\n"); 329613ef29eaSKashyap Desai goto out_unlock; 329713ef29eaSKashyap Desai } 329813ef29eaSKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 329913ef29eaSKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 330013ef29eaSKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 330113ef29eaSKashyap Desai ioc_err(mrioc, "Issue EvtNotify: command timed out\n"); 3302fbaa9aa4SSreekanth Reddy if (!(mrioc->init_cmds.state & MPI3MR_CMD_RESET)) 330313ef29eaSKashyap Desai mpi3mr_soft_reset_handler(mrioc, 330413ef29eaSKashyap Desai MPI3MR_RESET_FROM_EVTACK_TIMEOUT, 1); 330513ef29eaSKashyap Desai retval = -1; 330613ef29eaSKashyap Desai goto out_unlock; 330713ef29eaSKashyap Desai } 330813ef29eaSKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 330913ef29eaSKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 331013ef29eaSKashyap Desai ioc_err(mrioc, 331113ef29eaSKashyap Desai "Send EvtAck: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 331213ef29eaSKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 331313ef29eaSKashyap Desai mrioc->init_cmds.ioc_loginfo); 331413ef29eaSKashyap Desai retval = -1; 331513ef29eaSKashyap Desai goto out_unlock; 331613ef29eaSKashyap Desai } 331713ef29eaSKashyap Desai 331813ef29eaSKashyap Desai out_unlock: 331913ef29eaSKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 332013ef29eaSKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 332113ef29eaSKashyap Desai out: 332213ef29eaSKashyap Desai return retval; 332313ef29eaSKashyap Desai } 332413ef29eaSKashyap Desai 332513ef29eaSKashyap Desai /** 3326824a1566SKashyap Desai * mpi3mr_alloc_chain_bufs - Allocate chain buffers 3327824a1566SKashyap Desai * @mrioc: Adapter instance reference 3328824a1566SKashyap Desai * 3329824a1566SKashyap Desai * Allocate chain buffers and set a bitmap to indicate free 3330824a1566SKashyap Desai * chain buffers. Chain buffers are used to pass the SGE 3331824a1566SKashyap Desai * information along with MPI3 SCSI IO requests for host I/O. 3332824a1566SKashyap Desai * 3333824a1566SKashyap Desai * Return: 0 on success, non-zero on failure 3334824a1566SKashyap Desai */ 3335824a1566SKashyap Desai static int mpi3mr_alloc_chain_bufs(struct mpi3mr_ioc *mrioc) 3336824a1566SKashyap Desai { 3337824a1566SKashyap Desai int retval = 0; 3338824a1566SKashyap Desai u32 sz, i; 3339824a1566SKashyap Desai u16 num_chains; 3340824a1566SKashyap Desai 3341fe6db615SSreekanth Reddy if (mrioc->chain_sgl_list) 3342fe6db615SSreekanth Reddy return retval; 3343fe6db615SSreekanth Reddy 3344824a1566SKashyap Desai num_chains = mrioc->max_host_ios / MPI3MR_CHAINBUF_FACTOR; 3345824a1566SKashyap Desai 334674e1f30aSKashyap Desai if (prot_mask & (SHOST_DIX_TYPE0_PROTECTION 334774e1f30aSKashyap Desai | SHOST_DIX_TYPE1_PROTECTION 334874e1f30aSKashyap Desai | SHOST_DIX_TYPE2_PROTECTION 334974e1f30aSKashyap Desai | SHOST_DIX_TYPE3_PROTECTION)) 335074e1f30aSKashyap Desai num_chains += (num_chains / MPI3MR_CHAINBUFDIX_FACTOR); 335174e1f30aSKashyap Desai 3352824a1566SKashyap Desai mrioc->chain_buf_count = num_chains; 3353824a1566SKashyap Desai sz = sizeof(struct chain_element) * num_chains; 3354824a1566SKashyap Desai mrioc->chain_sgl_list = kzalloc(sz, GFP_KERNEL); 3355824a1566SKashyap Desai if (!mrioc->chain_sgl_list) 3356824a1566SKashyap Desai goto out_failed; 3357824a1566SKashyap Desai 3358824a1566SKashyap Desai sz = MPI3MR_PAGE_SIZE_4K; 3359824a1566SKashyap Desai mrioc->chain_buf_pool = dma_pool_create("chain_buf pool", 3360824a1566SKashyap Desai &mrioc->pdev->dev, sz, 16, 0); 3361824a1566SKashyap Desai if (!mrioc->chain_buf_pool) { 3362824a1566SKashyap Desai ioc_err(mrioc, "chain buf pool: dma_pool_create failed\n"); 3363824a1566SKashyap Desai goto out_failed; 3364824a1566SKashyap Desai } 3365824a1566SKashyap Desai 3366824a1566SKashyap Desai for (i = 0; i < num_chains; i++) { 3367824a1566SKashyap Desai mrioc->chain_sgl_list[i].addr = 3368824a1566SKashyap Desai dma_pool_zalloc(mrioc->chain_buf_pool, GFP_KERNEL, 3369824a1566SKashyap Desai &mrioc->chain_sgl_list[i].dma_addr); 3370824a1566SKashyap Desai 3371824a1566SKashyap Desai if (!mrioc->chain_sgl_list[i].addr) 3372824a1566SKashyap Desai goto out_failed; 3373824a1566SKashyap Desai } 3374824a1566SKashyap Desai mrioc->chain_bitmap_sz = num_chains / 8; 3375824a1566SKashyap Desai if (num_chains % 8) 3376824a1566SKashyap Desai mrioc->chain_bitmap_sz++; 3377824a1566SKashyap Desai mrioc->chain_bitmap = kzalloc(mrioc->chain_bitmap_sz, GFP_KERNEL); 3378824a1566SKashyap Desai if (!mrioc->chain_bitmap) 3379824a1566SKashyap Desai goto out_failed; 3380824a1566SKashyap Desai return retval; 3381824a1566SKashyap Desai out_failed: 3382824a1566SKashyap Desai retval = -1; 3383824a1566SKashyap Desai return retval; 3384824a1566SKashyap Desai } 3385824a1566SKashyap Desai 3386824a1566SKashyap Desai /** 3387023ab2a9SKashyap Desai * mpi3mr_port_enable_complete - Mark port enable complete 3388023ab2a9SKashyap Desai * @mrioc: Adapter instance reference 3389023ab2a9SKashyap Desai * @drv_cmd: Internal command tracker 3390023ab2a9SKashyap Desai * 3391023ab2a9SKashyap Desai * Call back for asynchronous port enable request sets the 3392023ab2a9SKashyap Desai * driver command to indicate port enable request is complete. 3393023ab2a9SKashyap Desai * 3394023ab2a9SKashyap Desai * Return: Nothing 3395023ab2a9SKashyap Desai */ 3396023ab2a9SKashyap Desai static void mpi3mr_port_enable_complete(struct mpi3mr_ioc *mrioc, 3397023ab2a9SKashyap Desai struct mpi3mr_drv_cmd *drv_cmd) 3398023ab2a9SKashyap Desai { 3399023ab2a9SKashyap Desai drv_cmd->state = MPI3MR_CMD_NOTUSED; 3400023ab2a9SKashyap Desai drv_cmd->callback = NULL; 3401023ab2a9SKashyap Desai mrioc->scan_failed = drv_cmd->ioc_status; 3402023ab2a9SKashyap Desai mrioc->scan_started = 0; 3403023ab2a9SKashyap Desai } 3404023ab2a9SKashyap Desai 3405023ab2a9SKashyap Desai /** 3406023ab2a9SKashyap Desai * mpi3mr_issue_port_enable - Issue Port Enable 3407023ab2a9SKashyap Desai * @mrioc: Adapter instance reference 3408023ab2a9SKashyap Desai * @async: Flag to wait for completion or not 3409023ab2a9SKashyap Desai * 3410023ab2a9SKashyap Desai * Issue Port Enable MPI request through admin queue and if the 3411023ab2a9SKashyap Desai * async flag is not set wait for the completion of the port 3412023ab2a9SKashyap Desai * enable or time out. 3413023ab2a9SKashyap Desai * 3414023ab2a9SKashyap Desai * Return: 0 on success, non-zero on failures. 3415023ab2a9SKashyap Desai */ 3416023ab2a9SKashyap Desai int mpi3mr_issue_port_enable(struct mpi3mr_ioc *mrioc, u8 async) 3417023ab2a9SKashyap Desai { 3418023ab2a9SKashyap Desai struct mpi3_port_enable_request pe_req; 3419023ab2a9SKashyap Desai int retval = 0; 3420023ab2a9SKashyap Desai u32 pe_timeout = MPI3MR_PORTENABLE_TIMEOUT; 3421023ab2a9SKashyap Desai 3422023ab2a9SKashyap Desai memset(&pe_req, 0, sizeof(pe_req)); 3423023ab2a9SKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 3424023ab2a9SKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 3425023ab2a9SKashyap Desai retval = -1; 3426023ab2a9SKashyap Desai ioc_err(mrioc, "Issue PortEnable: Init command is in use\n"); 3427023ab2a9SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 3428023ab2a9SKashyap Desai goto out; 3429023ab2a9SKashyap Desai } 3430023ab2a9SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 3431023ab2a9SKashyap Desai if (async) { 3432023ab2a9SKashyap Desai mrioc->init_cmds.is_waiting = 0; 3433023ab2a9SKashyap Desai mrioc->init_cmds.callback = mpi3mr_port_enable_complete; 3434023ab2a9SKashyap Desai } else { 3435023ab2a9SKashyap Desai mrioc->init_cmds.is_waiting = 1; 3436023ab2a9SKashyap Desai mrioc->init_cmds.callback = NULL; 3437023ab2a9SKashyap Desai init_completion(&mrioc->init_cmds.done); 3438023ab2a9SKashyap Desai } 3439023ab2a9SKashyap Desai pe_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 3440023ab2a9SKashyap Desai pe_req.function = MPI3_FUNCTION_PORT_ENABLE; 3441023ab2a9SKashyap Desai 3442023ab2a9SKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &pe_req, sizeof(pe_req), 1); 3443023ab2a9SKashyap Desai if (retval) { 3444023ab2a9SKashyap Desai ioc_err(mrioc, "Issue PortEnable: Admin Post failed\n"); 3445023ab2a9SKashyap Desai goto out_unlock; 3446023ab2a9SKashyap Desai } 3447a6856cc4SSreekanth Reddy if (async) { 3448a6856cc4SSreekanth Reddy mutex_unlock(&mrioc->init_cmds.mutex); 3449a6856cc4SSreekanth Reddy goto out; 3450a6856cc4SSreekanth Reddy } 3451a6856cc4SSreekanth Reddy 3452a6856cc4SSreekanth Reddy wait_for_completion_timeout(&mrioc->init_cmds.done, (pe_timeout * HZ)); 3453023ab2a9SKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 3454a6856cc4SSreekanth Reddy ioc_err(mrioc, "port enable timed out\n"); 3455023ab2a9SKashyap Desai retval = -1; 3456a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, MPI3MR_RESET_FROM_PE_TIMEOUT); 3457023ab2a9SKashyap Desai goto out_unlock; 3458023ab2a9SKashyap Desai } 3459023ab2a9SKashyap Desai mpi3mr_port_enable_complete(mrioc, &mrioc->init_cmds); 3460a6856cc4SSreekanth Reddy 3461023ab2a9SKashyap Desai out_unlock: 3462a6856cc4SSreekanth Reddy mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 3463023ab2a9SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 3464023ab2a9SKashyap Desai out: 3465023ab2a9SKashyap Desai return retval; 3466023ab2a9SKashyap Desai } 3467023ab2a9SKashyap Desai 3468ff9561e9SKashyap Desai /* Protocol type to name mapper structure */ 3469ff9561e9SKashyap Desai static const struct { 3470ff9561e9SKashyap Desai u8 protocol; 3471ff9561e9SKashyap Desai char *name; 3472ff9561e9SKashyap Desai } mpi3mr_protocols[] = { 3473ff9561e9SKashyap Desai { MPI3_IOCFACTS_PROTOCOL_SCSI_INITIATOR, "Initiator" }, 3474ff9561e9SKashyap Desai { MPI3_IOCFACTS_PROTOCOL_SCSI_TARGET, "Target" }, 3475ff9561e9SKashyap Desai { MPI3_IOCFACTS_PROTOCOL_NVME, "NVMe attachment" }, 3476ff9561e9SKashyap Desai }; 3477ff9561e9SKashyap Desai 3478ff9561e9SKashyap Desai /* Capability to name mapper structure*/ 3479ff9561e9SKashyap Desai static const struct { 3480ff9561e9SKashyap Desai u32 capability; 3481ff9561e9SKashyap Desai char *name; 3482ff9561e9SKashyap Desai } mpi3mr_capabilities[] = { 3483ff9561e9SKashyap Desai { MPI3_IOCFACTS_CAPABILITY_RAID_CAPABLE, "RAID" }, 3484c4723e68SSreekanth Reddy { MPI3_IOCFACTS_CAPABILITY_MULTIPATH_ENABLED, "MultiPath" }, 3485ff9561e9SKashyap Desai }; 3486ff9561e9SKashyap Desai 3487ff9561e9SKashyap Desai /** 3488ff9561e9SKashyap Desai * mpi3mr_print_ioc_info - Display controller information 3489ff9561e9SKashyap Desai * @mrioc: Adapter instance reference 3490ff9561e9SKashyap Desai * 3491ff9561e9SKashyap Desai * Display controller personalit, capability, supported 3492ff9561e9SKashyap Desai * protocols etc. 3493ff9561e9SKashyap Desai * 3494ff9561e9SKashyap Desai * Return: Nothing 3495ff9561e9SKashyap Desai */ 3496ff9561e9SKashyap Desai static void 3497ff9561e9SKashyap Desai mpi3mr_print_ioc_info(struct mpi3mr_ioc *mrioc) 3498ff9561e9SKashyap Desai { 349976a4f7ccSDan Carpenter int i = 0, bytes_written = 0; 3500ff9561e9SKashyap Desai char personality[16]; 3501ff9561e9SKashyap Desai char protocol[50] = {0}; 3502ff9561e9SKashyap Desai char capabilities[100] = {0}; 3503ff9561e9SKashyap Desai struct mpi3mr_compimg_ver *fwver = &mrioc->facts.fw_ver; 3504ff9561e9SKashyap Desai 3505ff9561e9SKashyap Desai switch (mrioc->facts.personality) { 3506ff9561e9SKashyap Desai case MPI3_IOCFACTS_FLAGS_PERSONALITY_EHBA: 3507ff9561e9SKashyap Desai strncpy(personality, "Enhanced HBA", sizeof(personality)); 3508ff9561e9SKashyap Desai break; 3509ff9561e9SKashyap Desai case MPI3_IOCFACTS_FLAGS_PERSONALITY_RAID_DDR: 3510ff9561e9SKashyap Desai strncpy(personality, "RAID", sizeof(personality)); 3511ff9561e9SKashyap Desai break; 3512ff9561e9SKashyap Desai default: 3513ff9561e9SKashyap Desai strncpy(personality, "Unknown", sizeof(personality)); 3514ff9561e9SKashyap Desai break; 3515ff9561e9SKashyap Desai } 3516ff9561e9SKashyap Desai 3517ff9561e9SKashyap Desai ioc_info(mrioc, "Running in %s Personality", personality); 3518ff9561e9SKashyap Desai 3519ff9561e9SKashyap Desai ioc_info(mrioc, "FW version(%d.%d.%d.%d.%d.%d)\n", 3520ff9561e9SKashyap Desai fwver->gen_major, fwver->gen_minor, fwver->ph_major, 3521ff9561e9SKashyap Desai fwver->ph_minor, fwver->cust_id, fwver->build_num); 3522ff9561e9SKashyap Desai 3523ff9561e9SKashyap Desai for (i = 0; i < ARRAY_SIZE(mpi3mr_protocols); i++) { 3524ff9561e9SKashyap Desai if (mrioc->facts.protocol_flags & 3525ff9561e9SKashyap Desai mpi3mr_protocols[i].protocol) { 352630e99f05SDan Carpenter bytes_written += scnprintf(protocol + bytes_written, 352776a4f7ccSDan Carpenter sizeof(protocol) - bytes_written, "%s%s", 352876a4f7ccSDan Carpenter bytes_written ? "," : "", 3529ff9561e9SKashyap Desai mpi3mr_protocols[i].name); 3530ff9561e9SKashyap Desai } 3531ff9561e9SKashyap Desai } 3532ff9561e9SKashyap Desai 353376a4f7ccSDan Carpenter bytes_written = 0; 3534ff9561e9SKashyap Desai for (i = 0; i < ARRAY_SIZE(mpi3mr_capabilities); i++) { 3535ff9561e9SKashyap Desai if (mrioc->facts.protocol_flags & 3536ff9561e9SKashyap Desai mpi3mr_capabilities[i].capability) { 353730e99f05SDan Carpenter bytes_written += scnprintf(capabilities + bytes_written, 353876a4f7ccSDan Carpenter sizeof(capabilities) - bytes_written, "%s%s", 353976a4f7ccSDan Carpenter bytes_written ? "," : "", 3540ff9561e9SKashyap Desai mpi3mr_capabilities[i].name); 3541ff9561e9SKashyap Desai } 3542ff9561e9SKashyap Desai } 3543ff9561e9SKashyap Desai 3544ff9561e9SKashyap Desai ioc_info(mrioc, "Protocol=(%s), Capabilities=(%s)\n", 3545ff9561e9SKashyap Desai protocol, capabilities); 3546ff9561e9SKashyap Desai } 3547ff9561e9SKashyap Desai 3548023ab2a9SKashyap Desai /** 3549824a1566SKashyap Desai * mpi3mr_cleanup_resources - Free PCI resources 3550824a1566SKashyap Desai * @mrioc: Adapter instance reference 3551824a1566SKashyap Desai * 3552824a1566SKashyap Desai * Unmap PCI device memory and disable PCI device. 3553824a1566SKashyap Desai * 3554824a1566SKashyap Desai * Return: 0 on success and non-zero on failure. 3555824a1566SKashyap Desai */ 3556824a1566SKashyap Desai void mpi3mr_cleanup_resources(struct mpi3mr_ioc *mrioc) 3557824a1566SKashyap Desai { 3558824a1566SKashyap Desai struct pci_dev *pdev = mrioc->pdev; 3559824a1566SKashyap Desai 3560824a1566SKashyap Desai mpi3mr_cleanup_isr(mrioc); 3561824a1566SKashyap Desai 3562824a1566SKashyap Desai if (mrioc->sysif_regs) { 3563824a1566SKashyap Desai iounmap((void __iomem *)mrioc->sysif_regs); 3564824a1566SKashyap Desai mrioc->sysif_regs = NULL; 3565824a1566SKashyap Desai } 3566824a1566SKashyap Desai 3567824a1566SKashyap Desai if (pci_is_enabled(pdev)) { 3568824a1566SKashyap Desai if (mrioc->bars) 3569824a1566SKashyap Desai pci_release_selected_regions(pdev, mrioc->bars); 3570824a1566SKashyap Desai pci_disable_device(pdev); 3571824a1566SKashyap Desai } 3572824a1566SKashyap Desai } 3573824a1566SKashyap Desai 3574824a1566SKashyap Desai /** 3575824a1566SKashyap Desai * mpi3mr_setup_resources - Enable PCI resources 3576824a1566SKashyap Desai * @mrioc: Adapter instance reference 3577824a1566SKashyap Desai * 3578824a1566SKashyap Desai * Enable PCI device memory, MSI-x registers and set DMA mask. 3579824a1566SKashyap Desai * 3580824a1566SKashyap Desai * Return: 0 on success and non-zero on failure. 3581824a1566SKashyap Desai */ 3582824a1566SKashyap Desai int mpi3mr_setup_resources(struct mpi3mr_ioc *mrioc) 3583824a1566SKashyap Desai { 3584824a1566SKashyap Desai struct pci_dev *pdev = mrioc->pdev; 3585824a1566SKashyap Desai u32 memap_sz = 0; 3586824a1566SKashyap Desai int i, retval = 0, capb = 0; 3587824a1566SKashyap Desai u16 message_control; 3588824a1566SKashyap Desai u64 dma_mask = mrioc->dma_mask ? mrioc->dma_mask : 3589824a1566SKashyap Desai (((dma_get_required_mask(&pdev->dev) > DMA_BIT_MASK(32)) && 3590824a1566SKashyap Desai (sizeof(dma_addr_t) > 4)) ? DMA_BIT_MASK(64) : DMA_BIT_MASK(32)); 3591824a1566SKashyap Desai 3592824a1566SKashyap Desai if (pci_enable_device_mem(pdev)) { 3593824a1566SKashyap Desai ioc_err(mrioc, "pci_enable_device_mem: failed\n"); 3594824a1566SKashyap Desai retval = -ENODEV; 3595824a1566SKashyap Desai goto out_failed; 3596824a1566SKashyap Desai } 3597824a1566SKashyap Desai 3598824a1566SKashyap Desai capb = pci_find_capability(pdev, PCI_CAP_ID_MSIX); 3599824a1566SKashyap Desai if (!capb) { 3600824a1566SKashyap Desai ioc_err(mrioc, "Unable to find MSI-X Capabilities\n"); 3601824a1566SKashyap Desai retval = -ENODEV; 3602824a1566SKashyap Desai goto out_failed; 3603824a1566SKashyap Desai } 3604824a1566SKashyap Desai mrioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); 3605824a1566SKashyap Desai 3606824a1566SKashyap Desai if (pci_request_selected_regions(pdev, mrioc->bars, 3607824a1566SKashyap Desai mrioc->driver_name)) { 3608824a1566SKashyap Desai ioc_err(mrioc, "pci_request_selected_regions: failed\n"); 3609824a1566SKashyap Desai retval = -ENODEV; 3610824a1566SKashyap Desai goto out_failed; 3611824a1566SKashyap Desai } 3612824a1566SKashyap Desai 3613824a1566SKashyap Desai for (i = 0; (i < DEVICE_COUNT_RESOURCE); i++) { 3614824a1566SKashyap Desai if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 3615824a1566SKashyap Desai mrioc->sysif_regs_phys = pci_resource_start(pdev, i); 3616824a1566SKashyap Desai memap_sz = pci_resource_len(pdev, i); 3617824a1566SKashyap Desai mrioc->sysif_regs = 3618824a1566SKashyap Desai ioremap(mrioc->sysif_regs_phys, memap_sz); 3619824a1566SKashyap Desai break; 3620824a1566SKashyap Desai } 3621824a1566SKashyap Desai } 3622824a1566SKashyap Desai 3623824a1566SKashyap Desai pci_set_master(pdev); 3624824a1566SKashyap Desai 3625824a1566SKashyap Desai retval = dma_set_mask_and_coherent(&pdev->dev, dma_mask); 3626824a1566SKashyap Desai if (retval) { 3627824a1566SKashyap Desai if (dma_mask != DMA_BIT_MASK(32)) { 3628824a1566SKashyap Desai ioc_warn(mrioc, "Setting 64 bit DMA mask failed\n"); 3629824a1566SKashyap Desai dma_mask = DMA_BIT_MASK(32); 3630824a1566SKashyap Desai retval = dma_set_mask_and_coherent(&pdev->dev, 3631824a1566SKashyap Desai dma_mask); 3632824a1566SKashyap Desai } 3633824a1566SKashyap Desai if (retval) { 3634824a1566SKashyap Desai mrioc->dma_mask = 0; 3635824a1566SKashyap Desai ioc_err(mrioc, "Setting 32 bit DMA mask also failed\n"); 3636824a1566SKashyap Desai goto out_failed; 3637824a1566SKashyap Desai } 3638824a1566SKashyap Desai } 3639824a1566SKashyap Desai mrioc->dma_mask = dma_mask; 3640824a1566SKashyap Desai 3641824a1566SKashyap Desai if (!mrioc->sysif_regs) { 3642824a1566SKashyap Desai ioc_err(mrioc, 3643824a1566SKashyap Desai "Unable to map adapter memory or resource not found\n"); 3644824a1566SKashyap Desai retval = -EINVAL; 3645824a1566SKashyap Desai goto out_failed; 3646824a1566SKashyap Desai } 3647824a1566SKashyap Desai 3648824a1566SKashyap Desai pci_read_config_word(pdev, capb + 2, &message_control); 3649824a1566SKashyap Desai mrioc->msix_count = (message_control & 0x3FF) + 1; 3650824a1566SKashyap Desai 3651824a1566SKashyap Desai pci_save_state(pdev); 3652824a1566SKashyap Desai 3653824a1566SKashyap Desai pci_set_drvdata(pdev, mrioc->shost); 3654824a1566SKashyap Desai 3655824a1566SKashyap Desai mpi3mr_ioc_disable_intr(mrioc); 3656824a1566SKashyap Desai 3657824a1566SKashyap Desai ioc_info(mrioc, "iomem(0x%016llx), mapped(0x%p), size(%d)\n", 3658824a1566SKashyap Desai (unsigned long long)mrioc->sysif_regs_phys, 3659824a1566SKashyap Desai mrioc->sysif_regs, memap_sz); 3660824a1566SKashyap Desai ioc_info(mrioc, "Number of MSI-X vectors found in capabilities: (%d)\n", 3661824a1566SKashyap Desai mrioc->msix_count); 3662afd3a579SSreekanth Reddy 3663afd3a579SSreekanth Reddy if (!reset_devices && poll_queues > 0) 3664afd3a579SSreekanth Reddy mrioc->requested_poll_qcount = min_t(int, poll_queues, 3665afd3a579SSreekanth Reddy mrioc->msix_count - 2); 3666824a1566SKashyap Desai return retval; 3667824a1566SKashyap Desai 3668824a1566SKashyap Desai out_failed: 3669824a1566SKashyap Desai mpi3mr_cleanup_resources(mrioc); 3670824a1566SKashyap Desai return retval; 3671824a1566SKashyap Desai } 3672824a1566SKashyap Desai 3673824a1566SKashyap Desai /** 3674e3605f65SSreekanth Reddy * mpi3mr_enable_events - Enable required events 3675e3605f65SSreekanth Reddy * @mrioc: Adapter instance reference 3676e3605f65SSreekanth Reddy * 3677e3605f65SSreekanth Reddy * This routine unmasks the events required by the driver by 3678e3605f65SSreekanth Reddy * sennding appropriate event mask bitmapt through an event 3679e3605f65SSreekanth Reddy * notification request. 3680e3605f65SSreekanth Reddy * 3681e3605f65SSreekanth Reddy * Return: 0 on success and non-zero on failure. 3682e3605f65SSreekanth Reddy */ 3683e3605f65SSreekanth Reddy static int mpi3mr_enable_events(struct mpi3mr_ioc *mrioc) 3684e3605f65SSreekanth Reddy { 3685e3605f65SSreekanth Reddy int retval = 0; 3686e3605f65SSreekanth Reddy u32 i; 3687e3605f65SSreekanth Reddy 3688e3605f65SSreekanth Reddy for (i = 0; i < MPI3_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3689e3605f65SSreekanth Reddy mrioc->event_masks[i] = -1; 3690e3605f65SSreekanth Reddy 3691e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_DEVICE_ADDED); 3692e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_DEVICE_INFO_CHANGED); 3693e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_DEVICE_STATUS_CHANGE); 3694e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_ENCL_DEVICE_STATUS_CHANGE); 36957188c03fSSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_ENCL_DEVICE_ADDED); 3696e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_SAS_TOPOLOGY_CHANGE_LIST); 3697e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_SAS_DISCOVERY); 3698e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_SAS_DEVICE_DISCOVERY_ERROR); 3699e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_SAS_BROADCAST_PRIMITIVE); 3700e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_PCIE_TOPOLOGY_CHANGE_LIST); 3701e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_PCIE_ENUMERATION); 370278b76a07SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_PREPARE_FOR_RESET); 3703e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_CABLE_MGMT); 3704e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_ENERGY_PACK_CHANGE); 3705e3605f65SSreekanth Reddy 3706e3605f65SSreekanth Reddy retval = mpi3mr_issue_event_notification(mrioc); 3707e3605f65SSreekanth Reddy if (retval) 3708e3605f65SSreekanth Reddy ioc_err(mrioc, "failed to issue event notification %d\n", 3709e3605f65SSreekanth Reddy retval); 3710e3605f65SSreekanth Reddy return retval; 3711e3605f65SSreekanth Reddy } 3712e3605f65SSreekanth Reddy 3713e3605f65SSreekanth Reddy /** 3714824a1566SKashyap Desai * mpi3mr_init_ioc - Initialize the controller 3715824a1566SKashyap Desai * @mrioc: Adapter instance reference 3716824a1566SKashyap Desai * 3717824a1566SKashyap Desai * This the controller initialization routine, executed either 3718824a1566SKashyap Desai * after soft reset or from pci probe callback. 3719824a1566SKashyap Desai * Setup the required resources, memory map the controller 3720824a1566SKashyap Desai * registers, create admin and operational reply queue pairs, 3721824a1566SKashyap Desai * allocate required memory for reply pool, sense buffer pool, 3722824a1566SKashyap Desai * issue IOC init request to the firmware, unmask the events and 3723824a1566SKashyap Desai * issue port enable to discover SAS/SATA/NVMe devies and RAID 3724824a1566SKashyap Desai * volumes. 3725824a1566SKashyap Desai * 3726824a1566SKashyap Desai * Return: 0 on success and non-zero on failure. 3727824a1566SKashyap Desai */ 3728fe6db615SSreekanth Reddy int mpi3mr_init_ioc(struct mpi3mr_ioc *mrioc) 3729824a1566SKashyap Desai { 3730824a1566SKashyap Desai int retval = 0; 3731fe6db615SSreekanth Reddy u8 retry = 0; 3732824a1566SKashyap Desai struct mpi3_ioc_facts_data facts_data; 3733f10af057SSreekanth Reddy u32 sz; 3734824a1566SKashyap Desai 3735fe6db615SSreekanth Reddy retry_init: 3736824a1566SKashyap Desai retval = mpi3mr_bring_ioc_ready(mrioc); 3737824a1566SKashyap Desai if (retval) { 3738824a1566SKashyap Desai ioc_err(mrioc, "Failed to bring ioc ready: error %d\n", 3739824a1566SKashyap Desai retval); 3740fe6db615SSreekanth Reddy goto out_failed_noretry; 3741824a1566SKashyap Desai } 3742824a1566SKashyap Desai 3743824a1566SKashyap Desai retval = mpi3mr_setup_isr(mrioc, 1); 3744824a1566SKashyap Desai if (retval) { 3745824a1566SKashyap Desai ioc_err(mrioc, "Failed to setup ISR error %d\n", 3746824a1566SKashyap Desai retval); 3747fe6db615SSreekanth Reddy goto out_failed_noretry; 3748824a1566SKashyap Desai } 3749824a1566SKashyap Desai 3750824a1566SKashyap Desai retval = mpi3mr_issue_iocfacts(mrioc, &facts_data); 3751824a1566SKashyap Desai if (retval) { 3752824a1566SKashyap Desai ioc_err(mrioc, "Failed to Issue IOC Facts %d\n", 3753824a1566SKashyap Desai retval); 3754824a1566SKashyap Desai goto out_failed; 3755824a1566SKashyap Desai } 3756824a1566SKashyap Desai 3757c5758fc7SSreekanth Reddy mrioc->max_host_ios = mrioc->facts.max_reqs - MPI3MR_INTERNAL_CMDS_RESVD; 3758c5758fc7SSreekanth Reddy 3759f10af057SSreekanth Reddy mrioc->num_io_throttle_group = mrioc->facts.max_io_throttle_group; 3760f10af057SSreekanth Reddy atomic_set(&mrioc->pend_large_data_sz, 0); 3761f10af057SSreekanth Reddy 3762c5758fc7SSreekanth Reddy if (reset_devices) 3763c5758fc7SSreekanth Reddy mrioc->max_host_ios = min_t(int, mrioc->max_host_ios, 3764c5758fc7SSreekanth Reddy MPI3MR_HOST_IOS_KDUMP); 3765c5758fc7SSreekanth Reddy 3766c4723e68SSreekanth Reddy if (!(mrioc->facts.ioc_capabilities & 3767c4723e68SSreekanth Reddy MPI3_IOCFACTS_CAPABILITY_MULTIPATH_ENABLED)) { 3768c4723e68SSreekanth Reddy mrioc->sas_transport_enabled = 1; 3769626665e9SSreekanth Reddy mrioc->scsi_device_channel = 1; 3770626665e9SSreekanth Reddy mrioc->shost->max_channel = 1; 3771176d4aa6SSreekanth Reddy mrioc->shost->transportt = mpi3mr_transport_template; 3772c4723e68SSreekanth Reddy } 3773c4723e68SSreekanth Reddy 3774c5758fc7SSreekanth Reddy mrioc->reply_sz = mrioc->facts.reply_sz; 3775fe6db615SSreekanth Reddy 3776824a1566SKashyap Desai retval = mpi3mr_check_reset_dma_mask(mrioc); 3777824a1566SKashyap Desai if (retval) { 3778824a1566SKashyap Desai ioc_err(mrioc, "Resetting dma mask failed %d\n", 3779824a1566SKashyap Desai retval); 3780fe6db615SSreekanth Reddy goto out_failed_noretry; 3781fb9b0457SKashyap Desai } 3782824a1566SKashyap Desai 3783ff9561e9SKashyap Desai mpi3mr_print_ioc_info(mrioc); 3784ff9561e9SKashyap Desai 378532d457d5SSreekanth Reddy dprint_init(mrioc, "allocating config page buffers\n"); 378632d457d5SSreekanth Reddy mrioc->cfg_page = dma_alloc_coherent(&mrioc->pdev->dev, 378732d457d5SSreekanth Reddy MPI3MR_DEFAULT_CFG_PAGE_SZ, &mrioc->cfg_page_dma, GFP_KERNEL); 378832d457d5SSreekanth Reddy if (!mrioc->cfg_page) 378932d457d5SSreekanth Reddy goto out_failed_noretry; 379032d457d5SSreekanth Reddy 379132d457d5SSreekanth Reddy mrioc->cfg_page_sz = MPI3MR_DEFAULT_CFG_PAGE_SZ; 379232d457d5SSreekanth Reddy 3793824a1566SKashyap Desai retval = mpi3mr_alloc_reply_sense_bufs(mrioc); 3794824a1566SKashyap Desai if (retval) { 3795824a1566SKashyap Desai ioc_err(mrioc, 3796824a1566SKashyap Desai "%s :Failed to allocated reply sense buffers %d\n", 3797824a1566SKashyap Desai __func__, retval); 3798fe6db615SSreekanth Reddy goto out_failed_noretry; 3799824a1566SKashyap Desai } 3800824a1566SKashyap Desai 3801824a1566SKashyap Desai retval = mpi3mr_alloc_chain_bufs(mrioc); 3802824a1566SKashyap Desai if (retval) { 3803824a1566SKashyap Desai ioc_err(mrioc, "Failed to allocated chain buffers %d\n", 3804824a1566SKashyap Desai retval); 3805fe6db615SSreekanth Reddy goto out_failed_noretry; 3806fb9b0457SKashyap Desai } 3807824a1566SKashyap Desai 3808824a1566SKashyap Desai retval = mpi3mr_issue_iocinit(mrioc); 3809824a1566SKashyap Desai if (retval) { 3810824a1566SKashyap Desai ioc_err(mrioc, "Failed to Issue IOC Init %d\n", 3811824a1566SKashyap Desai retval); 3812824a1566SKashyap Desai goto out_failed; 3813824a1566SKashyap Desai } 3814824a1566SKashyap Desai 38152ac794baSSreekanth Reddy retval = mpi3mr_print_pkg_ver(mrioc); 38162ac794baSSreekanth Reddy if (retval) { 38172ac794baSSreekanth Reddy ioc_err(mrioc, "failed to get package version\n"); 38182ac794baSSreekanth Reddy goto out_failed; 38192ac794baSSreekanth Reddy } 38202ac794baSSreekanth Reddy 3821824a1566SKashyap Desai retval = mpi3mr_setup_isr(mrioc, 0); 3822824a1566SKashyap Desai if (retval) { 3823824a1566SKashyap Desai ioc_err(mrioc, "Failed to re-setup ISR, error %d\n", 3824824a1566SKashyap Desai retval); 3825fe6db615SSreekanth Reddy goto out_failed_noretry; 3826fb9b0457SKashyap Desai } 3827824a1566SKashyap Desai 3828c9566231SKashyap Desai retval = mpi3mr_create_op_queues(mrioc); 3829c9566231SKashyap Desai if (retval) { 3830c9566231SKashyap Desai ioc_err(mrioc, "Failed to create OpQueues error %d\n", 3831c9566231SKashyap Desai retval); 3832c9566231SKashyap Desai goto out_failed; 3833c9566231SKashyap Desai } 3834c9566231SKashyap Desai 383543ca1100SSumit Saxena if (!mrioc->pel_seqnum_virt) { 383643ca1100SSumit Saxena dprint_init(mrioc, "allocating memory for pel_seqnum_virt\n"); 383743ca1100SSumit Saxena mrioc->pel_seqnum_sz = sizeof(struct mpi3_pel_seq); 383843ca1100SSumit Saxena mrioc->pel_seqnum_virt = dma_alloc_coherent(&mrioc->pdev->dev, 383943ca1100SSumit Saxena mrioc->pel_seqnum_sz, &mrioc->pel_seqnum_dma, 384043ca1100SSumit Saxena GFP_KERNEL); 3841bc7896d3SDan Carpenter if (!mrioc->pel_seqnum_virt) { 3842bc7896d3SDan Carpenter retval = -ENOMEM; 384343ca1100SSumit Saxena goto out_failed_noretry; 384443ca1100SSumit Saxena } 3845bc7896d3SDan Carpenter } 384643ca1100SSumit Saxena 3847f10af057SSreekanth Reddy if (!mrioc->throttle_groups && mrioc->num_io_throttle_group) { 3848f10af057SSreekanth Reddy dprint_init(mrioc, "allocating memory for throttle groups\n"); 3849f10af057SSreekanth Reddy sz = sizeof(struct mpi3mr_throttle_group_info); 3850f10af057SSreekanth Reddy mrioc->throttle_groups = (struct mpi3mr_throttle_group_info *) 3851f10af057SSreekanth Reddy kcalloc(mrioc->num_io_throttle_group, sz, GFP_KERNEL); 3852f10af057SSreekanth Reddy if (!mrioc->throttle_groups) 3853f10af057SSreekanth Reddy goto out_failed_noretry; 3854f10af057SSreekanth Reddy } 3855f10af057SSreekanth Reddy 3856e3605f65SSreekanth Reddy retval = mpi3mr_enable_events(mrioc); 385713ef29eaSKashyap Desai if (retval) { 3858e3605f65SSreekanth Reddy ioc_err(mrioc, "failed to enable events %d\n", 385913ef29eaSKashyap Desai retval); 386013ef29eaSKashyap Desai goto out_failed; 386113ef29eaSKashyap Desai } 386213ef29eaSKashyap Desai 3863fe6db615SSreekanth Reddy ioc_info(mrioc, "controller initialization completed successfully\n"); 3864824a1566SKashyap Desai return retval; 3865824a1566SKashyap Desai out_failed: 3866fe6db615SSreekanth Reddy if (retry < 2) { 3867fe6db615SSreekanth Reddy retry++; 3868fe6db615SSreekanth Reddy ioc_warn(mrioc, "retrying controller initialization, retry_count:%d\n", 3869fe6db615SSreekanth Reddy retry); 3870fe6db615SSreekanth Reddy mpi3mr_memset_buffers(mrioc); 3871fe6db615SSreekanth Reddy goto retry_init; 3872fe6db615SSreekanth Reddy } 3873fe6db615SSreekanth Reddy out_failed_noretry: 3874fe6db615SSreekanth Reddy ioc_err(mrioc, "controller initialization failed\n"); 3875fe6db615SSreekanth Reddy mpi3mr_issue_reset(mrioc, MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, 3876fe6db615SSreekanth Reddy MPI3MR_RESET_FROM_CTLR_CLEANUP); 3877fe6db615SSreekanth Reddy mrioc->unrecoverable = 1; 3878824a1566SKashyap Desai return retval; 3879824a1566SKashyap Desai } 3880824a1566SKashyap Desai 3881c0b00a93SSreekanth Reddy /** 3882c0b00a93SSreekanth Reddy * mpi3mr_reinit_ioc - Re-Initialize the controller 3883c0b00a93SSreekanth Reddy * @mrioc: Adapter instance reference 3884c0b00a93SSreekanth Reddy * @is_resume: Called from resume or reset path 3885c0b00a93SSreekanth Reddy * 3886c0b00a93SSreekanth Reddy * This the controller re-initialization routine, executed from 3887c0b00a93SSreekanth Reddy * the soft reset handler or resume callback. Creates 3888c0b00a93SSreekanth Reddy * operational reply queue pairs, allocate required memory for 3889c0b00a93SSreekanth Reddy * reply pool, sense buffer pool, issue IOC init request to the 3890c0b00a93SSreekanth Reddy * firmware, unmask the events and issue port enable to discover 3891c0b00a93SSreekanth Reddy * SAS/SATA/NVMe devices and RAID volumes. 3892c0b00a93SSreekanth Reddy * 3893c0b00a93SSreekanth Reddy * Return: 0 on success and non-zero on failure. 3894c0b00a93SSreekanth Reddy */ 3895fe6db615SSreekanth Reddy int mpi3mr_reinit_ioc(struct mpi3mr_ioc *mrioc, u8 is_resume) 3896fe6db615SSreekanth Reddy { 3897c0b00a93SSreekanth Reddy int retval = 0; 3898c0b00a93SSreekanth Reddy u8 retry = 0; 3899c0b00a93SSreekanth Reddy struct mpi3_ioc_facts_data facts_data; 3900fe6db615SSreekanth Reddy 3901c0b00a93SSreekanth Reddy retry_init: 3902c0b00a93SSreekanth Reddy dprint_reset(mrioc, "bringing up the controller to ready state\n"); 3903c0b00a93SSreekanth Reddy retval = mpi3mr_bring_ioc_ready(mrioc); 3904c0b00a93SSreekanth Reddy if (retval) { 3905c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to bring to ready state\n"); 3906c0b00a93SSreekanth Reddy goto out_failed_noretry; 3907c0b00a93SSreekanth Reddy } 3908c0b00a93SSreekanth Reddy 3909c0b00a93SSreekanth Reddy if (is_resume) { 3910c0b00a93SSreekanth Reddy dprint_reset(mrioc, "setting up single ISR\n"); 3911c0b00a93SSreekanth Reddy retval = mpi3mr_setup_isr(mrioc, 1); 3912c0b00a93SSreekanth Reddy if (retval) { 3913c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to setup ISR\n"); 3914c0b00a93SSreekanth Reddy goto out_failed_noretry; 3915c0b00a93SSreekanth Reddy } 3916c0b00a93SSreekanth Reddy } else 3917c0b00a93SSreekanth Reddy mpi3mr_ioc_enable_intr(mrioc); 3918c0b00a93SSreekanth Reddy 3919c0b00a93SSreekanth Reddy dprint_reset(mrioc, "getting ioc_facts\n"); 3920c0b00a93SSreekanth Reddy retval = mpi3mr_issue_iocfacts(mrioc, &facts_data); 3921c0b00a93SSreekanth Reddy if (retval) { 3922c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to get ioc_facts\n"); 3923c0b00a93SSreekanth Reddy goto out_failed; 3924c0b00a93SSreekanth Reddy } 3925c0b00a93SSreekanth Reddy 3926c5758fc7SSreekanth Reddy dprint_reset(mrioc, "validating ioc_facts\n"); 3927c5758fc7SSreekanth Reddy retval = mpi3mr_revalidate_factsdata(mrioc); 3928c5758fc7SSreekanth Reddy if (retval) { 3929c5758fc7SSreekanth Reddy ioc_err(mrioc, "failed to revalidate ioc_facts data\n"); 3930c5758fc7SSreekanth Reddy goto out_failed_noretry; 3931c5758fc7SSreekanth Reddy } 3932c0b00a93SSreekanth Reddy 3933c0b00a93SSreekanth Reddy mpi3mr_print_ioc_info(mrioc); 3934c0b00a93SSreekanth Reddy 3935c0b00a93SSreekanth Reddy dprint_reset(mrioc, "sending ioc_init\n"); 3936c0b00a93SSreekanth Reddy retval = mpi3mr_issue_iocinit(mrioc); 3937c0b00a93SSreekanth Reddy if (retval) { 3938c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to send ioc_init\n"); 3939c0b00a93SSreekanth Reddy goto out_failed; 3940c0b00a93SSreekanth Reddy } 3941c0b00a93SSreekanth Reddy 3942c0b00a93SSreekanth Reddy dprint_reset(mrioc, "getting package version\n"); 3943c0b00a93SSreekanth Reddy retval = mpi3mr_print_pkg_ver(mrioc); 3944c0b00a93SSreekanth Reddy if (retval) { 3945c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to get package version\n"); 3946c0b00a93SSreekanth Reddy goto out_failed; 3947c0b00a93SSreekanth Reddy } 3948c0b00a93SSreekanth Reddy 3949c0b00a93SSreekanth Reddy if (is_resume) { 3950c0b00a93SSreekanth Reddy dprint_reset(mrioc, "setting up multiple ISR\n"); 3951c0b00a93SSreekanth Reddy retval = mpi3mr_setup_isr(mrioc, 0); 3952c0b00a93SSreekanth Reddy if (retval) { 3953c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to re-setup ISR\n"); 3954c0b00a93SSreekanth Reddy goto out_failed_noretry; 3955c0b00a93SSreekanth Reddy } 3956c0b00a93SSreekanth Reddy } 3957c0b00a93SSreekanth Reddy 3958c0b00a93SSreekanth Reddy dprint_reset(mrioc, "creating operational queue pairs\n"); 3959c0b00a93SSreekanth Reddy retval = mpi3mr_create_op_queues(mrioc); 3960c0b00a93SSreekanth Reddy if (retval) { 3961c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to create operational queue pairs\n"); 3962c0b00a93SSreekanth Reddy goto out_failed; 3963c0b00a93SSreekanth Reddy } 3964c0b00a93SSreekanth Reddy 396543ca1100SSumit Saxena if (!mrioc->pel_seqnum_virt) { 396643ca1100SSumit Saxena dprint_reset(mrioc, "allocating memory for pel_seqnum_virt\n"); 396743ca1100SSumit Saxena mrioc->pel_seqnum_sz = sizeof(struct mpi3_pel_seq); 396843ca1100SSumit Saxena mrioc->pel_seqnum_virt = dma_alloc_coherent(&mrioc->pdev->dev, 396943ca1100SSumit Saxena mrioc->pel_seqnum_sz, &mrioc->pel_seqnum_dma, 397043ca1100SSumit Saxena GFP_KERNEL); 3971bc7896d3SDan Carpenter if (!mrioc->pel_seqnum_virt) { 3972bc7896d3SDan Carpenter retval = -ENOMEM; 397343ca1100SSumit Saxena goto out_failed_noretry; 397443ca1100SSumit Saxena } 3975bc7896d3SDan Carpenter } 397643ca1100SSumit Saxena 3977c0b00a93SSreekanth Reddy if (mrioc->shost->nr_hw_queues > mrioc->num_op_reply_q) { 3978c0b00a93SSreekanth Reddy ioc_err(mrioc, 39795867b856SColin Ian King "cannot create minimum number of operational queues expected:%d created:%d\n", 3980c0b00a93SSreekanth Reddy mrioc->shost->nr_hw_queues, mrioc->num_op_reply_q); 3981c0b00a93SSreekanth Reddy goto out_failed_noretry; 3982c0b00a93SSreekanth Reddy } 3983c0b00a93SSreekanth Reddy 3984c0b00a93SSreekanth Reddy dprint_reset(mrioc, "enabling events\n"); 3985c0b00a93SSreekanth Reddy retval = mpi3mr_enable_events(mrioc); 3986c0b00a93SSreekanth Reddy if (retval) { 3987c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to enable events\n"); 3988c0b00a93SSreekanth Reddy goto out_failed; 3989c0b00a93SSreekanth Reddy } 3990c0b00a93SSreekanth Reddy 39912745ce0eSSreekanth Reddy if (!is_resume) { 39922745ce0eSSreekanth Reddy mrioc->device_refresh_on = 1; 39932745ce0eSSreekanth Reddy mpi3mr_add_event_wait_for_device_refresh(mrioc); 39942745ce0eSSreekanth Reddy } 39952745ce0eSSreekanth Reddy 3996c0b00a93SSreekanth Reddy ioc_info(mrioc, "sending port enable\n"); 3997c0b00a93SSreekanth Reddy retval = mpi3mr_issue_port_enable(mrioc, 0); 3998c0b00a93SSreekanth Reddy if (retval) { 3999c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to issue port enable\n"); 4000c0b00a93SSreekanth Reddy goto out_failed; 4001c0b00a93SSreekanth Reddy } 4002c0b00a93SSreekanth Reddy 4003c0b00a93SSreekanth Reddy ioc_info(mrioc, "controller %s completed successfully\n", 4004c0b00a93SSreekanth Reddy (is_resume)?"resume":"re-initialization"); 4005c0b00a93SSreekanth Reddy return retval; 4006c0b00a93SSreekanth Reddy out_failed: 4007c0b00a93SSreekanth Reddy if (retry < 2) { 4008c0b00a93SSreekanth Reddy retry++; 4009c0b00a93SSreekanth Reddy ioc_warn(mrioc, "retrying controller %s, retry_count:%d\n", 4010c0b00a93SSreekanth Reddy (is_resume)?"resume":"re-initialization", retry); 4011c0b00a93SSreekanth Reddy mpi3mr_memset_buffers(mrioc); 4012c0b00a93SSreekanth Reddy goto retry_init; 4013c0b00a93SSreekanth Reddy } 4014c0b00a93SSreekanth Reddy out_failed_noretry: 4015c0b00a93SSreekanth Reddy ioc_err(mrioc, "controller %s is failed\n", 4016c0b00a93SSreekanth Reddy (is_resume)?"resume":"re-initialization"); 4017c0b00a93SSreekanth Reddy mpi3mr_issue_reset(mrioc, MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, 4018c0b00a93SSreekanth Reddy MPI3MR_RESET_FROM_CTLR_CLEANUP); 4019c0b00a93SSreekanth Reddy mrioc->unrecoverable = 1; 4020c0b00a93SSreekanth Reddy return retval; 4021fe6db615SSreekanth Reddy } 4022fe6db615SSreekanth Reddy 4023824a1566SKashyap Desai /** 4024fb9b0457SKashyap Desai * mpi3mr_memset_op_reply_q_buffers - memset the operational reply queue's 4025fb9b0457SKashyap Desai * segments 4026fb9b0457SKashyap Desai * @mrioc: Adapter instance reference 4027fb9b0457SKashyap Desai * @qidx: Operational reply queue index 4028fb9b0457SKashyap Desai * 4029fb9b0457SKashyap Desai * Return: Nothing. 4030fb9b0457SKashyap Desai */ 4031fb9b0457SKashyap Desai static void mpi3mr_memset_op_reply_q_buffers(struct mpi3mr_ioc *mrioc, u16 qidx) 4032fb9b0457SKashyap Desai { 4033fb9b0457SKashyap Desai struct op_reply_qinfo *op_reply_q = mrioc->op_reply_qinfo + qidx; 4034fb9b0457SKashyap Desai struct segments *segments; 4035fb9b0457SKashyap Desai int i, size; 4036fb9b0457SKashyap Desai 4037fb9b0457SKashyap Desai if (!op_reply_q->q_segments) 4038fb9b0457SKashyap Desai return; 4039fb9b0457SKashyap Desai 4040fb9b0457SKashyap Desai size = op_reply_q->segment_qd * mrioc->op_reply_desc_sz; 4041fb9b0457SKashyap Desai segments = op_reply_q->q_segments; 4042fb9b0457SKashyap Desai for (i = 0; i < op_reply_q->num_segments; i++) 4043fb9b0457SKashyap Desai memset(segments[i].segment, 0, size); 4044fb9b0457SKashyap Desai } 4045fb9b0457SKashyap Desai 4046fb9b0457SKashyap Desai /** 4047fb9b0457SKashyap Desai * mpi3mr_memset_op_req_q_buffers - memset the operational request queue's 4048fb9b0457SKashyap Desai * segments 4049fb9b0457SKashyap Desai * @mrioc: Adapter instance reference 4050fb9b0457SKashyap Desai * @qidx: Operational request queue index 4051fb9b0457SKashyap Desai * 4052fb9b0457SKashyap Desai * Return: Nothing. 4053fb9b0457SKashyap Desai */ 4054fb9b0457SKashyap Desai static void mpi3mr_memset_op_req_q_buffers(struct mpi3mr_ioc *mrioc, u16 qidx) 4055fb9b0457SKashyap Desai { 4056fb9b0457SKashyap Desai struct op_req_qinfo *op_req_q = mrioc->req_qinfo + qidx; 4057fb9b0457SKashyap Desai struct segments *segments; 4058fb9b0457SKashyap Desai int i, size; 4059fb9b0457SKashyap Desai 4060fb9b0457SKashyap Desai if (!op_req_q->q_segments) 4061fb9b0457SKashyap Desai return; 4062fb9b0457SKashyap Desai 4063fb9b0457SKashyap Desai size = op_req_q->segment_qd * mrioc->facts.op_req_sz; 4064fb9b0457SKashyap Desai segments = op_req_q->q_segments; 4065fb9b0457SKashyap Desai for (i = 0; i < op_req_q->num_segments; i++) 4066fb9b0457SKashyap Desai memset(segments[i].segment, 0, size); 4067fb9b0457SKashyap Desai } 4068fb9b0457SKashyap Desai 4069fb9b0457SKashyap Desai /** 4070fb9b0457SKashyap Desai * mpi3mr_memset_buffers - memset memory for a controller 4071fb9b0457SKashyap Desai * @mrioc: Adapter instance reference 4072fb9b0457SKashyap Desai * 4073fb9b0457SKashyap Desai * clear all the memory allocated for a controller, typically 4074fb9b0457SKashyap Desai * called post reset to reuse the memory allocated during the 4075fb9b0457SKashyap Desai * controller init. 4076fb9b0457SKashyap Desai * 4077fb9b0457SKashyap Desai * Return: Nothing. 4078fb9b0457SKashyap Desai */ 40790da66348SKashyap Desai void mpi3mr_memset_buffers(struct mpi3mr_ioc *mrioc) 4080fb9b0457SKashyap Desai { 4081fb9b0457SKashyap Desai u16 i; 4082f10af057SSreekanth Reddy struct mpi3mr_throttle_group_info *tg; 4083fb9b0457SKashyap Desai 4084fe6db615SSreekanth Reddy mrioc->change_count = 0; 4085afd3a579SSreekanth Reddy mrioc->active_poll_qcount = 0; 4086afd3a579SSreekanth Reddy mrioc->default_qcount = 0; 4087fe6db615SSreekanth Reddy if (mrioc->admin_req_base) 4088fb9b0457SKashyap Desai memset(mrioc->admin_req_base, 0, mrioc->admin_req_q_sz); 4089fe6db615SSreekanth Reddy if (mrioc->admin_reply_base) 4090fb9b0457SKashyap Desai memset(mrioc->admin_reply_base, 0, mrioc->admin_reply_q_sz); 4091fb9b0457SKashyap Desai 4092fe6db615SSreekanth Reddy if (mrioc->init_cmds.reply) { 4093fb9b0457SKashyap Desai memset(mrioc->init_cmds.reply, 0, sizeof(*mrioc->init_cmds.reply)); 4094f5e6d5a3SSumit Saxena memset(mrioc->bsg_cmds.reply, 0, 4095f5e6d5a3SSumit Saxena sizeof(*mrioc->bsg_cmds.reply)); 4096e844adb1SKashyap Desai memset(mrioc->host_tm_cmds.reply, 0, 4097e844adb1SKashyap Desai sizeof(*mrioc->host_tm_cmds.reply)); 409843ca1100SSumit Saxena memset(mrioc->pel_cmds.reply, 0, 409943ca1100SSumit Saxena sizeof(*mrioc->pel_cmds.reply)); 410043ca1100SSumit Saxena memset(mrioc->pel_abort_cmd.reply, 0, 410143ca1100SSumit Saxena sizeof(*mrioc->pel_abort_cmd.reply)); 41022bd37e28SSreekanth Reddy memset(mrioc->transport_cmds.reply, 0, 41032bd37e28SSreekanth Reddy sizeof(*mrioc->transport_cmds.reply)); 4104fb9b0457SKashyap Desai for (i = 0; i < MPI3MR_NUM_DEVRMCMD; i++) 4105fb9b0457SKashyap Desai memset(mrioc->dev_rmhs_cmds[i].reply, 0, 4106fb9b0457SKashyap Desai sizeof(*mrioc->dev_rmhs_cmds[i].reply)); 4107c1af985dSSreekanth Reddy for (i = 0; i < MPI3MR_NUM_EVTACKCMD; i++) 4108c1af985dSSreekanth Reddy memset(mrioc->evtack_cmds[i].reply, 0, 4109c1af985dSSreekanth Reddy sizeof(*mrioc->evtack_cmds[i].reply)); 4110fb9b0457SKashyap Desai memset(mrioc->removepend_bitmap, 0, mrioc->dev_handle_bitmap_sz); 4111fb9b0457SKashyap Desai memset(mrioc->devrem_bitmap, 0, mrioc->devrem_bitmap_sz); 4112c1af985dSSreekanth Reddy memset(mrioc->evtack_cmds_bitmap, 0, 4113c1af985dSSreekanth Reddy mrioc->evtack_cmds_bitmap_sz); 4114fe6db615SSreekanth Reddy } 4115fb9b0457SKashyap Desai 4116fb9b0457SKashyap Desai for (i = 0; i < mrioc->num_queues; i++) { 4117fb9b0457SKashyap Desai mrioc->op_reply_qinfo[i].qid = 0; 4118fb9b0457SKashyap Desai mrioc->op_reply_qinfo[i].ci = 0; 4119fb9b0457SKashyap Desai mrioc->op_reply_qinfo[i].num_replies = 0; 4120fb9b0457SKashyap Desai mrioc->op_reply_qinfo[i].ephase = 0; 4121463429f8SKashyap Desai atomic_set(&mrioc->op_reply_qinfo[i].pend_ios, 0); 4122463429f8SKashyap Desai atomic_set(&mrioc->op_reply_qinfo[i].in_use, 0); 4123fb9b0457SKashyap Desai mpi3mr_memset_op_reply_q_buffers(mrioc, i); 4124fb9b0457SKashyap Desai 4125fb9b0457SKashyap Desai mrioc->req_qinfo[i].ci = 0; 4126fb9b0457SKashyap Desai mrioc->req_qinfo[i].pi = 0; 4127fb9b0457SKashyap Desai mrioc->req_qinfo[i].num_requests = 0; 4128fb9b0457SKashyap Desai mrioc->req_qinfo[i].qid = 0; 4129fb9b0457SKashyap Desai mrioc->req_qinfo[i].reply_qid = 0; 4130fb9b0457SKashyap Desai spin_lock_init(&mrioc->req_qinfo[i].q_lock); 4131fb9b0457SKashyap Desai mpi3mr_memset_op_req_q_buffers(mrioc, i); 4132fb9b0457SKashyap Desai } 4133f10af057SSreekanth Reddy 4134f10af057SSreekanth Reddy atomic_set(&mrioc->pend_large_data_sz, 0); 4135f10af057SSreekanth Reddy if (mrioc->throttle_groups) { 4136f10af057SSreekanth Reddy tg = mrioc->throttle_groups; 4137f10af057SSreekanth Reddy for (i = 0; i < mrioc->num_io_throttle_group; i++, tg++) { 4138f10af057SSreekanth Reddy tg->id = 0; 4139cf1ce8b7SSreekanth Reddy tg->fw_qd = 0; 4140cf1ce8b7SSreekanth Reddy tg->modified_qd = 0; 4141f10af057SSreekanth Reddy tg->io_divert = 0; 4142cf1ce8b7SSreekanth Reddy tg->need_qd_reduction = 0; 4143f10af057SSreekanth Reddy tg->high = 0; 4144f10af057SSreekanth Reddy tg->low = 0; 4145cf1ce8b7SSreekanth Reddy tg->qd_reduction = 0; 4146f10af057SSreekanth Reddy atomic_set(&tg->pend_large_data_sz, 0); 4147f10af057SSreekanth Reddy } 4148f10af057SSreekanth Reddy } 4149fb9b0457SKashyap Desai } 4150fb9b0457SKashyap Desai 4151fb9b0457SKashyap Desai /** 4152824a1566SKashyap Desai * mpi3mr_free_mem - Free memory allocated for a controller 4153824a1566SKashyap Desai * @mrioc: Adapter instance reference 4154824a1566SKashyap Desai * 4155824a1566SKashyap Desai * Free all the memory allocated for a controller. 4156824a1566SKashyap Desai * 4157824a1566SKashyap Desai * Return: Nothing. 4158824a1566SKashyap Desai */ 4159fe6db615SSreekanth Reddy void mpi3mr_free_mem(struct mpi3mr_ioc *mrioc) 4160824a1566SKashyap Desai { 4161824a1566SKashyap Desai u16 i; 4162824a1566SKashyap Desai struct mpi3mr_intr_info *intr_info; 4163824a1566SKashyap Desai 4164824a1566SKashyap Desai if (mrioc->sense_buf_pool) { 4165824a1566SKashyap Desai if (mrioc->sense_buf) 4166824a1566SKashyap Desai dma_pool_free(mrioc->sense_buf_pool, mrioc->sense_buf, 4167824a1566SKashyap Desai mrioc->sense_buf_dma); 4168824a1566SKashyap Desai dma_pool_destroy(mrioc->sense_buf_pool); 4169824a1566SKashyap Desai mrioc->sense_buf = NULL; 4170824a1566SKashyap Desai mrioc->sense_buf_pool = NULL; 4171824a1566SKashyap Desai } 4172824a1566SKashyap Desai if (mrioc->sense_buf_q_pool) { 4173824a1566SKashyap Desai if (mrioc->sense_buf_q) 4174824a1566SKashyap Desai dma_pool_free(mrioc->sense_buf_q_pool, 4175824a1566SKashyap Desai mrioc->sense_buf_q, mrioc->sense_buf_q_dma); 4176824a1566SKashyap Desai dma_pool_destroy(mrioc->sense_buf_q_pool); 4177824a1566SKashyap Desai mrioc->sense_buf_q = NULL; 4178824a1566SKashyap Desai mrioc->sense_buf_q_pool = NULL; 4179824a1566SKashyap Desai } 4180824a1566SKashyap Desai 4181824a1566SKashyap Desai if (mrioc->reply_buf_pool) { 4182824a1566SKashyap Desai if (mrioc->reply_buf) 4183824a1566SKashyap Desai dma_pool_free(mrioc->reply_buf_pool, mrioc->reply_buf, 4184824a1566SKashyap Desai mrioc->reply_buf_dma); 4185824a1566SKashyap Desai dma_pool_destroy(mrioc->reply_buf_pool); 4186824a1566SKashyap Desai mrioc->reply_buf = NULL; 4187824a1566SKashyap Desai mrioc->reply_buf_pool = NULL; 4188824a1566SKashyap Desai } 4189824a1566SKashyap Desai if (mrioc->reply_free_q_pool) { 4190824a1566SKashyap Desai if (mrioc->reply_free_q) 4191824a1566SKashyap Desai dma_pool_free(mrioc->reply_free_q_pool, 4192824a1566SKashyap Desai mrioc->reply_free_q, mrioc->reply_free_q_dma); 4193824a1566SKashyap Desai dma_pool_destroy(mrioc->reply_free_q_pool); 4194824a1566SKashyap Desai mrioc->reply_free_q = NULL; 4195824a1566SKashyap Desai mrioc->reply_free_q_pool = NULL; 4196824a1566SKashyap Desai } 4197824a1566SKashyap Desai 4198c9566231SKashyap Desai for (i = 0; i < mrioc->num_op_req_q; i++) 4199c9566231SKashyap Desai mpi3mr_free_op_req_q_segments(mrioc, i); 4200c9566231SKashyap Desai 4201c9566231SKashyap Desai for (i = 0; i < mrioc->num_op_reply_q; i++) 4202c9566231SKashyap Desai mpi3mr_free_op_reply_q_segments(mrioc, i); 4203c9566231SKashyap Desai 4204824a1566SKashyap Desai for (i = 0; i < mrioc->intr_info_count; i++) { 4205824a1566SKashyap Desai intr_info = mrioc->intr_info + i; 4206824a1566SKashyap Desai intr_info->op_reply_q = NULL; 4207824a1566SKashyap Desai } 4208824a1566SKashyap Desai 4209824a1566SKashyap Desai kfree(mrioc->req_qinfo); 4210824a1566SKashyap Desai mrioc->req_qinfo = NULL; 4211824a1566SKashyap Desai mrioc->num_op_req_q = 0; 4212824a1566SKashyap Desai 4213824a1566SKashyap Desai kfree(mrioc->op_reply_qinfo); 4214824a1566SKashyap Desai mrioc->op_reply_qinfo = NULL; 4215824a1566SKashyap Desai mrioc->num_op_reply_q = 0; 4216824a1566SKashyap Desai 4217824a1566SKashyap Desai kfree(mrioc->init_cmds.reply); 4218824a1566SKashyap Desai mrioc->init_cmds.reply = NULL; 4219824a1566SKashyap Desai 4220f5e6d5a3SSumit Saxena kfree(mrioc->bsg_cmds.reply); 4221f5e6d5a3SSumit Saxena mrioc->bsg_cmds.reply = NULL; 4222f5e6d5a3SSumit Saxena 4223e844adb1SKashyap Desai kfree(mrioc->host_tm_cmds.reply); 4224e844adb1SKashyap Desai mrioc->host_tm_cmds.reply = NULL; 4225e844adb1SKashyap Desai 422643ca1100SSumit Saxena kfree(mrioc->pel_cmds.reply); 422743ca1100SSumit Saxena mrioc->pel_cmds.reply = NULL; 422843ca1100SSumit Saxena 422943ca1100SSumit Saxena kfree(mrioc->pel_abort_cmd.reply); 423043ca1100SSumit Saxena mrioc->pel_abort_cmd.reply = NULL; 423143ca1100SSumit Saxena 4232c1af985dSSreekanth Reddy for (i = 0; i < MPI3MR_NUM_EVTACKCMD; i++) { 4233c1af985dSSreekanth Reddy kfree(mrioc->evtack_cmds[i].reply); 4234c1af985dSSreekanth Reddy mrioc->evtack_cmds[i].reply = NULL; 4235c1af985dSSreekanth Reddy } 4236c1af985dSSreekanth Reddy 4237e844adb1SKashyap Desai kfree(mrioc->removepend_bitmap); 4238e844adb1SKashyap Desai mrioc->removepend_bitmap = NULL; 4239e844adb1SKashyap Desai 4240e844adb1SKashyap Desai kfree(mrioc->devrem_bitmap); 4241e844adb1SKashyap Desai mrioc->devrem_bitmap = NULL; 4242e844adb1SKashyap Desai 4243c1af985dSSreekanth Reddy kfree(mrioc->evtack_cmds_bitmap); 4244c1af985dSSreekanth Reddy mrioc->evtack_cmds_bitmap = NULL; 4245c1af985dSSreekanth Reddy 4246824a1566SKashyap Desai kfree(mrioc->chain_bitmap); 4247824a1566SKashyap Desai mrioc->chain_bitmap = NULL; 4248824a1566SKashyap Desai 42492bd37e28SSreekanth Reddy kfree(mrioc->transport_cmds.reply); 42502bd37e28SSreekanth Reddy mrioc->transport_cmds.reply = NULL; 42512bd37e28SSreekanth Reddy 425213ef29eaSKashyap Desai for (i = 0; i < MPI3MR_NUM_DEVRMCMD; i++) { 425313ef29eaSKashyap Desai kfree(mrioc->dev_rmhs_cmds[i].reply); 425413ef29eaSKashyap Desai mrioc->dev_rmhs_cmds[i].reply = NULL; 425513ef29eaSKashyap Desai } 425613ef29eaSKashyap Desai 4257824a1566SKashyap Desai if (mrioc->chain_buf_pool) { 4258824a1566SKashyap Desai for (i = 0; i < mrioc->chain_buf_count; i++) { 4259824a1566SKashyap Desai if (mrioc->chain_sgl_list[i].addr) { 4260824a1566SKashyap Desai dma_pool_free(mrioc->chain_buf_pool, 4261824a1566SKashyap Desai mrioc->chain_sgl_list[i].addr, 4262824a1566SKashyap Desai mrioc->chain_sgl_list[i].dma_addr); 4263824a1566SKashyap Desai mrioc->chain_sgl_list[i].addr = NULL; 4264824a1566SKashyap Desai } 4265824a1566SKashyap Desai } 4266824a1566SKashyap Desai dma_pool_destroy(mrioc->chain_buf_pool); 4267824a1566SKashyap Desai mrioc->chain_buf_pool = NULL; 4268824a1566SKashyap Desai } 4269824a1566SKashyap Desai 4270824a1566SKashyap Desai kfree(mrioc->chain_sgl_list); 4271824a1566SKashyap Desai mrioc->chain_sgl_list = NULL; 4272824a1566SKashyap Desai 4273824a1566SKashyap Desai if (mrioc->admin_reply_base) { 4274824a1566SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, mrioc->admin_reply_q_sz, 4275824a1566SKashyap Desai mrioc->admin_reply_base, mrioc->admin_reply_dma); 4276824a1566SKashyap Desai mrioc->admin_reply_base = NULL; 4277824a1566SKashyap Desai } 4278824a1566SKashyap Desai if (mrioc->admin_req_base) { 4279824a1566SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, mrioc->admin_req_q_sz, 4280824a1566SKashyap Desai mrioc->admin_req_base, mrioc->admin_req_dma); 4281824a1566SKashyap Desai mrioc->admin_req_base = NULL; 4282824a1566SKashyap Desai } 428343ca1100SSumit Saxena 428443ca1100SSumit Saxena if (mrioc->pel_seqnum_virt) { 428543ca1100SSumit Saxena dma_free_coherent(&mrioc->pdev->dev, mrioc->pel_seqnum_sz, 428643ca1100SSumit Saxena mrioc->pel_seqnum_virt, mrioc->pel_seqnum_dma); 428743ca1100SSumit Saxena mrioc->pel_seqnum_virt = NULL; 428843ca1100SSumit Saxena } 428943ca1100SSumit Saxena 429043ca1100SSumit Saxena kfree(mrioc->logdata_buf); 429143ca1100SSumit Saxena mrioc->logdata_buf = NULL; 429243ca1100SSumit Saxena 4293824a1566SKashyap Desai } 4294824a1566SKashyap Desai 4295824a1566SKashyap Desai /** 4296824a1566SKashyap Desai * mpi3mr_issue_ioc_shutdown - shutdown controller 4297824a1566SKashyap Desai * @mrioc: Adapter instance reference 4298824a1566SKashyap Desai * 4299824a1566SKashyap Desai * Send shutodwn notification to the controller and wait for the 4300824a1566SKashyap Desai * shutdown_timeout for it to be completed. 4301824a1566SKashyap Desai * 4302824a1566SKashyap Desai * Return: Nothing. 4303824a1566SKashyap Desai */ 4304824a1566SKashyap Desai static void mpi3mr_issue_ioc_shutdown(struct mpi3mr_ioc *mrioc) 4305824a1566SKashyap Desai { 4306824a1566SKashyap Desai u32 ioc_config, ioc_status; 4307824a1566SKashyap Desai u8 retval = 1; 4308824a1566SKashyap Desai u32 timeout = MPI3MR_DEFAULT_SHUTDOWN_TIME * 10; 4309824a1566SKashyap Desai 4310824a1566SKashyap Desai ioc_info(mrioc, "Issuing shutdown Notification\n"); 4311824a1566SKashyap Desai if (mrioc->unrecoverable) { 4312824a1566SKashyap Desai ioc_warn(mrioc, 4313824a1566SKashyap Desai "IOC is unrecoverable shutdown is not issued\n"); 4314824a1566SKashyap Desai return; 4315824a1566SKashyap Desai } 4316824a1566SKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 4317824a1566SKashyap Desai if ((ioc_status & MPI3_SYSIF_IOC_STATUS_SHUTDOWN_MASK) 4318824a1566SKashyap Desai == MPI3_SYSIF_IOC_STATUS_SHUTDOWN_IN_PROGRESS) { 4319824a1566SKashyap Desai ioc_info(mrioc, "shutdown already in progress\n"); 4320824a1566SKashyap Desai return; 4321824a1566SKashyap Desai } 4322824a1566SKashyap Desai 4323824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 4324824a1566SKashyap Desai ioc_config |= MPI3_SYSIF_IOC_CONFIG_SHUTDOWN_NORMAL; 4325ec5ebd2cSSreekanth Reddy ioc_config |= MPI3_SYSIF_IOC_CONFIG_DEVICE_SHUTDOWN_SEND_REQ; 4326824a1566SKashyap Desai 4327824a1566SKashyap Desai writel(ioc_config, &mrioc->sysif_regs->ioc_configuration); 4328824a1566SKashyap Desai 4329824a1566SKashyap Desai if (mrioc->facts.shutdown_timeout) 4330824a1566SKashyap Desai timeout = mrioc->facts.shutdown_timeout * 10; 4331824a1566SKashyap Desai 4332824a1566SKashyap Desai do { 4333824a1566SKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 4334824a1566SKashyap Desai if ((ioc_status & MPI3_SYSIF_IOC_STATUS_SHUTDOWN_MASK) 4335824a1566SKashyap Desai == MPI3_SYSIF_IOC_STATUS_SHUTDOWN_COMPLETE) { 4336824a1566SKashyap Desai retval = 0; 4337824a1566SKashyap Desai break; 4338824a1566SKashyap Desai } 4339824a1566SKashyap Desai msleep(100); 4340824a1566SKashyap Desai } while (--timeout); 4341824a1566SKashyap Desai 4342824a1566SKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 4343824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 4344824a1566SKashyap Desai 4345824a1566SKashyap Desai if (retval) { 4346824a1566SKashyap Desai if ((ioc_status & MPI3_SYSIF_IOC_STATUS_SHUTDOWN_MASK) 4347824a1566SKashyap Desai == MPI3_SYSIF_IOC_STATUS_SHUTDOWN_IN_PROGRESS) 4348824a1566SKashyap Desai ioc_warn(mrioc, 4349824a1566SKashyap Desai "shutdown still in progress after timeout\n"); 4350824a1566SKashyap Desai } 4351824a1566SKashyap Desai 4352824a1566SKashyap Desai ioc_info(mrioc, 4353824a1566SKashyap Desai "Base IOC Sts/Config after %s shutdown is (0x%x)/(0x%x)\n", 4354824a1566SKashyap Desai (!retval) ? "successful" : "failed", ioc_status, 4355824a1566SKashyap Desai ioc_config); 4356824a1566SKashyap Desai } 4357824a1566SKashyap Desai 4358824a1566SKashyap Desai /** 4359824a1566SKashyap Desai * mpi3mr_cleanup_ioc - Cleanup controller 4360824a1566SKashyap Desai * @mrioc: Adapter instance reference 43613bb3c24eSYang Li * 4362824a1566SKashyap Desai * controller cleanup handler, Message unit reset or soft reset 4363fe6db615SSreekanth Reddy * and shutdown notification is issued to the controller. 4364824a1566SKashyap Desai * 4365824a1566SKashyap Desai * Return: Nothing. 4366824a1566SKashyap Desai */ 4367fe6db615SSreekanth Reddy void mpi3mr_cleanup_ioc(struct mpi3mr_ioc *mrioc) 4368824a1566SKashyap Desai { 4369824a1566SKashyap Desai enum mpi3mr_iocstate ioc_state; 4370824a1566SKashyap Desai 4371fe6db615SSreekanth Reddy dprint_exit(mrioc, "cleaning up the controller\n"); 4372824a1566SKashyap Desai mpi3mr_ioc_disable_intr(mrioc); 4373824a1566SKashyap Desai 4374824a1566SKashyap Desai ioc_state = mpi3mr_get_iocstate(mrioc); 4375824a1566SKashyap Desai 4376824a1566SKashyap Desai if ((!mrioc->unrecoverable) && (!mrioc->reset_in_progress) && 4377824a1566SKashyap Desai (ioc_state == MRIOC_STATE_READY)) { 4378824a1566SKashyap Desai if (mpi3mr_issue_and_process_mur(mrioc, 4379824a1566SKashyap Desai MPI3MR_RESET_FROM_CTLR_CLEANUP)) 4380824a1566SKashyap Desai mpi3mr_issue_reset(mrioc, 4381824a1566SKashyap Desai MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET, 4382824a1566SKashyap Desai MPI3MR_RESET_FROM_MUR_FAILURE); 4383824a1566SKashyap Desai mpi3mr_issue_ioc_shutdown(mrioc); 4384824a1566SKashyap Desai } 4385fe6db615SSreekanth Reddy dprint_exit(mrioc, "controller cleanup completed\n"); 4386fb9b0457SKashyap Desai } 4387fb9b0457SKashyap Desai 4388fb9b0457SKashyap Desai /** 4389fb9b0457SKashyap Desai * mpi3mr_drv_cmd_comp_reset - Flush a internal driver command 4390fb9b0457SKashyap Desai * @mrioc: Adapter instance reference 4391fb9b0457SKashyap Desai * @cmdptr: Internal command tracker 4392fb9b0457SKashyap Desai * 4393fb9b0457SKashyap Desai * Complete an internal driver commands with state indicating it 4394fb9b0457SKashyap Desai * is completed due to reset. 4395fb9b0457SKashyap Desai * 4396fb9b0457SKashyap Desai * Return: Nothing. 4397fb9b0457SKashyap Desai */ 4398fb9b0457SKashyap Desai static inline void mpi3mr_drv_cmd_comp_reset(struct mpi3mr_ioc *mrioc, 4399fb9b0457SKashyap Desai struct mpi3mr_drv_cmd *cmdptr) 4400fb9b0457SKashyap Desai { 4401fb9b0457SKashyap Desai if (cmdptr->state & MPI3MR_CMD_PENDING) { 4402fb9b0457SKashyap Desai cmdptr->state |= MPI3MR_CMD_RESET; 4403fb9b0457SKashyap Desai cmdptr->state &= ~MPI3MR_CMD_PENDING; 4404fb9b0457SKashyap Desai if (cmdptr->is_waiting) { 4405fb9b0457SKashyap Desai complete(&cmdptr->done); 4406fb9b0457SKashyap Desai cmdptr->is_waiting = 0; 4407fb9b0457SKashyap Desai } else if (cmdptr->callback) 4408fb9b0457SKashyap Desai cmdptr->callback(mrioc, cmdptr); 4409fb9b0457SKashyap Desai } 4410fb9b0457SKashyap Desai } 4411fb9b0457SKashyap Desai 4412fb9b0457SKashyap Desai /** 4413fb9b0457SKashyap Desai * mpi3mr_flush_drv_cmds - Flush internaldriver commands 4414fb9b0457SKashyap Desai * @mrioc: Adapter instance reference 4415fb9b0457SKashyap Desai * 4416fb9b0457SKashyap Desai * Flush all internal driver commands post reset 4417fb9b0457SKashyap Desai * 4418fb9b0457SKashyap Desai * Return: Nothing. 4419fb9b0457SKashyap Desai */ 4420fb9b0457SKashyap Desai static void mpi3mr_flush_drv_cmds(struct mpi3mr_ioc *mrioc) 4421fb9b0457SKashyap Desai { 4422fb9b0457SKashyap Desai struct mpi3mr_drv_cmd *cmdptr; 4423fb9b0457SKashyap Desai u8 i; 4424fb9b0457SKashyap Desai 4425fb9b0457SKashyap Desai cmdptr = &mrioc->init_cmds; 4426fb9b0457SKashyap Desai mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 442732d457d5SSreekanth Reddy 442832d457d5SSreekanth Reddy cmdptr = &mrioc->cfg_cmds; 442932d457d5SSreekanth Reddy mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 443032d457d5SSreekanth Reddy 4431f5e6d5a3SSumit Saxena cmdptr = &mrioc->bsg_cmds; 4432f5e6d5a3SSumit Saxena mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 4433e844adb1SKashyap Desai cmdptr = &mrioc->host_tm_cmds; 4434e844adb1SKashyap Desai mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 4435fb9b0457SKashyap Desai 4436fb9b0457SKashyap Desai for (i = 0; i < MPI3MR_NUM_DEVRMCMD; i++) { 4437fb9b0457SKashyap Desai cmdptr = &mrioc->dev_rmhs_cmds[i]; 4438fb9b0457SKashyap Desai mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 4439fb9b0457SKashyap Desai } 4440c1af985dSSreekanth Reddy 4441c1af985dSSreekanth Reddy for (i = 0; i < MPI3MR_NUM_EVTACKCMD; i++) { 4442c1af985dSSreekanth Reddy cmdptr = &mrioc->evtack_cmds[i]; 4443c1af985dSSreekanth Reddy mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 4444c1af985dSSreekanth Reddy } 444543ca1100SSumit Saxena 444643ca1100SSumit Saxena cmdptr = &mrioc->pel_cmds; 444743ca1100SSumit Saxena mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 444843ca1100SSumit Saxena 444943ca1100SSumit Saxena cmdptr = &mrioc->pel_abort_cmd; 445043ca1100SSumit Saxena mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 445143ca1100SSumit Saxena 44522bd37e28SSreekanth Reddy cmdptr = &mrioc->transport_cmds; 44532bd37e28SSreekanth Reddy mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 445443ca1100SSumit Saxena } 445543ca1100SSumit Saxena 445643ca1100SSumit Saxena /** 445743ca1100SSumit Saxena * mpi3mr_pel_wait_post - Issue PEL Wait 445843ca1100SSumit Saxena * @mrioc: Adapter instance reference 445943ca1100SSumit Saxena * @drv_cmd: Internal command tracker 446043ca1100SSumit Saxena * 446143ca1100SSumit Saxena * Issue PEL Wait MPI request through admin queue and return. 446243ca1100SSumit Saxena * 446343ca1100SSumit Saxena * Return: Nothing. 446443ca1100SSumit Saxena */ 446543ca1100SSumit Saxena static void mpi3mr_pel_wait_post(struct mpi3mr_ioc *mrioc, 446643ca1100SSumit Saxena struct mpi3mr_drv_cmd *drv_cmd) 446743ca1100SSumit Saxena { 446843ca1100SSumit Saxena struct mpi3_pel_req_action_wait pel_wait; 446943ca1100SSumit Saxena 447043ca1100SSumit Saxena mrioc->pel_abort_requested = false; 447143ca1100SSumit Saxena 447243ca1100SSumit Saxena memset(&pel_wait, 0, sizeof(pel_wait)); 447343ca1100SSumit Saxena drv_cmd->state = MPI3MR_CMD_PENDING; 447443ca1100SSumit Saxena drv_cmd->is_waiting = 0; 447543ca1100SSumit Saxena drv_cmd->callback = mpi3mr_pel_wait_complete; 447643ca1100SSumit Saxena drv_cmd->ioc_status = 0; 447743ca1100SSumit Saxena drv_cmd->ioc_loginfo = 0; 447843ca1100SSumit Saxena pel_wait.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_PEL_WAIT); 447943ca1100SSumit Saxena pel_wait.function = MPI3_FUNCTION_PERSISTENT_EVENT_LOG; 448043ca1100SSumit Saxena pel_wait.action = MPI3_PEL_ACTION_WAIT; 448143ca1100SSumit Saxena pel_wait.starting_sequence_number = cpu_to_le32(mrioc->pel_newest_seqnum); 448243ca1100SSumit Saxena pel_wait.locale = cpu_to_le16(mrioc->pel_locale); 448343ca1100SSumit Saxena pel_wait.class = cpu_to_le16(mrioc->pel_class); 448443ca1100SSumit Saxena pel_wait.wait_time = MPI3_PEL_WAITTIME_INFINITE_WAIT; 448543ca1100SSumit Saxena dprint_bsg_info(mrioc, "sending pel_wait seqnum(%d), class(%d), locale(0x%08x)\n", 448643ca1100SSumit Saxena mrioc->pel_newest_seqnum, mrioc->pel_class, mrioc->pel_locale); 448743ca1100SSumit Saxena 448843ca1100SSumit Saxena if (mpi3mr_admin_request_post(mrioc, &pel_wait, sizeof(pel_wait), 0)) { 448943ca1100SSumit Saxena dprint_bsg_err(mrioc, 449043ca1100SSumit Saxena "Issuing PELWait: Admin post failed\n"); 449143ca1100SSumit Saxena drv_cmd->state = MPI3MR_CMD_NOTUSED; 449243ca1100SSumit Saxena drv_cmd->callback = NULL; 449343ca1100SSumit Saxena drv_cmd->retry_count = 0; 449443ca1100SSumit Saxena mrioc->pel_enabled = false; 449543ca1100SSumit Saxena } 449643ca1100SSumit Saxena } 449743ca1100SSumit Saxena 449843ca1100SSumit Saxena /** 449943ca1100SSumit Saxena * mpi3mr_pel_get_seqnum_post - Issue PEL Get Sequence number 450043ca1100SSumit Saxena * @mrioc: Adapter instance reference 450143ca1100SSumit Saxena * @drv_cmd: Internal command tracker 450243ca1100SSumit Saxena * 450343ca1100SSumit Saxena * Issue PEL get sequence number MPI request through admin queue 450443ca1100SSumit Saxena * and return. 450543ca1100SSumit Saxena * 450643ca1100SSumit Saxena * Return: 0 on success, non-zero on failure. 450743ca1100SSumit Saxena */ 450843ca1100SSumit Saxena int mpi3mr_pel_get_seqnum_post(struct mpi3mr_ioc *mrioc, 450943ca1100SSumit Saxena struct mpi3mr_drv_cmd *drv_cmd) 451043ca1100SSumit Saxena { 451143ca1100SSumit Saxena struct mpi3_pel_req_action_get_sequence_numbers pel_getseq_req; 451243ca1100SSumit Saxena u8 sgl_flags = MPI3MR_SGEFLAGS_SYSTEM_SIMPLE_END_OF_LIST; 451343ca1100SSumit Saxena int retval = 0; 451443ca1100SSumit Saxena 451543ca1100SSumit Saxena memset(&pel_getseq_req, 0, sizeof(pel_getseq_req)); 451643ca1100SSumit Saxena mrioc->pel_cmds.state = MPI3MR_CMD_PENDING; 451743ca1100SSumit Saxena mrioc->pel_cmds.is_waiting = 0; 451843ca1100SSumit Saxena mrioc->pel_cmds.ioc_status = 0; 451943ca1100SSumit Saxena mrioc->pel_cmds.ioc_loginfo = 0; 452043ca1100SSumit Saxena mrioc->pel_cmds.callback = mpi3mr_pel_get_seqnum_complete; 452143ca1100SSumit Saxena pel_getseq_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_PEL_WAIT); 452243ca1100SSumit Saxena pel_getseq_req.function = MPI3_FUNCTION_PERSISTENT_EVENT_LOG; 452343ca1100SSumit Saxena pel_getseq_req.action = MPI3_PEL_ACTION_GET_SEQNUM; 452443ca1100SSumit Saxena mpi3mr_add_sg_single(&pel_getseq_req.sgl, sgl_flags, 452543ca1100SSumit Saxena mrioc->pel_seqnum_sz, mrioc->pel_seqnum_dma); 452643ca1100SSumit Saxena 452743ca1100SSumit Saxena retval = mpi3mr_admin_request_post(mrioc, &pel_getseq_req, 452843ca1100SSumit Saxena sizeof(pel_getseq_req), 0); 452943ca1100SSumit Saxena if (retval) { 453043ca1100SSumit Saxena if (drv_cmd) { 453143ca1100SSumit Saxena drv_cmd->state = MPI3MR_CMD_NOTUSED; 453243ca1100SSumit Saxena drv_cmd->callback = NULL; 453343ca1100SSumit Saxena drv_cmd->retry_count = 0; 453443ca1100SSumit Saxena } 453543ca1100SSumit Saxena mrioc->pel_enabled = false; 453643ca1100SSumit Saxena } 453743ca1100SSumit Saxena 453843ca1100SSumit Saxena return retval; 453943ca1100SSumit Saxena } 454043ca1100SSumit Saxena 454143ca1100SSumit Saxena /** 454243ca1100SSumit Saxena * mpi3mr_pel_wait_complete - PELWait Completion callback 454343ca1100SSumit Saxena * @mrioc: Adapter instance reference 454443ca1100SSumit Saxena * @drv_cmd: Internal command tracker 454543ca1100SSumit Saxena * 454643ca1100SSumit Saxena * This is a callback handler for the PELWait request and 454743ca1100SSumit Saxena * firmware completes a PELWait request when it is aborted or a 454843ca1100SSumit Saxena * new PEL entry is available. This sends AEN to the application 454943ca1100SSumit Saxena * and if the PELwait completion is not due to PELAbort then 455043ca1100SSumit Saxena * this will send a request for new PEL Sequence number 455143ca1100SSumit Saxena * 455243ca1100SSumit Saxena * Return: Nothing. 455343ca1100SSumit Saxena */ 455443ca1100SSumit Saxena static void mpi3mr_pel_wait_complete(struct mpi3mr_ioc *mrioc, 455543ca1100SSumit Saxena struct mpi3mr_drv_cmd *drv_cmd) 455643ca1100SSumit Saxena { 455743ca1100SSumit Saxena struct mpi3_pel_reply *pel_reply = NULL; 455843ca1100SSumit Saxena u16 ioc_status, pe_log_status; 455943ca1100SSumit Saxena bool do_retry = false; 456043ca1100SSumit Saxena 456143ca1100SSumit Saxena if (drv_cmd->state & MPI3MR_CMD_RESET) 456243ca1100SSumit Saxena goto cleanup_drv_cmd; 456343ca1100SSumit Saxena 456443ca1100SSumit Saxena ioc_status = drv_cmd->ioc_status & MPI3_IOCSTATUS_STATUS_MASK; 456543ca1100SSumit Saxena if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 456643ca1100SSumit Saxena ioc_err(mrioc, "%s: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 456743ca1100SSumit Saxena __func__, ioc_status, drv_cmd->ioc_loginfo); 456843ca1100SSumit Saxena dprint_bsg_err(mrioc, 456943ca1100SSumit Saxena "pel_wait: failed with ioc_status(0x%04x), log_info(0x%08x)\n", 457043ca1100SSumit Saxena ioc_status, drv_cmd->ioc_loginfo); 457143ca1100SSumit Saxena do_retry = true; 457243ca1100SSumit Saxena } 457343ca1100SSumit Saxena 457443ca1100SSumit Saxena if (drv_cmd->state & MPI3MR_CMD_REPLY_VALID) 457543ca1100SSumit Saxena pel_reply = (struct mpi3_pel_reply *)drv_cmd->reply; 457643ca1100SSumit Saxena 457743ca1100SSumit Saxena if (!pel_reply) { 457843ca1100SSumit Saxena dprint_bsg_err(mrioc, 457943ca1100SSumit Saxena "pel_wait: failed due to no reply\n"); 458043ca1100SSumit Saxena goto out_failed; 458143ca1100SSumit Saxena } 458243ca1100SSumit Saxena 458343ca1100SSumit Saxena pe_log_status = le16_to_cpu(pel_reply->pe_log_status); 458443ca1100SSumit Saxena if ((pe_log_status != MPI3_PEL_STATUS_SUCCESS) && 458543ca1100SSumit Saxena (pe_log_status != MPI3_PEL_STATUS_ABORTED)) { 458643ca1100SSumit Saxena ioc_err(mrioc, "%s: Failed pe_log_status(0x%04x)\n", 458743ca1100SSumit Saxena __func__, pe_log_status); 458843ca1100SSumit Saxena dprint_bsg_err(mrioc, 458943ca1100SSumit Saxena "pel_wait: failed due to pel_log_status(0x%04x)\n", 459043ca1100SSumit Saxena pe_log_status); 459143ca1100SSumit Saxena do_retry = true; 459243ca1100SSumit Saxena } 459343ca1100SSumit Saxena 459443ca1100SSumit Saxena if (do_retry) { 459543ca1100SSumit Saxena if (drv_cmd->retry_count < MPI3MR_PEL_RETRY_COUNT) { 459643ca1100SSumit Saxena drv_cmd->retry_count++; 459743ca1100SSumit Saxena dprint_bsg_err(mrioc, "pel_wait: retrying(%d)\n", 459843ca1100SSumit Saxena drv_cmd->retry_count); 459943ca1100SSumit Saxena mpi3mr_pel_wait_post(mrioc, drv_cmd); 460043ca1100SSumit Saxena return; 460143ca1100SSumit Saxena } 460243ca1100SSumit Saxena dprint_bsg_err(mrioc, 460343ca1100SSumit Saxena "pel_wait: failed after all retries(%d)\n", 460443ca1100SSumit Saxena drv_cmd->retry_count); 460543ca1100SSumit Saxena goto out_failed; 460643ca1100SSumit Saxena } 460743ca1100SSumit Saxena atomic64_inc(&event_counter); 460843ca1100SSumit Saxena if (!mrioc->pel_abort_requested) { 460943ca1100SSumit Saxena mrioc->pel_cmds.retry_count = 0; 461043ca1100SSumit Saxena mpi3mr_pel_get_seqnum_post(mrioc, &mrioc->pel_cmds); 461143ca1100SSumit Saxena } 461243ca1100SSumit Saxena 461343ca1100SSumit Saxena return; 461443ca1100SSumit Saxena out_failed: 461543ca1100SSumit Saxena mrioc->pel_enabled = false; 461643ca1100SSumit Saxena cleanup_drv_cmd: 461743ca1100SSumit Saxena drv_cmd->state = MPI3MR_CMD_NOTUSED; 461843ca1100SSumit Saxena drv_cmd->callback = NULL; 461943ca1100SSumit Saxena drv_cmd->retry_count = 0; 462043ca1100SSumit Saxena } 462143ca1100SSumit Saxena 462243ca1100SSumit Saxena /** 462343ca1100SSumit Saxena * mpi3mr_pel_get_seqnum_complete - PELGetSeqNum Completion callback 462443ca1100SSumit Saxena * @mrioc: Adapter instance reference 462543ca1100SSumit Saxena * @drv_cmd: Internal command tracker 462643ca1100SSumit Saxena * 462743ca1100SSumit Saxena * This is a callback handler for the PEL get sequence number 462843ca1100SSumit Saxena * request and a new PEL wait request will be issued to the 462943ca1100SSumit Saxena * firmware from this 463043ca1100SSumit Saxena * 463143ca1100SSumit Saxena * Return: Nothing. 463243ca1100SSumit Saxena */ 463343ca1100SSumit Saxena void mpi3mr_pel_get_seqnum_complete(struct mpi3mr_ioc *mrioc, 463443ca1100SSumit Saxena struct mpi3mr_drv_cmd *drv_cmd) 463543ca1100SSumit Saxena { 463643ca1100SSumit Saxena struct mpi3_pel_reply *pel_reply = NULL; 463743ca1100SSumit Saxena struct mpi3_pel_seq *pel_seqnum_virt; 463843ca1100SSumit Saxena u16 ioc_status; 463943ca1100SSumit Saxena bool do_retry = false; 464043ca1100SSumit Saxena 464143ca1100SSumit Saxena pel_seqnum_virt = (struct mpi3_pel_seq *)mrioc->pel_seqnum_virt; 464243ca1100SSumit Saxena 464343ca1100SSumit Saxena if (drv_cmd->state & MPI3MR_CMD_RESET) 464443ca1100SSumit Saxena goto cleanup_drv_cmd; 464543ca1100SSumit Saxena 464643ca1100SSumit Saxena ioc_status = drv_cmd->ioc_status & MPI3_IOCSTATUS_STATUS_MASK; 464743ca1100SSumit Saxena if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 464843ca1100SSumit Saxena dprint_bsg_err(mrioc, 464943ca1100SSumit Saxena "pel_get_seqnum: failed with ioc_status(0x%04x), log_info(0x%08x)\n", 465043ca1100SSumit Saxena ioc_status, drv_cmd->ioc_loginfo); 465143ca1100SSumit Saxena do_retry = true; 465243ca1100SSumit Saxena } 465343ca1100SSumit Saxena 465443ca1100SSumit Saxena if (drv_cmd->state & MPI3MR_CMD_REPLY_VALID) 465543ca1100SSumit Saxena pel_reply = (struct mpi3_pel_reply *)drv_cmd->reply; 465643ca1100SSumit Saxena if (!pel_reply) { 465743ca1100SSumit Saxena dprint_bsg_err(mrioc, 465843ca1100SSumit Saxena "pel_get_seqnum: failed due to no reply\n"); 465943ca1100SSumit Saxena goto out_failed; 466043ca1100SSumit Saxena } 466143ca1100SSumit Saxena 466243ca1100SSumit Saxena if (le16_to_cpu(pel_reply->pe_log_status) != MPI3_PEL_STATUS_SUCCESS) { 466343ca1100SSumit Saxena dprint_bsg_err(mrioc, 466443ca1100SSumit Saxena "pel_get_seqnum: failed due to pel_log_status(0x%04x)\n", 466543ca1100SSumit Saxena le16_to_cpu(pel_reply->pe_log_status)); 466643ca1100SSumit Saxena do_retry = true; 466743ca1100SSumit Saxena } 466843ca1100SSumit Saxena 466943ca1100SSumit Saxena if (do_retry) { 467043ca1100SSumit Saxena if (drv_cmd->retry_count < MPI3MR_PEL_RETRY_COUNT) { 467143ca1100SSumit Saxena drv_cmd->retry_count++; 467243ca1100SSumit Saxena dprint_bsg_err(mrioc, 467343ca1100SSumit Saxena "pel_get_seqnum: retrying(%d)\n", 467443ca1100SSumit Saxena drv_cmd->retry_count); 467543ca1100SSumit Saxena mpi3mr_pel_get_seqnum_post(mrioc, drv_cmd); 467643ca1100SSumit Saxena return; 467743ca1100SSumit Saxena } 467843ca1100SSumit Saxena 467943ca1100SSumit Saxena dprint_bsg_err(mrioc, 468043ca1100SSumit Saxena "pel_get_seqnum: failed after all retries(%d)\n", 468143ca1100SSumit Saxena drv_cmd->retry_count); 468243ca1100SSumit Saxena goto out_failed; 468343ca1100SSumit Saxena } 468443ca1100SSumit Saxena mrioc->pel_newest_seqnum = le32_to_cpu(pel_seqnum_virt->newest) + 1; 468543ca1100SSumit Saxena drv_cmd->retry_count = 0; 468643ca1100SSumit Saxena mpi3mr_pel_wait_post(mrioc, drv_cmd); 468743ca1100SSumit Saxena 468843ca1100SSumit Saxena return; 468943ca1100SSumit Saxena out_failed: 469043ca1100SSumit Saxena mrioc->pel_enabled = false; 469143ca1100SSumit Saxena cleanup_drv_cmd: 469243ca1100SSumit Saxena drv_cmd->state = MPI3MR_CMD_NOTUSED; 469343ca1100SSumit Saxena drv_cmd->callback = NULL; 469443ca1100SSumit Saxena drv_cmd->retry_count = 0; 4695fb9b0457SKashyap Desai } 4696fb9b0457SKashyap Desai 4697fb9b0457SKashyap Desai /** 4698824a1566SKashyap Desai * mpi3mr_soft_reset_handler - Reset the controller 4699824a1566SKashyap Desai * @mrioc: Adapter instance reference 4700824a1566SKashyap Desai * @reset_reason: Reset reason code 4701824a1566SKashyap Desai * @snapdump: Flag to generate snapdump in firmware or not 4702824a1566SKashyap Desai * 4703fb9b0457SKashyap Desai * This is an handler for recovering controller by issuing soft 4704fb9b0457SKashyap Desai * reset are diag fault reset. This is a blocking function and 4705fb9b0457SKashyap Desai * when one reset is executed if any other resets they will be 4706f5e6d5a3SSumit Saxena * blocked. All BSG requests will be blocked during the reset. If 4707fb9b0457SKashyap Desai * controller reset is successful then the controller will be 4708fb9b0457SKashyap Desai * reinitalized, otherwise the controller will be marked as not 4709fb9b0457SKashyap Desai * recoverable 4710fb9b0457SKashyap Desai * 4711fb9b0457SKashyap Desai * In snapdump bit is set, the controller is issued with diag 4712fb9b0457SKashyap Desai * fault reset so that the firmware can create a snap dump and 4713fb9b0457SKashyap Desai * post that the firmware will result in F000 fault and the 4714fb9b0457SKashyap Desai * driver will issue soft reset to recover from that. 4715824a1566SKashyap Desai * 4716824a1566SKashyap Desai * Return: 0 on success, non-zero on failure. 4717824a1566SKashyap Desai */ 4718824a1566SKashyap Desai int mpi3mr_soft_reset_handler(struct mpi3mr_ioc *mrioc, 4719824a1566SKashyap Desai u32 reset_reason, u8 snapdump) 4720824a1566SKashyap Desai { 4721fb9b0457SKashyap Desai int retval = 0, i; 4722fb9b0457SKashyap Desai unsigned long flags; 4723fb9b0457SKashyap Desai u32 host_diagnostic, timeout = MPI3_SYSIF_DIAG_SAVE_TIMEOUT * 10; 4724fb9b0457SKashyap Desai 4725b64845a7SSreekanth Reddy /* Block the reset handler until diag save in progress*/ 4726b64845a7SSreekanth Reddy dprint_reset(mrioc, 4727b64845a7SSreekanth Reddy "soft_reset_handler: check and block on diagsave_timeout(%d)\n", 4728b64845a7SSreekanth Reddy mrioc->diagsave_timeout); 4729b64845a7SSreekanth Reddy while (mrioc->diagsave_timeout) 4730b64845a7SSreekanth Reddy ssleep(1); 4731fb9b0457SKashyap Desai /* 4732fb9b0457SKashyap Desai * Block new resets until the currently executing one is finished and 4733fb9b0457SKashyap Desai * return the status of the existing reset for all blocked resets 4734fb9b0457SKashyap Desai */ 4735b64845a7SSreekanth Reddy dprint_reset(mrioc, "soft_reset_handler: acquiring reset_mutex\n"); 4736fb9b0457SKashyap Desai if (!mutex_trylock(&mrioc->reset_mutex)) { 4737b64845a7SSreekanth Reddy ioc_info(mrioc, 4738b64845a7SSreekanth Reddy "controller reset triggered by %s is blocked due to another reset in progress\n", 4739b64845a7SSreekanth Reddy mpi3mr_reset_rc_name(reset_reason)); 4740b64845a7SSreekanth Reddy do { 4741b64845a7SSreekanth Reddy ssleep(1); 4742b64845a7SSreekanth Reddy } while (mrioc->reset_in_progress == 1); 4743b64845a7SSreekanth Reddy ioc_info(mrioc, 4744b64845a7SSreekanth Reddy "returning previous reset result(%d) for the reset triggered by %s\n", 4745b64845a7SSreekanth Reddy mrioc->prev_reset_result, 4746b64845a7SSreekanth Reddy mpi3mr_reset_rc_name(reset_reason)); 4747b64845a7SSreekanth Reddy return mrioc->prev_reset_result; 4748fb9b0457SKashyap Desai } 4749b64845a7SSreekanth Reddy ioc_info(mrioc, "controller reset is triggered by %s\n", 4750b64845a7SSreekanth Reddy mpi3mr_reset_rc_name(reset_reason)); 4751b64845a7SSreekanth Reddy 47522745ce0eSSreekanth Reddy mrioc->device_refresh_on = 0; 4753fb9b0457SKashyap Desai mrioc->reset_in_progress = 1; 4754f5e6d5a3SSumit Saxena mrioc->stop_bsgs = 1; 4755b64845a7SSreekanth Reddy mrioc->prev_reset_result = -1; 4756fb9b0457SKashyap Desai 4757fb9b0457SKashyap Desai if ((!snapdump) && (reset_reason != MPI3MR_RESET_FROM_FAULT_WATCH) && 4758b64845a7SSreekanth Reddy (reset_reason != MPI3MR_RESET_FROM_FIRMWARE) && 4759fb9b0457SKashyap Desai (reset_reason != MPI3MR_RESET_FROM_CIACTIV_FAULT)) { 4760fb9b0457SKashyap Desai for (i = 0; i < MPI3_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 4761fb9b0457SKashyap Desai mrioc->event_masks[i] = -1; 4762fb9b0457SKashyap Desai 4763b64845a7SSreekanth Reddy dprint_reset(mrioc, "soft_reset_handler: masking events\n"); 4764b64845a7SSreekanth Reddy mpi3mr_issue_event_notification(mrioc); 4765fb9b0457SKashyap Desai } 4766fb9b0457SKashyap Desai 476744dc724fSKashyap Desai mpi3mr_wait_for_host_io(mrioc, MPI3MR_RESET_HOST_IOWAIT_TIMEOUT); 476844dc724fSKashyap Desai 4769fb9b0457SKashyap Desai mpi3mr_ioc_disable_intr(mrioc); 4770fb9b0457SKashyap Desai 4771fb9b0457SKashyap Desai if (snapdump) { 4772fb9b0457SKashyap Desai mpi3mr_set_diagsave(mrioc); 4773fb9b0457SKashyap Desai retval = mpi3mr_issue_reset(mrioc, 4774fb9b0457SKashyap Desai MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, reset_reason); 4775fb9b0457SKashyap Desai if (!retval) { 4776fb9b0457SKashyap Desai do { 4777fb9b0457SKashyap Desai host_diagnostic = 4778fb9b0457SKashyap Desai readl(&mrioc->sysif_regs->host_diagnostic); 4779fb9b0457SKashyap Desai if (!(host_diagnostic & 4780fb9b0457SKashyap Desai MPI3_SYSIF_HOST_DIAG_SAVE_IN_PROGRESS)) 4781fb9b0457SKashyap Desai break; 4782fb9b0457SKashyap Desai msleep(100); 4783fb9b0457SKashyap Desai } while (--timeout); 4784fb9b0457SKashyap Desai } 4785fb9b0457SKashyap Desai } 4786fb9b0457SKashyap Desai 4787fb9b0457SKashyap Desai retval = mpi3mr_issue_reset(mrioc, 4788fb9b0457SKashyap Desai MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET, reset_reason); 4789fb9b0457SKashyap Desai if (retval) { 4790fb9b0457SKashyap Desai ioc_err(mrioc, "Failed to issue soft reset to the ioc\n"); 4791fb9b0457SKashyap Desai goto out; 4792fb9b0457SKashyap Desai } 4793f10af057SSreekanth Reddy if (mrioc->num_io_throttle_group != 4794f10af057SSreekanth Reddy mrioc->facts.max_io_throttle_group) { 4795f10af057SSreekanth Reddy ioc_err(mrioc, 4796f10af057SSreekanth Reddy "max io throttle group doesn't match old(%d), new(%d)\n", 4797f10af057SSreekanth Reddy mrioc->num_io_throttle_group, 4798f10af057SSreekanth Reddy mrioc->facts.max_io_throttle_group); 47992a8a0147SDan Carpenter retval = -EPERM; 48002a8a0147SDan Carpenter goto out; 4801f10af057SSreekanth Reddy } 4802fb9b0457SKashyap Desai 4803c1af985dSSreekanth Reddy mpi3mr_flush_delayed_cmd_lists(mrioc); 4804fb9b0457SKashyap Desai mpi3mr_flush_drv_cmds(mrioc); 4805fb9b0457SKashyap Desai memset(mrioc->devrem_bitmap, 0, mrioc->devrem_bitmap_sz); 4806fb9b0457SKashyap Desai memset(mrioc->removepend_bitmap, 0, mrioc->dev_handle_bitmap_sz); 4807c1af985dSSreekanth Reddy memset(mrioc->evtack_cmds_bitmap, 0, mrioc->evtack_cmds_bitmap_sz); 4808fb9b0457SKashyap Desai mpi3mr_flush_host_io(mrioc); 4809580e6742SSreekanth Reddy mpi3mr_cleanup_fwevt_list(mrioc); 4810fb9b0457SKashyap Desai mpi3mr_invalidate_devhandles(mrioc); 481178b76a07SSreekanth Reddy if (mrioc->prepare_for_reset) { 481278b76a07SSreekanth Reddy mrioc->prepare_for_reset = 0; 481378b76a07SSreekanth Reddy mrioc->prepare_for_reset_timeout_counter = 0; 481478b76a07SSreekanth Reddy } 4815fb9b0457SKashyap Desai mpi3mr_memset_buffers(mrioc); 4816fe6db615SSreekanth Reddy retval = mpi3mr_reinit_ioc(mrioc, 0); 4817fb9b0457SKashyap Desai if (retval) { 4818fb9b0457SKashyap Desai pr_err(IOCNAME "reinit after soft reset failed: reason %d\n", 4819fb9b0457SKashyap Desai mrioc->name, reset_reason); 4820fb9b0457SKashyap Desai goto out; 4821fb9b0457SKashyap Desai } 4822fb9b0457SKashyap Desai ssleep(10); 4823fb9b0457SKashyap Desai 4824fb9b0457SKashyap Desai out: 4825fb9b0457SKashyap Desai if (!retval) { 4826b64845a7SSreekanth Reddy mrioc->diagsave_timeout = 0; 4827fb9b0457SKashyap Desai mrioc->reset_in_progress = 0; 482843ca1100SSumit Saxena mrioc->pel_abort_requested = 0; 482943ca1100SSumit Saxena if (mrioc->pel_enabled) { 483043ca1100SSumit Saxena mrioc->pel_cmds.retry_count = 0; 483143ca1100SSumit Saxena mpi3mr_pel_wait_post(mrioc, &mrioc->pel_cmds); 483243ca1100SSumit Saxena } 483343ca1100SSumit Saxena 48342745ce0eSSreekanth Reddy mrioc->device_refresh_on = 0; 48352745ce0eSSreekanth Reddy 483654dfcffbSKashyap Desai mrioc->ts_update_counter = 0; 4837fb9b0457SKashyap Desai spin_lock_irqsave(&mrioc->watchdog_lock, flags); 4838fb9b0457SKashyap Desai if (mrioc->watchdog_work_q) 4839fb9b0457SKashyap Desai queue_delayed_work(mrioc->watchdog_work_q, 4840fb9b0457SKashyap Desai &mrioc->watchdog_work, 4841fb9b0457SKashyap Desai msecs_to_jiffies(MPI3MR_WATCHDOG_INTERVAL)); 4842fb9b0457SKashyap Desai spin_unlock_irqrestore(&mrioc->watchdog_lock, flags); 4843f5e6d5a3SSumit Saxena mrioc->stop_bsgs = 0; 484443ca1100SSumit Saxena if (mrioc->pel_enabled) 484543ca1100SSumit Saxena atomic64_inc(&event_counter); 4846fb9b0457SKashyap Desai } else { 4847fb9b0457SKashyap Desai mpi3mr_issue_reset(mrioc, 4848fb9b0457SKashyap Desai MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, reset_reason); 48492745ce0eSSreekanth Reddy mrioc->device_refresh_on = 0; 4850fb9b0457SKashyap Desai mrioc->unrecoverable = 1; 4851fb9b0457SKashyap Desai mrioc->reset_in_progress = 0; 4852fb9b0457SKashyap Desai retval = -1; 4853fb9b0457SKashyap Desai } 4854b64845a7SSreekanth Reddy mrioc->prev_reset_result = retval; 4855fb9b0457SKashyap Desai mutex_unlock(&mrioc->reset_mutex); 4856b64845a7SSreekanth Reddy ioc_info(mrioc, "controller reset is %s\n", 4857b64845a7SSreekanth Reddy ((retval == 0) ? "successful" : "failed")); 4858fb9b0457SKashyap Desai return retval; 4859824a1566SKashyap Desai } 486032d457d5SSreekanth Reddy 486132d457d5SSreekanth Reddy 486232d457d5SSreekanth Reddy /** 486332d457d5SSreekanth Reddy * mpi3mr_free_config_dma_memory - free memory for config page 486432d457d5SSreekanth Reddy * @mrioc: Adapter instance reference 486532d457d5SSreekanth Reddy * @mem_desc: memory descriptor structure 486632d457d5SSreekanth Reddy * 486732d457d5SSreekanth Reddy * Check whether the size of the buffer specified by the memory 486832d457d5SSreekanth Reddy * descriptor is greater than the default page size if so then 486932d457d5SSreekanth Reddy * free the memory pointed by the descriptor. 487032d457d5SSreekanth Reddy * 487132d457d5SSreekanth Reddy * Return: Nothing. 487232d457d5SSreekanth Reddy */ 487332d457d5SSreekanth Reddy static void mpi3mr_free_config_dma_memory(struct mpi3mr_ioc *mrioc, 487432d457d5SSreekanth Reddy struct dma_memory_desc *mem_desc) 487532d457d5SSreekanth Reddy { 487632d457d5SSreekanth Reddy if ((mem_desc->size > mrioc->cfg_page_sz) && mem_desc->addr) { 487732d457d5SSreekanth Reddy dma_free_coherent(&mrioc->pdev->dev, mem_desc->size, 487832d457d5SSreekanth Reddy mem_desc->addr, mem_desc->dma_addr); 487932d457d5SSreekanth Reddy mem_desc->addr = NULL; 488032d457d5SSreekanth Reddy } 488132d457d5SSreekanth Reddy } 488232d457d5SSreekanth Reddy 488332d457d5SSreekanth Reddy /** 488432d457d5SSreekanth Reddy * mpi3mr_alloc_config_dma_memory - Alloc memory for config page 488532d457d5SSreekanth Reddy * @mrioc: Adapter instance reference 488632d457d5SSreekanth Reddy * @mem_desc: Memory descriptor to hold dma memory info 488732d457d5SSreekanth Reddy * 488832d457d5SSreekanth Reddy * This function allocates new dmaable memory or provides the 488932d457d5SSreekanth Reddy * default config page dmaable memory based on the memory size 489032d457d5SSreekanth Reddy * described by the descriptor. 489132d457d5SSreekanth Reddy * 489232d457d5SSreekanth Reddy * Return: 0 on success, non-zero on failure. 489332d457d5SSreekanth Reddy */ 489432d457d5SSreekanth Reddy static int mpi3mr_alloc_config_dma_memory(struct mpi3mr_ioc *mrioc, 489532d457d5SSreekanth Reddy struct dma_memory_desc *mem_desc) 489632d457d5SSreekanth Reddy { 489732d457d5SSreekanth Reddy if (mem_desc->size > mrioc->cfg_page_sz) { 489832d457d5SSreekanth Reddy mem_desc->addr = dma_alloc_coherent(&mrioc->pdev->dev, 489932d457d5SSreekanth Reddy mem_desc->size, &mem_desc->dma_addr, GFP_KERNEL); 490032d457d5SSreekanth Reddy if (!mem_desc->addr) 490132d457d5SSreekanth Reddy return -ENOMEM; 490232d457d5SSreekanth Reddy } else { 490332d457d5SSreekanth Reddy mem_desc->addr = mrioc->cfg_page; 490432d457d5SSreekanth Reddy mem_desc->dma_addr = mrioc->cfg_page_dma; 490532d457d5SSreekanth Reddy memset(mem_desc->addr, 0, mrioc->cfg_page_sz); 490632d457d5SSreekanth Reddy } 490732d457d5SSreekanth Reddy return 0; 490832d457d5SSreekanth Reddy } 490932d457d5SSreekanth Reddy 491032d457d5SSreekanth Reddy /** 491132d457d5SSreekanth Reddy * mpi3mr_post_cfg_req - Issue config requests and wait 491232d457d5SSreekanth Reddy * @mrioc: Adapter instance reference 491332d457d5SSreekanth Reddy * @cfg_req: Configuration request 491432d457d5SSreekanth Reddy * @timeout: Timeout in seconds 491532d457d5SSreekanth Reddy * @ioc_status: Pointer to return ioc status 491632d457d5SSreekanth Reddy * 491732d457d5SSreekanth Reddy * A generic function for posting MPI3 configuration request to 491832d457d5SSreekanth Reddy * the firmware. This blocks for the completion of request for 491932d457d5SSreekanth Reddy * timeout seconds and if the request times out this function 492032d457d5SSreekanth Reddy * faults the controller with proper reason code. 492132d457d5SSreekanth Reddy * 492232d457d5SSreekanth Reddy * On successful completion of the request this function returns 492332d457d5SSreekanth Reddy * appropriate ioc status from the firmware back to the caller. 492432d457d5SSreekanth Reddy * 492532d457d5SSreekanth Reddy * Return: 0 on success, non-zero on failure. 492632d457d5SSreekanth Reddy */ 492732d457d5SSreekanth Reddy static int mpi3mr_post_cfg_req(struct mpi3mr_ioc *mrioc, 492832d457d5SSreekanth Reddy struct mpi3_config_request *cfg_req, int timeout, u16 *ioc_status) 492932d457d5SSreekanth Reddy { 493032d457d5SSreekanth Reddy int retval = 0; 493132d457d5SSreekanth Reddy 493232d457d5SSreekanth Reddy mutex_lock(&mrioc->cfg_cmds.mutex); 493332d457d5SSreekanth Reddy if (mrioc->cfg_cmds.state & MPI3MR_CMD_PENDING) { 493432d457d5SSreekanth Reddy retval = -1; 493532d457d5SSreekanth Reddy ioc_err(mrioc, "sending config request failed due to command in use\n"); 493632d457d5SSreekanth Reddy mutex_unlock(&mrioc->cfg_cmds.mutex); 493732d457d5SSreekanth Reddy goto out; 493832d457d5SSreekanth Reddy } 493932d457d5SSreekanth Reddy mrioc->cfg_cmds.state = MPI3MR_CMD_PENDING; 494032d457d5SSreekanth Reddy mrioc->cfg_cmds.is_waiting = 1; 494132d457d5SSreekanth Reddy mrioc->cfg_cmds.callback = NULL; 494232d457d5SSreekanth Reddy mrioc->cfg_cmds.ioc_status = 0; 494332d457d5SSreekanth Reddy mrioc->cfg_cmds.ioc_loginfo = 0; 494432d457d5SSreekanth Reddy 494532d457d5SSreekanth Reddy cfg_req->host_tag = cpu_to_le16(MPI3MR_HOSTTAG_CFG_CMDS); 494632d457d5SSreekanth Reddy cfg_req->function = MPI3_FUNCTION_CONFIG; 494732d457d5SSreekanth Reddy 494832d457d5SSreekanth Reddy init_completion(&mrioc->cfg_cmds.done); 494932d457d5SSreekanth Reddy dprint_cfg_info(mrioc, "posting config request\n"); 495032d457d5SSreekanth Reddy if (mrioc->logging_level & MPI3_DEBUG_CFG_INFO) 495132d457d5SSreekanth Reddy dprint_dump(cfg_req, sizeof(struct mpi3_config_request), 495232d457d5SSreekanth Reddy "mpi3_cfg_req"); 495332d457d5SSreekanth Reddy retval = mpi3mr_admin_request_post(mrioc, cfg_req, sizeof(*cfg_req), 1); 495432d457d5SSreekanth Reddy if (retval) { 495532d457d5SSreekanth Reddy ioc_err(mrioc, "posting config request failed\n"); 495632d457d5SSreekanth Reddy goto out_unlock; 495732d457d5SSreekanth Reddy } 495832d457d5SSreekanth Reddy wait_for_completion_timeout(&mrioc->cfg_cmds.done, (timeout * HZ)); 495932d457d5SSreekanth Reddy if (!(mrioc->cfg_cmds.state & MPI3MR_CMD_COMPLETE)) { 496032d457d5SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 496132d457d5SSreekanth Reddy MPI3MR_RESET_FROM_CFG_REQ_TIMEOUT); 496232d457d5SSreekanth Reddy ioc_err(mrioc, "config request timed out\n"); 496332d457d5SSreekanth Reddy retval = -1; 496432d457d5SSreekanth Reddy goto out_unlock; 496532d457d5SSreekanth Reddy } 496632d457d5SSreekanth Reddy *ioc_status = mrioc->cfg_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK; 496732d457d5SSreekanth Reddy if ((*ioc_status) != MPI3_IOCSTATUS_SUCCESS) 496832d457d5SSreekanth Reddy dprint_cfg_err(mrioc, 496932d457d5SSreekanth Reddy "cfg_page request returned with ioc_status(0x%04x), log_info(0x%08x)\n", 497032d457d5SSreekanth Reddy *ioc_status, mrioc->cfg_cmds.ioc_loginfo); 497132d457d5SSreekanth Reddy 497232d457d5SSreekanth Reddy out_unlock: 497332d457d5SSreekanth Reddy mrioc->cfg_cmds.state = MPI3MR_CMD_NOTUSED; 497432d457d5SSreekanth Reddy mutex_unlock(&mrioc->cfg_cmds.mutex); 497532d457d5SSreekanth Reddy 497632d457d5SSreekanth Reddy out: 497732d457d5SSreekanth Reddy return retval; 497832d457d5SSreekanth Reddy } 497932d457d5SSreekanth Reddy 498032d457d5SSreekanth Reddy /** 498132d457d5SSreekanth Reddy * mpi3mr_process_cfg_req - config page request processor 498232d457d5SSreekanth Reddy * @mrioc: Adapter instance reference 498332d457d5SSreekanth Reddy * @cfg_req: Configuration request 498432d457d5SSreekanth Reddy * @cfg_hdr: Configuration page header 498532d457d5SSreekanth Reddy * @timeout: Timeout in seconds 498632d457d5SSreekanth Reddy * @ioc_status: Pointer to return ioc status 498732d457d5SSreekanth Reddy * @cfg_buf: Memory pointer to copy config page or header 498832d457d5SSreekanth Reddy * @cfg_buf_sz: Size of the memory to get config page or header 498932d457d5SSreekanth Reddy * 499032d457d5SSreekanth Reddy * This is handler for config page read, write and config page 499132d457d5SSreekanth Reddy * header read operations. 499232d457d5SSreekanth Reddy * 499332d457d5SSreekanth Reddy * This function expects the cfg_req to be populated with page 499432d457d5SSreekanth Reddy * type, page number, action for the header read and with page 499532d457d5SSreekanth Reddy * address for all other operations. 499632d457d5SSreekanth Reddy * 499732d457d5SSreekanth Reddy * The cfg_hdr can be passed as null for reading required header 499832d457d5SSreekanth Reddy * details for read/write pages the cfg_hdr should point valid 499932d457d5SSreekanth Reddy * configuration page header. 500032d457d5SSreekanth Reddy * 500132d457d5SSreekanth Reddy * This allocates dmaable memory based on the size of the config 500232d457d5SSreekanth Reddy * buffer and set the SGE of the cfg_req. 500332d457d5SSreekanth Reddy * 500432d457d5SSreekanth Reddy * For write actions, the config page data has to be passed in 500532d457d5SSreekanth Reddy * the cfg_buf and size of the data has to be mentioned in the 500632d457d5SSreekanth Reddy * cfg_buf_sz. 500732d457d5SSreekanth Reddy * 500832d457d5SSreekanth Reddy * For read/header actions, on successful completion of the 500932d457d5SSreekanth Reddy * request with successful ioc_status the data will be copied 501032d457d5SSreekanth Reddy * into the cfg_buf limited to a minimum of actual page size and 501132d457d5SSreekanth Reddy * cfg_buf_sz 501232d457d5SSreekanth Reddy * 501332d457d5SSreekanth Reddy * 501432d457d5SSreekanth Reddy * Return: 0 on success, non-zero on failure. 501532d457d5SSreekanth Reddy */ 501632d457d5SSreekanth Reddy static int mpi3mr_process_cfg_req(struct mpi3mr_ioc *mrioc, 501732d457d5SSreekanth Reddy struct mpi3_config_request *cfg_req, 501832d457d5SSreekanth Reddy struct mpi3_config_page_header *cfg_hdr, int timeout, u16 *ioc_status, 501932d457d5SSreekanth Reddy void *cfg_buf, u32 cfg_buf_sz) 502032d457d5SSreekanth Reddy { 502132d457d5SSreekanth Reddy struct dma_memory_desc mem_desc; 502232d457d5SSreekanth Reddy int retval = -1; 502332d457d5SSreekanth Reddy u8 invalid_action = 0; 502432d457d5SSreekanth Reddy u8 sgl_flags = MPI3MR_SGEFLAGS_SYSTEM_SIMPLE_END_OF_LIST; 502532d457d5SSreekanth Reddy 502632d457d5SSreekanth Reddy memset(&mem_desc, 0, sizeof(struct dma_memory_desc)); 502732d457d5SSreekanth Reddy 502832d457d5SSreekanth Reddy if (cfg_req->action == MPI3_CONFIG_ACTION_PAGE_HEADER) 502932d457d5SSreekanth Reddy mem_desc.size = sizeof(struct mpi3_config_page_header); 503032d457d5SSreekanth Reddy else { 503132d457d5SSreekanth Reddy if (!cfg_hdr) { 503232d457d5SSreekanth Reddy ioc_err(mrioc, "null config header passed for config action(%d), page_type(0x%02x), page_num(%d)\n", 503332d457d5SSreekanth Reddy cfg_req->action, cfg_req->page_type, 503432d457d5SSreekanth Reddy cfg_req->page_number); 503532d457d5SSreekanth Reddy goto out; 503632d457d5SSreekanth Reddy } 503732d457d5SSreekanth Reddy switch (cfg_hdr->page_attribute & MPI3_CONFIG_PAGEATTR_MASK) { 503832d457d5SSreekanth Reddy case MPI3_CONFIG_PAGEATTR_READ_ONLY: 503932d457d5SSreekanth Reddy if (cfg_req->action 504032d457d5SSreekanth Reddy != MPI3_CONFIG_ACTION_READ_CURRENT) 504132d457d5SSreekanth Reddy invalid_action = 1; 504232d457d5SSreekanth Reddy break; 504332d457d5SSreekanth Reddy case MPI3_CONFIG_PAGEATTR_CHANGEABLE: 504432d457d5SSreekanth Reddy if ((cfg_req->action == 504532d457d5SSreekanth Reddy MPI3_CONFIG_ACTION_READ_PERSISTENT) || 504632d457d5SSreekanth Reddy (cfg_req->action == 504732d457d5SSreekanth Reddy MPI3_CONFIG_ACTION_WRITE_PERSISTENT)) 504832d457d5SSreekanth Reddy invalid_action = 1; 504932d457d5SSreekanth Reddy break; 505032d457d5SSreekanth Reddy case MPI3_CONFIG_PAGEATTR_PERSISTENT: 505132d457d5SSreekanth Reddy default: 505232d457d5SSreekanth Reddy break; 505332d457d5SSreekanth Reddy } 505432d457d5SSreekanth Reddy if (invalid_action) { 505532d457d5SSreekanth Reddy ioc_err(mrioc, 505632d457d5SSreekanth Reddy "config action(%d) is not allowed for page_type(0x%02x), page_num(%d) with page_attribute(0x%02x)\n", 505732d457d5SSreekanth Reddy cfg_req->action, cfg_req->page_type, 505832d457d5SSreekanth Reddy cfg_req->page_number, cfg_hdr->page_attribute); 505932d457d5SSreekanth Reddy goto out; 506032d457d5SSreekanth Reddy } 506132d457d5SSreekanth Reddy mem_desc.size = le16_to_cpu(cfg_hdr->page_length) * 4; 506232d457d5SSreekanth Reddy cfg_req->page_length = cfg_hdr->page_length; 506332d457d5SSreekanth Reddy cfg_req->page_version = cfg_hdr->page_version; 506432d457d5SSreekanth Reddy } 506532d457d5SSreekanth Reddy if (mpi3mr_alloc_config_dma_memory(mrioc, &mem_desc)) 506632d457d5SSreekanth Reddy goto out; 506732d457d5SSreekanth Reddy 506832d457d5SSreekanth Reddy mpi3mr_add_sg_single(&cfg_req->sgl, sgl_flags, mem_desc.size, 506932d457d5SSreekanth Reddy mem_desc.dma_addr); 507032d457d5SSreekanth Reddy 507132d457d5SSreekanth Reddy if ((cfg_req->action == MPI3_CONFIG_ACTION_WRITE_PERSISTENT) || 507232d457d5SSreekanth Reddy (cfg_req->action == MPI3_CONFIG_ACTION_WRITE_CURRENT)) { 507332d457d5SSreekanth Reddy memcpy(mem_desc.addr, cfg_buf, min_t(u16, mem_desc.size, 507432d457d5SSreekanth Reddy cfg_buf_sz)); 507532d457d5SSreekanth Reddy dprint_cfg_info(mrioc, "config buffer to be written\n"); 507632d457d5SSreekanth Reddy if (mrioc->logging_level & MPI3_DEBUG_CFG_INFO) 507732d457d5SSreekanth Reddy dprint_dump(mem_desc.addr, mem_desc.size, "cfg_buf"); 507832d457d5SSreekanth Reddy } 507932d457d5SSreekanth Reddy 508032d457d5SSreekanth Reddy if (mpi3mr_post_cfg_req(mrioc, cfg_req, timeout, ioc_status)) 508132d457d5SSreekanth Reddy goto out; 508232d457d5SSreekanth Reddy 508332d457d5SSreekanth Reddy retval = 0; 508432d457d5SSreekanth Reddy if ((*ioc_status == MPI3_IOCSTATUS_SUCCESS) && 508532d457d5SSreekanth Reddy (cfg_req->action != MPI3_CONFIG_ACTION_WRITE_PERSISTENT) && 508632d457d5SSreekanth Reddy (cfg_req->action != MPI3_CONFIG_ACTION_WRITE_CURRENT)) { 508732d457d5SSreekanth Reddy memcpy(cfg_buf, mem_desc.addr, min_t(u16, mem_desc.size, 508832d457d5SSreekanth Reddy cfg_buf_sz)); 508932d457d5SSreekanth Reddy dprint_cfg_info(mrioc, "config buffer read\n"); 509032d457d5SSreekanth Reddy if (mrioc->logging_level & MPI3_DEBUG_CFG_INFO) 509132d457d5SSreekanth Reddy dprint_dump(mem_desc.addr, mem_desc.size, "cfg_buf"); 509232d457d5SSreekanth Reddy } 509332d457d5SSreekanth Reddy 509432d457d5SSreekanth Reddy out: 509532d457d5SSreekanth Reddy mpi3mr_free_config_dma_memory(mrioc, &mem_desc); 509632d457d5SSreekanth Reddy return retval; 509732d457d5SSreekanth Reddy } 509864a8d931SSreekanth Reddy 509964a8d931SSreekanth Reddy /** 510064a8d931SSreekanth Reddy * mpi3mr_cfg_get_dev_pg0 - Read current device page0 510164a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 510264a8d931SSreekanth Reddy * @ioc_status: Pointer to return ioc status 510364a8d931SSreekanth Reddy * @dev_pg0: Pointer to return device page 0 510464a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 510564a8d931SSreekanth Reddy * @form: The form to be used for addressing the page 510664a8d931SSreekanth Reddy * @form_spec: Form specific information like device handle 510764a8d931SSreekanth Reddy * 510864a8d931SSreekanth Reddy * This is handler for config page read for a specific device 510964a8d931SSreekanth Reddy * page0. The ioc_status has the controller returned ioc_status. 511064a8d931SSreekanth Reddy * This routine doesn't check ioc_status to decide whether the 511164a8d931SSreekanth Reddy * page read is success or not and it is the callers 511264a8d931SSreekanth Reddy * responsibility. 511364a8d931SSreekanth Reddy * 511464a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 511564a8d931SSreekanth Reddy */ 511664a8d931SSreekanth Reddy int mpi3mr_cfg_get_dev_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 511764a8d931SSreekanth Reddy struct mpi3_device_page0 *dev_pg0, u16 pg_sz, u32 form, u32 form_spec) 511864a8d931SSreekanth Reddy { 511964a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 512064a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 512164a8d931SSreekanth Reddy u32 page_address; 512264a8d931SSreekanth Reddy 512364a8d931SSreekanth Reddy memset(dev_pg0, 0, pg_sz); 512464a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 512564a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 512664a8d931SSreekanth Reddy 512764a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 512864a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 512964a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_DEVICE; 513064a8d931SSreekanth Reddy cfg_req.page_number = 0; 513164a8d931SSreekanth Reddy cfg_req.page_address = 0; 513264a8d931SSreekanth Reddy 513364a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 513464a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 513564a8d931SSreekanth Reddy ioc_err(mrioc, "device page0 header read failed\n"); 513664a8d931SSreekanth Reddy goto out_failed; 513764a8d931SSreekanth Reddy } 513864a8d931SSreekanth Reddy if (*ioc_status != MPI3_IOCSTATUS_SUCCESS) { 513964a8d931SSreekanth Reddy ioc_err(mrioc, "device page0 header read failed with ioc_status(0x%04x)\n", 514064a8d931SSreekanth Reddy *ioc_status); 514164a8d931SSreekanth Reddy goto out_failed; 514264a8d931SSreekanth Reddy } 514364a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 514464a8d931SSreekanth Reddy page_address = ((form & MPI3_DEVICE_PGAD_FORM_MASK) | 514564a8d931SSreekanth Reddy (form_spec & MPI3_DEVICE_PGAD_HANDLE_MASK)); 514664a8d931SSreekanth Reddy cfg_req.page_address = cpu_to_le32(page_address); 514764a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 514864a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, dev_pg0, pg_sz)) { 514964a8d931SSreekanth Reddy ioc_err(mrioc, "device page0 read failed\n"); 515064a8d931SSreekanth Reddy goto out_failed; 515164a8d931SSreekanth Reddy } 515264a8d931SSreekanth Reddy return 0; 515364a8d931SSreekanth Reddy out_failed: 515464a8d931SSreekanth Reddy return -1; 515564a8d931SSreekanth Reddy } 515664a8d931SSreekanth Reddy 515764a8d931SSreekanth Reddy 515864a8d931SSreekanth Reddy /** 515964a8d931SSreekanth Reddy * mpi3mr_cfg_get_sas_phy_pg0 - Read current SAS Phy page0 516064a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 516164a8d931SSreekanth Reddy * @ioc_status: Pointer to return ioc status 516264a8d931SSreekanth Reddy * @phy_pg0: Pointer to return SAS Phy page 0 516364a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 516464a8d931SSreekanth Reddy * @form: The form to be used for addressing the page 516564a8d931SSreekanth Reddy * @form_spec: Form specific information like phy number 516664a8d931SSreekanth Reddy * 516764a8d931SSreekanth Reddy * This is handler for config page read for a specific SAS Phy 516864a8d931SSreekanth Reddy * page0. The ioc_status has the controller returned ioc_status. 516964a8d931SSreekanth Reddy * This routine doesn't check ioc_status to decide whether the 517064a8d931SSreekanth Reddy * page read is success or not and it is the callers 517164a8d931SSreekanth Reddy * responsibility. 517264a8d931SSreekanth Reddy * 517364a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 517464a8d931SSreekanth Reddy */ 517564a8d931SSreekanth Reddy int mpi3mr_cfg_get_sas_phy_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 517664a8d931SSreekanth Reddy struct mpi3_sas_phy_page0 *phy_pg0, u16 pg_sz, u32 form, 517764a8d931SSreekanth Reddy u32 form_spec) 517864a8d931SSreekanth Reddy { 517964a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 518064a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 518164a8d931SSreekanth Reddy u32 page_address; 518264a8d931SSreekanth Reddy 518364a8d931SSreekanth Reddy memset(phy_pg0, 0, pg_sz); 518464a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 518564a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 518664a8d931SSreekanth Reddy 518764a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 518864a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 518964a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_SAS_PHY; 519064a8d931SSreekanth Reddy cfg_req.page_number = 0; 519164a8d931SSreekanth Reddy cfg_req.page_address = 0; 519264a8d931SSreekanth Reddy 519364a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 519464a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 519564a8d931SSreekanth Reddy ioc_err(mrioc, "sas phy page0 header read failed\n"); 519664a8d931SSreekanth Reddy goto out_failed; 519764a8d931SSreekanth Reddy } 519864a8d931SSreekanth Reddy if (*ioc_status != MPI3_IOCSTATUS_SUCCESS) { 519964a8d931SSreekanth Reddy ioc_err(mrioc, "sas phy page0 header read failed with ioc_status(0x%04x)\n", 520064a8d931SSreekanth Reddy *ioc_status); 520164a8d931SSreekanth Reddy goto out_failed; 520264a8d931SSreekanth Reddy } 520364a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 520464a8d931SSreekanth Reddy page_address = ((form & MPI3_SAS_PHY_PGAD_FORM_MASK) | 520564a8d931SSreekanth Reddy (form_spec & MPI3_SAS_PHY_PGAD_PHY_NUMBER_MASK)); 520664a8d931SSreekanth Reddy cfg_req.page_address = cpu_to_le32(page_address); 520764a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 520864a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, phy_pg0, pg_sz)) { 520964a8d931SSreekanth Reddy ioc_err(mrioc, "sas phy page0 read failed\n"); 521064a8d931SSreekanth Reddy goto out_failed; 521164a8d931SSreekanth Reddy } 521264a8d931SSreekanth Reddy return 0; 521364a8d931SSreekanth Reddy out_failed: 521464a8d931SSreekanth Reddy return -1; 521564a8d931SSreekanth Reddy } 521664a8d931SSreekanth Reddy 521764a8d931SSreekanth Reddy /** 521864a8d931SSreekanth Reddy * mpi3mr_cfg_get_sas_phy_pg1 - Read current SAS Phy page1 521964a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 522064a8d931SSreekanth Reddy * @ioc_status: Pointer to return ioc status 522164a8d931SSreekanth Reddy * @phy_pg1: Pointer to return SAS Phy page 1 522264a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 522364a8d931SSreekanth Reddy * @form: The form to be used for addressing the page 522464a8d931SSreekanth Reddy * @form_spec: Form specific information like phy number 522564a8d931SSreekanth Reddy * 522664a8d931SSreekanth Reddy * This is handler for config page read for a specific SAS Phy 522764a8d931SSreekanth Reddy * page1. The ioc_status has the controller returned ioc_status. 522864a8d931SSreekanth Reddy * This routine doesn't check ioc_status to decide whether the 522964a8d931SSreekanth Reddy * page read is success or not and it is the callers 523064a8d931SSreekanth Reddy * responsibility. 523164a8d931SSreekanth Reddy * 523264a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 523364a8d931SSreekanth Reddy */ 523464a8d931SSreekanth Reddy int mpi3mr_cfg_get_sas_phy_pg1(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 523564a8d931SSreekanth Reddy struct mpi3_sas_phy_page1 *phy_pg1, u16 pg_sz, u32 form, 523664a8d931SSreekanth Reddy u32 form_spec) 523764a8d931SSreekanth Reddy { 523864a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 523964a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 524064a8d931SSreekanth Reddy u32 page_address; 524164a8d931SSreekanth Reddy 524264a8d931SSreekanth Reddy memset(phy_pg1, 0, pg_sz); 524364a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 524464a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 524564a8d931SSreekanth Reddy 524664a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 524764a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 524864a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_SAS_PHY; 524964a8d931SSreekanth Reddy cfg_req.page_number = 1; 525064a8d931SSreekanth Reddy cfg_req.page_address = 0; 525164a8d931SSreekanth Reddy 525264a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 525364a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 525464a8d931SSreekanth Reddy ioc_err(mrioc, "sas phy page1 header read failed\n"); 525564a8d931SSreekanth Reddy goto out_failed; 525664a8d931SSreekanth Reddy } 525764a8d931SSreekanth Reddy if (*ioc_status != MPI3_IOCSTATUS_SUCCESS) { 525864a8d931SSreekanth Reddy ioc_err(mrioc, "sas phy page1 header read failed with ioc_status(0x%04x)\n", 525964a8d931SSreekanth Reddy *ioc_status); 526064a8d931SSreekanth Reddy goto out_failed; 526164a8d931SSreekanth Reddy } 526264a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 526364a8d931SSreekanth Reddy page_address = ((form & MPI3_SAS_PHY_PGAD_FORM_MASK) | 526464a8d931SSreekanth Reddy (form_spec & MPI3_SAS_PHY_PGAD_PHY_NUMBER_MASK)); 526564a8d931SSreekanth Reddy cfg_req.page_address = cpu_to_le32(page_address); 526664a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 526764a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, phy_pg1, pg_sz)) { 526864a8d931SSreekanth Reddy ioc_err(mrioc, "sas phy page1 read failed\n"); 526964a8d931SSreekanth Reddy goto out_failed; 527064a8d931SSreekanth Reddy } 527164a8d931SSreekanth Reddy return 0; 527264a8d931SSreekanth Reddy out_failed: 527364a8d931SSreekanth Reddy return -1; 527464a8d931SSreekanth Reddy } 527564a8d931SSreekanth Reddy 527664a8d931SSreekanth Reddy 527764a8d931SSreekanth Reddy /** 527864a8d931SSreekanth Reddy * mpi3mr_cfg_get_sas_exp_pg0 - Read current SAS Expander page0 527964a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 528064a8d931SSreekanth Reddy * @ioc_status: Pointer to return ioc status 528164a8d931SSreekanth Reddy * @exp_pg0: Pointer to return SAS Expander page 0 528264a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 528364a8d931SSreekanth Reddy * @form: The form to be used for addressing the page 528464a8d931SSreekanth Reddy * @form_spec: Form specific information like device handle 528564a8d931SSreekanth Reddy * 528664a8d931SSreekanth Reddy * This is handler for config page read for a specific SAS 528764a8d931SSreekanth Reddy * Expander page0. The ioc_status has the controller returned 528864a8d931SSreekanth Reddy * ioc_status. This routine doesn't check ioc_status to decide 528964a8d931SSreekanth Reddy * whether the page read is success or not and it is the callers 529064a8d931SSreekanth Reddy * responsibility. 529164a8d931SSreekanth Reddy * 529264a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 529364a8d931SSreekanth Reddy */ 529464a8d931SSreekanth Reddy int mpi3mr_cfg_get_sas_exp_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 529564a8d931SSreekanth Reddy struct mpi3_sas_expander_page0 *exp_pg0, u16 pg_sz, u32 form, 529664a8d931SSreekanth Reddy u32 form_spec) 529764a8d931SSreekanth Reddy { 529864a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 529964a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 530064a8d931SSreekanth Reddy u32 page_address; 530164a8d931SSreekanth Reddy 530264a8d931SSreekanth Reddy memset(exp_pg0, 0, pg_sz); 530364a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 530464a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 530564a8d931SSreekanth Reddy 530664a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 530764a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 530864a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_SAS_EXPANDER; 530964a8d931SSreekanth Reddy cfg_req.page_number = 0; 531064a8d931SSreekanth Reddy cfg_req.page_address = 0; 531164a8d931SSreekanth Reddy 531264a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 531364a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 531464a8d931SSreekanth Reddy ioc_err(mrioc, "expander page0 header read failed\n"); 531564a8d931SSreekanth Reddy goto out_failed; 531664a8d931SSreekanth Reddy } 531764a8d931SSreekanth Reddy if (*ioc_status != MPI3_IOCSTATUS_SUCCESS) { 531864a8d931SSreekanth Reddy ioc_err(mrioc, "expander page0 header read failed with ioc_status(0x%04x)\n", 531964a8d931SSreekanth Reddy *ioc_status); 532064a8d931SSreekanth Reddy goto out_failed; 532164a8d931SSreekanth Reddy } 532264a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 532364a8d931SSreekanth Reddy page_address = ((form & MPI3_SAS_EXPAND_PGAD_FORM_MASK) | 532464a8d931SSreekanth Reddy (form_spec & (MPI3_SAS_EXPAND_PGAD_PHYNUM_MASK | 532564a8d931SSreekanth Reddy MPI3_SAS_EXPAND_PGAD_HANDLE_MASK))); 532664a8d931SSreekanth Reddy cfg_req.page_address = cpu_to_le32(page_address); 532764a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 532864a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, exp_pg0, pg_sz)) { 532964a8d931SSreekanth Reddy ioc_err(mrioc, "expander page0 read failed\n"); 533064a8d931SSreekanth Reddy goto out_failed; 533164a8d931SSreekanth Reddy } 533264a8d931SSreekanth Reddy return 0; 533364a8d931SSreekanth Reddy out_failed: 533464a8d931SSreekanth Reddy return -1; 533564a8d931SSreekanth Reddy } 533664a8d931SSreekanth Reddy 533764a8d931SSreekanth Reddy /** 533864a8d931SSreekanth Reddy * mpi3mr_cfg_get_sas_exp_pg1 - Read current SAS Expander page1 533964a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 534064a8d931SSreekanth Reddy * @ioc_status: Pointer to return ioc status 534164a8d931SSreekanth Reddy * @exp_pg1: Pointer to return SAS Expander page 1 534264a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 534364a8d931SSreekanth Reddy * @form: The form to be used for addressing the page 534464a8d931SSreekanth Reddy * @form_spec: Form specific information like phy number 534564a8d931SSreekanth Reddy * 534664a8d931SSreekanth Reddy * This is handler for config page read for a specific SAS 534764a8d931SSreekanth Reddy * Expander page1. The ioc_status has the controller returned 534864a8d931SSreekanth Reddy * ioc_status. This routine doesn't check ioc_status to decide 534964a8d931SSreekanth Reddy * whether the page read is success or not and it is the callers 535064a8d931SSreekanth Reddy * responsibility. 535164a8d931SSreekanth Reddy * 535264a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 535364a8d931SSreekanth Reddy */ 535464a8d931SSreekanth Reddy int mpi3mr_cfg_get_sas_exp_pg1(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 535564a8d931SSreekanth Reddy struct mpi3_sas_expander_page1 *exp_pg1, u16 pg_sz, u32 form, 535664a8d931SSreekanth Reddy u32 form_spec) 535764a8d931SSreekanth Reddy { 535864a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 535964a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 536064a8d931SSreekanth Reddy u32 page_address; 536164a8d931SSreekanth Reddy 536264a8d931SSreekanth Reddy memset(exp_pg1, 0, pg_sz); 536364a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 536464a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 536564a8d931SSreekanth Reddy 536664a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 536764a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 536864a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_SAS_EXPANDER; 536964a8d931SSreekanth Reddy cfg_req.page_number = 1; 537064a8d931SSreekanth Reddy cfg_req.page_address = 0; 537164a8d931SSreekanth Reddy 537264a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 537364a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 537464a8d931SSreekanth Reddy ioc_err(mrioc, "expander page1 header read failed\n"); 537564a8d931SSreekanth Reddy goto out_failed; 537664a8d931SSreekanth Reddy } 537764a8d931SSreekanth Reddy if (*ioc_status != MPI3_IOCSTATUS_SUCCESS) { 537864a8d931SSreekanth Reddy ioc_err(mrioc, "expander page1 header read failed with ioc_status(0x%04x)\n", 537964a8d931SSreekanth Reddy *ioc_status); 538064a8d931SSreekanth Reddy goto out_failed; 538164a8d931SSreekanth Reddy } 538264a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 538364a8d931SSreekanth Reddy page_address = ((form & MPI3_SAS_EXPAND_PGAD_FORM_MASK) | 538464a8d931SSreekanth Reddy (form_spec & (MPI3_SAS_EXPAND_PGAD_PHYNUM_MASK | 538564a8d931SSreekanth Reddy MPI3_SAS_EXPAND_PGAD_HANDLE_MASK))); 538664a8d931SSreekanth Reddy cfg_req.page_address = cpu_to_le32(page_address); 538764a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 538864a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, exp_pg1, pg_sz)) { 538964a8d931SSreekanth Reddy ioc_err(mrioc, "expander page1 read failed\n"); 539064a8d931SSreekanth Reddy goto out_failed; 539164a8d931SSreekanth Reddy } 539264a8d931SSreekanth Reddy return 0; 539364a8d931SSreekanth Reddy out_failed: 539464a8d931SSreekanth Reddy return -1; 539564a8d931SSreekanth Reddy } 539664a8d931SSreekanth Reddy 539764a8d931SSreekanth Reddy /** 539864a8d931SSreekanth Reddy * mpi3mr_cfg_get_enclosure_pg0 - Read current Enclosure page0 539964a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 540064a8d931SSreekanth Reddy * @ioc_status: Pointer to return ioc status 540164a8d931SSreekanth Reddy * @encl_pg0: Pointer to return Enclosure page 0 540264a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 540364a8d931SSreekanth Reddy * @form: The form to be used for addressing the page 540464a8d931SSreekanth Reddy * @form_spec: Form specific information like device handle 540564a8d931SSreekanth Reddy * 540664a8d931SSreekanth Reddy * This is handler for config page read for a specific Enclosure 540764a8d931SSreekanth Reddy * page0. The ioc_status has the controller returned ioc_status. 540864a8d931SSreekanth Reddy * This routine doesn't check ioc_status to decide whether the 540964a8d931SSreekanth Reddy * page read is success or not and it is the callers 541064a8d931SSreekanth Reddy * responsibility. 541164a8d931SSreekanth Reddy * 541264a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 541364a8d931SSreekanth Reddy */ 541464a8d931SSreekanth Reddy int mpi3mr_cfg_get_enclosure_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 541564a8d931SSreekanth Reddy struct mpi3_enclosure_page0 *encl_pg0, u16 pg_sz, u32 form, 541664a8d931SSreekanth Reddy u32 form_spec) 541764a8d931SSreekanth Reddy { 541864a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 541964a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 542064a8d931SSreekanth Reddy u32 page_address; 542164a8d931SSreekanth Reddy 542264a8d931SSreekanth Reddy memset(encl_pg0, 0, pg_sz); 542364a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 542464a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 542564a8d931SSreekanth Reddy 542664a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 542764a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 542864a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_ENCLOSURE; 542964a8d931SSreekanth Reddy cfg_req.page_number = 0; 543064a8d931SSreekanth Reddy cfg_req.page_address = 0; 543164a8d931SSreekanth Reddy 543264a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 543364a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 543464a8d931SSreekanth Reddy ioc_err(mrioc, "enclosure page0 header read failed\n"); 543564a8d931SSreekanth Reddy goto out_failed; 543664a8d931SSreekanth Reddy } 543764a8d931SSreekanth Reddy if (*ioc_status != MPI3_IOCSTATUS_SUCCESS) { 543864a8d931SSreekanth Reddy ioc_err(mrioc, "enclosure page0 header read failed with ioc_status(0x%04x)\n", 543964a8d931SSreekanth Reddy *ioc_status); 544064a8d931SSreekanth Reddy goto out_failed; 544164a8d931SSreekanth Reddy } 544264a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 544364a8d931SSreekanth Reddy page_address = ((form & MPI3_ENCLOS_PGAD_FORM_MASK) | 544464a8d931SSreekanth Reddy (form_spec & MPI3_ENCLOS_PGAD_HANDLE_MASK)); 544564a8d931SSreekanth Reddy cfg_req.page_address = cpu_to_le32(page_address); 544664a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 544764a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, encl_pg0, pg_sz)) { 544864a8d931SSreekanth Reddy ioc_err(mrioc, "enclosure page0 read failed\n"); 544964a8d931SSreekanth Reddy goto out_failed; 545064a8d931SSreekanth Reddy } 545164a8d931SSreekanth Reddy return 0; 545264a8d931SSreekanth Reddy out_failed: 545364a8d931SSreekanth Reddy return -1; 545464a8d931SSreekanth Reddy } 545564a8d931SSreekanth Reddy 545664a8d931SSreekanth Reddy 545764a8d931SSreekanth Reddy /** 545864a8d931SSreekanth Reddy * mpi3mr_cfg_get_sas_io_unit_pg0 - Read current SASIOUnit page0 545964a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 546064a8d931SSreekanth Reddy * @sas_io_unit_pg0: Pointer to return SAS IO Unit page 0 546164a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 546264a8d931SSreekanth Reddy * 546364a8d931SSreekanth Reddy * This is handler for config page read for the SAS IO Unit 546464a8d931SSreekanth Reddy * page0. This routine checks ioc_status to decide whether the 546564a8d931SSreekanth Reddy * page read is success or not. 546664a8d931SSreekanth Reddy * 546764a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 546864a8d931SSreekanth Reddy */ 546964a8d931SSreekanth Reddy int mpi3mr_cfg_get_sas_io_unit_pg0(struct mpi3mr_ioc *mrioc, 547064a8d931SSreekanth Reddy struct mpi3_sas_io_unit_page0 *sas_io_unit_pg0, u16 pg_sz) 547164a8d931SSreekanth Reddy { 547264a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 547364a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 547464a8d931SSreekanth Reddy u16 ioc_status = 0; 547564a8d931SSreekanth Reddy 547664a8d931SSreekanth Reddy memset(sas_io_unit_pg0, 0, pg_sz); 547764a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 547864a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 547964a8d931SSreekanth Reddy 548064a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 548164a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 548264a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_SAS_IO_UNIT; 548364a8d931SSreekanth Reddy cfg_req.page_number = 0; 548464a8d931SSreekanth Reddy cfg_req.page_address = 0; 548564a8d931SSreekanth Reddy 548664a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 548764a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 548864a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page0 header read failed\n"); 548964a8d931SSreekanth Reddy goto out_failed; 549064a8d931SSreekanth Reddy } 549164a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 549264a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page0 header read failed with ioc_status(0x%04x)\n", 549364a8d931SSreekanth Reddy ioc_status); 549464a8d931SSreekanth Reddy goto out_failed; 549564a8d931SSreekanth Reddy } 549664a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 549764a8d931SSreekanth Reddy 549864a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 549964a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, sas_io_unit_pg0, pg_sz)) { 550064a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page0 read failed\n"); 550164a8d931SSreekanth Reddy goto out_failed; 550264a8d931SSreekanth Reddy } 550364a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 550464a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page0 read failed with ioc_status(0x%04x)\n", 550564a8d931SSreekanth Reddy ioc_status); 550664a8d931SSreekanth Reddy goto out_failed; 550764a8d931SSreekanth Reddy } 550864a8d931SSreekanth Reddy return 0; 550964a8d931SSreekanth Reddy out_failed: 551064a8d931SSreekanth Reddy return -1; 551164a8d931SSreekanth Reddy } 551264a8d931SSreekanth Reddy 551364a8d931SSreekanth Reddy /** 551464a8d931SSreekanth Reddy * mpi3mr_cfg_get_sas_io_unit_pg1 - Read current SASIOUnit page1 551564a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 551664a8d931SSreekanth Reddy * @sas_io_unit_pg1: Pointer to return SAS IO Unit page 1 551764a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 551864a8d931SSreekanth Reddy * 551964a8d931SSreekanth Reddy * This is handler for config page read for the SAS IO Unit 552064a8d931SSreekanth Reddy * page1. This routine checks ioc_status to decide whether the 552164a8d931SSreekanth Reddy * page read is success or not. 552264a8d931SSreekanth Reddy * 552364a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 552464a8d931SSreekanth Reddy */ 552564a8d931SSreekanth Reddy int mpi3mr_cfg_get_sas_io_unit_pg1(struct mpi3mr_ioc *mrioc, 552664a8d931SSreekanth Reddy struct mpi3_sas_io_unit_page1 *sas_io_unit_pg1, u16 pg_sz) 552764a8d931SSreekanth Reddy { 552864a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 552964a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 553064a8d931SSreekanth Reddy u16 ioc_status = 0; 553164a8d931SSreekanth Reddy 553264a8d931SSreekanth Reddy memset(sas_io_unit_pg1, 0, pg_sz); 553364a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 553464a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 553564a8d931SSreekanth Reddy 553664a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 553764a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 553864a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_SAS_IO_UNIT; 553964a8d931SSreekanth Reddy cfg_req.page_number = 1; 554064a8d931SSreekanth Reddy cfg_req.page_address = 0; 554164a8d931SSreekanth Reddy 554264a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 554364a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 554464a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 header read failed\n"); 554564a8d931SSreekanth Reddy goto out_failed; 554664a8d931SSreekanth Reddy } 554764a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 554864a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 header read failed with ioc_status(0x%04x)\n", 554964a8d931SSreekanth Reddy ioc_status); 555064a8d931SSreekanth Reddy goto out_failed; 555164a8d931SSreekanth Reddy } 555264a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 555364a8d931SSreekanth Reddy 555464a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 555564a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, sas_io_unit_pg1, pg_sz)) { 555664a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 read failed\n"); 555764a8d931SSreekanth Reddy goto out_failed; 555864a8d931SSreekanth Reddy } 555964a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 556064a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 read failed with ioc_status(0x%04x)\n", 556164a8d931SSreekanth Reddy ioc_status); 556264a8d931SSreekanth Reddy goto out_failed; 556364a8d931SSreekanth Reddy } 556464a8d931SSreekanth Reddy return 0; 556564a8d931SSreekanth Reddy out_failed: 556664a8d931SSreekanth Reddy return -1; 556764a8d931SSreekanth Reddy } 556864a8d931SSreekanth Reddy 556964a8d931SSreekanth Reddy /** 557064a8d931SSreekanth Reddy * mpi3mr_cfg_set_sas_io_unit_pg1 - Write SASIOUnit page1 557164a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 557264a8d931SSreekanth Reddy * @sas_io_unit_pg1: Pointer to the SAS IO Unit page 1 to write 557364a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 557464a8d931SSreekanth Reddy * 557564a8d931SSreekanth Reddy * This is handler for config page write for the SAS IO Unit 557664a8d931SSreekanth Reddy * page1. This routine checks ioc_status to decide whether the 557764a8d931SSreekanth Reddy * page read is success or not. This will modify both current 557864a8d931SSreekanth Reddy * and persistent page. 557964a8d931SSreekanth Reddy * 558064a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 558164a8d931SSreekanth Reddy */ 558264a8d931SSreekanth Reddy int mpi3mr_cfg_set_sas_io_unit_pg1(struct mpi3mr_ioc *mrioc, 558364a8d931SSreekanth Reddy struct mpi3_sas_io_unit_page1 *sas_io_unit_pg1, u16 pg_sz) 558464a8d931SSreekanth Reddy { 558564a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 558664a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 558764a8d931SSreekanth Reddy u16 ioc_status = 0; 558864a8d931SSreekanth Reddy 558964a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 559064a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 559164a8d931SSreekanth Reddy 559264a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 559364a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 559464a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_SAS_IO_UNIT; 559564a8d931SSreekanth Reddy cfg_req.page_number = 1; 559664a8d931SSreekanth Reddy cfg_req.page_address = 0; 559764a8d931SSreekanth Reddy 559864a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 559964a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 560064a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 header read failed\n"); 560164a8d931SSreekanth Reddy goto out_failed; 560264a8d931SSreekanth Reddy } 560364a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 560464a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 header read failed with ioc_status(0x%04x)\n", 560564a8d931SSreekanth Reddy ioc_status); 560664a8d931SSreekanth Reddy goto out_failed; 560764a8d931SSreekanth Reddy } 560864a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_WRITE_CURRENT; 560964a8d931SSreekanth Reddy 561064a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 561164a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, sas_io_unit_pg1, pg_sz)) { 561264a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 write current failed\n"); 561364a8d931SSreekanth Reddy goto out_failed; 561464a8d931SSreekanth Reddy } 561564a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 561664a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 write current failed with ioc_status(0x%04x)\n", 561764a8d931SSreekanth Reddy ioc_status); 561864a8d931SSreekanth Reddy goto out_failed; 561964a8d931SSreekanth Reddy } 562064a8d931SSreekanth Reddy 562164a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_WRITE_PERSISTENT; 562264a8d931SSreekanth Reddy 562364a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 562464a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, sas_io_unit_pg1, pg_sz)) { 562564a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 write persistent failed\n"); 562664a8d931SSreekanth Reddy goto out_failed; 562764a8d931SSreekanth Reddy } 562864a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 562964a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 write persistent failed with ioc_status(0x%04x)\n", 563064a8d931SSreekanth Reddy ioc_status); 563164a8d931SSreekanth Reddy goto out_failed; 563264a8d931SSreekanth Reddy } 563364a8d931SSreekanth Reddy return 0; 563464a8d931SSreekanth Reddy out_failed: 563564a8d931SSreekanth Reddy return -1; 563664a8d931SSreekanth Reddy } 563764a8d931SSreekanth Reddy 563864a8d931SSreekanth Reddy /** 563964a8d931SSreekanth Reddy * mpi3mr_cfg_get_driver_pg1 - Read current Driver page1 564064a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 564164a8d931SSreekanth Reddy * @driver_pg1: Pointer to return Driver page 1 564264a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 564364a8d931SSreekanth Reddy * 564464a8d931SSreekanth Reddy * This is handler for config page read for the Driver page1. 564564a8d931SSreekanth Reddy * This routine checks ioc_status to decide whether the page 564664a8d931SSreekanth Reddy * read is success or not. 564764a8d931SSreekanth Reddy * 564864a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 564964a8d931SSreekanth Reddy */ 565064a8d931SSreekanth Reddy int mpi3mr_cfg_get_driver_pg1(struct mpi3mr_ioc *mrioc, 565164a8d931SSreekanth Reddy struct mpi3_driver_page1 *driver_pg1, u16 pg_sz) 565264a8d931SSreekanth Reddy { 565364a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 565464a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 565564a8d931SSreekanth Reddy u16 ioc_status = 0; 565664a8d931SSreekanth Reddy 565764a8d931SSreekanth Reddy memset(driver_pg1, 0, pg_sz); 565864a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 565964a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 566064a8d931SSreekanth Reddy 566164a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 566264a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 566364a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_DRIVER; 566464a8d931SSreekanth Reddy cfg_req.page_number = 1; 566564a8d931SSreekanth Reddy cfg_req.page_address = 0; 566664a8d931SSreekanth Reddy 566764a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 566864a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 566964a8d931SSreekanth Reddy ioc_err(mrioc, "driver page1 header read failed\n"); 567064a8d931SSreekanth Reddy goto out_failed; 567164a8d931SSreekanth Reddy } 567264a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 567364a8d931SSreekanth Reddy ioc_err(mrioc, "driver page1 header read failed with ioc_status(0x%04x)\n", 567464a8d931SSreekanth Reddy ioc_status); 567564a8d931SSreekanth Reddy goto out_failed; 567664a8d931SSreekanth Reddy } 567764a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 567864a8d931SSreekanth Reddy 567964a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 568064a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, driver_pg1, pg_sz)) { 568164a8d931SSreekanth Reddy ioc_err(mrioc, "driver page1 read failed\n"); 568264a8d931SSreekanth Reddy goto out_failed; 568364a8d931SSreekanth Reddy } 568464a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 568564a8d931SSreekanth Reddy ioc_err(mrioc, "driver page1 read failed with ioc_status(0x%04x)\n", 568664a8d931SSreekanth Reddy ioc_status); 568764a8d931SSreekanth Reddy goto out_failed; 568864a8d931SSreekanth Reddy } 568964a8d931SSreekanth Reddy return 0; 569064a8d931SSreekanth Reddy out_failed: 569164a8d931SSreekanth Reddy return -1; 569264a8d931SSreekanth Reddy } 5693