1824a1566SKashyap Desai // SPDX-License-Identifier: GPL-2.0-or-later 2824a1566SKashyap Desai /* 3824a1566SKashyap Desai * Driver for Broadcom MPI3 Storage Controllers 4824a1566SKashyap Desai * 521401408SSreekanth Reddy * Copyright (C) 2017-2022 Broadcom Inc. 6824a1566SKashyap Desai * (mailto: mpi3mr-linuxdrv.pdl@broadcom.com) 7824a1566SKashyap Desai * 8824a1566SKashyap Desai */ 9824a1566SKashyap Desai 10824a1566SKashyap Desai #include "mpi3mr.h" 11824a1566SKashyap Desai #include <linux/io-64-nonatomic-lo-hi.h> 12824a1566SKashyap Desai 1359bd9cfeSSreekanth Reddy static int 1459bd9cfeSSreekanth Reddy mpi3mr_issue_reset(struct mpi3mr_ioc *mrioc, u16 reset_type, u32 reset_reason); 1559bd9cfeSSreekanth Reddy static int mpi3mr_setup_admin_qpair(struct mpi3mr_ioc *mrioc); 16c5758fc7SSreekanth Reddy static void mpi3mr_process_factsdata(struct mpi3mr_ioc *mrioc, 17c5758fc7SSreekanth Reddy struct mpi3_ioc_facts_data *facts_data); 1843ca1100SSumit Saxena static void mpi3mr_pel_wait_complete(struct mpi3mr_ioc *mrioc, 1943ca1100SSumit Saxena struct mpi3mr_drv_cmd *drv_cmd); 2059bd9cfeSSreekanth Reddy 21afd3a579SSreekanth Reddy static int poll_queues; 22afd3a579SSreekanth Reddy module_param(poll_queues, int, 0444); 23afd3a579SSreekanth Reddy MODULE_PARM_DESC(poll_queues, "Number of queues for io_uring poll mode. (Range 1 - 126)"); 24afd3a579SSreekanth Reddy 25824a1566SKashyap Desai #if defined(writeq) && defined(CONFIG_64BIT) 26824a1566SKashyap Desai static inline void mpi3mr_writeq(__u64 b, volatile void __iomem *addr) 27824a1566SKashyap Desai { 28824a1566SKashyap Desai writeq(b, addr); 29824a1566SKashyap Desai } 30824a1566SKashyap Desai #else 31824a1566SKashyap Desai static inline void mpi3mr_writeq(__u64 b, volatile void __iomem *addr) 32824a1566SKashyap Desai { 33824a1566SKashyap Desai __u64 data_out = b; 34824a1566SKashyap Desai 35824a1566SKashyap Desai writel((u32)(data_out), addr); 36824a1566SKashyap Desai writel((u32)(data_out >> 32), (addr + 4)); 37824a1566SKashyap Desai } 38824a1566SKashyap Desai #endif 39824a1566SKashyap Desai 40023ab2a9SKashyap Desai static inline bool 41023ab2a9SKashyap Desai mpi3mr_check_req_qfull(struct op_req_qinfo *op_req_q) 42023ab2a9SKashyap Desai { 43023ab2a9SKashyap Desai u16 pi, ci, max_entries; 44023ab2a9SKashyap Desai bool is_qfull = false; 45023ab2a9SKashyap Desai 46023ab2a9SKashyap Desai pi = op_req_q->pi; 47023ab2a9SKashyap Desai ci = READ_ONCE(op_req_q->ci); 48023ab2a9SKashyap Desai max_entries = op_req_q->num_requests; 49023ab2a9SKashyap Desai 50023ab2a9SKashyap Desai if ((ci == (pi + 1)) || ((!ci) && (pi == (max_entries - 1)))) 51023ab2a9SKashyap Desai is_qfull = true; 52023ab2a9SKashyap Desai 53023ab2a9SKashyap Desai return is_qfull; 54023ab2a9SKashyap Desai } 55023ab2a9SKashyap Desai 56824a1566SKashyap Desai static void mpi3mr_sync_irqs(struct mpi3mr_ioc *mrioc) 57824a1566SKashyap Desai { 58824a1566SKashyap Desai u16 i, max_vectors; 59824a1566SKashyap Desai 60824a1566SKashyap Desai max_vectors = mrioc->intr_info_count; 61824a1566SKashyap Desai 62824a1566SKashyap Desai for (i = 0; i < max_vectors; i++) 63824a1566SKashyap Desai synchronize_irq(pci_irq_vector(mrioc->pdev, i)); 64824a1566SKashyap Desai } 65824a1566SKashyap Desai 66824a1566SKashyap Desai void mpi3mr_ioc_disable_intr(struct mpi3mr_ioc *mrioc) 67824a1566SKashyap Desai { 68824a1566SKashyap Desai mrioc->intr_enabled = 0; 69824a1566SKashyap Desai mpi3mr_sync_irqs(mrioc); 70824a1566SKashyap Desai } 71824a1566SKashyap Desai 72824a1566SKashyap Desai void mpi3mr_ioc_enable_intr(struct mpi3mr_ioc *mrioc) 73824a1566SKashyap Desai { 74824a1566SKashyap Desai mrioc->intr_enabled = 1; 75824a1566SKashyap Desai } 76824a1566SKashyap Desai 77824a1566SKashyap Desai static void mpi3mr_cleanup_isr(struct mpi3mr_ioc *mrioc) 78824a1566SKashyap Desai { 79824a1566SKashyap Desai u16 i; 80824a1566SKashyap Desai 81824a1566SKashyap Desai mpi3mr_ioc_disable_intr(mrioc); 82824a1566SKashyap Desai 83824a1566SKashyap Desai if (!mrioc->intr_info) 84824a1566SKashyap Desai return; 85824a1566SKashyap Desai 86824a1566SKashyap Desai for (i = 0; i < mrioc->intr_info_count; i++) 87824a1566SKashyap Desai free_irq(pci_irq_vector(mrioc->pdev, i), 88824a1566SKashyap Desai (mrioc->intr_info + i)); 89824a1566SKashyap Desai 90824a1566SKashyap Desai kfree(mrioc->intr_info); 91824a1566SKashyap Desai mrioc->intr_info = NULL; 92824a1566SKashyap Desai mrioc->intr_info_count = 0; 93fe6db615SSreekanth Reddy mrioc->is_intr_info_set = false; 94824a1566SKashyap Desai pci_free_irq_vectors(mrioc->pdev); 95824a1566SKashyap Desai } 96824a1566SKashyap Desai 97824a1566SKashyap Desai void mpi3mr_add_sg_single(void *paddr, u8 flags, u32 length, 98824a1566SKashyap Desai dma_addr_t dma_addr) 99824a1566SKashyap Desai { 100824a1566SKashyap Desai struct mpi3_sge_common *sgel = paddr; 101824a1566SKashyap Desai 102824a1566SKashyap Desai sgel->flags = flags; 103824a1566SKashyap Desai sgel->length = cpu_to_le32(length); 104824a1566SKashyap Desai sgel->address = cpu_to_le64(dma_addr); 105824a1566SKashyap Desai } 106824a1566SKashyap Desai 107824a1566SKashyap Desai void mpi3mr_build_zero_len_sge(void *paddr) 108824a1566SKashyap Desai { 109824a1566SKashyap Desai u8 sgl_flags = MPI3MR_SGEFLAGS_SYSTEM_SIMPLE_END_OF_LIST; 110824a1566SKashyap Desai 111824a1566SKashyap Desai mpi3mr_add_sg_single(paddr, sgl_flags, 0, -1); 112824a1566SKashyap Desai } 113824a1566SKashyap Desai 114824a1566SKashyap Desai void *mpi3mr_get_reply_virt_addr(struct mpi3mr_ioc *mrioc, 115824a1566SKashyap Desai dma_addr_t phys_addr) 116824a1566SKashyap Desai { 117824a1566SKashyap Desai if (!phys_addr) 118824a1566SKashyap Desai return NULL; 119824a1566SKashyap Desai 120824a1566SKashyap Desai if ((phys_addr < mrioc->reply_buf_dma) || 121824a1566SKashyap Desai (phys_addr > mrioc->reply_buf_dma_max_address)) 122824a1566SKashyap Desai return NULL; 123824a1566SKashyap Desai 124824a1566SKashyap Desai return mrioc->reply_buf + (phys_addr - mrioc->reply_buf_dma); 125824a1566SKashyap Desai } 126824a1566SKashyap Desai 127824a1566SKashyap Desai void *mpi3mr_get_sensebuf_virt_addr(struct mpi3mr_ioc *mrioc, 128824a1566SKashyap Desai dma_addr_t phys_addr) 129824a1566SKashyap Desai { 130824a1566SKashyap Desai if (!phys_addr) 131824a1566SKashyap Desai return NULL; 132824a1566SKashyap Desai 133824a1566SKashyap Desai return mrioc->sense_buf + (phys_addr - mrioc->sense_buf_dma); 134824a1566SKashyap Desai } 135824a1566SKashyap Desai 136824a1566SKashyap Desai static void mpi3mr_repost_reply_buf(struct mpi3mr_ioc *mrioc, 137824a1566SKashyap Desai u64 reply_dma) 138824a1566SKashyap Desai { 139824a1566SKashyap Desai u32 old_idx = 0; 140a83ec831SSreekanth Reddy unsigned long flags; 141824a1566SKashyap Desai 142a83ec831SSreekanth Reddy spin_lock_irqsave(&mrioc->reply_free_queue_lock, flags); 143824a1566SKashyap Desai old_idx = mrioc->reply_free_queue_host_index; 144824a1566SKashyap Desai mrioc->reply_free_queue_host_index = ( 145824a1566SKashyap Desai (mrioc->reply_free_queue_host_index == 146824a1566SKashyap Desai (mrioc->reply_free_qsz - 1)) ? 0 : 147824a1566SKashyap Desai (mrioc->reply_free_queue_host_index + 1)); 148824a1566SKashyap Desai mrioc->reply_free_q[old_idx] = cpu_to_le64(reply_dma); 149824a1566SKashyap Desai writel(mrioc->reply_free_queue_host_index, 150824a1566SKashyap Desai &mrioc->sysif_regs->reply_free_host_index); 151a83ec831SSreekanth Reddy spin_unlock_irqrestore(&mrioc->reply_free_queue_lock, flags); 152824a1566SKashyap Desai } 153824a1566SKashyap Desai 154824a1566SKashyap Desai void mpi3mr_repost_sense_buf(struct mpi3mr_ioc *mrioc, 155824a1566SKashyap Desai u64 sense_buf_dma) 156824a1566SKashyap Desai { 157824a1566SKashyap Desai u32 old_idx = 0; 158a83ec831SSreekanth Reddy unsigned long flags; 159824a1566SKashyap Desai 160a83ec831SSreekanth Reddy spin_lock_irqsave(&mrioc->sbq_lock, flags); 161824a1566SKashyap Desai old_idx = mrioc->sbq_host_index; 162824a1566SKashyap Desai mrioc->sbq_host_index = ((mrioc->sbq_host_index == 163824a1566SKashyap Desai (mrioc->sense_buf_q_sz - 1)) ? 0 : 164824a1566SKashyap Desai (mrioc->sbq_host_index + 1)); 165824a1566SKashyap Desai mrioc->sense_buf_q[old_idx] = cpu_to_le64(sense_buf_dma); 166824a1566SKashyap Desai writel(mrioc->sbq_host_index, 167824a1566SKashyap Desai &mrioc->sysif_regs->sense_buffer_free_host_index); 168a83ec831SSreekanth Reddy spin_unlock_irqrestore(&mrioc->sbq_lock, flags); 169824a1566SKashyap Desai } 170824a1566SKashyap Desai 1719fc4abfeSKashyap Desai static void mpi3mr_print_event_data(struct mpi3mr_ioc *mrioc, 1729fc4abfeSKashyap Desai struct mpi3_event_notification_reply *event_reply) 1739fc4abfeSKashyap Desai { 1749fc4abfeSKashyap Desai char *desc = NULL; 1759fc4abfeSKashyap Desai u16 event; 1769fc4abfeSKashyap Desai 1779fc4abfeSKashyap Desai event = event_reply->event; 1789fc4abfeSKashyap Desai 1799fc4abfeSKashyap Desai switch (event) { 1809fc4abfeSKashyap Desai case MPI3_EVENT_LOG_DATA: 1819fc4abfeSKashyap Desai desc = "Log Data"; 1829fc4abfeSKashyap Desai break; 1839fc4abfeSKashyap Desai case MPI3_EVENT_CHANGE: 1849fc4abfeSKashyap Desai desc = "Event Change"; 1859fc4abfeSKashyap Desai break; 1869fc4abfeSKashyap Desai case MPI3_EVENT_GPIO_INTERRUPT: 1879fc4abfeSKashyap Desai desc = "GPIO Interrupt"; 1889fc4abfeSKashyap Desai break; 1899fc4abfeSKashyap Desai case MPI3_EVENT_CABLE_MGMT: 1909fc4abfeSKashyap Desai desc = "Cable Management"; 1919fc4abfeSKashyap Desai break; 1929fc4abfeSKashyap Desai case MPI3_EVENT_ENERGY_PACK_CHANGE: 1939fc4abfeSKashyap Desai desc = "Energy Pack Change"; 1949fc4abfeSKashyap Desai break; 1959fc4abfeSKashyap Desai case MPI3_EVENT_DEVICE_ADDED: 1969fc4abfeSKashyap Desai { 1979fc4abfeSKashyap Desai struct mpi3_device_page0 *event_data = 1989fc4abfeSKashyap Desai (struct mpi3_device_page0 *)event_reply->event_data; 1999fc4abfeSKashyap Desai ioc_info(mrioc, "Device Added: dev=0x%04x Form=0x%x\n", 2009fc4abfeSKashyap Desai event_data->dev_handle, event_data->device_form); 2019fc4abfeSKashyap Desai return; 2029fc4abfeSKashyap Desai } 2039fc4abfeSKashyap Desai case MPI3_EVENT_DEVICE_INFO_CHANGED: 2049fc4abfeSKashyap Desai { 2059fc4abfeSKashyap Desai struct mpi3_device_page0 *event_data = 2069fc4abfeSKashyap Desai (struct mpi3_device_page0 *)event_reply->event_data; 2079fc4abfeSKashyap Desai ioc_info(mrioc, "Device Info Changed: dev=0x%04x Form=0x%x\n", 2089fc4abfeSKashyap Desai event_data->dev_handle, event_data->device_form); 2099fc4abfeSKashyap Desai return; 2109fc4abfeSKashyap Desai } 2119fc4abfeSKashyap Desai case MPI3_EVENT_DEVICE_STATUS_CHANGE: 2129fc4abfeSKashyap Desai { 2139fc4abfeSKashyap Desai struct mpi3_event_data_device_status_change *event_data = 2149fc4abfeSKashyap Desai (struct mpi3_event_data_device_status_change *)event_reply->event_data; 2159fc4abfeSKashyap Desai ioc_info(mrioc, "Device status Change: dev=0x%04x RC=0x%x\n", 2169fc4abfeSKashyap Desai event_data->dev_handle, event_data->reason_code); 2179fc4abfeSKashyap Desai return; 2189fc4abfeSKashyap Desai } 2199fc4abfeSKashyap Desai case MPI3_EVENT_SAS_DISCOVERY: 2209fc4abfeSKashyap Desai { 2219fc4abfeSKashyap Desai struct mpi3_event_data_sas_discovery *event_data = 2229fc4abfeSKashyap Desai (struct mpi3_event_data_sas_discovery *)event_reply->event_data; 2239fc4abfeSKashyap Desai ioc_info(mrioc, "SAS Discovery: (%s) status (0x%08x)\n", 2249fc4abfeSKashyap Desai (event_data->reason_code == MPI3_EVENT_SAS_DISC_RC_STARTED) ? 2259fc4abfeSKashyap Desai "start" : "stop", 2269fc4abfeSKashyap Desai le32_to_cpu(event_data->discovery_status)); 2279fc4abfeSKashyap Desai return; 2289fc4abfeSKashyap Desai } 2299fc4abfeSKashyap Desai case MPI3_EVENT_SAS_BROADCAST_PRIMITIVE: 2309fc4abfeSKashyap Desai desc = "SAS Broadcast Primitive"; 2319fc4abfeSKashyap Desai break; 2329fc4abfeSKashyap Desai case MPI3_EVENT_SAS_NOTIFY_PRIMITIVE: 2339fc4abfeSKashyap Desai desc = "SAS Notify Primitive"; 2349fc4abfeSKashyap Desai break; 2359fc4abfeSKashyap Desai case MPI3_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE: 2369fc4abfeSKashyap Desai desc = "SAS Init Device Status Change"; 2379fc4abfeSKashyap Desai break; 2389fc4abfeSKashyap Desai case MPI3_EVENT_SAS_INIT_TABLE_OVERFLOW: 2399fc4abfeSKashyap Desai desc = "SAS Init Table Overflow"; 2409fc4abfeSKashyap Desai break; 2419fc4abfeSKashyap Desai case MPI3_EVENT_SAS_TOPOLOGY_CHANGE_LIST: 2429fc4abfeSKashyap Desai desc = "SAS Topology Change List"; 2439fc4abfeSKashyap Desai break; 2449fc4abfeSKashyap Desai case MPI3_EVENT_ENCL_DEVICE_STATUS_CHANGE: 2459fc4abfeSKashyap Desai desc = "Enclosure Device Status Change"; 2469fc4abfeSKashyap Desai break; 2477188c03fSSreekanth Reddy case MPI3_EVENT_ENCL_DEVICE_ADDED: 2487188c03fSSreekanth Reddy desc = "Enclosure Added"; 2497188c03fSSreekanth Reddy break; 2509fc4abfeSKashyap Desai case MPI3_EVENT_HARD_RESET_RECEIVED: 2519fc4abfeSKashyap Desai desc = "Hard Reset Received"; 2529fc4abfeSKashyap Desai break; 2539fc4abfeSKashyap Desai case MPI3_EVENT_SAS_PHY_COUNTER: 2549fc4abfeSKashyap Desai desc = "SAS PHY Counter"; 2559fc4abfeSKashyap Desai break; 2569fc4abfeSKashyap Desai case MPI3_EVENT_SAS_DEVICE_DISCOVERY_ERROR: 2579fc4abfeSKashyap Desai desc = "SAS Device Discovery Error"; 2589fc4abfeSKashyap Desai break; 2599fc4abfeSKashyap Desai case MPI3_EVENT_PCIE_TOPOLOGY_CHANGE_LIST: 2609fc4abfeSKashyap Desai desc = "PCIE Topology Change List"; 2619fc4abfeSKashyap Desai break; 2629fc4abfeSKashyap Desai case MPI3_EVENT_PCIE_ENUMERATION: 2639fc4abfeSKashyap Desai { 2649fc4abfeSKashyap Desai struct mpi3_event_data_pcie_enumeration *event_data = 2659fc4abfeSKashyap Desai (struct mpi3_event_data_pcie_enumeration *)event_reply->event_data; 2669fc4abfeSKashyap Desai ioc_info(mrioc, "PCIE Enumeration: (%s)", 2679fc4abfeSKashyap Desai (event_data->reason_code == 2689fc4abfeSKashyap Desai MPI3_EVENT_PCIE_ENUM_RC_STARTED) ? "start" : "stop"); 2699fc4abfeSKashyap Desai if (event_data->enumeration_status) 2709fc4abfeSKashyap Desai ioc_info(mrioc, "enumeration_status(0x%08x)\n", 2719fc4abfeSKashyap Desai le32_to_cpu(event_data->enumeration_status)); 2729fc4abfeSKashyap Desai return; 2739fc4abfeSKashyap Desai } 2749fc4abfeSKashyap Desai case MPI3_EVENT_PREPARE_FOR_RESET: 2759fc4abfeSKashyap Desai desc = "Prepare For Reset"; 2769fc4abfeSKashyap Desai break; 2779fc4abfeSKashyap Desai } 2789fc4abfeSKashyap Desai 2799fc4abfeSKashyap Desai if (!desc) 2809fc4abfeSKashyap Desai return; 2819fc4abfeSKashyap Desai 2829fc4abfeSKashyap Desai ioc_info(mrioc, "%s\n", desc); 2839fc4abfeSKashyap Desai } 2849fc4abfeSKashyap Desai 285824a1566SKashyap Desai static void mpi3mr_handle_events(struct mpi3mr_ioc *mrioc, 286824a1566SKashyap Desai struct mpi3_default_reply *def_reply) 287824a1566SKashyap Desai { 288824a1566SKashyap Desai struct mpi3_event_notification_reply *event_reply = 289824a1566SKashyap Desai (struct mpi3_event_notification_reply *)def_reply; 290824a1566SKashyap Desai 291824a1566SKashyap Desai mrioc->change_count = le16_to_cpu(event_reply->ioc_change_count); 2929fc4abfeSKashyap Desai mpi3mr_print_event_data(mrioc, event_reply); 29313ef29eaSKashyap Desai mpi3mr_os_handle_events(mrioc, event_reply); 294824a1566SKashyap Desai } 295824a1566SKashyap Desai 296824a1566SKashyap Desai static struct mpi3mr_drv_cmd * 297824a1566SKashyap Desai mpi3mr_get_drv_cmd(struct mpi3mr_ioc *mrioc, u16 host_tag, 298824a1566SKashyap Desai struct mpi3_default_reply *def_reply) 299824a1566SKashyap Desai { 30013ef29eaSKashyap Desai u16 idx; 30113ef29eaSKashyap Desai 302824a1566SKashyap Desai switch (host_tag) { 303824a1566SKashyap Desai case MPI3MR_HOSTTAG_INITCMDS: 304824a1566SKashyap Desai return &mrioc->init_cmds; 30532d457d5SSreekanth Reddy case MPI3MR_HOSTTAG_CFG_CMDS: 30632d457d5SSreekanth Reddy return &mrioc->cfg_cmds; 307f5e6d5a3SSumit Saxena case MPI3MR_HOSTTAG_BSG_CMDS: 308f5e6d5a3SSumit Saxena return &mrioc->bsg_cmds; 309e844adb1SKashyap Desai case MPI3MR_HOSTTAG_BLK_TMS: 310e844adb1SKashyap Desai return &mrioc->host_tm_cmds; 31143ca1100SSumit Saxena case MPI3MR_HOSTTAG_PEL_ABORT: 31243ca1100SSumit Saxena return &mrioc->pel_abort_cmd; 31343ca1100SSumit Saxena case MPI3MR_HOSTTAG_PEL_WAIT: 31443ca1100SSumit Saxena return &mrioc->pel_cmds; 315*2bd37e28SSreekanth Reddy case MPI3MR_HOSTTAG_TRANSPORT_CMDS: 316*2bd37e28SSreekanth Reddy return &mrioc->transport_cmds; 317824a1566SKashyap Desai case MPI3MR_HOSTTAG_INVALID: 318824a1566SKashyap Desai if (def_reply && def_reply->function == 319824a1566SKashyap Desai MPI3_FUNCTION_EVENT_NOTIFICATION) 320824a1566SKashyap Desai mpi3mr_handle_events(mrioc, def_reply); 321824a1566SKashyap Desai return NULL; 322824a1566SKashyap Desai default: 323824a1566SKashyap Desai break; 324824a1566SKashyap Desai } 32513ef29eaSKashyap Desai if (host_tag >= MPI3MR_HOSTTAG_DEVRMCMD_MIN && 32613ef29eaSKashyap Desai host_tag <= MPI3MR_HOSTTAG_DEVRMCMD_MAX) { 32713ef29eaSKashyap Desai idx = host_tag - MPI3MR_HOSTTAG_DEVRMCMD_MIN; 32813ef29eaSKashyap Desai return &mrioc->dev_rmhs_cmds[idx]; 32913ef29eaSKashyap Desai } 330824a1566SKashyap Desai 331c1af985dSSreekanth Reddy if (host_tag >= MPI3MR_HOSTTAG_EVTACKCMD_MIN && 332c1af985dSSreekanth Reddy host_tag <= MPI3MR_HOSTTAG_EVTACKCMD_MAX) { 333c1af985dSSreekanth Reddy idx = host_tag - MPI3MR_HOSTTAG_EVTACKCMD_MIN; 334c1af985dSSreekanth Reddy return &mrioc->evtack_cmds[idx]; 335c1af985dSSreekanth Reddy } 336c1af985dSSreekanth Reddy 337824a1566SKashyap Desai return NULL; 338824a1566SKashyap Desai } 339824a1566SKashyap Desai 340824a1566SKashyap Desai static void mpi3mr_process_admin_reply_desc(struct mpi3mr_ioc *mrioc, 341824a1566SKashyap Desai struct mpi3_default_reply_descriptor *reply_desc, u64 *reply_dma) 342824a1566SKashyap Desai { 343824a1566SKashyap Desai u16 reply_desc_type, host_tag = 0; 344824a1566SKashyap Desai u16 ioc_status = MPI3_IOCSTATUS_SUCCESS; 345824a1566SKashyap Desai u32 ioc_loginfo = 0; 346824a1566SKashyap Desai struct mpi3_status_reply_descriptor *status_desc; 347824a1566SKashyap Desai struct mpi3_address_reply_descriptor *addr_desc; 348824a1566SKashyap Desai struct mpi3_success_reply_descriptor *success_desc; 349824a1566SKashyap Desai struct mpi3_default_reply *def_reply = NULL; 350824a1566SKashyap Desai struct mpi3mr_drv_cmd *cmdptr = NULL; 351824a1566SKashyap Desai struct mpi3_scsi_io_reply *scsi_reply; 352824a1566SKashyap Desai u8 *sense_buf = NULL; 353824a1566SKashyap Desai 354824a1566SKashyap Desai *reply_dma = 0; 355824a1566SKashyap Desai reply_desc_type = le16_to_cpu(reply_desc->reply_flags) & 356824a1566SKashyap Desai MPI3_REPLY_DESCRIPT_FLAGS_TYPE_MASK; 357824a1566SKashyap Desai switch (reply_desc_type) { 358824a1566SKashyap Desai case MPI3_REPLY_DESCRIPT_FLAGS_TYPE_STATUS: 359824a1566SKashyap Desai status_desc = (struct mpi3_status_reply_descriptor *)reply_desc; 360824a1566SKashyap Desai host_tag = le16_to_cpu(status_desc->host_tag); 361824a1566SKashyap Desai ioc_status = le16_to_cpu(status_desc->ioc_status); 362824a1566SKashyap Desai if (ioc_status & 363824a1566SKashyap Desai MPI3_REPLY_DESCRIPT_STATUS_IOCSTATUS_LOGINFOAVAIL) 364824a1566SKashyap Desai ioc_loginfo = le32_to_cpu(status_desc->ioc_log_info); 365824a1566SKashyap Desai ioc_status &= MPI3_REPLY_DESCRIPT_STATUS_IOCSTATUS_STATUS_MASK; 366824a1566SKashyap Desai break; 367824a1566SKashyap Desai case MPI3_REPLY_DESCRIPT_FLAGS_TYPE_ADDRESS_REPLY: 368824a1566SKashyap Desai addr_desc = (struct mpi3_address_reply_descriptor *)reply_desc; 369824a1566SKashyap Desai *reply_dma = le64_to_cpu(addr_desc->reply_frame_address); 370824a1566SKashyap Desai def_reply = mpi3mr_get_reply_virt_addr(mrioc, *reply_dma); 371824a1566SKashyap Desai if (!def_reply) 372824a1566SKashyap Desai goto out; 373824a1566SKashyap Desai host_tag = le16_to_cpu(def_reply->host_tag); 374824a1566SKashyap Desai ioc_status = le16_to_cpu(def_reply->ioc_status); 375824a1566SKashyap Desai if (ioc_status & 376824a1566SKashyap Desai MPI3_REPLY_DESCRIPT_STATUS_IOCSTATUS_LOGINFOAVAIL) 377824a1566SKashyap Desai ioc_loginfo = le32_to_cpu(def_reply->ioc_log_info); 378824a1566SKashyap Desai ioc_status &= MPI3_REPLY_DESCRIPT_STATUS_IOCSTATUS_STATUS_MASK; 379824a1566SKashyap Desai if (def_reply->function == MPI3_FUNCTION_SCSI_IO) { 380824a1566SKashyap Desai scsi_reply = (struct mpi3_scsi_io_reply *)def_reply; 381824a1566SKashyap Desai sense_buf = mpi3mr_get_sensebuf_virt_addr(mrioc, 382824a1566SKashyap Desai le64_to_cpu(scsi_reply->sense_data_buffer_address)); 383824a1566SKashyap Desai } 384824a1566SKashyap Desai break; 385824a1566SKashyap Desai case MPI3_REPLY_DESCRIPT_FLAGS_TYPE_SUCCESS: 386824a1566SKashyap Desai success_desc = (struct mpi3_success_reply_descriptor *)reply_desc; 387824a1566SKashyap Desai host_tag = le16_to_cpu(success_desc->host_tag); 388824a1566SKashyap Desai break; 389824a1566SKashyap Desai default: 390824a1566SKashyap Desai break; 391824a1566SKashyap Desai } 392824a1566SKashyap Desai 393824a1566SKashyap Desai cmdptr = mpi3mr_get_drv_cmd(mrioc, host_tag, def_reply); 394824a1566SKashyap Desai if (cmdptr) { 395824a1566SKashyap Desai if (cmdptr->state & MPI3MR_CMD_PENDING) { 396824a1566SKashyap Desai cmdptr->state |= MPI3MR_CMD_COMPLETE; 397824a1566SKashyap Desai cmdptr->ioc_loginfo = ioc_loginfo; 398824a1566SKashyap Desai cmdptr->ioc_status = ioc_status; 399824a1566SKashyap Desai cmdptr->state &= ~MPI3MR_CMD_PENDING; 400824a1566SKashyap Desai if (def_reply) { 401824a1566SKashyap Desai cmdptr->state |= MPI3MR_CMD_REPLY_VALID; 402824a1566SKashyap Desai memcpy((u8 *)cmdptr->reply, (u8 *)def_reply, 403c5758fc7SSreekanth Reddy mrioc->reply_sz); 404824a1566SKashyap Desai } 405824a1566SKashyap Desai if (cmdptr->is_waiting) { 406824a1566SKashyap Desai complete(&cmdptr->done); 407824a1566SKashyap Desai cmdptr->is_waiting = 0; 408824a1566SKashyap Desai } else if (cmdptr->callback) 409824a1566SKashyap Desai cmdptr->callback(mrioc, cmdptr); 410824a1566SKashyap Desai } 411824a1566SKashyap Desai } 412824a1566SKashyap Desai out: 413824a1566SKashyap Desai if (sense_buf) 414824a1566SKashyap Desai mpi3mr_repost_sense_buf(mrioc, 415824a1566SKashyap Desai le64_to_cpu(scsi_reply->sense_data_buffer_address)); 416824a1566SKashyap Desai } 417824a1566SKashyap Desai 418824a1566SKashyap Desai static int mpi3mr_process_admin_reply_q(struct mpi3mr_ioc *mrioc) 419824a1566SKashyap Desai { 420824a1566SKashyap Desai u32 exp_phase = mrioc->admin_reply_ephase; 421824a1566SKashyap Desai u32 admin_reply_ci = mrioc->admin_reply_ci; 422824a1566SKashyap Desai u32 num_admin_replies = 0; 423824a1566SKashyap Desai u64 reply_dma = 0; 424824a1566SKashyap Desai struct mpi3_default_reply_descriptor *reply_desc; 425824a1566SKashyap Desai 426824a1566SKashyap Desai reply_desc = (struct mpi3_default_reply_descriptor *)mrioc->admin_reply_base + 427824a1566SKashyap Desai admin_reply_ci; 428824a1566SKashyap Desai 429824a1566SKashyap Desai if ((le16_to_cpu(reply_desc->reply_flags) & 430824a1566SKashyap Desai MPI3_REPLY_DESCRIPT_FLAGS_PHASE_MASK) != exp_phase) 431824a1566SKashyap Desai return 0; 432824a1566SKashyap Desai 433824a1566SKashyap Desai do { 434824a1566SKashyap Desai mrioc->admin_req_ci = le16_to_cpu(reply_desc->request_queue_ci); 435824a1566SKashyap Desai mpi3mr_process_admin_reply_desc(mrioc, reply_desc, &reply_dma); 436824a1566SKashyap Desai if (reply_dma) 437824a1566SKashyap Desai mpi3mr_repost_reply_buf(mrioc, reply_dma); 438824a1566SKashyap Desai num_admin_replies++; 439824a1566SKashyap Desai if (++admin_reply_ci == mrioc->num_admin_replies) { 440824a1566SKashyap Desai admin_reply_ci = 0; 441824a1566SKashyap Desai exp_phase ^= 1; 442824a1566SKashyap Desai } 443824a1566SKashyap Desai reply_desc = 444824a1566SKashyap Desai (struct mpi3_default_reply_descriptor *)mrioc->admin_reply_base + 445824a1566SKashyap Desai admin_reply_ci; 446824a1566SKashyap Desai if ((le16_to_cpu(reply_desc->reply_flags) & 447824a1566SKashyap Desai MPI3_REPLY_DESCRIPT_FLAGS_PHASE_MASK) != exp_phase) 448824a1566SKashyap Desai break; 449824a1566SKashyap Desai } while (1); 450824a1566SKashyap Desai 451824a1566SKashyap Desai writel(admin_reply_ci, &mrioc->sysif_regs->admin_reply_queue_ci); 452824a1566SKashyap Desai mrioc->admin_reply_ci = admin_reply_ci; 453824a1566SKashyap Desai mrioc->admin_reply_ephase = exp_phase; 454824a1566SKashyap Desai 455824a1566SKashyap Desai return num_admin_replies; 456824a1566SKashyap Desai } 457824a1566SKashyap Desai 458023ab2a9SKashyap Desai /** 459023ab2a9SKashyap Desai * mpi3mr_get_reply_desc - get reply descriptor frame corresponding to 460023ab2a9SKashyap Desai * queue's consumer index from operational reply descriptor queue. 461023ab2a9SKashyap Desai * @op_reply_q: op_reply_qinfo object 462023ab2a9SKashyap Desai * @reply_ci: operational reply descriptor's queue consumer index 463023ab2a9SKashyap Desai * 464023ab2a9SKashyap Desai * Returns reply descriptor frame address 465023ab2a9SKashyap Desai */ 466023ab2a9SKashyap Desai static inline struct mpi3_default_reply_descriptor * 467023ab2a9SKashyap Desai mpi3mr_get_reply_desc(struct op_reply_qinfo *op_reply_q, u32 reply_ci) 468023ab2a9SKashyap Desai { 469023ab2a9SKashyap Desai void *segment_base_addr; 470023ab2a9SKashyap Desai struct segments *segments = op_reply_q->q_segments; 471023ab2a9SKashyap Desai struct mpi3_default_reply_descriptor *reply_desc = NULL; 472023ab2a9SKashyap Desai 473023ab2a9SKashyap Desai segment_base_addr = 474023ab2a9SKashyap Desai segments[reply_ci / op_reply_q->segment_qd].segment; 475023ab2a9SKashyap Desai reply_desc = (struct mpi3_default_reply_descriptor *)segment_base_addr + 476023ab2a9SKashyap Desai (reply_ci % op_reply_q->segment_qd); 477023ab2a9SKashyap Desai return reply_desc; 478023ab2a9SKashyap Desai } 479023ab2a9SKashyap Desai 480afd3a579SSreekanth Reddy /** 481afd3a579SSreekanth Reddy * mpi3mr_process_op_reply_q - Operational reply queue handler 482afd3a579SSreekanth Reddy * @mrioc: Adapter instance reference 483afd3a579SSreekanth Reddy * @op_reply_q: Operational reply queue info 484afd3a579SSreekanth Reddy * 485afd3a579SSreekanth Reddy * Checks the specific operational reply queue and drains the 486afd3a579SSreekanth Reddy * reply queue entries until the queue is empty and process the 487afd3a579SSreekanth Reddy * individual reply descriptors. 488afd3a579SSreekanth Reddy * 489afd3a579SSreekanth Reddy * Return: 0 if queue is already processed,or number of reply 490afd3a579SSreekanth Reddy * descriptors processed. 491afd3a579SSreekanth Reddy */ 492afd3a579SSreekanth Reddy int mpi3mr_process_op_reply_q(struct mpi3mr_ioc *mrioc, 493afd3a579SSreekanth Reddy struct op_reply_qinfo *op_reply_q) 494023ab2a9SKashyap Desai { 495023ab2a9SKashyap Desai struct op_req_qinfo *op_req_q; 496023ab2a9SKashyap Desai u32 exp_phase; 497023ab2a9SKashyap Desai u32 reply_ci; 498023ab2a9SKashyap Desai u32 num_op_reply = 0; 499023ab2a9SKashyap Desai u64 reply_dma = 0; 500023ab2a9SKashyap Desai struct mpi3_default_reply_descriptor *reply_desc; 501023ab2a9SKashyap Desai u16 req_q_idx = 0, reply_qidx; 502023ab2a9SKashyap Desai 503023ab2a9SKashyap Desai reply_qidx = op_reply_q->qid - 1; 504023ab2a9SKashyap Desai 505463429f8SKashyap Desai if (!atomic_add_unless(&op_reply_q->in_use, 1, 1)) 506463429f8SKashyap Desai return 0; 507463429f8SKashyap Desai 508023ab2a9SKashyap Desai exp_phase = op_reply_q->ephase; 509023ab2a9SKashyap Desai reply_ci = op_reply_q->ci; 510023ab2a9SKashyap Desai 511023ab2a9SKashyap Desai reply_desc = mpi3mr_get_reply_desc(op_reply_q, reply_ci); 512023ab2a9SKashyap Desai if ((le16_to_cpu(reply_desc->reply_flags) & 513023ab2a9SKashyap Desai MPI3_REPLY_DESCRIPT_FLAGS_PHASE_MASK) != exp_phase) { 514463429f8SKashyap Desai atomic_dec(&op_reply_q->in_use); 515023ab2a9SKashyap Desai return 0; 516023ab2a9SKashyap Desai } 517023ab2a9SKashyap Desai 518023ab2a9SKashyap Desai do { 519023ab2a9SKashyap Desai req_q_idx = le16_to_cpu(reply_desc->request_queue_id) - 1; 520023ab2a9SKashyap Desai op_req_q = &mrioc->req_qinfo[req_q_idx]; 521023ab2a9SKashyap Desai 522023ab2a9SKashyap Desai WRITE_ONCE(op_req_q->ci, le16_to_cpu(reply_desc->request_queue_ci)); 523023ab2a9SKashyap Desai mpi3mr_process_op_reply_desc(mrioc, reply_desc, &reply_dma, 524023ab2a9SKashyap Desai reply_qidx); 525463429f8SKashyap Desai atomic_dec(&op_reply_q->pend_ios); 526023ab2a9SKashyap Desai if (reply_dma) 527023ab2a9SKashyap Desai mpi3mr_repost_reply_buf(mrioc, reply_dma); 528023ab2a9SKashyap Desai num_op_reply++; 529023ab2a9SKashyap Desai 530023ab2a9SKashyap Desai if (++reply_ci == op_reply_q->num_replies) { 531023ab2a9SKashyap Desai reply_ci = 0; 532023ab2a9SKashyap Desai exp_phase ^= 1; 533023ab2a9SKashyap Desai } 534023ab2a9SKashyap Desai 535023ab2a9SKashyap Desai reply_desc = mpi3mr_get_reply_desc(op_reply_q, reply_ci); 536023ab2a9SKashyap Desai 537023ab2a9SKashyap Desai if ((le16_to_cpu(reply_desc->reply_flags) & 538023ab2a9SKashyap Desai MPI3_REPLY_DESCRIPT_FLAGS_PHASE_MASK) != exp_phase) 539023ab2a9SKashyap Desai break; 540463429f8SKashyap Desai /* 541463429f8SKashyap Desai * Exit completion loop to avoid CPU lockup 542463429f8SKashyap Desai * Ensure remaining completion happens from threaded ISR. 543463429f8SKashyap Desai */ 544463429f8SKashyap Desai if (num_op_reply > mrioc->max_host_ios) { 545afd3a579SSreekanth Reddy op_reply_q->enable_irq_poll = true; 546463429f8SKashyap Desai break; 547463429f8SKashyap Desai } 548023ab2a9SKashyap Desai 549023ab2a9SKashyap Desai } while (1); 550023ab2a9SKashyap Desai 551023ab2a9SKashyap Desai writel(reply_ci, 552023ab2a9SKashyap Desai &mrioc->sysif_regs->oper_queue_indexes[reply_qidx].consumer_index); 553023ab2a9SKashyap Desai op_reply_q->ci = reply_ci; 554023ab2a9SKashyap Desai op_reply_q->ephase = exp_phase; 555023ab2a9SKashyap Desai 556463429f8SKashyap Desai atomic_dec(&op_reply_q->in_use); 557023ab2a9SKashyap Desai return num_op_reply; 558023ab2a9SKashyap Desai } 559023ab2a9SKashyap Desai 560afd3a579SSreekanth Reddy /** 561afd3a579SSreekanth Reddy * mpi3mr_blk_mq_poll - Operational reply queue handler 562afd3a579SSreekanth Reddy * @shost: SCSI Host reference 563afd3a579SSreekanth Reddy * @queue_num: Request queue number (w.r.t OS it is hardware context number) 564afd3a579SSreekanth Reddy * 565afd3a579SSreekanth Reddy * Checks the specific operational reply queue and drains the 566afd3a579SSreekanth Reddy * reply queue entries until the queue is empty and process the 567afd3a579SSreekanth Reddy * individual reply descriptors. 568afd3a579SSreekanth Reddy * 569afd3a579SSreekanth Reddy * Return: 0 if queue is already processed,or number of reply 570afd3a579SSreekanth Reddy * descriptors processed. 571afd3a579SSreekanth Reddy */ 572afd3a579SSreekanth Reddy int mpi3mr_blk_mq_poll(struct Scsi_Host *shost, unsigned int queue_num) 573afd3a579SSreekanth Reddy { 574afd3a579SSreekanth Reddy int num_entries = 0; 575afd3a579SSreekanth Reddy struct mpi3mr_ioc *mrioc; 576afd3a579SSreekanth Reddy 577afd3a579SSreekanth Reddy mrioc = (struct mpi3mr_ioc *)shost->hostdata; 578afd3a579SSreekanth Reddy 579afd3a579SSreekanth Reddy if ((mrioc->reset_in_progress || mrioc->prepare_for_reset)) 580afd3a579SSreekanth Reddy return 0; 581afd3a579SSreekanth Reddy 582afd3a579SSreekanth Reddy num_entries = mpi3mr_process_op_reply_q(mrioc, 583afd3a579SSreekanth Reddy &mrioc->op_reply_qinfo[queue_num]); 584afd3a579SSreekanth Reddy 585afd3a579SSreekanth Reddy return num_entries; 586afd3a579SSreekanth Reddy } 587afd3a579SSreekanth Reddy 588824a1566SKashyap Desai static irqreturn_t mpi3mr_isr_primary(int irq, void *privdata) 589824a1566SKashyap Desai { 590824a1566SKashyap Desai struct mpi3mr_intr_info *intr_info = privdata; 591824a1566SKashyap Desai struct mpi3mr_ioc *mrioc; 592824a1566SKashyap Desai u16 midx; 593463429f8SKashyap Desai u32 num_admin_replies = 0, num_op_reply = 0; 594824a1566SKashyap Desai 595824a1566SKashyap Desai if (!intr_info) 596824a1566SKashyap Desai return IRQ_NONE; 597824a1566SKashyap Desai 598824a1566SKashyap Desai mrioc = intr_info->mrioc; 599824a1566SKashyap Desai 600824a1566SKashyap Desai if (!mrioc->intr_enabled) 601824a1566SKashyap Desai return IRQ_NONE; 602824a1566SKashyap Desai 603824a1566SKashyap Desai midx = intr_info->msix_index; 604824a1566SKashyap Desai 605824a1566SKashyap Desai if (!midx) 606824a1566SKashyap Desai num_admin_replies = mpi3mr_process_admin_reply_q(mrioc); 607463429f8SKashyap Desai if (intr_info->op_reply_q) 608afd3a579SSreekanth Reddy num_op_reply = mpi3mr_process_op_reply_q(mrioc, 609afd3a579SSreekanth Reddy intr_info->op_reply_q); 610824a1566SKashyap Desai 611463429f8SKashyap Desai if (num_admin_replies || num_op_reply) 612824a1566SKashyap Desai return IRQ_HANDLED; 613824a1566SKashyap Desai else 614824a1566SKashyap Desai return IRQ_NONE; 615824a1566SKashyap Desai } 616824a1566SKashyap Desai 617824a1566SKashyap Desai static irqreturn_t mpi3mr_isr(int irq, void *privdata) 618824a1566SKashyap Desai { 619824a1566SKashyap Desai struct mpi3mr_intr_info *intr_info = privdata; 620463429f8SKashyap Desai struct mpi3mr_ioc *mrioc; 621463429f8SKashyap Desai u16 midx; 622824a1566SKashyap Desai int ret; 623824a1566SKashyap Desai 624824a1566SKashyap Desai if (!intr_info) 625824a1566SKashyap Desai return IRQ_NONE; 626824a1566SKashyap Desai 627463429f8SKashyap Desai mrioc = intr_info->mrioc; 628463429f8SKashyap Desai midx = intr_info->msix_index; 629824a1566SKashyap Desai /* Call primary ISR routine */ 630824a1566SKashyap Desai ret = mpi3mr_isr_primary(irq, privdata); 631824a1566SKashyap Desai 632463429f8SKashyap Desai /* 633463429f8SKashyap Desai * If more IOs are expected, schedule IRQ polling thread. 634463429f8SKashyap Desai * Otherwise exit from ISR. 635463429f8SKashyap Desai */ 636463429f8SKashyap Desai if (!intr_info->op_reply_q) 637824a1566SKashyap Desai return ret; 638463429f8SKashyap Desai 639463429f8SKashyap Desai if (!intr_info->op_reply_q->enable_irq_poll || 640463429f8SKashyap Desai !atomic_read(&intr_info->op_reply_q->pend_ios)) 641463429f8SKashyap Desai return ret; 642463429f8SKashyap Desai 643463429f8SKashyap Desai disable_irq_nosync(pci_irq_vector(mrioc->pdev, midx)); 644463429f8SKashyap Desai 645463429f8SKashyap Desai return IRQ_WAKE_THREAD; 646824a1566SKashyap Desai } 647824a1566SKashyap Desai 648824a1566SKashyap Desai /** 649824a1566SKashyap Desai * mpi3mr_isr_poll - Reply queue polling routine 650824a1566SKashyap Desai * @irq: IRQ 651824a1566SKashyap Desai * @privdata: Interrupt info 652824a1566SKashyap Desai * 653824a1566SKashyap Desai * poll for pending I/O completions in a loop until pending I/Os 654824a1566SKashyap Desai * present or controller queue depth I/Os are processed. 655824a1566SKashyap Desai * 656824a1566SKashyap Desai * Return: IRQ_NONE or IRQ_HANDLED 657824a1566SKashyap Desai */ 658824a1566SKashyap Desai static irqreturn_t mpi3mr_isr_poll(int irq, void *privdata) 659824a1566SKashyap Desai { 660463429f8SKashyap Desai struct mpi3mr_intr_info *intr_info = privdata; 661463429f8SKashyap Desai struct mpi3mr_ioc *mrioc; 662463429f8SKashyap Desai u16 midx; 663463429f8SKashyap Desai u32 num_op_reply = 0; 664463429f8SKashyap Desai 665463429f8SKashyap Desai if (!intr_info || !intr_info->op_reply_q) 666463429f8SKashyap Desai return IRQ_NONE; 667463429f8SKashyap Desai 668463429f8SKashyap Desai mrioc = intr_info->mrioc; 669463429f8SKashyap Desai midx = intr_info->msix_index; 670463429f8SKashyap Desai 671463429f8SKashyap Desai /* Poll for pending IOs completions */ 672463429f8SKashyap Desai do { 673463429f8SKashyap Desai if (!mrioc->intr_enabled) 674463429f8SKashyap Desai break; 675463429f8SKashyap Desai 676463429f8SKashyap Desai if (!midx) 677463429f8SKashyap Desai mpi3mr_process_admin_reply_q(mrioc); 678463429f8SKashyap Desai if (intr_info->op_reply_q) 679463429f8SKashyap Desai num_op_reply += 680afd3a579SSreekanth Reddy mpi3mr_process_op_reply_q(mrioc, 681afd3a579SSreekanth Reddy intr_info->op_reply_q); 682463429f8SKashyap Desai 683afd3a579SSreekanth Reddy usleep_range(MPI3MR_IRQ_POLL_SLEEP, 10 * MPI3MR_IRQ_POLL_SLEEP); 684463429f8SKashyap Desai 685463429f8SKashyap Desai } while (atomic_read(&intr_info->op_reply_q->pend_ios) && 686463429f8SKashyap Desai (num_op_reply < mrioc->max_host_ios)); 687463429f8SKashyap Desai 688463429f8SKashyap Desai intr_info->op_reply_q->enable_irq_poll = false; 689463429f8SKashyap Desai enable_irq(pci_irq_vector(mrioc->pdev, midx)); 690463429f8SKashyap Desai 691824a1566SKashyap Desai return IRQ_HANDLED; 692824a1566SKashyap Desai } 693824a1566SKashyap Desai 694824a1566SKashyap Desai /** 695824a1566SKashyap Desai * mpi3mr_request_irq - Request IRQ and register ISR 696824a1566SKashyap Desai * @mrioc: Adapter instance reference 697824a1566SKashyap Desai * @index: IRQ vector index 698824a1566SKashyap Desai * 699824a1566SKashyap Desai * Request threaded ISR with primary ISR and secondary 700824a1566SKashyap Desai * 701824a1566SKashyap Desai * Return: 0 on success and non zero on failures. 702824a1566SKashyap Desai */ 703824a1566SKashyap Desai static inline int mpi3mr_request_irq(struct mpi3mr_ioc *mrioc, u16 index) 704824a1566SKashyap Desai { 705824a1566SKashyap Desai struct pci_dev *pdev = mrioc->pdev; 706824a1566SKashyap Desai struct mpi3mr_intr_info *intr_info = mrioc->intr_info + index; 707824a1566SKashyap Desai int retval = 0; 708824a1566SKashyap Desai 709824a1566SKashyap Desai intr_info->mrioc = mrioc; 710824a1566SKashyap Desai intr_info->msix_index = index; 711824a1566SKashyap Desai intr_info->op_reply_q = NULL; 712824a1566SKashyap Desai 713824a1566SKashyap Desai snprintf(intr_info->name, MPI3MR_NAME_LENGTH, "%s%d-msix%d", 714824a1566SKashyap Desai mrioc->driver_name, mrioc->id, index); 715824a1566SKashyap Desai 716824a1566SKashyap Desai retval = request_threaded_irq(pci_irq_vector(pdev, index), mpi3mr_isr, 717824a1566SKashyap Desai mpi3mr_isr_poll, IRQF_SHARED, intr_info->name, intr_info); 718824a1566SKashyap Desai if (retval) { 719824a1566SKashyap Desai ioc_err(mrioc, "%s: Unable to allocate interrupt %d!\n", 720824a1566SKashyap Desai intr_info->name, pci_irq_vector(pdev, index)); 721824a1566SKashyap Desai return retval; 722824a1566SKashyap Desai } 723824a1566SKashyap Desai 724824a1566SKashyap Desai return retval; 725824a1566SKashyap Desai } 726824a1566SKashyap Desai 727afd3a579SSreekanth Reddy static void mpi3mr_calc_poll_queues(struct mpi3mr_ioc *mrioc, u16 max_vectors) 728afd3a579SSreekanth Reddy { 729afd3a579SSreekanth Reddy if (!mrioc->requested_poll_qcount) 730afd3a579SSreekanth Reddy return; 731afd3a579SSreekanth Reddy 732afd3a579SSreekanth Reddy /* Reserved for Admin and Default Queue */ 733afd3a579SSreekanth Reddy if (max_vectors > 2 && 734afd3a579SSreekanth Reddy (mrioc->requested_poll_qcount < max_vectors - 2)) { 735afd3a579SSreekanth Reddy ioc_info(mrioc, 736afd3a579SSreekanth Reddy "enabled polled queues (%d) msix (%d)\n", 737afd3a579SSreekanth Reddy mrioc->requested_poll_qcount, max_vectors); 738afd3a579SSreekanth Reddy } else { 739afd3a579SSreekanth Reddy ioc_info(mrioc, 740afd3a579SSreekanth Reddy "disabled polled queues (%d) msix (%d) because of no resources for default queue\n", 741afd3a579SSreekanth Reddy mrioc->requested_poll_qcount, max_vectors); 742afd3a579SSreekanth Reddy mrioc->requested_poll_qcount = 0; 743afd3a579SSreekanth Reddy } 744afd3a579SSreekanth Reddy } 745afd3a579SSreekanth Reddy 746824a1566SKashyap Desai /** 747824a1566SKashyap Desai * mpi3mr_setup_isr - Setup ISR for the controller 748824a1566SKashyap Desai * @mrioc: Adapter instance reference 749824a1566SKashyap Desai * @setup_one: Request one IRQ or more 750824a1566SKashyap Desai * 751824a1566SKashyap Desai * Allocate IRQ vectors and call mpi3mr_request_irq to setup ISR 752824a1566SKashyap Desai * 753824a1566SKashyap Desai * Return: 0 on success and non zero on failures. 754824a1566SKashyap Desai */ 755824a1566SKashyap Desai static int mpi3mr_setup_isr(struct mpi3mr_ioc *mrioc, u8 setup_one) 756824a1566SKashyap Desai { 757824a1566SKashyap Desai unsigned int irq_flags = PCI_IRQ_MSIX; 758afd3a579SSreekanth Reddy int max_vectors, min_vec; 7592938beddSDan Carpenter int retval; 7602938beddSDan Carpenter int i; 761afd3a579SSreekanth Reddy struct irq_affinity desc = { .pre_vectors = 1, .post_vectors = 1 }; 762824a1566SKashyap Desai 763fe6db615SSreekanth Reddy if (mrioc->is_intr_info_set) 764fe6db615SSreekanth Reddy return 0; 765fe6db615SSreekanth Reddy 766824a1566SKashyap Desai mpi3mr_cleanup_isr(mrioc); 767824a1566SKashyap Desai 768afd3a579SSreekanth Reddy if (setup_one || reset_devices) { 769824a1566SKashyap Desai max_vectors = 1; 770afd3a579SSreekanth Reddy retval = pci_alloc_irq_vectors(mrioc->pdev, 771afd3a579SSreekanth Reddy 1, max_vectors, irq_flags); 772afd3a579SSreekanth Reddy if (retval < 0) { 773afd3a579SSreekanth Reddy ioc_err(mrioc, "cannot allocate irq vectors, ret %d\n", 774afd3a579SSreekanth Reddy retval); 775afd3a579SSreekanth Reddy goto out_failed; 776afd3a579SSreekanth Reddy } 777afd3a579SSreekanth Reddy } else { 778824a1566SKashyap Desai max_vectors = 779afd3a579SSreekanth Reddy min_t(int, mrioc->cpu_count + 1 + 780afd3a579SSreekanth Reddy mrioc->requested_poll_qcount, mrioc->msix_count); 781afd3a579SSreekanth Reddy 782afd3a579SSreekanth Reddy mpi3mr_calc_poll_queues(mrioc, max_vectors); 783824a1566SKashyap Desai 784824a1566SKashyap Desai ioc_info(mrioc, 785824a1566SKashyap Desai "MSI-X vectors supported: %d, no of cores: %d,", 786824a1566SKashyap Desai mrioc->msix_count, mrioc->cpu_count); 787824a1566SKashyap Desai ioc_info(mrioc, 788afd3a579SSreekanth Reddy "MSI-x vectors requested: %d poll_queues %d\n", 789afd3a579SSreekanth Reddy max_vectors, mrioc->requested_poll_qcount); 790824a1566SKashyap Desai 791afd3a579SSreekanth Reddy desc.post_vectors = mrioc->requested_poll_qcount; 792afd3a579SSreekanth Reddy min_vec = desc.pre_vectors + desc.post_vectors; 793824a1566SKashyap Desai irq_flags |= PCI_IRQ_AFFINITY | PCI_IRQ_ALL_TYPES; 794824a1566SKashyap Desai 7952938beddSDan Carpenter retval = pci_alloc_irq_vectors_affinity(mrioc->pdev, 796afd3a579SSreekanth Reddy min_vec, max_vectors, irq_flags, &desc); 797afd3a579SSreekanth Reddy 7982938beddSDan Carpenter if (retval < 0) { 799afd3a579SSreekanth Reddy ioc_err(mrioc, "cannot allocate irq vectors, ret %d\n", 800afd3a579SSreekanth Reddy retval); 801824a1566SKashyap Desai goto out_failed; 802824a1566SKashyap Desai } 803afd3a579SSreekanth Reddy 804afd3a579SSreekanth Reddy 805c9566231SKashyap Desai /* 806c9566231SKashyap Desai * If only one MSI-x is allocated, then MSI-x 0 will be shared 807c9566231SKashyap Desai * between Admin queue and operational queue 808c9566231SKashyap Desai */ 809afd3a579SSreekanth Reddy if (retval == min_vec) 810c9566231SKashyap Desai mrioc->op_reply_q_offset = 0; 811afd3a579SSreekanth Reddy else if (retval != (max_vectors)) { 812afd3a579SSreekanth Reddy ioc_info(mrioc, 813afd3a579SSreekanth Reddy "allocated vectors (%d) are less than configured (%d)\n", 814afd3a579SSreekanth Reddy retval, max_vectors); 815afd3a579SSreekanth Reddy } 816824a1566SKashyap Desai 8172938beddSDan Carpenter max_vectors = retval; 818afd3a579SSreekanth Reddy mrioc->op_reply_q_offset = (max_vectors > 1) ? 1 : 0; 819afd3a579SSreekanth Reddy 820afd3a579SSreekanth Reddy mpi3mr_calc_poll_queues(mrioc, max_vectors); 821afd3a579SSreekanth Reddy 822824a1566SKashyap Desai } 823afd3a579SSreekanth Reddy 824824a1566SKashyap Desai mrioc->intr_info = kzalloc(sizeof(struct mpi3mr_intr_info) * max_vectors, 825824a1566SKashyap Desai GFP_KERNEL); 826824a1566SKashyap Desai if (!mrioc->intr_info) { 8272938beddSDan Carpenter retval = -ENOMEM; 828824a1566SKashyap Desai pci_free_irq_vectors(mrioc->pdev); 829824a1566SKashyap Desai goto out_failed; 830824a1566SKashyap Desai } 831824a1566SKashyap Desai for (i = 0; i < max_vectors; i++) { 832824a1566SKashyap Desai retval = mpi3mr_request_irq(mrioc, i); 833824a1566SKashyap Desai if (retval) { 834824a1566SKashyap Desai mrioc->intr_info_count = i; 835824a1566SKashyap Desai goto out_failed; 836824a1566SKashyap Desai } 837824a1566SKashyap Desai } 838fe6db615SSreekanth Reddy if (reset_devices || !setup_one) 839fe6db615SSreekanth Reddy mrioc->is_intr_info_set = true; 840824a1566SKashyap Desai mrioc->intr_info_count = max_vectors; 841824a1566SKashyap Desai mpi3mr_ioc_enable_intr(mrioc); 8422938beddSDan Carpenter return 0; 8432938beddSDan Carpenter 844824a1566SKashyap Desai out_failed: 845824a1566SKashyap Desai mpi3mr_cleanup_isr(mrioc); 846824a1566SKashyap Desai 847824a1566SKashyap Desai return retval; 848824a1566SKashyap Desai } 849824a1566SKashyap Desai 850824a1566SKashyap Desai static const struct { 851824a1566SKashyap Desai enum mpi3mr_iocstate value; 852824a1566SKashyap Desai char *name; 853824a1566SKashyap Desai } mrioc_states[] = { 854824a1566SKashyap Desai { MRIOC_STATE_READY, "ready" }, 855824a1566SKashyap Desai { MRIOC_STATE_FAULT, "fault" }, 856824a1566SKashyap Desai { MRIOC_STATE_RESET, "reset" }, 857824a1566SKashyap Desai { MRIOC_STATE_BECOMING_READY, "becoming ready" }, 858824a1566SKashyap Desai { MRIOC_STATE_RESET_REQUESTED, "reset requested" }, 859824a1566SKashyap Desai { MRIOC_STATE_UNRECOVERABLE, "unrecoverable error" }, 860824a1566SKashyap Desai }; 861824a1566SKashyap Desai 862824a1566SKashyap Desai static const char *mpi3mr_iocstate_name(enum mpi3mr_iocstate mrioc_state) 863824a1566SKashyap Desai { 864824a1566SKashyap Desai int i; 865824a1566SKashyap Desai char *name = NULL; 866824a1566SKashyap Desai 867824a1566SKashyap Desai for (i = 0; i < ARRAY_SIZE(mrioc_states); i++) { 868824a1566SKashyap Desai if (mrioc_states[i].value == mrioc_state) { 869824a1566SKashyap Desai name = mrioc_states[i].name; 870824a1566SKashyap Desai break; 871824a1566SKashyap Desai } 872824a1566SKashyap Desai } 873824a1566SKashyap Desai return name; 874824a1566SKashyap Desai } 875824a1566SKashyap Desai 876f061178eSKashyap Desai /* Reset reason to name mapper structure*/ 877f061178eSKashyap Desai static const struct { 878f061178eSKashyap Desai enum mpi3mr_reset_reason value; 879f061178eSKashyap Desai char *name; 880f061178eSKashyap Desai } mpi3mr_reset_reason_codes[] = { 881f061178eSKashyap Desai { MPI3MR_RESET_FROM_BRINGUP, "timeout in bringup" }, 882f061178eSKashyap Desai { MPI3MR_RESET_FROM_FAULT_WATCH, "fault" }, 883f5e6d5a3SSumit Saxena { MPI3MR_RESET_FROM_APP, "application invocation" }, 884f061178eSKashyap Desai { MPI3MR_RESET_FROM_EH_HOS, "error handling" }, 885f061178eSKashyap Desai { MPI3MR_RESET_FROM_TM_TIMEOUT, "TM timeout" }, 886f5e6d5a3SSumit Saxena { MPI3MR_RESET_FROM_APP_TIMEOUT, "application command timeout" }, 887f061178eSKashyap Desai { MPI3MR_RESET_FROM_MUR_FAILURE, "MUR failure" }, 888f061178eSKashyap Desai { MPI3MR_RESET_FROM_CTLR_CLEANUP, "timeout in controller cleanup" }, 889f061178eSKashyap Desai { MPI3MR_RESET_FROM_CIACTIV_FAULT, "component image activation fault" }, 890f061178eSKashyap Desai { MPI3MR_RESET_FROM_PE_TIMEOUT, "port enable timeout" }, 891f061178eSKashyap Desai { MPI3MR_RESET_FROM_TSU_TIMEOUT, "time stamp update timeout" }, 892f061178eSKashyap Desai { MPI3MR_RESET_FROM_DELREQQ_TIMEOUT, "delete request queue timeout" }, 893f061178eSKashyap Desai { MPI3MR_RESET_FROM_DELREPQ_TIMEOUT, "delete reply queue timeout" }, 894f061178eSKashyap Desai { 895f061178eSKashyap Desai MPI3MR_RESET_FROM_CREATEREPQ_TIMEOUT, 896f061178eSKashyap Desai "create request queue timeout" 897f061178eSKashyap Desai }, 898f061178eSKashyap Desai { 899f061178eSKashyap Desai MPI3MR_RESET_FROM_CREATEREQQ_TIMEOUT, 900f061178eSKashyap Desai "create reply queue timeout" 901f061178eSKashyap Desai }, 902f061178eSKashyap Desai { MPI3MR_RESET_FROM_IOCFACTS_TIMEOUT, "IOC facts timeout" }, 903f061178eSKashyap Desai { MPI3MR_RESET_FROM_IOCINIT_TIMEOUT, "IOC init timeout" }, 904f061178eSKashyap Desai { MPI3MR_RESET_FROM_EVTNOTIFY_TIMEOUT, "event notify timeout" }, 905f061178eSKashyap Desai { MPI3MR_RESET_FROM_EVTACK_TIMEOUT, "event acknowledgment timeout" }, 906f061178eSKashyap Desai { 907f061178eSKashyap Desai MPI3MR_RESET_FROM_CIACTVRST_TIMER, 908f061178eSKashyap Desai "component image activation timeout" 909f061178eSKashyap Desai }, 910f061178eSKashyap Desai { 911f061178eSKashyap Desai MPI3MR_RESET_FROM_GETPKGVER_TIMEOUT, 912f061178eSKashyap Desai "get package version timeout" 913f061178eSKashyap Desai }, 914f061178eSKashyap Desai { MPI3MR_RESET_FROM_SYSFS, "sysfs invocation" }, 915f061178eSKashyap Desai { MPI3MR_RESET_FROM_SYSFS_TIMEOUT, "sysfs TM timeout" }, 9165867b856SColin Ian King { MPI3MR_RESET_FROM_FIRMWARE, "firmware asynchronous reset" }, 91732d457d5SSreekanth Reddy { MPI3MR_RESET_FROM_CFG_REQ_TIMEOUT, "configuration request timeout"}, 918*2bd37e28SSreekanth Reddy { MPI3MR_RESET_FROM_SAS_TRANSPORT_TIMEOUT, "timeout of a SAS transport layer request" }, 919f061178eSKashyap Desai }; 920f061178eSKashyap Desai 921f061178eSKashyap Desai /** 922f061178eSKashyap Desai * mpi3mr_reset_rc_name - get reset reason code name 923f061178eSKashyap Desai * @reason_code: reset reason code value 924f061178eSKashyap Desai * 925f061178eSKashyap Desai * Map reset reason to an NULL terminated ASCII string 926f061178eSKashyap Desai * 927f061178eSKashyap Desai * Return: name corresponding to reset reason value or NULL. 928f061178eSKashyap Desai */ 929f061178eSKashyap Desai static const char *mpi3mr_reset_rc_name(enum mpi3mr_reset_reason reason_code) 930f061178eSKashyap Desai { 931f061178eSKashyap Desai int i; 932f061178eSKashyap Desai char *name = NULL; 933f061178eSKashyap Desai 934f061178eSKashyap Desai for (i = 0; i < ARRAY_SIZE(mpi3mr_reset_reason_codes); i++) { 935f061178eSKashyap Desai if (mpi3mr_reset_reason_codes[i].value == reason_code) { 936f061178eSKashyap Desai name = mpi3mr_reset_reason_codes[i].name; 937f061178eSKashyap Desai break; 938f061178eSKashyap Desai } 939f061178eSKashyap Desai } 940f061178eSKashyap Desai return name; 941f061178eSKashyap Desai } 942f061178eSKashyap Desai 943f061178eSKashyap Desai /* Reset type to name mapper structure*/ 944f061178eSKashyap Desai static const struct { 945f061178eSKashyap Desai u16 reset_type; 946f061178eSKashyap Desai char *name; 947f061178eSKashyap Desai } mpi3mr_reset_types[] = { 948f061178eSKashyap Desai { MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET, "soft" }, 949f061178eSKashyap Desai { MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, "diag fault" }, 950f061178eSKashyap Desai }; 951f061178eSKashyap Desai 952f061178eSKashyap Desai /** 953f061178eSKashyap Desai * mpi3mr_reset_type_name - get reset type name 954f061178eSKashyap Desai * @reset_type: reset type value 955f061178eSKashyap Desai * 956f061178eSKashyap Desai * Map reset type to an NULL terminated ASCII string 957f061178eSKashyap Desai * 958f061178eSKashyap Desai * Return: name corresponding to reset type value or NULL. 959f061178eSKashyap Desai */ 960f061178eSKashyap Desai static const char *mpi3mr_reset_type_name(u16 reset_type) 961f061178eSKashyap Desai { 962f061178eSKashyap Desai int i; 963f061178eSKashyap Desai char *name = NULL; 964f061178eSKashyap Desai 965f061178eSKashyap Desai for (i = 0; i < ARRAY_SIZE(mpi3mr_reset_types); i++) { 966f061178eSKashyap Desai if (mpi3mr_reset_types[i].reset_type == reset_type) { 967f061178eSKashyap Desai name = mpi3mr_reset_types[i].name; 968f061178eSKashyap Desai break; 969f061178eSKashyap Desai } 970f061178eSKashyap Desai } 971f061178eSKashyap Desai return name; 972f061178eSKashyap Desai } 973f061178eSKashyap Desai 974824a1566SKashyap Desai /** 975824a1566SKashyap Desai * mpi3mr_print_fault_info - Display fault information 976824a1566SKashyap Desai * @mrioc: Adapter instance reference 977824a1566SKashyap Desai * 978824a1566SKashyap Desai * Display the controller fault information if there is a 979824a1566SKashyap Desai * controller fault. 980824a1566SKashyap Desai * 981824a1566SKashyap Desai * Return: Nothing. 982824a1566SKashyap Desai */ 983b64845a7SSreekanth Reddy void mpi3mr_print_fault_info(struct mpi3mr_ioc *mrioc) 984824a1566SKashyap Desai { 985824a1566SKashyap Desai u32 ioc_status, code, code1, code2, code3; 986824a1566SKashyap Desai 987824a1566SKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 988824a1566SKashyap Desai 989824a1566SKashyap Desai if (ioc_status & MPI3_SYSIF_IOC_STATUS_FAULT) { 990824a1566SKashyap Desai code = readl(&mrioc->sysif_regs->fault); 991824a1566SKashyap Desai code1 = readl(&mrioc->sysif_regs->fault_info[0]); 992824a1566SKashyap Desai code2 = readl(&mrioc->sysif_regs->fault_info[1]); 993824a1566SKashyap Desai code3 = readl(&mrioc->sysif_regs->fault_info[2]); 994824a1566SKashyap Desai 995824a1566SKashyap Desai ioc_info(mrioc, 996824a1566SKashyap Desai "fault code(0x%08X): Additional code: (0x%08X:0x%08X:0x%08X)\n", 997824a1566SKashyap Desai code, code1, code2, code3); 998824a1566SKashyap Desai } 999824a1566SKashyap Desai } 1000824a1566SKashyap Desai 1001824a1566SKashyap Desai /** 1002824a1566SKashyap Desai * mpi3mr_get_iocstate - Get IOC State 1003824a1566SKashyap Desai * @mrioc: Adapter instance reference 1004824a1566SKashyap Desai * 1005824a1566SKashyap Desai * Return a proper IOC state enum based on the IOC status and 1006824a1566SKashyap Desai * IOC configuration and unrcoverable state of the controller. 1007824a1566SKashyap Desai * 1008824a1566SKashyap Desai * Return: Current IOC state. 1009824a1566SKashyap Desai */ 1010824a1566SKashyap Desai enum mpi3mr_iocstate mpi3mr_get_iocstate(struct mpi3mr_ioc *mrioc) 1011824a1566SKashyap Desai { 1012824a1566SKashyap Desai u32 ioc_status, ioc_config; 1013824a1566SKashyap Desai u8 ready, enabled; 1014824a1566SKashyap Desai 1015824a1566SKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 1016824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 1017824a1566SKashyap Desai 1018824a1566SKashyap Desai if (mrioc->unrecoverable) 1019824a1566SKashyap Desai return MRIOC_STATE_UNRECOVERABLE; 1020824a1566SKashyap Desai if (ioc_status & MPI3_SYSIF_IOC_STATUS_FAULT) 1021824a1566SKashyap Desai return MRIOC_STATE_FAULT; 1022824a1566SKashyap Desai 1023824a1566SKashyap Desai ready = (ioc_status & MPI3_SYSIF_IOC_STATUS_READY); 1024824a1566SKashyap Desai enabled = (ioc_config & MPI3_SYSIF_IOC_CONFIG_ENABLE_IOC); 1025824a1566SKashyap Desai 1026824a1566SKashyap Desai if (ready && enabled) 1027824a1566SKashyap Desai return MRIOC_STATE_READY; 1028824a1566SKashyap Desai if ((!ready) && (!enabled)) 1029824a1566SKashyap Desai return MRIOC_STATE_RESET; 1030824a1566SKashyap Desai if ((!ready) && (enabled)) 1031824a1566SKashyap Desai return MRIOC_STATE_BECOMING_READY; 1032824a1566SKashyap Desai 1033824a1566SKashyap Desai return MRIOC_STATE_RESET_REQUESTED; 1034824a1566SKashyap Desai } 1035824a1566SKashyap Desai 1036824a1566SKashyap Desai /** 1037824a1566SKashyap Desai * mpi3mr_clear_reset_history - clear reset history 1038824a1566SKashyap Desai * @mrioc: Adapter instance reference 1039824a1566SKashyap Desai * 1040824a1566SKashyap Desai * Write the reset history bit in IOC status to clear the bit, 1041824a1566SKashyap Desai * if it is already set. 1042824a1566SKashyap Desai * 1043824a1566SKashyap Desai * Return: Nothing. 1044824a1566SKashyap Desai */ 1045824a1566SKashyap Desai static inline void mpi3mr_clear_reset_history(struct mpi3mr_ioc *mrioc) 1046824a1566SKashyap Desai { 1047824a1566SKashyap Desai u32 ioc_status; 1048824a1566SKashyap Desai 1049824a1566SKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 1050824a1566SKashyap Desai if (ioc_status & MPI3_SYSIF_IOC_STATUS_RESET_HISTORY) 1051824a1566SKashyap Desai writel(ioc_status, &mrioc->sysif_regs->ioc_status); 1052824a1566SKashyap Desai } 1053824a1566SKashyap Desai 1054824a1566SKashyap Desai /** 1055824a1566SKashyap Desai * mpi3mr_issue_and_process_mur - Message unit Reset handler 1056824a1566SKashyap Desai * @mrioc: Adapter instance reference 1057824a1566SKashyap Desai * @reset_reason: Reset reason code 1058824a1566SKashyap Desai * 1059824a1566SKashyap Desai * Issue Message unit Reset to the controller and wait for it to 1060824a1566SKashyap Desai * be complete. 1061824a1566SKashyap Desai * 1062824a1566SKashyap Desai * Return: 0 on success, -1 on failure. 1063824a1566SKashyap Desai */ 1064824a1566SKashyap Desai static int mpi3mr_issue_and_process_mur(struct mpi3mr_ioc *mrioc, 1065824a1566SKashyap Desai u32 reset_reason) 1066824a1566SKashyap Desai { 1067824a1566SKashyap Desai u32 ioc_config, timeout, ioc_status; 1068824a1566SKashyap Desai int retval = -1; 1069824a1566SKashyap Desai 1070824a1566SKashyap Desai ioc_info(mrioc, "Issuing Message unit Reset(MUR)\n"); 1071824a1566SKashyap Desai if (mrioc->unrecoverable) { 1072824a1566SKashyap Desai ioc_info(mrioc, "IOC is unrecoverable MUR not issued\n"); 1073824a1566SKashyap Desai return retval; 1074824a1566SKashyap Desai } 1075824a1566SKashyap Desai mpi3mr_clear_reset_history(mrioc); 1076824a1566SKashyap Desai writel(reset_reason, &mrioc->sysif_regs->scratchpad[0]); 1077824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 1078824a1566SKashyap Desai ioc_config &= ~MPI3_SYSIF_IOC_CONFIG_ENABLE_IOC; 1079824a1566SKashyap Desai writel(ioc_config, &mrioc->sysif_regs->ioc_configuration); 1080824a1566SKashyap Desai 1081b64845a7SSreekanth Reddy timeout = MPI3MR_RESET_ACK_TIMEOUT * 10; 1082824a1566SKashyap Desai do { 1083824a1566SKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 1084824a1566SKashyap Desai if ((ioc_status & MPI3_SYSIF_IOC_STATUS_RESET_HISTORY)) { 1085824a1566SKashyap Desai mpi3mr_clear_reset_history(mrioc); 1086824a1566SKashyap Desai break; 1087824a1566SKashyap Desai } 1088b64845a7SSreekanth Reddy if (ioc_status & MPI3_SYSIF_IOC_STATUS_FAULT) { 1089b64845a7SSreekanth Reddy mpi3mr_print_fault_info(mrioc); 1090b64845a7SSreekanth Reddy break; 1091824a1566SKashyap Desai } 1092824a1566SKashyap Desai msleep(100); 1093824a1566SKashyap Desai } while (--timeout); 1094824a1566SKashyap Desai 1095824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 1096b64845a7SSreekanth Reddy if (timeout && !((ioc_status & MPI3_SYSIF_IOC_STATUS_READY) || 1097b64845a7SSreekanth Reddy (ioc_status & MPI3_SYSIF_IOC_STATUS_FAULT) || 1098b64845a7SSreekanth Reddy (ioc_config & MPI3_SYSIF_IOC_CONFIG_ENABLE_IOC))) 1099b64845a7SSreekanth Reddy retval = 0; 1100824a1566SKashyap Desai 1101824a1566SKashyap Desai ioc_info(mrioc, "Base IOC Sts/Config after %s MUR is (0x%x)/(0x%x)\n", 1102824a1566SKashyap Desai (!retval) ? "successful" : "failed", ioc_status, ioc_config); 1103824a1566SKashyap Desai return retval; 1104824a1566SKashyap Desai } 1105824a1566SKashyap Desai 1106824a1566SKashyap Desai /** 1107c5758fc7SSreekanth Reddy * mpi3mr_revalidate_factsdata - validate IOCFacts parameters 1108c5758fc7SSreekanth Reddy * during reset/resume 1109c5758fc7SSreekanth Reddy * @mrioc: Adapter instance reference 1110c5758fc7SSreekanth Reddy * 1111c5758fc7SSreekanth Reddy * Return zero if the new IOCFacts parameters value is compatible with 1112c5758fc7SSreekanth Reddy * older values else return -EPERM 1113c5758fc7SSreekanth Reddy */ 1114c5758fc7SSreekanth Reddy static int 1115c5758fc7SSreekanth Reddy mpi3mr_revalidate_factsdata(struct mpi3mr_ioc *mrioc) 1116c5758fc7SSreekanth Reddy { 1117c5758fc7SSreekanth Reddy u16 dev_handle_bitmap_sz; 1118c5758fc7SSreekanth Reddy void *removepend_bitmap; 1119c5758fc7SSreekanth Reddy 1120c5758fc7SSreekanth Reddy if (mrioc->facts.reply_sz > mrioc->reply_sz) { 1121c5758fc7SSreekanth Reddy ioc_err(mrioc, 1122c5758fc7SSreekanth Reddy "cannot increase reply size from %d to %d\n", 1123c5758fc7SSreekanth Reddy mrioc->reply_sz, mrioc->facts.reply_sz); 1124c5758fc7SSreekanth Reddy return -EPERM; 1125c5758fc7SSreekanth Reddy } 1126c5758fc7SSreekanth Reddy 1127c5758fc7SSreekanth Reddy if (mrioc->facts.max_op_reply_q < mrioc->num_op_reply_q) { 1128c5758fc7SSreekanth Reddy ioc_err(mrioc, 1129c5758fc7SSreekanth Reddy "cannot reduce number of operational reply queues from %d to %d\n", 1130c5758fc7SSreekanth Reddy mrioc->num_op_reply_q, 1131c5758fc7SSreekanth Reddy mrioc->facts.max_op_reply_q); 1132c5758fc7SSreekanth Reddy return -EPERM; 1133c5758fc7SSreekanth Reddy } 1134c5758fc7SSreekanth Reddy 1135c5758fc7SSreekanth Reddy if (mrioc->facts.max_op_req_q < mrioc->num_op_req_q) { 1136c5758fc7SSreekanth Reddy ioc_err(mrioc, 1137c5758fc7SSreekanth Reddy "cannot reduce number of operational request queues from %d to %d\n", 1138c5758fc7SSreekanth Reddy mrioc->num_op_req_q, mrioc->facts.max_op_req_q); 1139c5758fc7SSreekanth Reddy return -EPERM; 1140c5758fc7SSreekanth Reddy } 1141c5758fc7SSreekanth Reddy 1142c4723e68SSreekanth Reddy if ((mrioc->sas_transport_enabled) && (mrioc->facts.ioc_capabilities & 1143c4723e68SSreekanth Reddy MPI3_IOCFACTS_CAPABILITY_MULTIPATH_ENABLED)) 1144c4723e68SSreekanth Reddy ioc_err(mrioc, 1145c4723e68SSreekanth Reddy "critical error: multipath capability is enabled at the\n" 1146c4723e68SSreekanth Reddy "\tcontroller while sas transport support is enabled at the\n" 1147c4723e68SSreekanth Reddy "\tdriver, please reboot the system or reload the driver\n"); 1148c4723e68SSreekanth Reddy 1149c5758fc7SSreekanth Reddy dev_handle_bitmap_sz = mrioc->facts.max_devhandle / 8; 1150c5758fc7SSreekanth Reddy if (mrioc->facts.max_devhandle % 8) 1151c5758fc7SSreekanth Reddy dev_handle_bitmap_sz++; 1152c5758fc7SSreekanth Reddy if (dev_handle_bitmap_sz > mrioc->dev_handle_bitmap_sz) { 1153c5758fc7SSreekanth Reddy removepend_bitmap = krealloc(mrioc->removepend_bitmap, 1154c5758fc7SSreekanth Reddy dev_handle_bitmap_sz, GFP_KERNEL); 1155c5758fc7SSreekanth Reddy if (!removepend_bitmap) { 1156c5758fc7SSreekanth Reddy ioc_err(mrioc, 1157c5758fc7SSreekanth Reddy "failed to increase removepend_bitmap sz from: %d to %d\n", 1158c5758fc7SSreekanth Reddy mrioc->dev_handle_bitmap_sz, dev_handle_bitmap_sz); 1159c5758fc7SSreekanth Reddy return -EPERM; 1160c5758fc7SSreekanth Reddy } 1161c5758fc7SSreekanth Reddy memset(removepend_bitmap + mrioc->dev_handle_bitmap_sz, 0, 1162c5758fc7SSreekanth Reddy dev_handle_bitmap_sz - mrioc->dev_handle_bitmap_sz); 1163c5758fc7SSreekanth Reddy mrioc->removepend_bitmap = removepend_bitmap; 1164c5758fc7SSreekanth Reddy ioc_info(mrioc, 1165c5758fc7SSreekanth Reddy "increased dev_handle_bitmap_sz from %d to %d\n", 1166c5758fc7SSreekanth Reddy mrioc->dev_handle_bitmap_sz, dev_handle_bitmap_sz); 1167c5758fc7SSreekanth Reddy mrioc->dev_handle_bitmap_sz = dev_handle_bitmap_sz; 1168c5758fc7SSreekanth Reddy } 1169c5758fc7SSreekanth Reddy 1170c5758fc7SSreekanth Reddy return 0; 1171c5758fc7SSreekanth Reddy } 1172c5758fc7SSreekanth Reddy 1173c5758fc7SSreekanth Reddy /** 1174824a1566SKashyap Desai * mpi3mr_bring_ioc_ready - Bring controller to ready state 1175824a1566SKashyap Desai * @mrioc: Adapter instance reference 1176824a1566SKashyap Desai * 1177824a1566SKashyap Desai * Set Enable IOC bit in IOC configuration register and wait for 1178824a1566SKashyap Desai * the controller to become ready. 1179824a1566SKashyap Desai * 118059bd9cfeSSreekanth Reddy * Return: 0 on success, appropriate error on failure. 1181824a1566SKashyap Desai */ 1182824a1566SKashyap Desai static int mpi3mr_bring_ioc_ready(struct mpi3mr_ioc *mrioc) 1183824a1566SKashyap Desai { 118459bd9cfeSSreekanth Reddy u32 ioc_config, ioc_status, timeout; 118559bd9cfeSSreekanth Reddy int retval = 0; 118659bd9cfeSSreekanth Reddy enum mpi3mr_iocstate ioc_state; 118759bd9cfeSSreekanth Reddy u64 base_info; 1188824a1566SKashyap Desai 118959bd9cfeSSreekanth Reddy ioc_status = readl(&mrioc->sysif_regs->ioc_status); 119059bd9cfeSSreekanth Reddy ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 119159bd9cfeSSreekanth Reddy base_info = lo_hi_readq(&mrioc->sysif_regs->ioc_information); 119259bd9cfeSSreekanth Reddy ioc_info(mrioc, "ioc_status(0x%08x), ioc_config(0x%08x), ioc_info(0x%016llx) at the bringup\n", 119359bd9cfeSSreekanth Reddy ioc_status, ioc_config, base_info); 119459bd9cfeSSreekanth Reddy 119559bd9cfeSSreekanth Reddy /*The timeout value is in 2sec unit, changing it to seconds*/ 119659bd9cfeSSreekanth Reddy mrioc->ready_timeout = 119759bd9cfeSSreekanth Reddy ((base_info & MPI3_SYSIF_IOC_INFO_LOW_TIMEOUT_MASK) >> 119859bd9cfeSSreekanth Reddy MPI3_SYSIF_IOC_INFO_LOW_TIMEOUT_SHIFT) * 2; 119959bd9cfeSSreekanth Reddy 120059bd9cfeSSreekanth Reddy ioc_info(mrioc, "ready timeout: %d seconds\n", mrioc->ready_timeout); 120159bd9cfeSSreekanth Reddy 120259bd9cfeSSreekanth Reddy ioc_state = mpi3mr_get_iocstate(mrioc); 120359bd9cfeSSreekanth Reddy ioc_info(mrioc, "controller is in %s state during detection\n", 120459bd9cfeSSreekanth Reddy mpi3mr_iocstate_name(ioc_state)); 120559bd9cfeSSreekanth Reddy 120659bd9cfeSSreekanth Reddy if (ioc_state == MRIOC_STATE_BECOMING_READY || 120759bd9cfeSSreekanth Reddy ioc_state == MRIOC_STATE_RESET_REQUESTED) { 120859bd9cfeSSreekanth Reddy timeout = mrioc->ready_timeout * 10; 120959bd9cfeSSreekanth Reddy do { 121059bd9cfeSSreekanth Reddy msleep(100); 121159bd9cfeSSreekanth Reddy } while (--timeout); 121259bd9cfeSSreekanth Reddy 121359bd9cfeSSreekanth Reddy ioc_state = mpi3mr_get_iocstate(mrioc); 121459bd9cfeSSreekanth Reddy ioc_info(mrioc, 121559bd9cfeSSreekanth Reddy "controller is in %s state after waiting to reset\n", 121659bd9cfeSSreekanth Reddy mpi3mr_iocstate_name(ioc_state)); 121759bd9cfeSSreekanth Reddy } 121859bd9cfeSSreekanth Reddy 121959bd9cfeSSreekanth Reddy if (ioc_state == MRIOC_STATE_READY) { 122059bd9cfeSSreekanth Reddy ioc_info(mrioc, "issuing message unit reset (MUR) to bring to reset state\n"); 122159bd9cfeSSreekanth Reddy retval = mpi3mr_issue_and_process_mur(mrioc, 122259bd9cfeSSreekanth Reddy MPI3MR_RESET_FROM_BRINGUP); 122359bd9cfeSSreekanth Reddy ioc_state = mpi3mr_get_iocstate(mrioc); 122459bd9cfeSSreekanth Reddy if (retval) 122559bd9cfeSSreekanth Reddy ioc_err(mrioc, 122659bd9cfeSSreekanth Reddy "message unit reset failed with error %d current state %s\n", 122759bd9cfeSSreekanth Reddy retval, mpi3mr_iocstate_name(ioc_state)); 122859bd9cfeSSreekanth Reddy } 122959bd9cfeSSreekanth Reddy if (ioc_state != MRIOC_STATE_RESET) { 123059bd9cfeSSreekanth Reddy mpi3mr_print_fault_info(mrioc); 123159bd9cfeSSreekanth Reddy ioc_info(mrioc, "issuing soft reset to bring to reset state\n"); 123259bd9cfeSSreekanth Reddy retval = mpi3mr_issue_reset(mrioc, 123359bd9cfeSSreekanth Reddy MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET, 123459bd9cfeSSreekanth Reddy MPI3MR_RESET_FROM_BRINGUP); 123559bd9cfeSSreekanth Reddy if (retval) { 123659bd9cfeSSreekanth Reddy ioc_err(mrioc, 123759bd9cfeSSreekanth Reddy "soft reset failed with error %d\n", retval); 123859bd9cfeSSreekanth Reddy goto out_failed; 123959bd9cfeSSreekanth Reddy } 124059bd9cfeSSreekanth Reddy } 124159bd9cfeSSreekanth Reddy ioc_state = mpi3mr_get_iocstate(mrioc); 124259bd9cfeSSreekanth Reddy if (ioc_state != MRIOC_STATE_RESET) { 124359bd9cfeSSreekanth Reddy ioc_err(mrioc, 124459bd9cfeSSreekanth Reddy "cannot bring controller to reset state, current state: %s\n", 124559bd9cfeSSreekanth Reddy mpi3mr_iocstate_name(ioc_state)); 124659bd9cfeSSreekanth Reddy goto out_failed; 124759bd9cfeSSreekanth Reddy } 124859bd9cfeSSreekanth Reddy mpi3mr_clear_reset_history(mrioc); 124959bd9cfeSSreekanth Reddy retval = mpi3mr_setup_admin_qpair(mrioc); 125059bd9cfeSSreekanth Reddy if (retval) { 125159bd9cfeSSreekanth Reddy ioc_err(mrioc, "failed to setup admin queues: error %d\n", 125259bd9cfeSSreekanth Reddy retval); 125359bd9cfeSSreekanth Reddy goto out_failed; 125459bd9cfeSSreekanth Reddy } 125559bd9cfeSSreekanth Reddy 125659bd9cfeSSreekanth Reddy ioc_info(mrioc, "bringing controller to ready state\n"); 1257824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 1258824a1566SKashyap Desai ioc_config |= MPI3_SYSIF_IOC_CONFIG_ENABLE_IOC; 1259824a1566SKashyap Desai writel(ioc_config, &mrioc->sysif_regs->ioc_configuration); 1260824a1566SKashyap Desai 1261824a1566SKashyap Desai timeout = mrioc->ready_timeout * 10; 1262824a1566SKashyap Desai do { 126359bd9cfeSSreekanth Reddy ioc_state = mpi3mr_get_iocstate(mrioc); 126459bd9cfeSSreekanth Reddy if (ioc_state == MRIOC_STATE_READY) { 126559bd9cfeSSreekanth Reddy ioc_info(mrioc, 12665867b856SColin Ian King "successfully transitioned to %s state\n", 126759bd9cfeSSreekanth Reddy mpi3mr_iocstate_name(ioc_state)); 1268824a1566SKashyap Desai return 0; 126959bd9cfeSSreekanth Reddy } 1270824a1566SKashyap Desai msleep(100); 1271824a1566SKashyap Desai } while (--timeout); 1272824a1566SKashyap Desai 127359bd9cfeSSreekanth Reddy out_failed: 127459bd9cfeSSreekanth Reddy ioc_state = mpi3mr_get_iocstate(mrioc); 127559bd9cfeSSreekanth Reddy ioc_err(mrioc, 127659bd9cfeSSreekanth Reddy "failed to bring to ready state, current state: %s\n", 127759bd9cfeSSreekanth Reddy mpi3mr_iocstate_name(ioc_state)); 127859bd9cfeSSreekanth Reddy return retval; 1279824a1566SKashyap Desai } 1280824a1566SKashyap Desai 1281824a1566SKashyap Desai /** 1282f061178eSKashyap Desai * mpi3mr_soft_reset_success - Check softreset is success or not 1283f061178eSKashyap Desai * @ioc_status: IOC status register value 1284f061178eSKashyap Desai * @ioc_config: IOC config register value 1285f061178eSKashyap Desai * 1286f061178eSKashyap Desai * Check whether the soft reset is successful or not based on 1287f061178eSKashyap Desai * IOC status and IOC config register values. 1288f061178eSKashyap Desai * 1289f061178eSKashyap Desai * Return: True when the soft reset is success, false otherwise. 1290f061178eSKashyap Desai */ 1291f061178eSKashyap Desai static inline bool 1292f061178eSKashyap Desai mpi3mr_soft_reset_success(u32 ioc_status, u32 ioc_config) 1293f061178eSKashyap Desai { 1294f061178eSKashyap Desai if (!((ioc_status & MPI3_SYSIF_IOC_STATUS_READY) || 1295f061178eSKashyap Desai (ioc_config & MPI3_SYSIF_IOC_CONFIG_ENABLE_IOC))) 1296f061178eSKashyap Desai return true; 1297f061178eSKashyap Desai return false; 1298f061178eSKashyap Desai } 1299f061178eSKashyap Desai 1300f061178eSKashyap Desai /** 1301f061178eSKashyap Desai * mpi3mr_diagfault_success - Check diag fault is success or not 1302f061178eSKashyap Desai * @mrioc: Adapter reference 1303f061178eSKashyap Desai * @ioc_status: IOC status register value 1304f061178eSKashyap Desai * 1305f061178eSKashyap Desai * Check whether the controller hit diag reset fault code. 1306f061178eSKashyap Desai * 1307f061178eSKashyap Desai * Return: True when there is diag fault, false otherwise. 1308f061178eSKashyap Desai */ 1309f061178eSKashyap Desai static inline bool mpi3mr_diagfault_success(struct mpi3mr_ioc *mrioc, 1310f061178eSKashyap Desai u32 ioc_status) 1311f061178eSKashyap Desai { 1312f061178eSKashyap Desai u32 fault; 1313f061178eSKashyap Desai 1314f061178eSKashyap Desai if (!(ioc_status & MPI3_SYSIF_IOC_STATUS_FAULT)) 1315f061178eSKashyap Desai return false; 1316f061178eSKashyap Desai fault = readl(&mrioc->sysif_regs->fault) & MPI3_SYSIF_FAULT_CODE_MASK; 1317b64845a7SSreekanth Reddy if (fault == MPI3_SYSIF_FAULT_CODE_DIAG_FAULT_RESET) { 1318b64845a7SSreekanth Reddy mpi3mr_print_fault_info(mrioc); 1319f061178eSKashyap Desai return true; 1320b64845a7SSreekanth Reddy } 1321f061178eSKashyap Desai return false; 1322f061178eSKashyap Desai } 1323f061178eSKashyap Desai 1324f061178eSKashyap Desai /** 1325824a1566SKashyap Desai * mpi3mr_set_diagsave - Set diag save bit for snapdump 1326824a1566SKashyap Desai * @mrioc: Adapter reference 1327824a1566SKashyap Desai * 1328824a1566SKashyap Desai * Set diag save bit in IOC configuration register to enable 1329824a1566SKashyap Desai * snapdump. 1330824a1566SKashyap Desai * 1331824a1566SKashyap Desai * Return: Nothing. 1332824a1566SKashyap Desai */ 1333824a1566SKashyap Desai static inline void mpi3mr_set_diagsave(struct mpi3mr_ioc *mrioc) 1334824a1566SKashyap Desai { 1335824a1566SKashyap Desai u32 ioc_config; 1336824a1566SKashyap Desai 1337824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 1338824a1566SKashyap Desai ioc_config |= MPI3_SYSIF_IOC_CONFIG_DIAG_SAVE; 1339824a1566SKashyap Desai writel(ioc_config, &mrioc->sysif_regs->ioc_configuration); 1340824a1566SKashyap Desai } 1341824a1566SKashyap Desai 1342824a1566SKashyap Desai /** 1343824a1566SKashyap Desai * mpi3mr_issue_reset - Issue reset to the controller 1344824a1566SKashyap Desai * @mrioc: Adapter reference 1345824a1566SKashyap Desai * @reset_type: Reset type 1346824a1566SKashyap Desai * @reset_reason: Reset reason code 1347824a1566SKashyap Desai * 1348f061178eSKashyap Desai * Unlock the host diagnostic registers and write the specific 1349f061178eSKashyap Desai * reset type to that, wait for reset acknowledgment from the 1350f061178eSKashyap Desai * controller, if the reset is not successful retry for the 1351f061178eSKashyap Desai * predefined number of times. 1352824a1566SKashyap Desai * 1353824a1566SKashyap Desai * Return: 0 on success, non-zero on failure. 1354824a1566SKashyap Desai */ 1355824a1566SKashyap Desai static int mpi3mr_issue_reset(struct mpi3mr_ioc *mrioc, u16 reset_type, 1356824a1566SKashyap Desai u32 reset_reason) 1357824a1566SKashyap Desai { 1358f061178eSKashyap Desai int retval = -1; 1359b64845a7SSreekanth Reddy u8 unlock_retry_count = 0; 1360b64845a7SSreekanth Reddy u32 host_diagnostic, ioc_status, ioc_config; 1361b64845a7SSreekanth Reddy u32 timeout = MPI3MR_RESET_ACK_TIMEOUT * 10; 1362f061178eSKashyap Desai 1363f061178eSKashyap Desai if ((reset_type != MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET) && 1364f061178eSKashyap Desai (reset_type != MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT)) 1365b64845a7SSreekanth Reddy return retval; 1366f061178eSKashyap Desai if (mrioc->unrecoverable) 1367b64845a7SSreekanth Reddy return retval; 1368b64845a7SSreekanth Reddy if (reset_reason == MPI3MR_RESET_FROM_FIRMWARE) { 1369b64845a7SSreekanth Reddy retval = 0; 1370b64845a7SSreekanth Reddy return retval; 1371b64845a7SSreekanth Reddy } 1372b64845a7SSreekanth Reddy 1373b64845a7SSreekanth Reddy ioc_info(mrioc, "%s reset due to %s(0x%x)\n", 1374b64845a7SSreekanth Reddy mpi3mr_reset_type_name(reset_type), 1375b64845a7SSreekanth Reddy mpi3mr_reset_rc_name(reset_reason), reset_reason); 1376b64845a7SSreekanth Reddy 1377f061178eSKashyap Desai mpi3mr_clear_reset_history(mrioc); 1378f061178eSKashyap Desai do { 1379f061178eSKashyap Desai ioc_info(mrioc, 1380f061178eSKashyap Desai "Write magic sequence to unlock host diag register (retry=%d)\n", 1381f061178eSKashyap Desai ++unlock_retry_count); 1382f061178eSKashyap Desai if (unlock_retry_count >= MPI3MR_HOSTDIAG_UNLOCK_RETRY_COUNT) { 1383b64845a7SSreekanth Reddy ioc_err(mrioc, 1384b64845a7SSreekanth Reddy "%s reset failed due to unlock failure, host_diagnostic(0x%08x)\n", 1385b64845a7SSreekanth Reddy mpi3mr_reset_type_name(reset_type), 1386b64845a7SSreekanth Reddy host_diagnostic); 1387f061178eSKashyap Desai mrioc->unrecoverable = 1; 1388b64845a7SSreekanth Reddy return retval; 1389f061178eSKashyap Desai } 1390f061178eSKashyap Desai 1391f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_FLUSH, 1392f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1393f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_1ST, 1394f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1395f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_2ND, 1396f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1397f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_3RD, 1398f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1399f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_4TH, 1400f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1401f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_5TH, 1402f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1403f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_6TH, 1404f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1405f061178eSKashyap Desai usleep_range(1000, 1100); 1406f061178eSKashyap Desai host_diagnostic = readl(&mrioc->sysif_regs->host_diagnostic); 1407f061178eSKashyap Desai ioc_info(mrioc, 1408f061178eSKashyap Desai "wrote magic sequence: retry_count(%d), host_diagnostic(0x%08x)\n", 1409f061178eSKashyap Desai unlock_retry_count, host_diagnostic); 1410f061178eSKashyap Desai } while (!(host_diagnostic & MPI3_SYSIF_HOST_DIAG_DIAG_WRITE_ENABLE)); 1411f061178eSKashyap Desai 1412f061178eSKashyap Desai writel(reset_reason, &mrioc->sysif_regs->scratchpad[0]); 1413f061178eSKashyap Desai writel(host_diagnostic | reset_type, 1414f061178eSKashyap Desai &mrioc->sysif_regs->host_diagnostic); 1415b64845a7SSreekanth Reddy switch (reset_type) { 1416b64845a7SSreekanth Reddy case MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET: 1417f061178eSKashyap Desai do { 1418f061178eSKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 1419f061178eSKashyap Desai ioc_config = 1420f061178eSKashyap Desai readl(&mrioc->sysif_regs->ioc_configuration); 1421b64845a7SSreekanth Reddy if ((ioc_status & MPI3_SYSIF_IOC_STATUS_RESET_HISTORY) 1422b64845a7SSreekanth Reddy && mpi3mr_soft_reset_success(ioc_status, ioc_config) 1423b64845a7SSreekanth Reddy ) { 1424b64845a7SSreekanth Reddy mpi3mr_clear_reset_history(mrioc); 1425f061178eSKashyap Desai retval = 0; 1426f061178eSKashyap Desai break; 1427f061178eSKashyap Desai } 1428f061178eSKashyap Desai msleep(100); 1429f061178eSKashyap Desai } while (--timeout); 1430b64845a7SSreekanth Reddy mpi3mr_print_fault_info(mrioc); 1431b64845a7SSreekanth Reddy break; 1432b64845a7SSreekanth Reddy case MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT: 1433f061178eSKashyap Desai do { 1434f061178eSKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 1435f061178eSKashyap Desai if (mpi3mr_diagfault_success(mrioc, ioc_status)) { 1436f061178eSKashyap Desai retval = 0; 1437f061178eSKashyap Desai break; 1438f061178eSKashyap Desai } 1439f061178eSKashyap Desai msleep(100); 1440f061178eSKashyap Desai } while (--timeout); 1441b64845a7SSreekanth Reddy break; 1442b64845a7SSreekanth Reddy default: 1443b64845a7SSreekanth Reddy break; 1444b64845a7SSreekanth Reddy } 1445b64845a7SSreekanth Reddy 1446f061178eSKashyap Desai writel(MPI3_SYSIF_WRITE_SEQUENCE_KEY_VALUE_2ND, 1447f061178eSKashyap Desai &mrioc->sysif_regs->write_sequence); 1448f061178eSKashyap Desai 1449f061178eSKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 1450b64845a7SSreekanth Reddy ioc_status = readl(&mrioc->sysif_regs->ioc_status); 1451f061178eSKashyap Desai ioc_info(mrioc, 1452b64845a7SSreekanth Reddy "ioc_status/ioc_onfig after %s reset is (0x%x)/(0x%x)\n", 1453f061178eSKashyap Desai (!retval)?"successful":"failed", ioc_status, 1454f061178eSKashyap Desai ioc_config); 1455b64845a7SSreekanth Reddy if (retval) 1456b64845a7SSreekanth Reddy mrioc->unrecoverable = 1; 1457f061178eSKashyap Desai return retval; 1458824a1566SKashyap Desai } 1459824a1566SKashyap Desai 1460824a1566SKashyap Desai /** 1461824a1566SKashyap Desai * mpi3mr_admin_request_post - Post request to admin queue 1462824a1566SKashyap Desai * @mrioc: Adapter reference 1463824a1566SKashyap Desai * @admin_req: MPI3 request 1464824a1566SKashyap Desai * @admin_req_sz: Request size 1465824a1566SKashyap Desai * @ignore_reset: Ignore reset in process 1466824a1566SKashyap Desai * 1467824a1566SKashyap Desai * Post the MPI3 request into admin request queue and 1468824a1566SKashyap Desai * inform the controller, if the queue is full return 1469824a1566SKashyap Desai * appropriate error. 1470824a1566SKashyap Desai * 1471824a1566SKashyap Desai * Return: 0 on success, non-zero on failure. 1472824a1566SKashyap Desai */ 1473824a1566SKashyap Desai int mpi3mr_admin_request_post(struct mpi3mr_ioc *mrioc, void *admin_req, 1474824a1566SKashyap Desai u16 admin_req_sz, u8 ignore_reset) 1475824a1566SKashyap Desai { 1476824a1566SKashyap Desai u16 areq_pi = 0, areq_ci = 0, max_entries = 0; 1477824a1566SKashyap Desai int retval = 0; 1478824a1566SKashyap Desai unsigned long flags; 1479824a1566SKashyap Desai u8 *areq_entry; 1480824a1566SKashyap Desai 1481824a1566SKashyap Desai if (mrioc->unrecoverable) { 1482824a1566SKashyap Desai ioc_err(mrioc, "%s : Unrecoverable controller\n", __func__); 1483824a1566SKashyap Desai return -EFAULT; 1484824a1566SKashyap Desai } 1485824a1566SKashyap Desai 1486824a1566SKashyap Desai spin_lock_irqsave(&mrioc->admin_req_lock, flags); 1487824a1566SKashyap Desai areq_pi = mrioc->admin_req_pi; 1488824a1566SKashyap Desai areq_ci = mrioc->admin_req_ci; 1489824a1566SKashyap Desai max_entries = mrioc->num_admin_req; 1490824a1566SKashyap Desai if ((areq_ci == (areq_pi + 1)) || ((!areq_ci) && 1491824a1566SKashyap Desai (areq_pi == (max_entries - 1)))) { 1492824a1566SKashyap Desai ioc_err(mrioc, "AdminReqQ full condition detected\n"); 1493824a1566SKashyap Desai retval = -EAGAIN; 1494824a1566SKashyap Desai goto out; 1495824a1566SKashyap Desai } 1496824a1566SKashyap Desai if (!ignore_reset && mrioc->reset_in_progress) { 1497824a1566SKashyap Desai ioc_err(mrioc, "AdminReqQ submit reset in progress\n"); 1498824a1566SKashyap Desai retval = -EAGAIN; 1499824a1566SKashyap Desai goto out; 1500824a1566SKashyap Desai } 1501824a1566SKashyap Desai areq_entry = (u8 *)mrioc->admin_req_base + 1502824a1566SKashyap Desai (areq_pi * MPI3MR_ADMIN_REQ_FRAME_SZ); 1503824a1566SKashyap Desai memset(areq_entry, 0, MPI3MR_ADMIN_REQ_FRAME_SZ); 1504824a1566SKashyap Desai memcpy(areq_entry, (u8 *)admin_req, admin_req_sz); 1505824a1566SKashyap Desai 1506824a1566SKashyap Desai if (++areq_pi == max_entries) 1507824a1566SKashyap Desai areq_pi = 0; 1508824a1566SKashyap Desai mrioc->admin_req_pi = areq_pi; 1509824a1566SKashyap Desai 1510824a1566SKashyap Desai writel(mrioc->admin_req_pi, &mrioc->sysif_regs->admin_request_queue_pi); 1511824a1566SKashyap Desai 1512824a1566SKashyap Desai out: 1513824a1566SKashyap Desai spin_unlock_irqrestore(&mrioc->admin_req_lock, flags); 1514824a1566SKashyap Desai 1515824a1566SKashyap Desai return retval; 1516824a1566SKashyap Desai } 1517824a1566SKashyap Desai 1518824a1566SKashyap Desai /** 1519c9566231SKashyap Desai * mpi3mr_free_op_req_q_segments - free request memory segments 1520c9566231SKashyap Desai * @mrioc: Adapter instance reference 1521c9566231SKashyap Desai * @q_idx: operational request queue index 1522c9566231SKashyap Desai * 1523c9566231SKashyap Desai * Free memory segments allocated for operational request queue 1524c9566231SKashyap Desai * 1525c9566231SKashyap Desai * Return: Nothing. 1526c9566231SKashyap Desai */ 1527c9566231SKashyap Desai static void mpi3mr_free_op_req_q_segments(struct mpi3mr_ioc *mrioc, u16 q_idx) 1528c9566231SKashyap Desai { 1529c9566231SKashyap Desai u16 j; 1530c9566231SKashyap Desai int size; 1531c9566231SKashyap Desai struct segments *segments; 1532c9566231SKashyap Desai 1533c9566231SKashyap Desai segments = mrioc->req_qinfo[q_idx].q_segments; 1534c9566231SKashyap Desai if (!segments) 1535c9566231SKashyap Desai return; 1536c9566231SKashyap Desai 1537c9566231SKashyap Desai if (mrioc->enable_segqueue) { 1538c9566231SKashyap Desai size = MPI3MR_OP_REQ_Q_SEG_SIZE; 1539c9566231SKashyap Desai if (mrioc->req_qinfo[q_idx].q_segment_list) { 1540c9566231SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, 1541c9566231SKashyap Desai MPI3MR_MAX_SEG_LIST_SIZE, 1542c9566231SKashyap Desai mrioc->req_qinfo[q_idx].q_segment_list, 1543c9566231SKashyap Desai mrioc->req_qinfo[q_idx].q_segment_list_dma); 1544d44b5fefSSreekanth Reddy mrioc->req_qinfo[q_idx].q_segment_list = NULL; 1545c9566231SKashyap Desai } 1546c9566231SKashyap Desai } else 1547243bcc8eSSreekanth Reddy size = mrioc->req_qinfo[q_idx].segment_qd * 1548c9566231SKashyap Desai mrioc->facts.op_req_sz; 1549c9566231SKashyap Desai 1550c9566231SKashyap Desai for (j = 0; j < mrioc->req_qinfo[q_idx].num_segments; j++) { 1551c9566231SKashyap Desai if (!segments[j].segment) 1552c9566231SKashyap Desai continue; 1553c9566231SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, 1554c9566231SKashyap Desai size, segments[j].segment, segments[j].segment_dma); 1555c9566231SKashyap Desai segments[j].segment = NULL; 1556c9566231SKashyap Desai } 1557c9566231SKashyap Desai kfree(mrioc->req_qinfo[q_idx].q_segments); 1558c9566231SKashyap Desai mrioc->req_qinfo[q_idx].q_segments = NULL; 1559c9566231SKashyap Desai mrioc->req_qinfo[q_idx].qid = 0; 1560c9566231SKashyap Desai } 1561c9566231SKashyap Desai 1562c9566231SKashyap Desai /** 1563c9566231SKashyap Desai * mpi3mr_free_op_reply_q_segments - free reply memory segments 1564c9566231SKashyap Desai * @mrioc: Adapter instance reference 1565c9566231SKashyap Desai * @q_idx: operational reply queue index 1566c9566231SKashyap Desai * 1567c9566231SKashyap Desai * Free memory segments allocated for operational reply queue 1568c9566231SKashyap Desai * 1569c9566231SKashyap Desai * Return: Nothing. 1570c9566231SKashyap Desai */ 1571c9566231SKashyap Desai static void mpi3mr_free_op_reply_q_segments(struct mpi3mr_ioc *mrioc, u16 q_idx) 1572c9566231SKashyap Desai { 1573c9566231SKashyap Desai u16 j; 1574c9566231SKashyap Desai int size; 1575c9566231SKashyap Desai struct segments *segments; 1576c9566231SKashyap Desai 1577c9566231SKashyap Desai segments = mrioc->op_reply_qinfo[q_idx].q_segments; 1578c9566231SKashyap Desai if (!segments) 1579c9566231SKashyap Desai return; 1580c9566231SKashyap Desai 1581c9566231SKashyap Desai if (mrioc->enable_segqueue) { 1582c9566231SKashyap Desai size = MPI3MR_OP_REP_Q_SEG_SIZE; 1583c9566231SKashyap Desai if (mrioc->op_reply_qinfo[q_idx].q_segment_list) { 1584c9566231SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, 1585c9566231SKashyap Desai MPI3MR_MAX_SEG_LIST_SIZE, 1586c9566231SKashyap Desai mrioc->op_reply_qinfo[q_idx].q_segment_list, 1587c9566231SKashyap Desai mrioc->op_reply_qinfo[q_idx].q_segment_list_dma); 1588c9566231SKashyap Desai mrioc->op_reply_qinfo[q_idx].q_segment_list = NULL; 1589c9566231SKashyap Desai } 1590c9566231SKashyap Desai } else 1591c9566231SKashyap Desai size = mrioc->op_reply_qinfo[q_idx].segment_qd * 1592c9566231SKashyap Desai mrioc->op_reply_desc_sz; 1593c9566231SKashyap Desai 1594c9566231SKashyap Desai for (j = 0; j < mrioc->op_reply_qinfo[q_idx].num_segments; j++) { 1595c9566231SKashyap Desai if (!segments[j].segment) 1596c9566231SKashyap Desai continue; 1597c9566231SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, 1598c9566231SKashyap Desai size, segments[j].segment, segments[j].segment_dma); 1599c9566231SKashyap Desai segments[j].segment = NULL; 1600c9566231SKashyap Desai } 1601c9566231SKashyap Desai 1602c9566231SKashyap Desai kfree(mrioc->op_reply_qinfo[q_idx].q_segments); 1603c9566231SKashyap Desai mrioc->op_reply_qinfo[q_idx].q_segments = NULL; 1604c9566231SKashyap Desai mrioc->op_reply_qinfo[q_idx].qid = 0; 1605c9566231SKashyap Desai } 1606c9566231SKashyap Desai 1607c9566231SKashyap Desai /** 1608c9566231SKashyap Desai * mpi3mr_delete_op_reply_q - delete operational reply queue 1609c9566231SKashyap Desai * @mrioc: Adapter instance reference 1610c9566231SKashyap Desai * @qidx: operational reply queue index 1611c9566231SKashyap Desai * 1612c9566231SKashyap Desai * Delete operatinal reply queue by issuing MPI request 1613c9566231SKashyap Desai * through admin queue. 1614c9566231SKashyap Desai * 1615c9566231SKashyap Desai * Return: 0 on success, non-zero on failure. 1616c9566231SKashyap Desai */ 1617c9566231SKashyap Desai static int mpi3mr_delete_op_reply_q(struct mpi3mr_ioc *mrioc, u16 qidx) 1618c9566231SKashyap Desai { 1619c9566231SKashyap Desai struct mpi3_delete_reply_queue_request delq_req; 1620afd3a579SSreekanth Reddy struct op_reply_qinfo *op_reply_q = mrioc->op_reply_qinfo + qidx; 1621c9566231SKashyap Desai int retval = 0; 1622c9566231SKashyap Desai u16 reply_qid = 0, midx; 1623c9566231SKashyap Desai 1624afd3a579SSreekanth Reddy reply_qid = op_reply_q->qid; 1625c9566231SKashyap Desai 1626c9566231SKashyap Desai midx = REPLY_QUEUE_IDX_TO_MSIX_IDX(qidx, mrioc->op_reply_q_offset); 1627c9566231SKashyap Desai 1628c9566231SKashyap Desai if (!reply_qid) { 1629c9566231SKashyap Desai retval = -1; 1630c9566231SKashyap Desai ioc_err(mrioc, "Issue DelRepQ: called with invalid ReqQID\n"); 1631c9566231SKashyap Desai goto out; 1632c9566231SKashyap Desai } 1633c9566231SKashyap Desai 1634afd3a579SSreekanth Reddy (op_reply_q->qtype == MPI3MR_DEFAULT_QUEUE) ? mrioc->default_qcount-- : 1635afd3a579SSreekanth Reddy mrioc->active_poll_qcount--; 1636afd3a579SSreekanth Reddy 1637c9566231SKashyap Desai memset(&delq_req, 0, sizeof(delq_req)); 1638c9566231SKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 1639c9566231SKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 1640c9566231SKashyap Desai retval = -1; 1641c9566231SKashyap Desai ioc_err(mrioc, "Issue DelRepQ: Init command is in use\n"); 1642c9566231SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 1643c9566231SKashyap Desai goto out; 1644c9566231SKashyap Desai } 1645c9566231SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 1646c9566231SKashyap Desai mrioc->init_cmds.is_waiting = 1; 1647c9566231SKashyap Desai mrioc->init_cmds.callback = NULL; 1648c9566231SKashyap Desai delq_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 1649c9566231SKashyap Desai delq_req.function = MPI3_FUNCTION_DELETE_REPLY_QUEUE; 1650c9566231SKashyap Desai delq_req.queue_id = cpu_to_le16(reply_qid); 1651c9566231SKashyap Desai 1652c9566231SKashyap Desai init_completion(&mrioc->init_cmds.done); 1653c9566231SKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &delq_req, sizeof(delq_req), 1654c9566231SKashyap Desai 1); 1655c9566231SKashyap Desai if (retval) { 1656c9566231SKashyap Desai ioc_err(mrioc, "Issue DelRepQ: Admin Post failed\n"); 1657c9566231SKashyap Desai goto out_unlock; 1658c9566231SKashyap Desai } 1659c9566231SKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 1660c9566231SKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 1661c9566231SKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 1662a6856cc4SSreekanth Reddy ioc_err(mrioc, "delete reply queue timed out\n"); 1663a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 1664c9566231SKashyap Desai MPI3MR_RESET_FROM_DELREPQ_TIMEOUT); 1665c9566231SKashyap Desai retval = -1; 1666c9566231SKashyap Desai goto out_unlock; 1667c9566231SKashyap Desai } 1668c9566231SKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 1669c9566231SKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 1670c9566231SKashyap Desai ioc_err(mrioc, 1671c9566231SKashyap Desai "Issue DelRepQ: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 1672c9566231SKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 1673c9566231SKashyap Desai mrioc->init_cmds.ioc_loginfo); 1674c9566231SKashyap Desai retval = -1; 1675c9566231SKashyap Desai goto out_unlock; 1676c9566231SKashyap Desai } 1677c9566231SKashyap Desai mrioc->intr_info[midx].op_reply_q = NULL; 1678c9566231SKashyap Desai 1679c9566231SKashyap Desai mpi3mr_free_op_reply_q_segments(mrioc, qidx); 1680c9566231SKashyap Desai out_unlock: 1681c9566231SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 1682c9566231SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 1683c9566231SKashyap Desai out: 1684c9566231SKashyap Desai 1685c9566231SKashyap Desai return retval; 1686c9566231SKashyap Desai } 1687c9566231SKashyap Desai 1688c9566231SKashyap Desai /** 1689c9566231SKashyap Desai * mpi3mr_alloc_op_reply_q_segments -Alloc segmented reply pool 1690c9566231SKashyap Desai * @mrioc: Adapter instance reference 1691c9566231SKashyap Desai * @qidx: request queue index 1692c9566231SKashyap Desai * 1693c9566231SKashyap Desai * Allocate segmented memory pools for operational reply 1694c9566231SKashyap Desai * queue. 1695c9566231SKashyap Desai * 1696c9566231SKashyap Desai * Return: 0 on success, non-zero on failure. 1697c9566231SKashyap Desai */ 1698c9566231SKashyap Desai static int mpi3mr_alloc_op_reply_q_segments(struct mpi3mr_ioc *mrioc, u16 qidx) 1699c9566231SKashyap Desai { 1700c9566231SKashyap Desai struct op_reply_qinfo *op_reply_q = mrioc->op_reply_qinfo + qidx; 1701c9566231SKashyap Desai int i, size; 1702c9566231SKashyap Desai u64 *q_segment_list_entry = NULL; 1703c9566231SKashyap Desai struct segments *segments; 1704c9566231SKashyap Desai 1705c9566231SKashyap Desai if (mrioc->enable_segqueue) { 1706c9566231SKashyap Desai op_reply_q->segment_qd = 1707c9566231SKashyap Desai MPI3MR_OP_REP_Q_SEG_SIZE / mrioc->op_reply_desc_sz; 1708c9566231SKashyap Desai 1709c9566231SKashyap Desai size = MPI3MR_OP_REP_Q_SEG_SIZE; 1710c9566231SKashyap Desai 1711c9566231SKashyap Desai op_reply_q->q_segment_list = dma_alloc_coherent(&mrioc->pdev->dev, 1712c9566231SKashyap Desai MPI3MR_MAX_SEG_LIST_SIZE, &op_reply_q->q_segment_list_dma, 1713c9566231SKashyap Desai GFP_KERNEL); 1714c9566231SKashyap Desai if (!op_reply_q->q_segment_list) 1715c9566231SKashyap Desai return -ENOMEM; 1716c9566231SKashyap Desai q_segment_list_entry = (u64 *)op_reply_q->q_segment_list; 1717c9566231SKashyap Desai } else { 1718c9566231SKashyap Desai op_reply_q->segment_qd = op_reply_q->num_replies; 1719c9566231SKashyap Desai size = op_reply_q->num_replies * mrioc->op_reply_desc_sz; 1720c9566231SKashyap Desai } 1721c9566231SKashyap Desai 1722c9566231SKashyap Desai op_reply_q->num_segments = DIV_ROUND_UP(op_reply_q->num_replies, 1723c9566231SKashyap Desai op_reply_q->segment_qd); 1724c9566231SKashyap Desai 1725c9566231SKashyap Desai op_reply_q->q_segments = kcalloc(op_reply_q->num_segments, 1726c9566231SKashyap Desai sizeof(struct segments), GFP_KERNEL); 1727c9566231SKashyap Desai if (!op_reply_q->q_segments) 1728c9566231SKashyap Desai return -ENOMEM; 1729c9566231SKashyap Desai 1730c9566231SKashyap Desai segments = op_reply_q->q_segments; 1731c9566231SKashyap Desai for (i = 0; i < op_reply_q->num_segments; i++) { 1732c9566231SKashyap Desai segments[i].segment = 1733c9566231SKashyap Desai dma_alloc_coherent(&mrioc->pdev->dev, 1734c9566231SKashyap Desai size, &segments[i].segment_dma, GFP_KERNEL); 1735c9566231SKashyap Desai if (!segments[i].segment) 1736c9566231SKashyap Desai return -ENOMEM; 1737c9566231SKashyap Desai if (mrioc->enable_segqueue) 1738c9566231SKashyap Desai q_segment_list_entry[i] = 1739c9566231SKashyap Desai (unsigned long)segments[i].segment_dma; 1740c9566231SKashyap Desai } 1741c9566231SKashyap Desai 1742c9566231SKashyap Desai return 0; 1743c9566231SKashyap Desai } 1744c9566231SKashyap Desai 1745c9566231SKashyap Desai /** 1746c9566231SKashyap Desai * mpi3mr_alloc_op_req_q_segments - Alloc segmented req pool. 1747c9566231SKashyap Desai * @mrioc: Adapter instance reference 1748c9566231SKashyap Desai * @qidx: request queue index 1749c9566231SKashyap Desai * 1750c9566231SKashyap Desai * Allocate segmented memory pools for operational request 1751c9566231SKashyap Desai * queue. 1752c9566231SKashyap Desai * 1753c9566231SKashyap Desai * Return: 0 on success, non-zero on failure. 1754c9566231SKashyap Desai */ 1755c9566231SKashyap Desai static int mpi3mr_alloc_op_req_q_segments(struct mpi3mr_ioc *mrioc, u16 qidx) 1756c9566231SKashyap Desai { 1757c9566231SKashyap Desai struct op_req_qinfo *op_req_q = mrioc->req_qinfo + qidx; 1758c9566231SKashyap Desai int i, size; 1759c9566231SKashyap Desai u64 *q_segment_list_entry = NULL; 1760c9566231SKashyap Desai struct segments *segments; 1761c9566231SKashyap Desai 1762c9566231SKashyap Desai if (mrioc->enable_segqueue) { 1763c9566231SKashyap Desai op_req_q->segment_qd = 1764c9566231SKashyap Desai MPI3MR_OP_REQ_Q_SEG_SIZE / mrioc->facts.op_req_sz; 1765c9566231SKashyap Desai 1766c9566231SKashyap Desai size = MPI3MR_OP_REQ_Q_SEG_SIZE; 1767c9566231SKashyap Desai 1768c9566231SKashyap Desai op_req_q->q_segment_list = dma_alloc_coherent(&mrioc->pdev->dev, 1769c9566231SKashyap Desai MPI3MR_MAX_SEG_LIST_SIZE, &op_req_q->q_segment_list_dma, 1770c9566231SKashyap Desai GFP_KERNEL); 1771c9566231SKashyap Desai if (!op_req_q->q_segment_list) 1772c9566231SKashyap Desai return -ENOMEM; 1773c9566231SKashyap Desai q_segment_list_entry = (u64 *)op_req_q->q_segment_list; 1774c9566231SKashyap Desai 1775c9566231SKashyap Desai } else { 1776c9566231SKashyap Desai op_req_q->segment_qd = op_req_q->num_requests; 1777c9566231SKashyap Desai size = op_req_q->num_requests * mrioc->facts.op_req_sz; 1778c9566231SKashyap Desai } 1779c9566231SKashyap Desai 1780c9566231SKashyap Desai op_req_q->num_segments = DIV_ROUND_UP(op_req_q->num_requests, 1781c9566231SKashyap Desai op_req_q->segment_qd); 1782c9566231SKashyap Desai 1783c9566231SKashyap Desai op_req_q->q_segments = kcalloc(op_req_q->num_segments, 1784c9566231SKashyap Desai sizeof(struct segments), GFP_KERNEL); 1785c9566231SKashyap Desai if (!op_req_q->q_segments) 1786c9566231SKashyap Desai return -ENOMEM; 1787c9566231SKashyap Desai 1788c9566231SKashyap Desai segments = op_req_q->q_segments; 1789c9566231SKashyap Desai for (i = 0; i < op_req_q->num_segments; i++) { 1790c9566231SKashyap Desai segments[i].segment = 1791c9566231SKashyap Desai dma_alloc_coherent(&mrioc->pdev->dev, 1792c9566231SKashyap Desai size, &segments[i].segment_dma, GFP_KERNEL); 1793c9566231SKashyap Desai if (!segments[i].segment) 1794c9566231SKashyap Desai return -ENOMEM; 1795c9566231SKashyap Desai if (mrioc->enable_segqueue) 1796c9566231SKashyap Desai q_segment_list_entry[i] = 1797c9566231SKashyap Desai (unsigned long)segments[i].segment_dma; 1798c9566231SKashyap Desai } 1799c9566231SKashyap Desai 1800c9566231SKashyap Desai return 0; 1801c9566231SKashyap Desai } 1802c9566231SKashyap Desai 1803c9566231SKashyap Desai /** 1804c9566231SKashyap Desai * mpi3mr_create_op_reply_q - create operational reply queue 1805c9566231SKashyap Desai * @mrioc: Adapter instance reference 1806c9566231SKashyap Desai * @qidx: operational reply queue index 1807c9566231SKashyap Desai * 1808c9566231SKashyap Desai * Create operatinal reply queue by issuing MPI request 1809c9566231SKashyap Desai * through admin queue. 1810c9566231SKashyap Desai * 1811c9566231SKashyap Desai * Return: 0 on success, non-zero on failure. 1812c9566231SKashyap Desai */ 1813c9566231SKashyap Desai static int mpi3mr_create_op_reply_q(struct mpi3mr_ioc *mrioc, u16 qidx) 1814c9566231SKashyap Desai { 1815c9566231SKashyap Desai struct mpi3_create_reply_queue_request create_req; 1816c9566231SKashyap Desai struct op_reply_qinfo *op_reply_q = mrioc->op_reply_qinfo + qidx; 1817c9566231SKashyap Desai int retval = 0; 1818c9566231SKashyap Desai u16 reply_qid = 0, midx; 1819c9566231SKashyap Desai 1820c9566231SKashyap Desai reply_qid = op_reply_q->qid; 1821c9566231SKashyap Desai 1822c9566231SKashyap Desai midx = REPLY_QUEUE_IDX_TO_MSIX_IDX(qidx, mrioc->op_reply_q_offset); 1823c9566231SKashyap Desai 1824c9566231SKashyap Desai if (reply_qid) { 1825c9566231SKashyap Desai retval = -1; 1826c9566231SKashyap Desai ioc_err(mrioc, "CreateRepQ: called for duplicate qid %d\n", 1827c9566231SKashyap Desai reply_qid); 1828c9566231SKashyap Desai 1829c9566231SKashyap Desai return retval; 1830c9566231SKashyap Desai } 1831c9566231SKashyap Desai 1832c9566231SKashyap Desai reply_qid = qidx + 1; 1833c9566231SKashyap Desai op_reply_q->num_replies = MPI3MR_OP_REP_Q_QD; 1834243bcc8eSSreekanth Reddy if (!mrioc->pdev->revision) 1835243bcc8eSSreekanth Reddy op_reply_q->num_replies = MPI3MR_OP_REP_Q_QD4K; 1836c9566231SKashyap Desai op_reply_q->ci = 0; 1837c9566231SKashyap Desai op_reply_q->ephase = 1; 1838463429f8SKashyap Desai atomic_set(&op_reply_q->pend_ios, 0); 1839463429f8SKashyap Desai atomic_set(&op_reply_q->in_use, 0); 1840463429f8SKashyap Desai op_reply_q->enable_irq_poll = false; 1841c9566231SKashyap Desai 1842c9566231SKashyap Desai if (!op_reply_q->q_segments) { 1843c9566231SKashyap Desai retval = mpi3mr_alloc_op_reply_q_segments(mrioc, qidx); 1844c9566231SKashyap Desai if (retval) { 1845c9566231SKashyap Desai mpi3mr_free_op_reply_q_segments(mrioc, qidx); 1846c9566231SKashyap Desai goto out; 1847c9566231SKashyap Desai } 1848c9566231SKashyap Desai } 1849c9566231SKashyap Desai 1850c9566231SKashyap Desai memset(&create_req, 0, sizeof(create_req)); 1851c9566231SKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 1852c9566231SKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 1853c9566231SKashyap Desai retval = -1; 1854c9566231SKashyap Desai ioc_err(mrioc, "CreateRepQ: Init command is in use\n"); 1855f9dc034dSYang Yingliang goto out_unlock; 1856c9566231SKashyap Desai } 1857c9566231SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 1858c9566231SKashyap Desai mrioc->init_cmds.is_waiting = 1; 1859c9566231SKashyap Desai mrioc->init_cmds.callback = NULL; 1860c9566231SKashyap Desai create_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 1861c9566231SKashyap Desai create_req.function = MPI3_FUNCTION_CREATE_REPLY_QUEUE; 1862c9566231SKashyap Desai create_req.queue_id = cpu_to_le16(reply_qid); 1863afd3a579SSreekanth Reddy 1864afd3a579SSreekanth Reddy if (midx < (mrioc->intr_info_count - mrioc->requested_poll_qcount)) 1865afd3a579SSreekanth Reddy op_reply_q->qtype = MPI3MR_DEFAULT_QUEUE; 1866afd3a579SSreekanth Reddy else 1867afd3a579SSreekanth Reddy op_reply_q->qtype = MPI3MR_POLL_QUEUE; 1868afd3a579SSreekanth Reddy 1869afd3a579SSreekanth Reddy if (op_reply_q->qtype == MPI3MR_DEFAULT_QUEUE) { 1870afd3a579SSreekanth Reddy create_req.flags = 1871afd3a579SSreekanth Reddy MPI3_CREATE_REPLY_QUEUE_FLAGS_INT_ENABLE_ENABLE; 1872afd3a579SSreekanth Reddy create_req.msix_index = 1873afd3a579SSreekanth Reddy cpu_to_le16(mrioc->intr_info[midx].msix_index); 1874afd3a579SSreekanth Reddy } else { 1875afd3a579SSreekanth Reddy create_req.msix_index = cpu_to_le16(mrioc->intr_info_count - 1); 1876afd3a579SSreekanth Reddy ioc_info(mrioc, "create reply queue(polled): for qid(%d), midx(%d)\n", 1877afd3a579SSreekanth Reddy reply_qid, midx); 1878afd3a579SSreekanth Reddy if (!mrioc->active_poll_qcount) 1879afd3a579SSreekanth Reddy disable_irq_nosync(pci_irq_vector(mrioc->pdev, 1880afd3a579SSreekanth Reddy mrioc->intr_info_count - 1)); 1881afd3a579SSreekanth Reddy } 1882afd3a579SSreekanth Reddy 1883c9566231SKashyap Desai if (mrioc->enable_segqueue) { 1884c9566231SKashyap Desai create_req.flags |= 1885c9566231SKashyap Desai MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_SEGMENTED; 1886c9566231SKashyap Desai create_req.base_address = cpu_to_le64( 1887c9566231SKashyap Desai op_reply_q->q_segment_list_dma); 1888c9566231SKashyap Desai } else 1889c9566231SKashyap Desai create_req.base_address = cpu_to_le64( 1890c9566231SKashyap Desai op_reply_q->q_segments[0].segment_dma); 1891c9566231SKashyap Desai 1892c9566231SKashyap Desai create_req.size = cpu_to_le16(op_reply_q->num_replies); 1893c9566231SKashyap Desai 1894c9566231SKashyap Desai init_completion(&mrioc->init_cmds.done); 1895c9566231SKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &create_req, 1896c9566231SKashyap Desai sizeof(create_req), 1); 1897c9566231SKashyap Desai if (retval) { 1898c9566231SKashyap Desai ioc_err(mrioc, "CreateRepQ: Admin Post failed\n"); 1899c9566231SKashyap Desai goto out_unlock; 1900c9566231SKashyap Desai } 1901c9566231SKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 1902c9566231SKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 1903c9566231SKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 1904a6856cc4SSreekanth Reddy ioc_err(mrioc, "create reply queue timed out\n"); 1905a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 1906c9566231SKashyap Desai MPI3MR_RESET_FROM_CREATEREPQ_TIMEOUT); 1907c9566231SKashyap Desai retval = -1; 1908c9566231SKashyap Desai goto out_unlock; 1909c9566231SKashyap Desai } 1910c9566231SKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 1911c9566231SKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 1912c9566231SKashyap Desai ioc_err(mrioc, 1913c9566231SKashyap Desai "CreateRepQ: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 1914c9566231SKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 1915c9566231SKashyap Desai mrioc->init_cmds.ioc_loginfo); 1916c9566231SKashyap Desai retval = -1; 1917c9566231SKashyap Desai goto out_unlock; 1918c9566231SKashyap Desai } 1919c9566231SKashyap Desai op_reply_q->qid = reply_qid; 1920fe6db615SSreekanth Reddy if (midx < mrioc->intr_info_count) 1921c9566231SKashyap Desai mrioc->intr_info[midx].op_reply_q = op_reply_q; 1922c9566231SKashyap Desai 1923afd3a579SSreekanth Reddy (op_reply_q->qtype == MPI3MR_DEFAULT_QUEUE) ? mrioc->default_qcount++ : 1924afd3a579SSreekanth Reddy mrioc->active_poll_qcount++; 1925afd3a579SSreekanth Reddy 1926c9566231SKashyap Desai out_unlock: 1927c9566231SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 1928c9566231SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 1929c9566231SKashyap Desai out: 1930c9566231SKashyap Desai 1931c9566231SKashyap Desai return retval; 1932c9566231SKashyap Desai } 1933c9566231SKashyap Desai 1934c9566231SKashyap Desai /** 1935c9566231SKashyap Desai * mpi3mr_create_op_req_q - create operational request queue 1936c9566231SKashyap Desai * @mrioc: Adapter instance reference 1937c9566231SKashyap Desai * @idx: operational request queue index 1938c9566231SKashyap Desai * @reply_qid: Reply queue ID 1939c9566231SKashyap Desai * 1940c9566231SKashyap Desai * Create operatinal request queue by issuing MPI request 1941c9566231SKashyap Desai * through admin queue. 1942c9566231SKashyap Desai * 1943c9566231SKashyap Desai * Return: 0 on success, non-zero on failure. 1944c9566231SKashyap Desai */ 1945c9566231SKashyap Desai static int mpi3mr_create_op_req_q(struct mpi3mr_ioc *mrioc, u16 idx, 1946c9566231SKashyap Desai u16 reply_qid) 1947c9566231SKashyap Desai { 1948c9566231SKashyap Desai struct mpi3_create_request_queue_request create_req; 1949c9566231SKashyap Desai struct op_req_qinfo *op_req_q = mrioc->req_qinfo + idx; 1950c9566231SKashyap Desai int retval = 0; 1951c9566231SKashyap Desai u16 req_qid = 0; 1952c9566231SKashyap Desai 1953c9566231SKashyap Desai req_qid = op_req_q->qid; 1954c9566231SKashyap Desai 1955c9566231SKashyap Desai if (req_qid) { 1956c9566231SKashyap Desai retval = -1; 1957c9566231SKashyap Desai ioc_err(mrioc, "CreateReqQ: called for duplicate qid %d\n", 1958c9566231SKashyap Desai req_qid); 1959c9566231SKashyap Desai 1960c9566231SKashyap Desai return retval; 1961c9566231SKashyap Desai } 1962c9566231SKashyap Desai req_qid = idx + 1; 1963c9566231SKashyap Desai 1964c9566231SKashyap Desai op_req_q->num_requests = MPI3MR_OP_REQ_Q_QD; 1965c9566231SKashyap Desai op_req_q->ci = 0; 1966c9566231SKashyap Desai op_req_q->pi = 0; 1967c9566231SKashyap Desai op_req_q->reply_qid = reply_qid; 1968c9566231SKashyap Desai spin_lock_init(&op_req_q->q_lock); 1969c9566231SKashyap Desai 1970c9566231SKashyap Desai if (!op_req_q->q_segments) { 1971c9566231SKashyap Desai retval = mpi3mr_alloc_op_req_q_segments(mrioc, idx); 1972c9566231SKashyap Desai if (retval) { 1973c9566231SKashyap Desai mpi3mr_free_op_req_q_segments(mrioc, idx); 1974c9566231SKashyap Desai goto out; 1975c9566231SKashyap Desai } 1976c9566231SKashyap Desai } 1977c9566231SKashyap Desai 1978c9566231SKashyap Desai memset(&create_req, 0, sizeof(create_req)); 1979c9566231SKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 1980c9566231SKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 1981c9566231SKashyap Desai retval = -1; 1982c9566231SKashyap Desai ioc_err(mrioc, "CreateReqQ: Init command is in use\n"); 1983f9dc034dSYang Yingliang goto out_unlock; 1984c9566231SKashyap Desai } 1985c9566231SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 1986c9566231SKashyap Desai mrioc->init_cmds.is_waiting = 1; 1987c9566231SKashyap Desai mrioc->init_cmds.callback = NULL; 1988c9566231SKashyap Desai create_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 1989c9566231SKashyap Desai create_req.function = MPI3_FUNCTION_CREATE_REQUEST_QUEUE; 1990c9566231SKashyap Desai create_req.queue_id = cpu_to_le16(req_qid); 1991c9566231SKashyap Desai if (mrioc->enable_segqueue) { 1992c9566231SKashyap Desai create_req.flags = 1993c9566231SKashyap Desai MPI3_CREATE_REQUEST_QUEUE_FLAGS_SEGMENTED_SEGMENTED; 1994c9566231SKashyap Desai create_req.base_address = cpu_to_le64( 1995c9566231SKashyap Desai op_req_q->q_segment_list_dma); 1996c9566231SKashyap Desai } else 1997c9566231SKashyap Desai create_req.base_address = cpu_to_le64( 1998c9566231SKashyap Desai op_req_q->q_segments[0].segment_dma); 1999c9566231SKashyap Desai create_req.reply_queue_id = cpu_to_le16(reply_qid); 2000c9566231SKashyap Desai create_req.size = cpu_to_le16(op_req_q->num_requests); 2001c9566231SKashyap Desai 2002c9566231SKashyap Desai init_completion(&mrioc->init_cmds.done); 2003c9566231SKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &create_req, 2004c9566231SKashyap Desai sizeof(create_req), 1); 2005c9566231SKashyap Desai if (retval) { 2006c9566231SKashyap Desai ioc_err(mrioc, "CreateReqQ: Admin Post failed\n"); 2007c9566231SKashyap Desai goto out_unlock; 2008c9566231SKashyap Desai } 2009c9566231SKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 2010c9566231SKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 2011c9566231SKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 2012a6856cc4SSreekanth Reddy ioc_err(mrioc, "create request queue timed out\n"); 2013a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 2014a6856cc4SSreekanth Reddy MPI3MR_RESET_FROM_CREATEREQQ_TIMEOUT); 2015c9566231SKashyap Desai retval = -1; 2016c9566231SKashyap Desai goto out_unlock; 2017c9566231SKashyap Desai } 2018c9566231SKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 2019c9566231SKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 2020c9566231SKashyap Desai ioc_err(mrioc, 2021c9566231SKashyap Desai "CreateReqQ: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 2022c9566231SKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 2023c9566231SKashyap Desai mrioc->init_cmds.ioc_loginfo); 2024c9566231SKashyap Desai retval = -1; 2025c9566231SKashyap Desai goto out_unlock; 2026c9566231SKashyap Desai } 2027c9566231SKashyap Desai op_req_q->qid = req_qid; 2028c9566231SKashyap Desai 2029c9566231SKashyap Desai out_unlock: 2030c9566231SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 2031c9566231SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 2032c9566231SKashyap Desai out: 2033c9566231SKashyap Desai 2034c9566231SKashyap Desai return retval; 2035c9566231SKashyap Desai } 2036c9566231SKashyap Desai 2037c9566231SKashyap Desai /** 2038c9566231SKashyap Desai * mpi3mr_create_op_queues - create operational queue pairs 2039c9566231SKashyap Desai * @mrioc: Adapter instance reference 2040c9566231SKashyap Desai * 2041c9566231SKashyap Desai * Allocate memory for operational queue meta data and call 2042c9566231SKashyap Desai * create request and reply queue functions. 2043c9566231SKashyap Desai * 2044c9566231SKashyap Desai * Return: 0 on success, non-zero on failures. 2045c9566231SKashyap Desai */ 2046c9566231SKashyap Desai static int mpi3mr_create_op_queues(struct mpi3mr_ioc *mrioc) 2047c9566231SKashyap Desai { 2048c9566231SKashyap Desai int retval = 0; 2049c9566231SKashyap Desai u16 num_queues = 0, i = 0, msix_count_op_q = 1; 2050c9566231SKashyap Desai 2051c9566231SKashyap Desai num_queues = min_t(int, mrioc->facts.max_op_reply_q, 2052c9566231SKashyap Desai mrioc->facts.max_op_req_q); 2053c9566231SKashyap Desai 2054c9566231SKashyap Desai msix_count_op_q = 2055c9566231SKashyap Desai mrioc->intr_info_count - mrioc->op_reply_q_offset; 2056c9566231SKashyap Desai if (!mrioc->num_queues) 2057c9566231SKashyap Desai mrioc->num_queues = min_t(int, num_queues, msix_count_op_q); 2058c5758fc7SSreekanth Reddy /* 2059c5758fc7SSreekanth Reddy * During reset set the num_queues to the number of queues 2060c5758fc7SSreekanth Reddy * that was set before the reset. 2061c5758fc7SSreekanth Reddy */ 2062c5758fc7SSreekanth Reddy num_queues = mrioc->num_op_reply_q ? 2063c5758fc7SSreekanth Reddy mrioc->num_op_reply_q : mrioc->num_queues; 2064c5758fc7SSreekanth Reddy ioc_info(mrioc, "trying to create %d operational queue pairs\n", 2065c9566231SKashyap Desai num_queues); 2066c9566231SKashyap Desai 2067c9566231SKashyap Desai if (!mrioc->req_qinfo) { 2068c9566231SKashyap Desai mrioc->req_qinfo = kcalloc(num_queues, 2069c9566231SKashyap Desai sizeof(struct op_req_qinfo), GFP_KERNEL); 2070c9566231SKashyap Desai if (!mrioc->req_qinfo) { 2071c9566231SKashyap Desai retval = -1; 2072c9566231SKashyap Desai goto out_failed; 2073c9566231SKashyap Desai } 2074c9566231SKashyap Desai 2075c9566231SKashyap Desai mrioc->op_reply_qinfo = kzalloc(sizeof(struct op_reply_qinfo) * 2076c9566231SKashyap Desai num_queues, GFP_KERNEL); 2077c9566231SKashyap Desai if (!mrioc->op_reply_qinfo) { 2078c9566231SKashyap Desai retval = -1; 2079c9566231SKashyap Desai goto out_failed; 2080c9566231SKashyap Desai } 2081c9566231SKashyap Desai } 2082c9566231SKashyap Desai 2083c9566231SKashyap Desai if (mrioc->enable_segqueue) 2084c9566231SKashyap Desai ioc_info(mrioc, 2085c9566231SKashyap Desai "allocating operational queues through segmented queues\n"); 2086c9566231SKashyap Desai 2087c9566231SKashyap Desai for (i = 0; i < num_queues; i++) { 2088c9566231SKashyap Desai if (mpi3mr_create_op_reply_q(mrioc, i)) { 2089c9566231SKashyap Desai ioc_err(mrioc, "Cannot create OP RepQ %d\n", i); 2090c9566231SKashyap Desai break; 2091c9566231SKashyap Desai } 2092c9566231SKashyap Desai if (mpi3mr_create_op_req_q(mrioc, i, 2093c9566231SKashyap Desai mrioc->op_reply_qinfo[i].qid)) { 2094c9566231SKashyap Desai ioc_err(mrioc, "Cannot create OP ReqQ %d\n", i); 2095c9566231SKashyap Desai mpi3mr_delete_op_reply_q(mrioc, i); 2096c9566231SKashyap Desai break; 2097c9566231SKashyap Desai } 2098c9566231SKashyap Desai } 2099c9566231SKashyap Desai 2100c9566231SKashyap Desai if (i == 0) { 2101c9566231SKashyap Desai /* Not even one queue is created successfully*/ 2102c9566231SKashyap Desai retval = -1; 2103c9566231SKashyap Desai goto out_failed; 2104c9566231SKashyap Desai } 2105c9566231SKashyap Desai mrioc->num_op_reply_q = mrioc->num_op_req_q = i; 2106afd3a579SSreekanth Reddy ioc_info(mrioc, 2107afd3a579SSreekanth Reddy "successfully created %d operational queue pairs(default/polled) queue = (%d/%d)\n", 2108afd3a579SSreekanth Reddy mrioc->num_op_reply_q, mrioc->default_qcount, 2109afd3a579SSreekanth Reddy mrioc->active_poll_qcount); 2110c9566231SKashyap Desai 2111c9566231SKashyap Desai return retval; 2112c9566231SKashyap Desai out_failed: 2113c9566231SKashyap Desai kfree(mrioc->req_qinfo); 2114c9566231SKashyap Desai mrioc->req_qinfo = NULL; 2115c9566231SKashyap Desai 2116c9566231SKashyap Desai kfree(mrioc->op_reply_qinfo); 2117c9566231SKashyap Desai mrioc->op_reply_qinfo = NULL; 2118c9566231SKashyap Desai 2119c9566231SKashyap Desai return retval; 2120c9566231SKashyap Desai } 2121c9566231SKashyap Desai 2122c9566231SKashyap Desai /** 2123023ab2a9SKashyap Desai * mpi3mr_op_request_post - Post request to operational queue 2124023ab2a9SKashyap Desai * @mrioc: Adapter reference 2125023ab2a9SKashyap Desai * @op_req_q: Operational request queue info 2126023ab2a9SKashyap Desai * @req: MPI3 request 2127023ab2a9SKashyap Desai * 2128023ab2a9SKashyap Desai * Post the MPI3 request into operational request queue and 2129023ab2a9SKashyap Desai * inform the controller, if the queue is full return 2130023ab2a9SKashyap Desai * appropriate error. 2131023ab2a9SKashyap Desai * 2132023ab2a9SKashyap Desai * Return: 0 on success, non-zero on failure. 2133023ab2a9SKashyap Desai */ 2134023ab2a9SKashyap Desai int mpi3mr_op_request_post(struct mpi3mr_ioc *mrioc, 2135023ab2a9SKashyap Desai struct op_req_qinfo *op_req_q, u8 *req) 2136023ab2a9SKashyap Desai { 2137023ab2a9SKashyap Desai u16 pi = 0, max_entries, reply_qidx = 0, midx; 2138023ab2a9SKashyap Desai int retval = 0; 2139023ab2a9SKashyap Desai unsigned long flags; 2140023ab2a9SKashyap Desai u8 *req_entry; 2141023ab2a9SKashyap Desai void *segment_base_addr; 2142023ab2a9SKashyap Desai u16 req_sz = mrioc->facts.op_req_sz; 2143023ab2a9SKashyap Desai struct segments *segments = op_req_q->q_segments; 2144023ab2a9SKashyap Desai 2145023ab2a9SKashyap Desai reply_qidx = op_req_q->reply_qid - 1; 2146023ab2a9SKashyap Desai 2147023ab2a9SKashyap Desai if (mrioc->unrecoverable) 2148023ab2a9SKashyap Desai return -EFAULT; 2149023ab2a9SKashyap Desai 2150023ab2a9SKashyap Desai spin_lock_irqsave(&op_req_q->q_lock, flags); 2151023ab2a9SKashyap Desai pi = op_req_q->pi; 2152023ab2a9SKashyap Desai max_entries = op_req_q->num_requests; 2153023ab2a9SKashyap Desai 2154023ab2a9SKashyap Desai if (mpi3mr_check_req_qfull(op_req_q)) { 2155023ab2a9SKashyap Desai midx = REPLY_QUEUE_IDX_TO_MSIX_IDX( 2156023ab2a9SKashyap Desai reply_qidx, mrioc->op_reply_q_offset); 2157afd3a579SSreekanth Reddy mpi3mr_process_op_reply_q(mrioc, mrioc->intr_info[midx].op_reply_q); 2158023ab2a9SKashyap Desai 2159023ab2a9SKashyap Desai if (mpi3mr_check_req_qfull(op_req_q)) { 2160023ab2a9SKashyap Desai retval = -EAGAIN; 2161023ab2a9SKashyap Desai goto out; 2162023ab2a9SKashyap Desai } 2163023ab2a9SKashyap Desai } 2164023ab2a9SKashyap Desai 2165023ab2a9SKashyap Desai if (mrioc->reset_in_progress) { 2166023ab2a9SKashyap Desai ioc_err(mrioc, "OpReqQ submit reset in progress\n"); 2167023ab2a9SKashyap Desai retval = -EAGAIN; 2168023ab2a9SKashyap Desai goto out; 2169023ab2a9SKashyap Desai } 2170023ab2a9SKashyap Desai 2171023ab2a9SKashyap Desai segment_base_addr = segments[pi / op_req_q->segment_qd].segment; 2172023ab2a9SKashyap Desai req_entry = (u8 *)segment_base_addr + 2173023ab2a9SKashyap Desai ((pi % op_req_q->segment_qd) * req_sz); 2174023ab2a9SKashyap Desai 2175023ab2a9SKashyap Desai memset(req_entry, 0, req_sz); 2176023ab2a9SKashyap Desai memcpy(req_entry, req, MPI3MR_ADMIN_REQ_FRAME_SZ); 2177023ab2a9SKashyap Desai 2178023ab2a9SKashyap Desai if (++pi == max_entries) 2179023ab2a9SKashyap Desai pi = 0; 2180023ab2a9SKashyap Desai op_req_q->pi = pi; 2181023ab2a9SKashyap Desai 2182463429f8SKashyap Desai if (atomic_inc_return(&mrioc->op_reply_qinfo[reply_qidx].pend_ios) 2183463429f8SKashyap Desai > MPI3MR_IRQ_POLL_TRIGGER_IOCOUNT) 2184463429f8SKashyap Desai mrioc->op_reply_qinfo[reply_qidx].enable_irq_poll = true; 2185463429f8SKashyap Desai 2186023ab2a9SKashyap Desai writel(op_req_q->pi, 2187023ab2a9SKashyap Desai &mrioc->sysif_regs->oper_queue_indexes[reply_qidx].producer_index); 2188023ab2a9SKashyap Desai 2189023ab2a9SKashyap Desai out: 2190023ab2a9SKashyap Desai spin_unlock_irqrestore(&op_req_q->q_lock, flags); 2191023ab2a9SKashyap Desai return retval; 2192023ab2a9SKashyap Desai } 2193023ab2a9SKashyap Desai 2194023ab2a9SKashyap Desai /** 2195a6856cc4SSreekanth Reddy * mpi3mr_check_rh_fault_ioc - check reset history and fault 2196a6856cc4SSreekanth Reddy * controller 2197a6856cc4SSreekanth Reddy * @mrioc: Adapter instance reference 21983bb3c24eSYang Li * @reason_code: reason code for the fault. 2199a6856cc4SSreekanth Reddy * 2200a6856cc4SSreekanth Reddy * This routine will save snapdump and fault the controller with 2201a6856cc4SSreekanth Reddy * the given reason code if it is not already in the fault or 2202a6856cc4SSreekanth Reddy * not asynchronosuly reset. This will be used to handle 2203a6856cc4SSreekanth Reddy * initilaization time faults/resets/timeout as in those cases 2204a6856cc4SSreekanth Reddy * immediate soft reset invocation is not required. 2205a6856cc4SSreekanth Reddy * 2206a6856cc4SSreekanth Reddy * Return: None. 2207a6856cc4SSreekanth Reddy */ 2208a6856cc4SSreekanth Reddy void mpi3mr_check_rh_fault_ioc(struct mpi3mr_ioc *mrioc, u32 reason_code) 2209a6856cc4SSreekanth Reddy { 2210a6856cc4SSreekanth Reddy u32 ioc_status, host_diagnostic, timeout; 2211a6856cc4SSreekanth Reddy 2212a6856cc4SSreekanth Reddy ioc_status = readl(&mrioc->sysif_regs->ioc_status); 2213a6856cc4SSreekanth Reddy if ((ioc_status & MPI3_SYSIF_IOC_STATUS_RESET_HISTORY) || 2214a6856cc4SSreekanth Reddy (ioc_status & MPI3_SYSIF_IOC_STATUS_FAULT)) { 2215a6856cc4SSreekanth Reddy mpi3mr_print_fault_info(mrioc); 2216a6856cc4SSreekanth Reddy return; 2217a6856cc4SSreekanth Reddy } 2218a6856cc4SSreekanth Reddy mpi3mr_set_diagsave(mrioc); 2219a6856cc4SSreekanth Reddy mpi3mr_issue_reset(mrioc, MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, 2220a6856cc4SSreekanth Reddy reason_code); 2221a6856cc4SSreekanth Reddy timeout = MPI3_SYSIF_DIAG_SAVE_TIMEOUT * 10; 2222a6856cc4SSreekanth Reddy do { 2223a6856cc4SSreekanth Reddy host_diagnostic = readl(&mrioc->sysif_regs->host_diagnostic); 2224a6856cc4SSreekanth Reddy if (!(host_diagnostic & MPI3_SYSIF_HOST_DIAG_SAVE_IN_PROGRESS)) 2225a6856cc4SSreekanth Reddy break; 2226a6856cc4SSreekanth Reddy msleep(100); 2227a6856cc4SSreekanth Reddy } while (--timeout); 2228a6856cc4SSreekanth Reddy } 2229a6856cc4SSreekanth Reddy 2230a6856cc4SSreekanth Reddy /** 223154dfcffbSKashyap Desai * mpi3mr_sync_timestamp - Issue time stamp sync request 223254dfcffbSKashyap Desai * @mrioc: Adapter reference 223354dfcffbSKashyap Desai * 223454dfcffbSKashyap Desai * Issue IO unit control MPI request to synchornize firmware 223554dfcffbSKashyap Desai * timestamp with host time. 223654dfcffbSKashyap Desai * 223754dfcffbSKashyap Desai * Return: 0 on success, non-zero on failure. 223854dfcffbSKashyap Desai */ 223954dfcffbSKashyap Desai static int mpi3mr_sync_timestamp(struct mpi3mr_ioc *mrioc) 224054dfcffbSKashyap Desai { 224154dfcffbSKashyap Desai ktime_t current_time; 224254dfcffbSKashyap Desai struct mpi3_iounit_control_request iou_ctrl; 224354dfcffbSKashyap Desai int retval = 0; 224454dfcffbSKashyap Desai 224554dfcffbSKashyap Desai memset(&iou_ctrl, 0, sizeof(iou_ctrl)); 224654dfcffbSKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 224754dfcffbSKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 224854dfcffbSKashyap Desai retval = -1; 224954dfcffbSKashyap Desai ioc_err(mrioc, "Issue IOUCTL time_stamp: command is in use\n"); 225054dfcffbSKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 225154dfcffbSKashyap Desai goto out; 225254dfcffbSKashyap Desai } 225354dfcffbSKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 225454dfcffbSKashyap Desai mrioc->init_cmds.is_waiting = 1; 225554dfcffbSKashyap Desai mrioc->init_cmds.callback = NULL; 225654dfcffbSKashyap Desai iou_ctrl.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 225754dfcffbSKashyap Desai iou_ctrl.function = MPI3_FUNCTION_IO_UNIT_CONTROL; 225854dfcffbSKashyap Desai iou_ctrl.operation = MPI3_CTRL_OP_UPDATE_TIMESTAMP; 225954dfcffbSKashyap Desai current_time = ktime_get_real(); 226054dfcffbSKashyap Desai iou_ctrl.param64[0] = cpu_to_le64(ktime_to_ms(current_time)); 226154dfcffbSKashyap Desai 226254dfcffbSKashyap Desai init_completion(&mrioc->init_cmds.done); 226354dfcffbSKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &iou_ctrl, 226454dfcffbSKashyap Desai sizeof(iou_ctrl), 0); 226554dfcffbSKashyap Desai if (retval) { 226654dfcffbSKashyap Desai ioc_err(mrioc, "Issue IOUCTL time_stamp: Admin Post failed\n"); 226754dfcffbSKashyap Desai goto out_unlock; 226854dfcffbSKashyap Desai } 226954dfcffbSKashyap Desai 227054dfcffbSKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 227154dfcffbSKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 227254dfcffbSKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 227354dfcffbSKashyap Desai ioc_err(mrioc, "Issue IOUCTL time_stamp: command timed out\n"); 227454dfcffbSKashyap Desai mrioc->init_cmds.is_waiting = 0; 2275fbaa9aa4SSreekanth Reddy if (!(mrioc->init_cmds.state & MPI3MR_CMD_RESET)) 227654dfcffbSKashyap Desai mpi3mr_soft_reset_handler(mrioc, 227754dfcffbSKashyap Desai MPI3MR_RESET_FROM_TSU_TIMEOUT, 1); 227854dfcffbSKashyap Desai retval = -1; 227954dfcffbSKashyap Desai goto out_unlock; 228054dfcffbSKashyap Desai } 228154dfcffbSKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 228254dfcffbSKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 228354dfcffbSKashyap Desai ioc_err(mrioc, 228454dfcffbSKashyap Desai "Issue IOUCTL time_stamp: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 228554dfcffbSKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 228654dfcffbSKashyap Desai mrioc->init_cmds.ioc_loginfo); 228754dfcffbSKashyap Desai retval = -1; 228854dfcffbSKashyap Desai goto out_unlock; 228954dfcffbSKashyap Desai } 229054dfcffbSKashyap Desai 229154dfcffbSKashyap Desai out_unlock: 229254dfcffbSKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 229354dfcffbSKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 229454dfcffbSKashyap Desai 229554dfcffbSKashyap Desai out: 229654dfcffbSKashyap Desai return retval; 229754dfcffbSKashyap Desai } 229854dfcffbSKashyap Desai 229954dfcffbSKashyap Desai /** 23002ac794baSSreekanth Reddy * mpi3mr_print_pkg_ver - display controller fw package version 23012ac794baSSreekanth Reddy * @mrioc: Adapter reference 23022ac794baSSreekanth Reddy * 23032ac794baSSreekanth Reddy * Retrieve firmware package version from the component image 23042ac794baSSreekanth Reddy * header of the controller flash and display it. 23052ac794baSSreekanth Reddy * 23062ac794baSSreekanth Reddy * Return: 0 on success and non-zero on failure. 23072ac794baSSreekanth Reddy */ 23082ac794baSSreekanth Reddy static int mpi3mr_print_pkg_ver(struct mpi3mr_ioc *mrioc) 23092ac794baSSreekanth Reddy { 23102ac794baSSreekanth Reddy struct mpi3_ci_upload_request ci_upload; 23112ac794baSSreekanth Reddy int retval = -1; 23122ac794baSSreekanth Reddy void *data = NULL; 23132ac794baSSreekanth Reddy dma_addr_t data_dma; 23142ac794baSSreekanth Reddy struct mpi3_ci_manifest_mpi *manifest; 23152ac794baSSreekanth Reddy u32 data_len = sizeof(struct mpi3_ci_manifest_mpi); 23162ac794baSSreekanth Reddy u8 sgl_flags = MPI3MR_SGEFLAGS_SYSTEM_SIMPLE_END_OF_LIST; 23172ac794baSSreekanth Reddy 23182ac794baSSreekanth Reddy data = dma_alloc_coherent(&mrioc->pdev->dev, data_len, &data_dma, 23192ac794baSSreekanth Reddy GFP_KERNEL); 23202ac794baSSreekanth Reddy if (!data) 23212ac794baSSreekanth Reddy return -ENOMEM; 23222ac794baSSreekanth Reddy 23232ac794baSSreekanth Reddy memset(&ci_upload, 0, sizeof(ci_upload)); 23242ac794baSSreekanth Reddy mutex_lock(&mrioc->init_cmds.mutex); 23252ac794baSSreekanth Reddy if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 23262ac794baSSreekanth Reddy ioc_err(mrioc, "sending get package version failed due to command in use\n"); 23272ac794baSSreekanth Reddy mutex_unlock(&mrioc->init_cmds.mutex); 23282ac794baSSreekanth Reddy goto out; 23292ac794baSSreekanth Reddy } 23302ac794baSSreekanth Reddy mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 23312ac794baSSreekanth Reddy mrioc->init_cmds.is_waiting = 1; 23322ac794baSSreekanth Reddy mrioc->init_cmds.callback = NULL; 23332ac794baSSreekanth Reddy ci_upload.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 23342ac794baSSreekanth Reddy ci_upload.function = MPI3_FUNCTION_CI_UPLOAD; 23352ac794baSSreekanth Reddy ci_upload.msg_flags = MPI3_CI_UPLOAD_MSGFLAGS_LOCATION_PRIMARY; 23362ac794baSSreekanth Reddy ci_upload.signature1 = cpu_to_le32(MPI3_IMAGE_HEADER_SIGNATURE1_MANIFEST); 23372ac794baSSreekanth Reddy ci_upload.image_offset = cpu_to_le32(MPI3_IMAGE_HEADER_SIZE); 23382ac794baSSreekanth Reddy ci_upload.segment_size = cpu_to_le32(data_len); 23392ac794baSSreekanth Reddy 23402ac794baSSreekanth Reddy mpi3mr_add_sg_single(&ci_upload.sgl, sgl_flags, data_len, 23412ac794baSSreekanth Reddy data_dma); 23422ac794baSSreekanth Reddy init_completion(&mrioc->init_cmds.done); 23432ac794baSSreekanth Reddy retval = mpi3mr_admin_request_post(mrioc, &ci_upload, 23442ac794baSSreekanth Reddy sizeof(ci_upload), 1); 23452ac794baSSreekanth Reddy if (retval) { 23462ac794baSSreekanth Reddy ioc_err(mrioc, "posting get package version failed\n"); 23472ac794baSSreekanth Reddy goto out_unlock; 23482ac794baSSreekanth Reddy } 23492ac794baSSreekanth Reddy wait_for_completion_timeout(&mrioc->init_cmds.done, 23502ac794baSSreekanth Reddy (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 23512ac794baSSreekanth Reddy if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 23522ac794baSSreekanth Reddy ioc_err(mrioc, "get package version timed out\n"); 2353a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 2354a6856cc4SSreekanth Reddy MPI3MR_RESET_FROM_GETPKGVER_TIMEOUT); 23552ac794baSSreekanth Reddy retval = -1; 23562ac794baSSreekanth Reddy goto out_unlock; 23572ac794baSSreekanth Reddy } 23582ac794baSSreekanth Reddy if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 23592ac794baSSreekanth Reddy == MPI3_IOCSTATUS_SUCCESS) { 23602ac794baSSreekanth Reddy manifest = (struct mpi3_ci_manifest_mpi *) data; 23612ac794baSSreekanth Reddy if (manifest->manifest_type == MPI3_CI_MANIFEST_TYPE_MPI) { 23622ac794baSSreekanth Reddy ioc_info(mrioc, 23632ac794baSSreekanth Reddy "firmware package version(%d.%d.%d.%d.%05d-%05d)\n", 23642ac794baSSreekanth Reddy manifest->package_version.gen_major, 23652ac794baSSreekanth Reddy manifest->package_version.gen_minor, 23662ac794baSSreekanth Reddy manifest->package_version.phase_major, 23672ac794baSSreekanth Reddy manifest->package_version.phase_minor, 23682ac794baSSreekanth Reddy manifest->package_version.customer_id, 23692ac794baSSreekanth Reddy manifest->package_version.build_num); 23702ac794baSSreekanth Reddy } 23712ac794baSSreekanth Reddy } 23722ac794baSSreekanth Reddy retval = 0; 23732ac794baSSreekanth Reddy out_unlock: 23742ac794baSSreekanth Reddy mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 23752ac794baSSreekanth Reddy mutex_unlock(&mrioc->init_cmds.mutex); 23762ac794baSSreekanth Reddy 23772ac794baSSreekanth Reddy out: 23782ac794baSSreekanth Reddy if (data) 23792ac794baSSreekanth Reddy dma_free_coherent(&mrioc->pdev->dev, data_len, data, 23802ac794baSSreekanth Reddy data_dma); 23812ac794baSSreekanth Reddy return retval; 23822ac794baSSreekanth Reddy } 23832ac794baSSreekanth Reddy 23842ac794baSSreekanth Reddy /** 2385672ae26cSKashyap Desai * mpi3mr_watchdog_work - watchdog thread to monitor faults 2386672ae26cSKashyap Desai * @work: work struct 2387672ae26cSKashyap Desai * 2388672ae26cSKashyap Desai * Watch dog work periodically executed (1 second interval) to 2389672ae26cSKashyap Desai * monitor firmware fault and to issue periodic timer sync to 2390672ae26cSKashyap Desai * the firmware. 2391672ae26cSKashyap Desai * 2392672ae26cSKashyap Desai * Return: Nothing. 2393672ae26cSKashyap Desai */ 2394672ae26cSKashyap Desai static void mpi3mr_watchdog_work(struct work_struct *work) 2395672ae26cSKashyap Desai { 2396672ae26cSKashyap Desai struct mpi3mr_ioc *mrioc = 2397672ae26cSKashyap Desai container_of(work, struct mpi3mr_ioc, watchdog_work.work); 2398672ae26cSKashyap Desai unsigned long flags; 2399672ae26cSKashyap Desai enum mpi3mr_iocstate ioc_state; 240078b76a07SSreekanth Reddy u32 fault, host_diagnostic, ioc_status; 240178b76a07SSreekanth Reddy u32 reset_reason = MPI3MR_RESET_FROM_FAULT_WATCH; 2402672ae26cSKashyap Desai 2403b64845a7SSreekanth Reddy if (mrioc->reset_in_progress || mrioc->unrecoverable) 2404b64845a7SSreekanth Reddy return; 2405b64845a7SSreekanth Reddy 240654dfcffbSKashyap Desai if (mrioc->ts_update_counter++ >= MPI3MR_TSUPDATE_INTERVAL) { 240754dfcffbSKashyap Desai mrioc->ts_update_counter = 0; 240854dfcffbSKashyap Desai mpi3mr_sync_timestamp(mrioc); 240954dfcffbSKashyap Desai } 241054dfcffbSKashyap Desai 241178b76a07SSreekanth Reddy if ((mrioc->prepare_for_reset) && 241278b76a07SSreekanth Reddy ((mrioc->prepare_for_reset_timeout_counter++) >= 241378b76a07SSreekanth Reddy MPI3MR_PREPARE_FOR_RESET_TIMEOUT)) { 241478b76a07SSreekanth Reddy mpi3mr_soft_reset_handler(mrioc, 241578b76a07SSreekanth Reddy MPI3MR_RESET_FROM_CIACTVRST_TIMER, 1); 241678b76a07SSreekanth Reddy return; 241778b76a07SSreekanth Reddy } 241878b76a07SSreekanth Reddy 241978b76a07SSreekanth Reddy ioc_status = readl(&mrioc->sysif_regs->ioc_status); 242078b76a07SSreekanth Reddy if (ioc_status & MPI3_SYSIF_IOC_STATUS_RESET_HISTORY) { 242178b76a07SSreekanth Reddy mpi3mr_soft_reset_handler(mrioc, MPI3MR_RESET_FROM_FIRMWARE, 0); 242278b76a07SSreekanth Reddy return; 242378b76a07SSreekanth Reddy } 242478b76a07SSreekanth Reddy 2425672ae26cSKashyap Desai /*Check for fault state every one second and issue Soft reset*/ 2426672ae26cSKashyap Desai ioc_state = mpi3mr_get_iocstate(mrioc); 242778b76a07SSreekanth Reddy if (ioc_state != MRIOC_STATE_FAULT) 242878b76a07SSreekanth Reddy goto schedule_work; 242978b76a07SSreekanth Reddy 243078b76a07SSreekanth Reddy fault = readl(&mrioc->sysif_regs->fault) & MPI3_SYSIF_FAULT_CODE_MASK; 2431672ae26cSKashyap Desai host_diagnostic = readl(&mrioc->sysif_regs->host_diagnostic); 2432672ae26cSKashyap Desai if (host_diagnostic & MPI3_SYSIF_HOST_DIAG_SAVE_IN_PROGRESS) { 2433672ae26cSKashyap Desai if (!mrioc->diagsave_timeout) { 2434672ae26cSKashyap Desai mpi3mr_print_fault_info(mrioc); 243578b76a07SSreekanth Reddy ioc_warn(mrioc, "diag save in progress\n"); 2436672ae26cSKashyap Desai } 243778b76a07SSreekanth Reddy if ((mrioc->diagsave_timeout++) <= MPI3_SYSIF_DIAG_SAVE_TIMEOUT) 2438672ae26cSKashyap Desai goto schedule_work; 243978b76a07SSreekanth Reddy } 244078b76a07SSreekanth Reddy 2441672ae26cSKashyap Desai mpi3mr_print_fault_info(mrioc); 2442672ae26cSKashyap Desai mrioc->diagsave_timeout = 0; 2443672ae26cSKashyap Desai 244478b76a07SSreekanth Reddy switch (fault) { 244578b76a07SSreekanth Reddy case MPI3_SYSIF_FAULT_CODE_POWER_CYCLE_REQUIRED: 2446672ae26cSKashyap Desai ioc_info(mrioc, 244778b76a07SSreekanth Reddy "controller requires system power cycle, marking controller as unrecoverable\n"); 2448672ae26cSKashyap Desai mrioc->unrecoverable = 1; 244978b76a07SSreekanth Reddy return; 245078b76a07SSreekanth Reddy case MPI3_SYSIF_FAULT_CODE_SOFT_RESET_IN_PROGRESS: 245178b76a07SSreekanth Reddy return; 245278b76a07SSreekanth Reddy case MPI3_SYSIF_FAULT_CODE_CI_ACTIVATION_RESET: 245378b76a07SSreekanth Reddy reset_reason = MPI3MR_RESET_FROM_CIACTIV_FAULT; 245478b76a07SSreekanth Reddy break; 245578b76a07SSreekanth Reddy default: 245678b76a07SSreekanth Reddy break; 2457672ae26cSKashyap Desai } 245878b76a07SSreekanth Reddy mpi3mr_soft_reset_handler(mrioc, reset_reason, 0); 245978b76a07SSreekanth Reddy return; 2460672ae26cSKashyap Desai 2461672ae26cSKashyap Desai schedule_work: 2462672ae26cSKashyap Desai spin_lock_irqsave(&mrioc->watchdog_lock, flags); 2463672ae26cSKashyap Desai if (mrioc->watchdog_work_q) 2464672ae26cSKashyap Desai queue_delayed_work(mrioc->watchdog_work_q, 2465672ae26cSKashyap Desai &mrioc->watchdog_work, 2466672ae26cSKashyap Desai msecs_to_jiffies(MPI3MR_WATCHDOG_INTERVAL)); 2467672ae26cSKashyap Desai spin_unlock_irqrestore(&mrioc->watchdog_lock, flags); 2468672ae26cSKashyap Desai return; 2469672ae26cSKashyap Desai } 2470672ae26cSKashyap Desai 2471672ae26cSKashyap Desai /** 2472672ae26cSKashyap Desai * mpi3mr_start_watchdog - Start watchdog 2473672ae26cSKashyap Desai * @mrioc: Adapter instance reference 2474672ae26cSKashyap Desai * 2475672ae26cSKashyap Desai * Create and start the watchdog thread to monitor controller 2476672ae26cSKashyap Desai * faults. 2477672ae26cSKashyap Desai * 2478672ae26cSKashyap Desai * Return: Nothing. 2479672ae26cSKashyap Desai */ 2480672ae26cSKashyap Desai void mpi3mr_start_watchdog(struct mpi3mr_ioc *mrioc) 2481672ae26cSKashyap Desai { 2482672ae26cSKashyap Desai if (mrioc->watchdog_work_q) 2483672ae26cSKashyap Desai return; 2484672ae26cSKashyap Desai 2485672ae26cSKashyap Desai INIT_DELAYED_WORK(&mrioc->watchdog_work, mpi3mr_watchdog_work); 2486672ae26cSKashyap Desai snprintf(mrioc->watchdog_work_q_name, 2487672ae26cSKashyap Desai sizeof(mrioc->watchdog_work_q_name), "watchdog_%s%d", mrioc->name, 2488672ae26cSKashyap Desai mrioc->id); 2489672ae26cSKashyap Desai mrioc->watchdog_work_q = 2490672ae26cSKashyap Desai create_singlethread_workqueue(mrioc->watchdog_work_q_name); 2491672ae26cSKashyap Desai if (!mrioc->watchdog_work_q) { 2492672ae26cSKashyap Desai ioc_err(mrioc, "%s: failed (line=%d)\n", __func__, __LINE__); 2493672ae26cSKashyap Desai return; 2494672ae26cSKashyap Desai } 2495672ae26cSKashyap Desai 2496672ae26cSKashyap Desai if (mrioc->watchdog_work_q) 2497672ae26cSKashyap Desai queue_delayed_work(mrioc->watchdog_work_q, 2498672ae26cSKashyap Desai &mrioc->watchdog_work, 2499672ae26cSKashyap Desai msecs_to_jiffies(MPI3MR_WATCHDOG_INTERVAL)); 2500672ae26cSKashyap Desai } 2501672ae26cSKashyap Desai 2502672ae26cSKashyap Desai /** 2503672ae26cSKashyap Desai * mpi3mr_stop_watchdog - Stop watchdog 2504672ae26cSKashyap Desai * @mrioc: Adapter instance reference 2505672ae26cSKashyap Desai * 2506672ae26cSKashyap Desai * Stop the watchdog thread created to monitor controller 2507672ae26cSKashyap Desai * faults. 2508672ae26cSKashyap Desai * 2509672ae26cSKashyap Desai * Return: Nothing. 2510672ae26cSKashyap Desai */ 2511672ae26cSKashyap Desai void mpi3mr_stop_watchdog(struct mpi3mr_ioc *mrioc) 2512672ae26cSKashyap Desai { 2513672ae26cSKashyap Desai unsigned long flags; 2514672ae26cSKashyap Desai struct workqueue_struct *wq; 2515672ae26cSKashyap Desai 2516672ae26cSKashyap Desai spin_lock_irqsave(&mrioc->watchdog_lock, flags); 2517672ae26cSKashyap Desai wq = mrioc->watchdog_work_q; 2518672ae26cSKashyap Desai mrioc->watchdog_work_q = NULL; 2519672ae26cSKashyap Desai spin_unlock_irqrestore(&mrioc->watchdog_lock, flags); 2520672ae26cSKashyap Desai if (wq) { 2521672ae26cSKashyap Desai if (!cancel_delayed_work_sync(&mrioc->watchdog_work)) 2522672ae26cSKashyap Desai flush_workqueue(wq); 2523672ae26cSKashyap Desai destroy_workqueue(wq); 2524672ae26cSKashyap Desai } 2525672ae26cSKashyap Desai } 2526672ae26cSKashyap Desai 2527672ae26cSKashyap Desai /** 2528824a1566SKashyap Desai * mpi3mr_setup_admin_qpair - Setup admin queue pair 2529824a1566SKashyap Desai * @mrioc: Adapter instance reference 2530824a1566SKashyap Desai * 2531824a1566SKashyap Desai * Allocate memory for admin queue pair if required and register 2532824a1566SKashyap Desai * the admin queue with the controller. 2533824a1566SKashyap Desai * 2534824a1566SKashyap Desai * Return: 0 on success, non-zero on failures. 2535824a1566SKashyap Desai */ 2536824a1566SKashyap Desai static int mpi3mr_setup_admin_qpair(struct mpi3mr_ioc *mrioc) 2537824a1566SKashyap Desai { 2538824a1566SKashyap Desai int retval = 0; 2539824a1566SKashyap Desai u32 num_admin_entries = 0; 2540824a1566SKashyap Desai 2541824a1566SKashyap Desai mrioc->admin_req_q_sz = MPI3MR_ADMIN_REQ_Q_SIZE; 2542824a1566SKashyap Desai mrioc->num_admin_req = mrioc->admin_req_q_sz / 2543824a1566SKashyap Desai MPI3MR_ADMIN_REQ_FRAME_SZ; 2544824a1566SKashyap Desai mrioc->admin_req_ci = mrioc->admin_req_pi = 0; 2545824a1566SKashyap Desai mrioc->admin_req_base = NULL; 2546824a1566SKashyap Desai 2547824a1566SKashyap Desai mrioc->admin_reply_q_sz = MPI3MR_ADMIN_REPLY_Q_SIZE; 2548824a1566SKashyap Desai mrioc->num_admin_replies = mrioc->admin_reply_q_sz / 2549824a1566SKashyap Desai MPI3MR_ADMIN_REPLY_FRAME_SZ; 2550824a1566SKashyap Desai mrioc->admin_reply_ci = 0; 2551824a1566SKashyap Desai mrioc->admin_reply_ephase = 1; 2552824a1566SKashyap Desai mrioc->admin_reply_base = NULL; 2553824a1566SKashyap Desai 2554824a1566SKashyap Desai if (!mrioc->admin_req_base) { 2555824a1566SKashyap Desai mrioc->admin_req_base = dma_alloc_coherent(&mrioc->pdev->dev, 2556824a1566SKashyap Desai mrioc->admin_req_q_sz, &mrioc->admin_req_dma, GFP_KERNEL); 2557824a1566SKashyap Desai 2558824a1566SKashyap Desai if (!mrioc->admin_req_base) { 2559824a1566SKashyap Desai retval = -1; 2560824a1566SKashyap Desai goto out_failed; 2561824a1566SKashyap Desai } 2562824a1566SKashyap Desai 2563824a1566SKashyap Desai mrioc->admin_reply_base = dma_alloc_coherent(&mrioc->pdev->dev, 2564824a1566SKashyap Desai mrioc->admin_reply_q_sz, &mrioc->admin_reply_dma, 2565824a1566SKashyap Desai GFP_KERNEL); 2566824a1566SKashyap Desai 2567824a1566SKashyap Desai if (!mrioc->admin_reply_base) { 2568824a1566SKashyap Desai retval = -1; 2569824a1566SKashyap Desai goto out_failed; 2570824a1566SKashyap Desai } 2571824a1566SKashyap Desai } 2572824a1566SKashyap Desai 2573824a1566SKashyap Desai num_admin_entries = (mrioc->num_admin_replies << 16) | 2574824a1566SKashyap Desai (mrioc->num_admin_req); 2575824a1566SKashyap Desai writel(num_admin_entries, &mrioc->sysif_regs->admin_queue_num_entries); 2576824a1566SKashyap Desai mpi3mr_writeq(mrioc->admin_req_dma, 2577824a1566SKashyap Desai &mrioc->sysif_regs->admin_request_queue_address); 2578824a1566SKashyap Desai mpi3mr_writeq(mrioc->admin_reply_dma, 2579824a1566SKashyap Desai &mrioc->sysif_regs->admin_reply_queue_address); 2580824a1566SKashyap Desai writel(mrioc->admin_req_pi, &mrioc->sysif_regs->admin_request_queue_pi); 2581824a1566SKashyap Desai writel(mrioc->admin_reply_ci, &mrioc->sysif_regs->admin_reply_queue_ci); 2582824a1566SKashyap Desai return retval; 2583824a1566SKashyap Desai 2584824a1566SKashyap Desai out_failed: 2585824a1566SKashyap Desai 2586824a1566SKashyap Desai if (mrioc->admin_reply_base) { 2587824a1566SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, mrioc->admin_reply_q_sz, 2588824a1566SKashyap Desai mrioc->admin_reply_base, mrioc->admin_reply_dma); 2589824a1566SKashyap Desai mrioc->admin_reply_base = NULL; 2590824a1566SKashyap Desai } 2591824a1566SKashyap Desai if (mrioc->admin_req_base) { 2592824a1566SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, mrioc->admin_req_q_sz, 2593824a1566SKashyap Desai mrioc->admin_req_base, mrioc->admin_req_dma); 2594824a1566SKashyap Desai mrioc->admin_req_base = NULL; 2595824a1566SKashyap Desai } 2596824a1566SKashyap Desai return retval; 2597824a1566SKashyap Desai } 2598824a1566SKashyap Desai 2599824a1566SKashyap Desai /** 2600824a1566SKashyap Desai * mpi3mr_issue_iocfacts - Send IOC Facts 2601824a1566SKashyap Desai * @mrioc: Adapter instance reference 2602824a1566SKashyap Desai * @facts_data: Cached IOC facts data 2603824a1566SKashyap Desai * 2604824a1566SKashyap Desai * Issue IOC Facts MPI request through admin queue and wait for 2605824a1566SKashyap Desai * the completion of it or time out. 2606824a1566SKashyap Desai * 2607824a1566SKashyap Desai * Return: 0 on success, non-zero on failures. 2608824a1566SKashyap Desai */ 2609824a1566SKashyap Desai static int mpi3mr_issue_iocfacts(struct mpi3mr_ioc *mrioc, 2610824a1566SKashyap Desai struct mpi3_ioc_facts_data *facts_data) 2611824a1566SKashyap Desai { 2612824a1566SKashyap Desai struct mpi3_ioc_facts_request iocfacts_req; 2613824a1566SKashyap Desai void *data = NULL; 2614824a1566SKashyap Desai dma_addr_t data_dma; 2615824a1566SKashyap Desai u32 data_len = sizeof(*facts_data); 2616824a1566SKashyap Desai int retval = 0; 2617824a1566SKashyap Desai u8 sgl_flags = MPI3MR_SGEFLAGS_SYSTEM_SIMPLE_END_OF_LIST; 2618824a1566SKashyap Desai 2619824a1566SKashyap Desai data = dma_alloc_coherent(&mrioc->pdev->dev, data_len, &data_dma, 2620824a1566SKashyap Desai GFP_KERNEL); 2621824a1566SKashyap Desai 2622824a1566SKashyap Desai if (!data) { 2623824a1566SKashyap Desai retval = -1; 2624824a1566SKashyap Desai goto out; 2625824a1566SKashyap Desai } 2626824a1566SKashyap Desai 2627824a1566SKashyap Desai memset(&iocfacts_req, 0, sizeof(iocfacts_req)); 2628824a1566SKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 2629824a1566SKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 2630824a1566SKashyap Desai retval = -1; 2631824a1566SKashyap Desai ioc_err(mrioc, "Issue IOCFacts: Init command is in use\n"); 2632824a1566SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 2633824a1566SKashyap Desai goto out; 2634824a1566SKashyap Desai } 2635824a1566SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 2636824a1566SKashyap Desai mrioc->init_cmds.is_waiting = 1; 2637824a1566SKashyap Desai mrioc->init_cmds.callback = NULL; 2638824a1566SKashyap Desai iocfacts_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 2639824a1566SKashyap Desai iocfacts_req.function = MPI3_FUNCTION_IOC_FACTS; 2640824a1566SKashyap Desai 2641824a1566SKashyap Desai mpi3mr_add_sg_single(&iocfacts_req.sgl, sgl_flags, data_len, 2642824a1566SKashyap Desai data_dma); 2643824a1566SKashyap Desai 2644824a1566SKashyap Desai init_completion(&mrioc->init_cmds.done); 2645824a1566SKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &iocfacts_req, 2646824a1566SKashyap Desai sizeof(iocfacts_req), 1); 2647824a1566SKashyap Desai if (retval) { 2648824a1566SKashyap Desai ioc_err(mrioc, "Issue IOCFacts: Admin Post failed\n"); 2649824a1566SKashyap Desai goto out_unlock; 2650824a1566SKashyap Desai } 2651824a1566SKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 2652824a1566SKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 2653824a1566SKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 2654a6856cc4SSreekanth Reddy ioc_err(mrioc, "ioc_facts timed out\n"); 2655a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 2656824a1566SKashyap Desai MPI3MR_RESET_FROM_IOCFACTS_TIMEOUT); 2657824a1566SKashyap Desai retval = -1; 2658824a1566SKashyap Desai goto out_unlock; 2659824a1566SKashyap Desai } 2660824a1566SKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 2661824a1566SKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 2662824a1566SKashyap Desai ioc_err(mrioc, 2663824a1566SKashyap Desai "Issue IOCFacts: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 2664824a1566SKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 2665824a1566SKashyap Desai mrioc->init_cmds.ioc_loginfo); 2666824a1566SKashyap Desai retval = -1; 2667824a1566SKashyap Desai goto out_unlock; 2668824a1566SKashyap Desai } 2669824a1566SKashyap Desai memcpy(facts_data, (u8 *)data, data_len); 2670c5758fc7SSreekanth Reddy mpi3mr_process_factsdata(mrioc, facts_data); 2671824a1566SKashyap Desai out_unlock: 2672824a1566SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 2673824a1566SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 2674824a1566SKashyap Desai 2675824a1566SKashyap Desai out: 2676824a1566SKashyap Desai if (data) 2677824a1566SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, data_len, data, data_dma); 2678824a1566SKashyap Desai 2679824a1566SKashyap Desai return retval; 2680824a1566SKashyap Desai } 2681824a1566SKashyap Desai 2682824a1566SKashyap Desai /** 2683824a1566SKashyap Desai * mpi3mr_check_reset_dma_mask - Process IOC facts data 2684824a1566SKashyap Desai * @mrioc: Adapter instance reference 2685824a1566SKashyap Desai * 2686824a1566SKashyap Desai * Check whether the new DMA mask requested through IOCFacts by 2687824a1566SKashyap Desai * firmware needs to be set, if so set it . 2688824a1566SKashyap Desai * 2689824a1566SKashyap Desai * Return: 0 on success, non-zero on failure. 2690824a1566SKashyap Desai */ 2691824a1566SKashyap Desai static inline int mpi3mr_check_reset_dma_mask(struct mpi3mr_ioc *mrioc) 2692824a1566SKashyap Desai { 2693824a1566SKashyap Desai struct pci_dev *pdev = mrioc->pdev; 2694824a1566SKashyap Desai int r; 2695824a1566SKashyap Desai u64 facts_dma_mask = DMA_BIT_MASK(mrioc->facts.dma_mask); 2696824a1566SKashyap Desai 2697824a1566SKashyap Desai if (!mrioc->facts.dma_mask || (mrioc->dma_mask <= facts_dma_mask)) 2698824a1566SKashyap Desai return 0; 2699824a1566SKashyap Desai 2700824a1566SKashyap Desai ioc_info(mrioc, "Changing DMA mask from 0x%016llx to 0x%016llx\n", 2701824a1566SKashyap Desai mrioc->dma_mask, facts_dma_mask); 2702824a1566SKashyap Desai 2703824a1566SKashyap Desai r = dma_set_mask_and_coherent(&pdev->dev, facts_dma_mask); 2704824a1566SKashyap Desai if (r) { 2705824a1566SKashyap Desai ioc_err(mrioc, "Setting DMA mask to 0x%016llx failed: %d\n", 2706824a1566SKashyap Desai facts_dma_mask, r); 2707824a1566SKashyap Desai return r; 2708824a1566SKashyap Desai } 2709824a1566SKashyap Desai mrioc->dma_mask = facts_dma_mask; 2710824a1566SKashyap Desai return r; 2711824a1566SKashyap Desai } 2712824a1566SKashyap Desai 2713824a1566SKashyap Desai /** 2714824a1566SKashyap Desai * mpi3mr_process_factsdata - Process IOC facts data 2715824a1566SKashyap Desai * @mrioc: Adapter instance reference 2716824a1566SKashyap Desai * @facts_data: Cached IOC facts data 2717824a1566SKashyap Desai * 2718824a1566SKashyap Desai * Convert IOC facts data into cpu endianness and cache it in 2719824a1566SKashyap Desai * the driver . 2720824a1566SKashyap Desai * 2721824a1566SKashyap Desai * Return: Nothing. 2722824a1566SKashyap Desai */ 2723824a1566SKashyap Desai static void mpi3mr_process_factsdata(struct mpi3mr_ioc *mrioc, 2724824a1566SKashyap Desai struct mpi3_ioc_facts_data *facts_data) 2725824a1566SKashyap Desai { 2726824a1566SKashyap Desai u32 ioc_config, req_sz, facts_flags; 2727824a1566SKashyap Desai 2728824a1566SKashyap Desai if ((le16_to_cpu(facts_data->ioc_facts_data_length)) != 2729824a1566SKashyap Desai (sizeof(*facts_data) / 4)) { 2730824a1566SKashyap Desai ioc_warn(mrioc, 2731824a1566SKashyap Desai "IOCFactsdata length mismatch driver_sz(%zu) firmware_sz(%d)\n", 2732824a1566SKashyap Desai sizeof(*facts_data), 2733824a1566SKashyap Desai le16_to_cpu(facts_data->ioc_facts_data_length) * 4); 2734824a1566SKashyap Desai } 2735824a1566SKashyap Desai 2736824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 2737824a1566SKashyap Desai req_sz = 1 << ((ioc_config & MPI3_SYSIF_IOC_CONFIG_OPER_REQ_ENT_SZ) >> 2738824a1566SKashyap Desai MPI3_SYSIF_IOC_CONFIG_OPER_REQ_ENT_SZ_SHIFT); 2739824a1566SKashyap Desai if (le16_to_cpu(facts_data->ioc_request_frame_size) != (req_sz / 4)) { 2740824a1566SKashyap Desai ioc_err(mrioc, 2741824a1566SKashyap Desai "IOCFacts data reqFrameSize mismatch hw_size(%d) firmware_sz(%d)\n", 2742824a1566SKashyap Desai req_sz / 4, le16_to_cpu(facts_data->ioc_request_frame_size)); 2743824a1566SKashyap Desai } 2744824a1566SKashyap Desai 2745824a1566SKashyap Desai memset(&mrioc->facts, 0, sizeof(mrioc->facts)); 2746824a1566SKashyap Desai 2747824a1566SKashyap Desai facts_flags = le32_to_cpu(facts_data->flags); 2748824a1566SKashyap Desai mrioc->facts.op_req_sz = req_sz; 2749824a1566SKashyap Desai mrioc->op_reply_desc_sz = 1 << ((ioc_config & 2750824a1566SKashyap Desai MPI3_SYSIF_IOC_CONFIG_OPER_RPY_ENT_SZ) >> 2751824a1566SKashyap Desai MPI3_SYSIF_IOC_CONFIG_OPER_RPY_ENT_SZ_SHIFT); 2752824a1566SKashyap Desai 2753824a1566SKashyap Desai mrioc->facts.ioc_num = facts_data->ioc_number; 2754824a1566SKashyap Desai mrioc->facts.who_init = facts_data->who_init; 2755824a1566SKashyap Desai mrioc->facts.max_msix_vectors = le16_to_cpu(facts_data->max_msix_vectors); 2756824a1566SKashyap Desai mrioc->facts.personality = (facts_flags & 2757824a1566SKashyap Desai MPI3_IOCFACTS_FLAGS_PERSONALITY_MASK); 2758824a1566SKashyap Desai mrioc->facts.dma_mask = (facts_flags & 2759824a1566SKashyap Desai MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_MASK) >> 2760824a1566SKashyap Desai MPI3_IOCFACTS_FLAGS_DMA_ADDRESS_WIDTH_SHIFT; 2761824a1566SKashyap Desai mrioc->facts.protocol_flags = facts_data->protocol_flags; 2762824a1566SKashyap Desai mrioc->facts.mpi_version = le32_to_cpu(facts_data->mpi_version.word); 276304b27e53SSreekanth Reddy mrioc->facts.max_reqs = le16_to_cpu(facts_data->max_outstanding_requests); 2764824a1566SKashyap Desai mrioc->facts.product_id = le16_to_cpu(facts_data->product_id); 2765824a1566SKashyap Desai mrioc->facts.reply_sz = le16_to_cpu(facts_data->reply_frame_size) * 4; 2766824a1566SKashyap Desai mrioc->facts.exceptions = le16_to_cpu(facts_data->ioc_exceptions); 2767824a1566SKashyap Desai mrioc->facts.max_perids = le16_to_cpu(facts_data->max_persistent_id); 2768824a1566SKashyap Desai mrioc->facts.max_vds = le16_to_cpu(facts_data->max_vds); 2769824a1566SKashyap Desai mrioc->facts.max_hpds = le16_to_cpu(facts_data->max_host_pds); 2770ec5ebd2cSSreekanth Reddy mrioc->facts.max_advhpds = le16_to_cpu(facts_data->max_adv_host_pds); 2771ec5ebd2cSSreekanth Reddy mrioc->facts.max_raid_pds = le16_to_cpu(facts_data->max_raid_pds); 2772824a1566SKashyap Desai mrioc->facts.max_nvme = le16_to_cpu(facts_data->max_nvme); 2773824a1566SKashyap Desai mrioc->facts.max_pcie_switches = 2774ec5ebd2cSSreekanth Reddy le16_to_cpu(facts_data->max_pcie_switches); 2775824a1566SKashyap Desai mrioc->facts.max_sasexpanders = 2776824a1566SKashyap Desai le16_to_cpu(facts_data->max_sas_expanders); 2777824a1566SKashyap Desai mrioc->facts.max_sasinitiators = 2778824a1566SKashyap Desai le16_to_cpu(facts_data->max_sas_initiators); 2779824a1566SKashyap Desai mrioc->facts.max_enclosures = le16_to_cpu(facts_data->max_enclosures); 2780824a1566SKashyap Desai mrioc->facts.min_devhandle = le16_to_cpu(facts_data->min_dev_handle); 2781824a1566SKashyap Desai mrioc->facts.max_devhandle = le16_to_cpu(facts_data->max_dev_handle); 2782824a1566SKashyap Desai mrioc->facts.max_op_req_q = 2783824a1566SKashyap Desai le16_to_cpu(facts_data->max_operational_request_queues); 2784824a1566SKashyap Desai mrioc->facts.max_op_reply_q = 2785824a1566SKashyap Desai le16_to_cpu(facts_data->max_operational_reply_queues); 2786824a1566SKashyap Desai mrioc->facts.ioc_capabilities = 2787824a1566SKashyap Desai le32_to_cpu(facts_data->ioc_capabilities); 2788824a1566SKashyap Desai mrioc->facts.fw_ver.build_num = 2789824a1566SKashyap Desai le16_to_cpu(facts_data->fw_version.build_num); 2790824a1566SKashyap Desai mrioc->facts.fw_ver.cust_id = 2791824a1566SKashyap Desai le16_to_cpu(facts_data->fw_version.customer_id); 2792824a1566SKashyap Desai mrioc->facts.fw_ver.ph_minor = facts_data->fw_version.phase_minor; 2793824a1566SKashyap Desai mrioc->facts.fw_ver.ph_major = facts_data->fw_version.phase_major; 2794824a1566SKashyap Desai mrioc->facts.fw_ver.gen_minor = facts_data->fw_version.gen_minor; 2795824a1566SKashyap Desai mrioc->facts.fw_ver.gen_major = facts_data->fw_version.gen_major; 2796824a1566SKashyap Desai mrioc->msix_count = min_t(int, mrioc->msix_count, 2797824a1566SKashyap Desai mrioc->facts.max_msix_vectors); 2798824a1566SKashyap Desai mrioc->facts.sge_mod_mask = facts_data->sge_modifier_mask; 2799824a1566SKashyap Desai mrioc->facts.sge_mod_value = facts_data->sge_modifier_value; 2800824a1566SKashyap Desai mrioc->facts.sge_mod_shift = facts_data->sge_modifier_shift; 2801824a1566SKashyap Desai mrioc->facts.shutdown_timeout = 2802824a1566SKashyap Desai le16_to_cpu(facts_data->shutdown_timeout); 2803824a1566SKashyap Desai 2804f10af057SSreekanth Reddy mrioc->facts.max_dev_per_tg = 2805f10af057SSreekanth Reddy facts_data->max_devices_per_throttle_group; 2806f10af057SSreekanth Reddy mrioc->facts.io_throttle_data_length = 2807f10af057SSreekanth Reddy le16_to_cpu(facts_data->io_throttle_data_length); 2808f10af057SSreekanth Reddy mrioc->facts.max_io_throttle_group = 2809f10af057SSreekanth Reddy le16_to_cpu(facts_data->max_io_throttle_group); 2810f10af057SSreekanth Reddy mrioc->facts.io_throttle_low = le16_to_cpu(facts_data->io_throttle_low); 2811f10af057SSreekanth Reddy mrioc->facts.io_throttle_high = 2812f10af057SSreekanth Reddy le16_to_cpu(facts_data->io_throttle_high); 2813f10af057SSreekanth Reddy 2814f10af057SSreekanth Reddy /* Store in 512b block count */ 2815f10af057SSreekanth Reddy if (mrioc->facts.io_throttle_data_length) 2816f10af057SSreekanth Reddy mrioc->io_throttle_data_length = 2817f10af057SSreekanth Reddy (mrioc->facts.io_throttle_data_length * 2 * 4); 2818f10af057SSreekanth Reddy else 2819f10af057SSreekanth Reddy /* set the length to 1MB + 1K to disable throttle */ 2820f10af057SSreekanth Reddy mrioc->io_throttle_data_length = MPI3MR_MAX_SECTORS + 2; 2821f10af057SSreekanth Reddy 2822f10af057SSreekanth Reddy mrioc->io_throttle_high = (mrioc->facts.io_throttle_high * 2 * 1024); 2823f10af057SSreekanth Reddy mrioc->io_throttle_low = (mrioc->facts.io_throttle_low * 2 * 1024); 2824f10af057SSreekanth Reddy 2825824a1566SKashyap Desai ioc_info(mrioc, "ioc_num(%d), maxopQ(%d), maxopRepQ(%d), maxdh(%d),", 2826824a1566SKashyap Desai mrioc->facts.ioc_num, mrioc->facts.max_op_req_q, 2827824a1566SKashyap Desai mrioc->facts.max_op_reply_q, mrioc->facts.max_devhandle); 2828824a1566SKashyap Desai ioc_info(mrioc, 2829ec5ebd2cSSreekanth Reddy "maxreqs(%d), mindh(%d) maxvectors(%d) maxperids(%d)\n", 2830824a1566SKashyap Desai mrioc->facts.max_reqs, mrioc->facts.min_devhandle, 2831ec5ebd2cSSreekanth Reddy mrioc->facts.max_msix_vectors, mrioc->facts.max_perids); 2832824a1566SKashyap Desai ioc_info(mrioc, "SGEModMask 0x%x SGEModVal 0x%x SGEModShift 0x%x ", 2833824a1566SKashyap Desai mrioc->facts.sge_mod_mask, mrioc->facts.sge_mod_value, 2834824a1566SKashyap Desai mrioc->facts.sge_mod_shift); 2835824a1566SKashyap Desai ioc_info(mrioc, "DMA mask %d InitialPE status 0x%x\n", 2836824a1566SKashyap Desai mrioc->facts.dma_mask, (facts_flags & 2837824a1566SKashyap Desai MPI3_IOCFACTS_FLAGS_INITIAL_PORT_ENABLE_MASK)); 2838f10af057SSreekanth Reddy ioc_info(mrioc, 2839f10af057SSreekanth Reddy "max_dev_per_throttle_group(%d), max_throttle_groups(%d)\n", 2840f10af057SSreekanth Reddy mrioc->facts.max_dev_per_tg, mrioc->facts.max_io_throttle_group); 2841f10af057SSreekanth Reddy ioc_info(mrioc, 2842f10af057SSreekanth Reddy "io_throttle_data_len(%dKiB), io_throttle_high(%dMiB), io_throttle_low(%dMiB)\n", 2843f10af057SSreekanth Reddy mrioc->facts.io_throttle_data_length * 4, 2844f10af057SSreekanth Reddy mrioc->facts.io_throttle_high, mrioc->facts.io_throttle_low); 2845824a1566SKashyap Desai } 2846824a1566SKashyap Desai 2847824a1566SKashyap Desai /** 2848824a1566SKashyap Desai * mpi3mr_alloc_reply_sense_bufs - Send IOC Init 2849824a1566SKashyap Desai * @mrioc: Adapter instance reference 2850824a1566SKashyap Desai * 2851824a1566SKashyap Desai * Allocate and initialize the reply free buffers, sense 2852824a1566SKashyap Desai * buffers, reply free queue and sense buffer queue. 2853824a1566SKashyap Desai * 2854824a1566SKashyap Desai * Return: 0 on success, non-zero on failures. 2855824a1566SKashyap Desai */ 2856824a1566SKashyap Desai static int mpi3mr_alloc_reply_sense_bufs(struct mpi3mr_ioc *mrioc) 2857824a1566SKashyap Desai { 2858824a1566SKashyap Desai int retval = 0; 2859824a1566SKashyap Desai u32 sz, i; 2860824a1566SKashyap Desai 2861824a1566SKashyap Desai if (mrioc->init_cmds.reply) 2862e3605f65SSreekanth Reddy return retval; 2863824a1566SKashyap Desai 2864c5758fc7SSreekanth Reddy mrioc->init_cmds.reply = kzalloc(mrioc->reply_sz, GFP_KERNEL); 2865824a1566SKashyap Desai if (!mrioc->init_cmds.reply) 2866824a1566SKashyap Desai goto out_failed; 2867824a1566SKashyap Desai 2868f5e6d5a3SSumit Saxena mrioc->bsg_cmds.reply = kzalloc(mrioc->reply_sz, GFP_KERNEL); 2869f5e6d5a3SSumit Saxena if (!mrioc->bsg_cmds.reply) 2870f5e6d5a3SSumit Saxena goto out_failed; 2871f5e6d5a3SSumit Saxena 2872*2bd37e28SSreekanth Reddy mrioc->transport_cmds.reply = kzalloc(mrioc->reply_sz, GFP_KERNEL); 2873*2bd37e28SSreekanth Reddy if (!mrioc->transport_cmds.reply) 2874*2bd37e28SSreekanth Reddy goto out_failed; 2875*2bd37e28SSreekanth Reddy 287613ef29eaSKashyap Desai for (i = 0; i < MPI3MR_NUM_DEVRMCMD; i++) { 2877c5758fc7SSreekanth Reddy mrioc->dev_rmhs_cmds[i].reply = kzalloc(mrioc->reply_sz, 287813ef29eaSKashyap Desai GFP_KERNEL); 287913ef29eaSKashyap Desai if (!mrioc->dev_rmhs_cmds[i].reply) 288013ef29eaSKashyap Desai goto out_failed; 288113ef29eaSKashyap Desai } 288213ef29eaSKashyap Desai 2883c1af985dSSreekanth Reddy for (i = 0; i < MPI3MR_NUM_EVTACKCMD; i++) { 2884c1af985dSSreekanth Reddy mrioc->evtack_cmds[i].reply = kzalloc(mrioc->reply_sz, 2885c1af985dSSreekanth Reddy GFP_KERNEL); 2886c1af985dSSreekanth Reddy if (!mrioc->evtack_cmds[i].reply) 2887c1af985dSSreekanth Reddy goto out_failed; 2888c1af985dSSreekanth Reddy } 2889c1af985dSSreekanth Reddy 2890c5758fc7SSreekanth Reddy mrioc->host_tm_cmds.reply = kzalloc(mrioc->reply_sz, GFP_KERNEL); 2891e844adb1SKashyap Desai if (!mrioc->host_tm_cmds.reply) 2892e844adb1SKashyap Desai goto out_failed; 2893e844adb1SKashyap Desai 289443ca1100SSumit Saxena mrioc->pel_cmds.reply = kzalloc(mrioc->reply_sz, GFP_KERNEL); 289543ca1100SSumit Saxena if (!mrioc->pel_cmds.reply) 289643ca1100SSumit Saxena goto out_failed; 289743ca1100SSumit Saxena 289843ca1100SSumit Saxena mrioc->pel_abort_cmd.reply = kzalloc(mrioc->reply_sz, GFP_KERNEL); 289943ca1100SSumit Saxena if (!mrioc->pel_abort_cmd.reply) 290043ca1100SSumit Saxena goto out_failed; 290143ca1100SSumit Saxena 2902e844adb1SKashyap Desai mrioc->dev_handle_bitmap_sz = mrioc->facts.max_devhandle / 8; 2903e844adb1SKashyap Desai if (mrioc->facts.max_devhandle % 8) 2904e844adb1SKashyap Desai mrioc->dev_handle_bitmap_sz++; 2905e844adb1SKashyap Desai mrioc->removepend_bitmap = kzalloc(mrioc->dev_handle_bitmap_sz, 2906e844adb1SKashyap Desai GFP_KERNEL); 2907e844adb1SKashyap Desai if (!mrioc->removepend_bitmap) 2908e844adb1SKashyap Desai goto out_failed; 2909e844adb1SKashyap Desai 2910e844adb1SKashyap Desai mrioc->devrem_bitmap_sz = MPI3MR_NUM_DEVRMCMD / 8; 2911e844adb1SKashyap Desai if (MPI3MR_NUM_DEVRMCMD % 8) 2912e844adb1SKashyap Desai mrioc->devrem_bitmap_sz++; 2913e844adb1SKashyap Desai mrioc->devrem_bitmap = kzalloc(mrioc->devrem_bitmap_sz, 2914e844adb1SKashyap Desai GFP_KERNEL); 2915e844adb1SKashyap Desai if (!mrioc->devrem_bitmap) 2916e844adb1SKashyap Desai goto out_failed; 2917e844adb1SKashyap Desai 2918c1af985dSSreekanth Reddy mrioc->evtack_cmds_bitmap_sz = MPI3MR_NUM_EVTACKCMD / 8; 2919c1af985dSSreekanth Reddy if (MPI3MR_NUM_EVTACKCMD % 8) 2920c1af985dSSreekanth Reddy mrioc->evtack_cmds_bitmap_sz++; 2921c1af985dSSreekanth Reddy mrioc->evtack_cmds_bitmap = kzalloc(mrioc->evtack_cmds_bitmap_sz, 2922c1af985dSSreekanth Reddy GFP_KERNEL); 2923c1af985dSSreekanth Reddy if (!mrioc->evtack_cmds_bitmap) 2924c1af985dSSreekanth Reddy goto out_failed; 2925c1af985dSSreekanth Reddy 2926824a1566SKashyap Desai mrioc->num_reply_bufs = mrioc->facts.max_reqs + MPI3MR_NUM_EVT_REPLIES; 2927824a1566SKashyap Desai mrioc->reply_free_qsz = mrioc->num_reply_bufs + 1; 2928824a1566SKashyap Desai mrioc->num_sense_bufs = mrioc->facts.max_reqs / MPI3MR_SENSEBUF_FACTOR; 2929824a1566SKashyap Desai mrioc->sense_buf_q_sz = mrioc->num_sense_bufs + 1; 2930824a1566SKashyap Desai 2931824a1566SKashyap Desai /* reply buffer pool, 16 byte align */ 2932c5758fc7SSreekanth Reddy sz = mrioc->num_reply_bufs * mrioc->reply_sz; 2933824a1566SKashyap Desai mrioc->reply_buf_pool = dma_pool_create("reply_buf pool", 2934824a1566SKashyap Desai &mrioc->pdev->dev, sz, 16, 0); 2935824a1566SKashyap Desai if (!mrioc->reply_buf_pool) { 2936824a1566SKashyap Desai ioc_err(mrioc, "reply buf pool: dma_pool_create failed\n"); 2937824a1566SKashyap Desai goto out_failed; 2938824a1566SKashyap Desai } 2939824a1566SKashyap Desai 2940824a1566SKashyap Desai mrioc->reply_buf = dma_pool_zalloc(mrioc->reply_buf_pool, GFP_KERNEL, 2941824a1566SKashyap Desai &mrioc->reply_buf_dma); 2942824a1566SKashyap Desai if (!mrioc->reply_buf) 2943824a1566SKashyap Desai goto out_failed; 2944824a1566SKashyap Desai 2945824a1566SKashyap Desai mrioc->reply_buf_dma_max_address = mrioc->reply_buf_dma + sz; 2946824a1566SKashyap Desai 2947824a1566SKashyap Desai /* reply free queue, 8 byte align */ 2948824a1566SKashyap Desai sz = mrioc->reply_free_qsz * 8; 2949824a1566SKashyap Desai mrioc->reply_free_q_pool = dma_pool_create("reply_free_q pool", 2950824a1566SKashyap Desai &mrioc->pdev->dev, sz, 8, 0); 2951824a1566SKashyap Desai if (!mrioc->reply_free_q_pool) { 2952824a1566SKashyap Desai ioc_err(mrioc, "reply_free_q pool: dma_pool_create failed\n"); 2953824a1566SKashyap Desai goto out_failed; 2954824a1566SKashyap Desai } 2955824a1566SKashyap Desai mrioc->reply_free_q = dma_pool_zalloc(mrioc->reply_free_q_pool, 2956824a1566SKashyap Desai GFP_KERNEL, &mrioc->reply_free_q_dma); 2957824a1566SKashyap Desai if (!mrioc->reply_free_q) 2958824a1566SKashyap Desai goto out_failed; 2959824a1566SKashyap Desai 2960824a1566SKashyap Desai /* sense buffer pool, 4 byte align */ 2961ec5ebd2cSSreekanth Reddy sz = mrioc->num_sense_bufs * MPI3MR_SENSE_BUF_SZ; 2962824a1566SKashyap Desai mrioc->sense_buf_pool = dma_pool_create("sense_buf pool", 2963824a1566SKashyap Desai &mrioc->pdev->dev, sz, 4, 0); 2964824a1566SKashyap Desai if (!mrioc->sense_buf_pool) { 2965824a1566SKashyap Desai ioc_err(mrioc, "sense_buf pool: dma_pool_create failed\n"); 2966824a1566SKashyap Desai goto out_failed; 2967824a1566SKashyap Desai } 2968824a1566SKashyap Desai mrioc->sense_buf = dma_pool_zalloc(mrioc->sense_buf_pool, GFP_KERNEL, 2969824a1566SKashyap Desai &mrioc->sense_buf_dma); 2970824a1566SKashyap Desai if (!mrioc->sense_buf) 2971824a1566SKashyap Desai goto out_failed; 2972824a1566SKashyap Desai 2973824a1566SKashyap Desai /* sense buffer queue, 8 byte align */ 2974824a1566SKashyap Desai sz = mrioc->sense_buf_q_sz * 8; 2975824a1566SKashyap Desai mrioc->sense_buf_q_pool = dma_pool_create("sense_buf_q pool", 2976824a1566SKashyap Desai &mrioc->pdev->dev, sz, 8, 0); 2977824a1566SKashyap Desai if (!mrioc->sense_buf_q_pool) { 2978824a1566SKashyap Desai ioc_err(mrioc, "sense_buf_q pool: dma_pool_create failed\n"); 2979824a1566SKashyap Desai goto out_failed; 2980824a1566SKashyap Desai } 2981824a1566SKashyap Desai mrioc->sense_buf_q = dma_pool_zalloc(mrioc->sense_buf_q_pool, 2982824a1566SKashyap Desai GFP_KERNEL, &mrioc->sense_buf_q_dma); 2983824a1566SKashyap Desai if (!mrioc->sense_buf_q) 2984824a1566SKashyap Desai goto out_failed; 2985824a1566SKashyap Desai 2986e3605f65SSreekanth Reddy return retval; 2987e3605f65SSreekanth Reddy 2988e3605f65SSreekanth Reddy out_failed: 2989e3605f65SSreekanth Reddy retval = -1; 2990e3605f65SSreekanth Reddy return retval; 2991e3605f65SSreekanth Reddy } 2992e3605f65SSreekanth Reddy 2993e3605f65SSreekanth Reddy /** 2994e3605f65SSreekanth Reddy * mpimr_initialize_reply_sbuf_queues - initialize reply sense 2995e3605f65SSreekanth Reddy * buffers 2996e3605f65SSreekanth Reddy * @mrioc: Adapter instance reference 2997e3605f65SSreekanth Reddy * 2998e3605f65SSreekanth Reddy * Helper function to initialize reply and sense buffers along 2999e3605f65SSreekanth Reddy * with some debug prints. 3000e3605f65SSreekanth Reddy * 3001e3605f65SSreekanth Reddy * Return: None. 3002e3605f65SSreekanth Reddy */ 3003e3605f65SSreekanth Reddy static void mpimr_initialize_reply_sbuf_queues(struct mpi3mr_ioc *mrioc) 3004e3605f65SSreekanth Reddy { 3005e3605f65SSreekanth Reddy u32 sz, i; 3006e3605f65SSreekanth Reddy dma_addr_t phy_addr; 3007e3605f65SSreekanth Reddy 3008c5758fc7SSreekanth Reddy sz = mrioc->num_reply_bufs * mrioc->reply_sz; 3009824a1566SKashyap Desai ioc_info(mrioc, 3010824a1566SKashyap Desai "reply buf pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB), reply_dma(0x%llx)\n", 3011c5758fc7SSreekanth Reddy mrioc->reply_buf, mrioc->num_reply_bufs, mrioc->reply_sz, 3012824a1566SKashyap Desai (sz / 1024), (unsigned long long)mrioc->reply_buf_dma); 3013824a1566SKashyap Desai sz = mrioc->reply_free_qsz * 8; 3014824a1566SKashyap Desai ioc_info(mrioc, 3015824a1566SKashyap Desai "reply_free_q pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB), reply_dma(0x%llx)\n", 3016824a1566SKashyap Desai mrioc->reply_free_q, mrioc->reply_free_qsz, 8, (sz / 1024), 3017824a1566SKashyap Desai (unsigned long long)mrioc->reply_free_q_dma); 3018ec5ebd2cSSreekanth Reddy sz = mrioc->num_sense_bufs * MPI3MR_SENSE_BUF_SZ; 3019824a1566SKashyap Desai ioc_info(mrioc, 3020824a1566SKashyap Desai "sense_buf pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB), sense_dma(0x%llx)\n", 3021ec5ebd2cSSreekanth Reddy mrioc->sense_buf, mrioc->num_sense_bufs, MPI3MR_SENSE_BUF_SZ, 3022824a1566SKashyap Desai (sz / 1024), (unsigned long long)mrioc->sense_buf_dma); 3023824a1566SKashyap Desai sz = mrioc->sense_buf_q_sz * 8; 3024824a1566SKashyap Desai ioc_info(mrioc, 3025824a1566SKashyap Desai "sense_buf_q pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB), sense_dma(0x%llx)\n", 3026824a1566SKashyap Desai mrioc->sense_buf_q, mrioc->sense_buf_q_sz, 8, (sz / 1024), 3027824a1566SKashyap Desai (unsigned long long)mrioc->sense_buf_q_dma); 3028824a1566SKashyap Desai 3029824a1566SKashyap Desai /* initialize Reply buffer Queue */ 3030824a1566SKashyap Desai for (i = 0, phy_addr = mrioc->reply_buf_dma; 3031c5758fc7SSreekanth Reddy i < mrioc->num_reply_bufs; i++, phy_addr += mrioc->reply_sz) 3032824a1566SKashyap Desai mrioc->reply_free_q[i] = cpu_to_le64(phy_addr); 3033824a1566SKashyap Desai mrioc->reply_free_q[i] = cpu_to_le64(0); 3034824a1566SKashyap Desai 3035824a1566SKashyap Desai /* initialize Sense Buffer Queue */ 3036824a1566SKashyap Desai for (i = 0, phy_addr = mrioc->sense_buf_dma; 3037ec5ebd2cSSreekanth Reddy i < mrioc->num_sense_bufs; i++, phy_addr += MPI3MR_SENSE_BUF_SZ) 3038824a1566SKashyap Desai mrioc->sense_buf_q[i] = cpu_to_le64(phy_addr); 3039824a1566SKashyap Desai mrioc->sense_buf_q[i] = cpu_to_le64(0); 3040824a1566SKashyap Desai } 3041824a1566SKashyap Desai 3042824a1566SKashyap Desai /** 3043824a1566SKashyap Desai * mpi3mr_issue_iocinit - Send IOC Init 3044824a1566SKashyap Desai * @mrioc: Adapter instance reference 3045824a1566SKashyap Desai * 3046824a1566SKashyap Desai * Issue IOC Init MPI request through admin queue and wait for 3047824a1566SKashyap Desai * the completion of it or time out. 3048824a1566SKashyap Desai * 3049824a1566SKashyap Desai * Return: 0 on success, non-zero on failures. 3050824a1566SKashyap Desai */ 3051824a1566SKashyap Desai static int mpi3mr_issue_iocinit(struct mpi3mr_ioc *mrioc) 3052824a1566SKashyap Desai { 3053824a1566SKashyap Desai struct mpi3_ioc_init_request iocinit_req; 3054824a1566SKashyap Desai struct mpi3_driver_info_layout *drv_info; 3055824a1566SKashyap Desai dma_addr_t data_dma; 3056824a1566SKashyap Desai u32 data_len = sizeof(*drv_info); 3057824a1566SKashyap Desai int retval = 0; 3058824a1566SKashyap Desai ktime_t current_time; 3059824a1566SKashyap Desai 3060824a1566SKashyap Desai drv_info = dma_alloc_coherent(&mrioc->pdev->dev, data_len, &data_dma, 3061824a1566SKashyap Desai GFP_KERNEL); 3062824a1566SKashyap Desai if (!drv_info) { 3063824a1566SKashyap Desai retval = -1; 3064824a1566SKashyap Desai goto out; 3065824a1566SKashyap Desai } 3066e3605f65SSreekanth Reddy mpimr_initialize_reply_sbuf_queues(mrioc); 3067e3605f65SSreekanth Reddy 3068824a1566SKashyap Desai drv_info->information_length = cpu_to_le32(data_len); 3069aa0dc6a7SSreekanth Reddy strscpy(drv_info->driver_signature, "Broadcom", sizeof(drv_info->driver_signature)); 3070aa0dc6a7SSreekanth Reddy strscpy(drv_info->os_name, utsname()->sysname, sizeof(drv_info->os_name)); 3071aa0dc6a7SSreekanth Reddy strscpy(drv_info->os_version, utsname()->release, sizeof(drv_info->os_version)); 3072aa0dc6a7SSreekanth Reddy strscpy(drv_info->driver_name, MPI3MR_DRIVER_NAME, sizeof(drv_info->driver_name)); 3073aa0dc6a7SSreekanth Reddy strscpy(drv_info->driver_version, MPI3MR_DRIVER_VERSION, sizeof(drv_info->driver_version)); 3074aa0dc6a7SSreekanth Reddy strscpy(drv_info->driver_release_date, MPI3MR_DRIVER_RELDATE, 3075aa0dc6a7SSreekanth Reddy sizeof(drv_info->driver_release_date)); 3076824a1566SKashyap Desai drv_info->driver_capabilities = 0; 3077824a1566SKashyap Desai memcpy((u8 *)&mrioc->driver_info, (u8 *)drv_info, 3078824a1566SKashyap Desai sizeof(mrioc->driver_info)); 3079824a1566SKashyap Desai 3080824a1566SKashyap Desai memset(&iocinit_req, 0, sizeof(iocinit_req)); 3081824a1566SKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 3082824a1566SKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 3083824a1566SKashyap Desai retval = -1; 3084824a1566SKashyap Desai ioc_err(mrioc, "Issue IOCInit: Init command is in use\n"); 3085824a1566SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 3086824a1566SKashyap Desai goto out; 3087824a1566SKashyap Desai } 3088824a1566SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 3089824a1566SKashyap Desai mrioc->init_cmds.is_waiting = 1; 3090824a1566SKashyap Desai mrioc->init_cmds.callback = NULL; 3091824a1566SKashyap Desai iocinit_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 3092824a1566SKashyap Desai iocinit_req.function = MPI3_FUNCTION_IOC_INIT; 3093824a1566SKashyap Desai iocinit_req.mpi_version.mpi3_version.dev = MPI3_VERSION_DEV; 3094824a1566SKashyap Desai iocinit_req.mpi_version.mpi3_version.unit = MPI3_VERSION_UNIT; 3095824a1566SKashyap Desai iocinit_req.mpi_version.mpi3_version.major = MPI3_VERSION_MAJOR; 3096824a1566SKashyap Desai iocinit_req.mpi_version.mpi3_version.minor = MPI3_VERSION_MINOR; 3097824a1566SKashyap Desai iocinit_req.who_init = MPI3_WHOINIT_HOST_DRIVER; 3098824a1566SKashyap Desai iocinit_req.reply_free_queue_depth = cpu_to_le16(mrioc->reply_free_qsz); 3099824a1566SKashyap Desai iocinit_req.reply_free_queue_address = 3100824a1566SKashyap Desai cpu_to_le64(mrioc->reply_free_q_dma); 3101ec5ebd2cSSreekanth Reddy iocinit_req.sense_buffer_length = cpu_to_le16(MPI3MR_SENSE_BUF_SZ); 3102824a1566SKashyap Desai iocinit_req.sense_buffer_free_queue_depth = 3103824a1566SKashyap Desai cpu_to_le16(mrioc->sense_buf_q_sz); 3104824a1566SKashyap Desai iocinit_req.sense_buffer_free_queue_address = 3105824a1566SKashyap Desai cpu_to_le64(mrioc->sense_buf_q_dma); 3106824a1566SKashyap Desai iocinit_req.driver_information_address = cpu_to_le64(data_dma); 3107824a1566SKashyap Desai 3108824a1566SKashyap Desai current_time = ktime_get_real(); 3109824a1566SKashyap Desai iocinit_req.time_stamp = cpu_to_le64(ktime_to_ms(current_time)); 3110824a1566SKashyap Desai 3111824a1566SKashyap Desai init_completion(&mrioc->init_cmds.done); 3112824a1566SKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &iocinit_req, 3113824a1566SKashyap Desai sizeof(iocinit_req), 1); 3114824a1566SKashyap Desai if (retval) { 3115824a1566SKashyap Desai ioc_err(mrioc, "Issue IOCInit: Admin Post failed\n"); 3116824a1566SKashyap Desai goto out_unlock; 3117824a1566SKashyap Desai } 3118824a1566SKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 3119824a1566SKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 3120824a1566SKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 3121a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 3122824a1566SKashyap Desai MPI3MR_RESET_FROM_IOCINIT_TIMEOUT); 3123a6856cc4SSreekanth Reddy ioc_err(mrioc, "ioc_init timed out\n"); 3124824a1566SKashyap Desai retval = -1; 3125824a1566SKashyap Desai goto out_unlock; 3126824a1566SKashyap Desai } 3127824a1566SKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 3128824a1566SKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 3129824a1566SKashyap Desai ioc_err(mrioc, 3130824a1566SKashyap Desai "Issue IOCInit: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 3131824a1566SKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 3132824a1566SKashyap Desai mrioc->init_cmds.ioc_loginfo); 3133824a1566SKashyap Desai retval = -1; 3134824a1566SKashyap Desai goto out_unlock; 3135824a1566SKashyap Desai } 3136824a1566SKashyap Desai 3137e3605f65SSreekanth Reddy mrioc->reply_free_queue_host_index = mrioc->num_reply_bufs; 3138e3605f65SSreekanth Reddy writel(mrioc->reply_free_queue_host_index, 3139e3605f65SSreekanth Reddy &mrioc->sysif_regs->reply_free_host_index); 3140e3605f65SSreekanth Reddy 3141e3605f65SSreekanth Reddy mrioc->sbq_host_index = mrioc->num_sense_bufs; 3142e3605f65SSreekanth Reddy writel(mrioc->sbq_host_index, 3143e3605f65SSreekanth Reddy &mrioc->sysif_regs->sense_buffer_free_host_index); 3144824a1566SKashyap Desai out_unlock: 3145824a1566SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 3146824a1566SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 3147824a1566SKashyap Desai 3148824a1566SKashyap Desai out: 3149824a1566SKashyap Desai if (drv_info) 3150824a1566SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, data_len, drv_info, 3151824a1566SKashyap Desai data_dma); 3152824a1566SKashyap Desai 3153824a1566SKashyap Desai return retval; 3154824a1566SKashyap Desai } 3155824a1566SKashyap Desai 3156824a1566SKashyap Desai /** 315713ef29eaSKashyap Desai * mpi3mr_unmask_events - Unmask events in event mask bitmap 315813ef29eaSKashyap Desai * @mrioc: Adapter instance reference 315913ef29eaSKashyap Desai * @event: MPI event ID 316013ef29eaSKashyap Desai * 316113ef29eaSKashyap Desai * Un mask the specific event by resetting the event_mask 316213ef29eaSKashyap Desai * bitmap. 316313ef29eaSKashyap Desai * 316413ef29eaSKashyap Desai * Return: 0 on success, non-zero on failures. 316513ef29eaSKashyap Desai */ 316613ef29eaSKashyap Desai static void mpi3mr_unmask_events(struct mpi3mr_ioc *mrioc, u16 event) 316713ef29eaSKashyap Desai { 316813ef29eaSKashyap Desai u32 desired_event; 316913ef29eaSKashyap Desai u8 word; 317013ef29eaSKashyap Desai 317113ef29eaSKashyap Desai if (event >= 128) 317213ef29eaSKashyap Desai return; 317313ef29eaSKashyap Desai 317413ef29eaSKashyap Desai desired_event = (1 << (event % 32)); 317513ef29eaSKashyap Desai word = event / 32; 317613ef29eaSKashyap Desai 317713ef29eaSKashyap Desai mrioc->event_masks[word] &= ~desired_event; 317813ef29eaSKashyap Desai } 317913ef29eaSKashyap Desai 318013ef29eaSKashyap Desai /** 318113ef29eaSKashyap Desai * mpi3mr_issue_event_notification - Send event notification 318213ef29eaSKashyap Desai * @mrioc: Adapter instance reference 318313ef29eaSKashyap Desai * 318413ef29eaSKashyap Desai * Issue event notification MPI request through admin queue and 318513ef29eaSKashyap Desai * wait for the completion of it or time out. 318613ef29eaSKashyap Desai * 318713ef29eaSKashyap Desai * Return: 0 on success, non-zero on failures. 318813ef29eaSKashyap Desai */ 318913ef29eaSKashyap Desai static int mpi3mr_issue_event_notification(struct mpi3mr_ioc *mrioc) 319013ef29eaSKashyap Desai { 319113ef29eaSKashyap Desai struct mpi3_event_notification_request evtnotify_req; 319213ef29eaSKashyap Desai int retval = 0; 319313ef29eaSKashyap Desai u8 i; 319413ef29eaSKashyap Desai 319513ef29eaSKashyap Desai memset(&evtnotify_req, 0, sizeof(evtnotify_req)); 319613ef29eaSKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 319713ef29eaSKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 319813ef29eaSKashyap Desai retval = -1; 319913ef29eaSKashyap Desai ioc_err(mrioc, "Issue EvtNotify: Init command is in use\n"); 320013ef29eaSKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 320113ef29eaSKashyap Desai goto out; 320213ef29eaSKashyap Desai } 320313ef29eaSKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 320413ef29eaSKashyap Desai mrioc->init_cmds.is_waiting = 1; 320513ef29eaSKashyap Desai mrioc->init_cmds.callback = NULL; 320613ef29eaSKashyap Desai evtnotify_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 320713ef29eaSKashyap Desai evtnotify_req.function = MPI3_FUNCTION_EVENT_NOTIFICATION; 320813ef29eaSKashyap Desai for (i = 0; i < MPI3_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 320913ef29eaSKashyap Desai evtnotify_req.event_masks[i] = 321013ef29eaSKashyap Desai cpu_to_le32(mrioc->event_masks[i]); 321113ef29eaSKashyap Desai init_completion(&mrioc->init_cmds.done); 321213ef29eaSKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &evtnotify_req, 321313ef29eaSKashyap Desai sizeof(evtnotify_req), 1); 321413ef29eaSKashyap Desai if (retval) { 321513ef29eaSKashyap Desai ioc_err(mrioc, "Issue EvtNotify: Admin Post failed\n"); 321613ef29eaSKashyap Desai goto out_unlock; 321713ef29eaSKashyap Desai } 321813ef29eaSKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 321913ef29eaSKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 322013ef29eaSKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 3221a6856cc4SSreekanth Reddy ioc_err(mrioc, "event notification timed out\n"); 3222a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 322313ef29eaSKashyap Desai MPI3MR_RESET_FROM_EVTNOTIFY_TIMEOUT); 322413ef29eaSKashyap Desai retval = -1; 322513ef29eaSKashyap Desai goto out_unlock; 322613ef29eaSKashyap Desai } 322713ef29eaSKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 322813ef29eaSKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 322913ef29eaSKashyap Desai ioc_err(mrioc, 323013ef29eaSKashyap Desai "Issue EvtNotify: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 323113ef29eaSKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 323213ef29eaSKashyap Desai mrioc->init_cmds.ioc_loginfo); 323313ef29eaSKashyap Desai retval = -1; 323413ef29eaSKashyap Desai goto out_unlock; 323513ef29eaSKashyap Desai } 323613ef29eaSKashyap Desai 323713ef29eaSKashyap Desai out_unlock: 323813ef29eaSKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 323913ef29eaSKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 324013ef29eaSKashyap Desai out: 324113ef29eaSKashyap Desai return retval; 324213ef29eaSKashyap Desai } 324313ef29eaSKashyap Desai 324413ef29eaSKashyap Desai /** 3245c1af985dSSreekanth Reddy * mpi3mr_process_event_ack - Process event acknowledgment 324613ef29eaSKashyap Desai * @mrioc: Adapter instance reference 324713ef29eaSKashyap Desai * @event: MPI3 event ID 3248c1af985dSSreekanth Reddy * @event_ctx: event context 324913ef29eaSKashyap Desai * 325013ef29eaSKashyap Desai * Send event acknowledgment through admin queue and wait for 325113ef29eaSKashyap Desai * it to complete. 325213ef29eaSKashyap Desai * 325313ef29eaSKashyap Desai * Return: 0 on success, non-zero on failures. 325413ef29eaSKashyap Desai */ 3255c1af985dSSreekanth Reddy int mpi3mr_process_event_ack(struct mpi3mr_ioc *mrioc, u8 event, 325613ef29eaSKashyap Desai u32 event_ctx) 325713ef29eaSKashyap Desai { 325813ef29eaSKashyap Desai struct mpi3_event_ack_request evtack_req; 325913ef29eaSKashyap Desai int retval = 0; 326013ef29eaSKashyap Desai 326113ef29eaSKashyap Desai memset(&evtack_req, 0, sizeof(evtack_req)); 326213ef29eaSKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 326313ef29eaSKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 326413ef29eaSKashyap Desai retval = -1; 326513ef29eaSKashyap Desai ioc_err(mrioc, "Send EvtAck: Init command is in use\n"); 326613ef29eaSKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 326713ef29eaSKashyap Desai goto out; 326813ef29eaSKashyap Desai } 326913ef29eaSKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 327013ef29eaSKashyap Desai mrioc->init_cmds.is_waiting = 1; 327113ef29eaSKashyap Desai mrioc->init_cmds.callback = NULL; 327213ef29eaSKashyap Desai evtack_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 327313ef29eaSKashyap Desai evtack_req.function = MPI3_FUNCTION_EVENT_ACK; 327413ef29eaSKashyap Desai evtack_req.event = event; 327513ef29eaSKashyap Desai evtack_req.event_context = cpu_to_le32(event_ctx); 327613ef29eaSKashyap Desai 327713ef29eaSKashyap Desai init_completion(&mrioc->init_cmds.done); 327813ef29eaSKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &evtack_req, 327913ef29eaSKashyap Desai sizeof(evtack_req), 1); 328013ef29eaSKashyap Desai if (retval) { 328113ef29eaSKashyap Desai ioc_err(mrioc, "Send EvtAck: Admin Post failed\n"); 328213ef29eaSKashyap Desai goto out_unlock; 328313ef29eaSKashyap Desai } 328413ef29eaSKashyap Desai wait_for_completion_timeout(&mrioc->init_cmds.done, 328513ef29eaSKashyap Desai (MPI3MR_INTADMCMD_TIMEOUT * HZ)); 328613ef29eaSKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 328713ef29eaSKashyap Desai ioc_err(mrioc, "Issue EvtNotify: command timed out\n"); 3288fbaa9aa4SSreekanth Reddy if (!(mrioc->init_cmds.state & MPI3MR_CMD_RESET)) 328913ef29eaSKashyap Desai mpi3mr_soft_reset_handler(mrioc, 329013ef29eaSKashyap Desai MPI3MR_RESET_FROM_EVTACK_TIMEOUT, 1); 329113ef29eaSKashyap Desai retval = -1; 329213ef29eaSKashyap Desai goto out_unlock; 329313ef29eaSKashyap Desai } 329413ef29eaSKashyap Desai if ((mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK) 329513ef29eaSKashyap Desai != MPI3_IOCSTATUS_SUCCESS) { 329613ef29eaSKashyap Desai ioc_err(mrioc, 329713ef29eaSKashyap Desai "Send EvtAck: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 329813ef29eaSKashyap Desai (mrioc->init_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK), 329913ef29eaSKashyap Desai mrioc->init_cmds.ioc_loginfo); 330013ef29eaSKashyap Desai retval = -1; 330113ef29eaSKashyap Desai goto out_unlock; 330213ef29eaSKashyap Desai } 330313ef29eaSKashyap Desai 330413ef29eaSKashyap Desai out_unlock: 330513ef29eaSKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 330613ef29eaSKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 330713ef29eaSKashyap Desai out: 330813ef29eaSKashyap Desai return retval; 330913ef29eaSKashyap Desai } 331013ef29eaSKashyap Desai 331113ef29eaSKashyap Desai /** 3312824a1566SKashyap Desai * mpi3mr_alloc_chain_bufs - Allocate chain buffers 3313824a1566SKashyap Desai * @mrioc: Adapter instance reference 3314824a1566SKashyap Desai * 3315824a1566SKashyap Desai * Allocate chain buffers and set a bitmap to indicate free 3316824a1566SKashyap Desai * chain buffers. Chain buffers are used to pass the SGE 3317824a1566SKashyap Desai * information along with MPI3 SCSI IO requests for host I/O. 3318824a1566SKashyap Desai * 3319824a1566SKashyap Desai * Return: 0 on success, non-zero on failure 3320824a1566SKashyap Desai */ 3321824a1566SKashyap Desai static int mpi3mr_alloc_chain_bufs(struct mpi3mr_ioc *mrioc) 3322824a1566SKashyap Desai { 3323824a1566SKashyap Desai int retval = 0; 3324824a1566SKashyap Desai u32 sz, i; 3325824a1566SKashyap Desai u16 num_chains; 3326824a1566SKashyap Desai 3327fe6db615SSreekanth Reddy if (mrioc->chain_sgl_list) 3328fe6db615SSreekanth Reddy return retval; 3329fe6db615SSreekanth Reddy 3330824a1566SKashyap Desai num_chains = mrioc->max_host_ios / MPI3MR_CHAINBUF_FACTOR; 3331824a1566SKashyap Desai 333274e1f30aSKashyap Desai if (prot_mask & (SHOST_DIX_TYPE0_PROTECTION 333374e1f30aSKashyap Desai | SHOST_DIX_TYPE1_PROTECTION 333474e1f30aSKashyap Desai | SHOST_DIX_TYPE2_PROTECTION 333574e1f30aSKashyap Desai | SHOST_DIX_TYPE3_PROTECTION)) 333674e1f30aSKashyap Desai num_chains += (num_chains / MPI3MR_CHAINBUFDIX_FACTOR); 333774e1f30aSKashyap Desai 3338824a1566SKashyap Desai mrioc->chain_buf_count = num_chains; 3339824a1566SKashyap Desai sz = sizeof(struct chain_element) * num_chains; 3340824a1566SKashyap Desai mrioc->chain_sgl_list = kzalloc(sz, GFP_KERNEL); 3341824a1566SKashyap Desai if (!mrioc->chain_sgl_list) 3342824a1566SKashyap Desai goto out_failed; 3343824a1566SKashyap Desai 3344824a1566SKashyap Desai sz = MPI3MR_PAGE_SIZE_4K; 3345824a1566SKashyap Desai mrioc->chain_buf_pool = dma_pool_create("chain_buf pool", 3346824a1566SKashyap Desai &mrioc->pdev->dev, sz, 16, 0); 3347824a1566SKashyap Desai if (!mrioc->chain_buf_pool) { 3348824a1566SKashyap Desai ioc_err(mrioc, "chain buf pool: dma_pool_create failed\n"); 3349824a1566SKashyap Desai goto out_failed; 3350824a1566SKashyap Desai } 3351824a1566SKashyap Desai 3352824a1566SKashyap Desai for (i = 0; i < num_chains; i++) { 3353824a1566SKashyap Desai mrioc->chain_sgl_list[i].addr = 3354824a1566SKashyap Desai dma_pool_zalloc(mrioc->chain_buf_pool, GFP_KERNEL, 3355824a1566SKashyap Desai &mrioc->chain_sgl_list[i].dma_addr); 3356824a1566SKashyap Desai 3357824a1566SKashyap Desai if (!mrioc->chain_sgl_list[i].addr) 3358824a1566SKashyap Desai goto out_failed; 3359824a1566SKashyap Desai } 3360824a1566SKashyap Desai mrioc->chain_bitmap_sz = num_chains / 8; 3361824a1566SKashyap Desai if (num_chains % 8) 3362824a1566SKashyap Desai mrioc->chain_bitmap_sz++; 3363824a1566SKashyap Desai mrioc->chain_bitmap = kzalloc(mrioc->chain_bitmap_sz, GFP_KERNEL); 3364824a1566SKashyap Desai if (!mrioc->chain_bitmap) 3365824a1566SKashyap Desai goto out_failed; 3366824a1566SKashyap Desai return retval; 3367824a1566SKashyap Desai out_failed: 3368824a1566SKashyap Desai retval = -1; 3369824a1566SKashyap Desai return retval; 3370824a1566SKashyap Desai } 3371824a1566SKashyap Desai 3372824a1566SKashyap Desai /** 3373023ab2a9SKashyap Desai * mpi3mr_port_enable_complete - Mark port enable complete 3374023ab2a9SKashyap Desai * @mrioc: Adapter instance reference 3375023ab2a9SKashyap Desai * @drv_cmd: Internal command tracker 3376023ab2a9SKashyap Desai * 3377023ab2a9SKashyap Desai * Call back for asynchronous port enable request sets the 3378023ab2a9SKashyap Desai * driver command to indicate port enable request is complete. 3379023ab2a9SKashyap Desai * 3380023ab2a9SKashyap Desai * Return: Nothing 3381023ab2a9SKashyap Desai */ 3382023ab2a9SKashyap Desai static void mpi3mr_port_enable_complete(struct mpi3mr_ioc *mrioc, 3383023ab2a9SKashyap Desai struct mpi3mr_drv_cmd *drv_cmd) 3384023ab2a9SKashyap Desai { 3385023ab2a9SKashyap Desai drv_cmd->state = MPI3MR_CMD_NOTUSED; 3386023ab2a9SKashyap Desai drv_cmd->callback = NULL; 3387023ab2a9SKashyap Desai mrioc->scan_failed = drv_cmd->ioc_status; 3388023ab2a9SKashyap Desai mrioc->scan_started = 0; 3389023ab2a9SKashyap Desai } 3390023ab2a9SKashyap Desai 3391023ab2a9SKashyap Desai /** 3392023ab2a9SKashyap Desai * mpi3mr_issue_port_enable - Issue Port Enable 3393023ab2a9SKashyap Desai * @mrioc: Adapter instance reference 3394023ab2a9SKashyap Desai * @async: Flag to wait for completion or not 3395023ab2a9SKashyap Desai * 3396023ab2a9SKashyap Desai * Issue Port Enable MPI request through admin queue and if the 3397023ab2a9SKashyap Desai * async flag is not set wait for the completion of the port 3398023ab2a9SKashyap Desai * enable or time out. 3399023ab2a9SKashyap Desai * 3400023ab2a9SKashyap Desai * Return: 0 on success, non-zero on failures. 3401023ab2a9SKashyap Desai */ 3402023ab2a9SKashyap Desai int mpi3mr_issue_port_enable(struct mpi3mr_ioc *mrioc, u8 async) 3403023ab2a9SKashyap Desai { 3404023ab2a9SKashyap Desai struct mpi3_port_enable_request pe_req; 3405023ab2a9SKashyap Desai int retval = 0; 3406023ab2a9SKashyap Desai u32 pe_timeout = MPI3MR_PORTENABLE_TIMEOUT; 3407023ab2a9SKashyap Desai 3408023ab2a9SKashyap Desai memset(&pe_req, 0, sizeof(pe_req)); 3409023ab2a9SKashyap Desai mutex_lock(&mrioc->init_cmds.mutex); 3410023ab2a9SKashyap Desai if (mrioc->init_cmds.state & MPI3MR_CMD_PENDING) { 3411023ab2a9SKashyap Desai retval = -1; 3412023ab2a9SKashyap Desai ioc_err(mrioc, "Issue PortEnable: Init command is in use\n"); 3413023ab2a9SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 3414023ab2a9SKashyap Desai goto out; 3415023ab2a9SKashyap Desai } 3416023ab2a9SKashyap Desai mrioc->init_cmds.state = MPI3MR_CMD_PENDING; 3417023ab2a9SKashyap Desai if (async) { 3418023ab2a9SKashyap Desai mrioc->init_cmds.is_waiting = 0; 3419023ab2a9SKashyap Desai mrioc->init_cmds.callback = mpi3mr_port_enable_complete; 3420023ab2a9SKashyap Desai } else { 3421023ab2a9SKashyap Desai mrioc->init_cmds.is_waiting = 1; 3422023ab2a9SKashyap Desai mrioc->init_cmds.callback = NULL; 3423023ab2a9SKashyap Desai init_completion(&mrioc->init_cmds.done); 3424023ab2a9SKashyap Desai } 3425023ab2a9SKashyap Desai pe_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_INITCMDS); 3426023ab2a9SKashyap Desai pe_req.function = MPI3_FUNCTION_PORT_ENABLE; 3427023ab2a9SKashyap Desai 3428023ab2a9SKashyap Desai retval = mpi3mr_admin_request_post(mrioc, &pe_req, sizeof(pe_req), 1); 3429023ab2a9SKashyap Desai if (retval) { 3430023ab2a9SKashyap Desai ioc_err(mrioc, "Issue PortEnable: Admin Post failed\n"); 3431023ab2a9SKashyap Desai goto out_unlock; 3432023ab2a9SKashyap Desai } 3433a6856cc4SSreekanth Reddy if (async) { 3434a6856cc4SSreekanth Reddy mutex_unlock(&mrioc->init_cmds.mutex); 3435a6856cc4SSreekanth Reddy goto out; 3436a6856cc4SSreekanth Reddy } 3437a6856cc4SSreekanth Reddy 3438a6856cc4SSreekanth Reddy wait_for_completion_timeout(&mrioc->init_cmds.done, (pe_timeout * HZ)); 3439023ab2a9SKashyap Desai if (!(mrioc->init_cmds.state & MPI3MR_CMD_COMPLETE)) { 3440a6856cc4SSreekanth Reddy ioc_err(mrioc, "port enable timed out\n"); 3441023ab2a9SKashyap Desai retval = -1; 3442a6856cc4SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, MPI3MR_RESET_FROM_PE_TIMEOUT); 3443023ab2a9SKashyap Desai goto out_unlock; 3444023ab2a9SKashyap Desai } 3445023ab2a9SKashyap Desai mpi3mr_port_enable_complete(mrioc, &mrioc->init_cmds); 3446a6856cc4SSreekanth Reddy 3447023ab2a9SKashyap Desai out_unlock: 3448a6856cc4SSreekanth Reddy mrioc->init_cmds.state = MPI3MR_CMD_NOTUSED; 3449023ab2a9SKashyap Desai mutex_unlock(&mrioc->init_cmds.mutex); 3450023ab2a9SKashyap Desai out: 3451023ab2a9SKashyap Desai return retval; 3452023ab2a9SKashyap Desai } 3453023ab2a9SKashyap Desai 3454ff9561e9SKashyap Desai /* Protocol type to name mapper structure */ 3455ff9561e9SKashyap Desai static const struct { 3456ff9561e9SKashyap Desai u8 protocol; 3457ff9561e9SKashyap Desai char *name; 3458ff9561e9SKashyap Desai } mpi3mr_protocols[] = { 3459ff9561e9SKashyap Desai { MPI3_IOCFACTS_PROTOCOL_SCSI_INITIATOR, "Initiator" }, 3460ff9561e9SKashyap Desai { MPI3_IOCFACTS_PROTOCOL_SCSI_TARGET, "Target" }, 3461ff9561e9SKashyap Desai { MPI3_IOCFACTS_PROTOCOL_NVME, "NVMe attachment" }, 3462ff9561e9SKashyap Desai }; 3463ff9561e9SKashyap Desai 3464ff9561e9SKashyap Desai /* Capability to name mapper structure*/ 3465ff9561e9SKashyap Desai static const struct { 3466ff9561e9SKashyap Desai u32 capability; 3467ff9561e9SKashyap Desai char *name; 3468ff9561e9SKashyap Desai } mpi3mr_capabilities[] = { 3469ff9561e9SKashyap Desai { MPI3_IOCFACTS_CAPABILITY_RAID_CAPABLE, "RAID" }, 3470c4723e68SSreekanth Reddy { MPI3_IOCFACTS_CAPABILITY_MULTIPATH_ENABLED, "MultiPath" }, 3471ff9561e9SKashyap Desai }; 3472ff9561e9SKashyap Desai 3473ff9561e9SKashyap Desai /** 3474ff9561e9SKashyap Desai * mpi3mr_print_ioc_info - Display controller information 3475ff9561e9SKashyap Desai * @mrioc: Adapter instance reference 3476ff9561e9SKashyap Desai * 3477ff9561e9SKashyap Desai * Display controller personalit, capability, supported 3478ff9561e9SKashyap Desai * protocols etc. 3479ff9561e9SKashyap Desai * 3480ff9561e9SKashyap Desai * Return: Nothing 3481ff9561e9SKashyap Desai */ 3482ff9561e9SKashyap Desai static void 3483ff9561e9SKashyap Desai mpi3mr_print_ioc_info(struct mpi3mr_ioc *mrioc) 3484ff9561e9SKashyap Desai { 348576a4f7ccSDan Carpenter int i = 0, bytes_written = 0; 3486ff9561e9SKashyap Desai char personality[16]; 3487ff9561e9SKashyap Desai char protocol[50] = {0}; 3488ff9561e9SKashyap Desai char capabilities[100] = {0}; 3489ff9561e9SKashyap Desai struct mpi3mr_compimg_ver *fwver = &mrioc->facts.fw_ver; 3490ff9561e9SKashyap Desai 3491ff9561e9SKashyap Desai switch (mrioc->facts.personality) { 3492ff9561e9SKashyap Desai case MPI3_IOCFACTS_FLAGS_PERSONALITY_EHBA: 3493ff9561e9SKashyap Desai strncpy(personality, "Enhanced HBA", sizeof(personality)); 3494ff9561e9SKashyap Desai break; 3495ff9561e9SKashyap Desai case MPI3_IOCFACTS_FLAGS_PERSONALITY_RAID_DDR: 3496ff9561e9SKashyap Desai strncpy(personality, "RAID", sizeof(personality)); 3497ff9561e9SKashyap Desai break; 3498ff9561e9SKashyap Desai default: 3499ff9561e9SKashyap Desai strncpy(personality, "Unknown", sizeof(personality)); 3500ff9561e9SKashyap Desai break; 3501ff9561e9SKashyap Desai } 3502ff9561e9SKashyap Desai 3503ff9561e9SKashyap Desai ioc_info(mrioc, "Running in %s Personality", personality); 3504ff9561e9SKashyap Desai 3505ff9561e9SKashyap Desai ioc_info(mrioc, "FW version(%d.%d.%d.%d.%d.%d)\n", 3506ff9561e9SKashyap Desai fwver->gen_major, fwver->gen_minor, fwver->ph_major, 3507ff9561e9SKashyap Desai fwver->ph_minor, fwver->cust_id, fwver->build_num); 3508ff9561e9SKashyap Desai 3509ff9561e9SKashyap Desai for (i = 0; i < ARRAY_SIZE(mpi3mr_protocols); i++) { 3510ff9561e9SKashyap Desai if (mrioc->facts.protocol_flags & 3511ff9561e9SKashyap Desai mpi3mr_protocols[i].protocol) { 351230e99f05SDan Carpenter bytes_written += scnprintf(protocol + bytes_written, 351376a4f7ccSDan Carpenter sizeof(protocol) - bytes_written, "%s%s", 351476a4f7ccSDan Carpenter bytes_written ? "," : "", 3515ff9561e9SKashyap Desai mpi3mr_protocols[i].name); 3516ff9561e9SKashyap Desai } 3517ff9561e9SKashyap Desai } 3518ff9561e9SKashyap Desai 351976a4f7ccSDan Carpenter bytes_written = 0; 3520ff9561e9SKashyap Desai for (i = 0; i < ARRAY_SIZE(mpi3mr_capabilities); i++) { 3521ff9561e9SKashyap Desai if (mrioc->facts.protocol_flags & 3522ff9561e9SKashyap Desai mpi3mr_capabilities[i].capability) { 352330e99f05SDan Carpenter bytes_written += scnprintf(capabilities + bytes_written, 352476a4f7ccSDan Carpenter sizeof(capabilities) - bytes_written, "%s%s", 352576a4f7ccSDan Carpenter bytes_written ? "," : "", 3526ff9561e9SKashyap Desai mpi3mr_capabilities[i].name); 3527ff9561e9SKashyap Desai } 3528ff9561e9SKashyap Desai } 3529ff9561e9SKashyap Desai 3530ff9561e9SKashyap Desai ioc_info(mrioc, "Protocol=(%s), Capabilities=(%s)\n", 3531ff9561e9SKashyap Desai protocol, capabilities); 3532ff9561e9SKashyap Desai } 3533ff9561e9SKashyap Desai 3534023ab2a9SKashyap Desai /** 3535824a1566SKashyap Desai * mpi3mr_cleanup_resources - Free PCI resources 3536824a1566SKashyap Desai * @mrioc: Adapter instance reference 3537824a1566SKashyap Desai * 3538824a1566SKashyap Desai * Unmap PCI device memory and disable PCI device. 3539824a1566SKashyap Desai * 3540824a1566SKashyap Desai * Return: 0 on success and non-zero on failure. 3541824a1566SKashyap Desai */ 3542824a1566SKashyap Desai void mpi3mr_cleanup_resources(struct mpi3mr_ioc *mrioc) 3543824a1566SKashyap Desai { 3544824a1566SKashyap Desai struct pci_dev *pdev = mrioc->pdev; 3545824a1566SKashyap Desai 3546824a1566SKashyap Desai mpi3mr_cleanup_isr(mrioc); 3547824a1566SKashyap Desai 3548824a1566SKashyap Desai if (mrioc->sysif_regs) { 3549824a1566SKashyap Desai iounmap((void __iomem *)mrioc->sysif_regs); 3550824a1566SKashyap Desai mrioc->sysif_regs = NULL; 3551824a1566SKashyap Desai } 3552824a1566SKashyap Desai 3553824a1566SKashyap Desai if (pci_is_enabled(pdev)) { 3554824a1566SKashyap Desai if (mrioc->bars) 3555824a1566SKashyap Desai pci_release_selected_regions(pdev, mrioc->bars); 3556824a1566SKashyap Desai pci_disable_device(pdev); 3557824a1566SKashyap Desai } 3558824a1566SKashyap Desai } 3559824a1566SKashyap Desai 3560824a1566SKashyap Desai /** 3561824a1566SKashyap Desai * mpi3mr_setup_resources - Enable PCI resources 3562824a1566SKashyap Desai * @mrioc: Adapter instance reference 3563824a1566SKashyap Desai * 3564824a1566SKashyap Desai * Enable PCI device memory, MSI-x registers and set DMA mask. 3565824a1566SKashyap Desai * 3566824a1566SKashyap Desai * Return: 0 on success and non-zero on failure. 3567824a1566SKashyap Desai */ 3568824a1566SKashyap Desai int mpi3mr_setup_resources(struct mpi3mr_ioc *mrioc) 3569824a1566SKashyap Desai { 3570824a1566SKashyap Desai struct pci_dev *pdev = mrioc->pdev; 3571824a1566SKashyap Desai u32 memap_sz = 0; 3572824a1566SKashyap Desai int i, retval = 0, capb = 0; 3573824a1566SKashyap Desai u16 message_control; 3574824a1566SKashyap Desai u64 dma_mask = mrioc->dma_mask ? mrioc->dma_mask : 3575824a1566SKashyap Desai (((dma_get_required_mask(&pdev->dev) > DMA_BIT_MASK(32)) && 3576824a1566SKashyap Desai (sizeof(dma_addr_t) > 4)) ? DMA_BIT_MASK(64) : DMA_BIT_MASK(32)); 3577824a1566SKashyap Desai 3578824a1566SKashyap Desai if (pci_enable_device_mem(pdev)) { 3579824a1566SKashyap Desai ioc_err(mrioc, "pci_enable_device_mem: failed\n"); 3580824a1566SKashyap Desai retval = -ENODEV; 3581824a1566SKashyap Desai goto out_failed; 3582824a1566SKashyap Desai } 3583824a1566SKashyap Desai 3584824a1566SKashyap Desai capb = pci_find_capability(pdev, PCI_CAP_ID_MSIX); 3585824a1566SKashyap Desai if (!capb) { 3586824a1566SKashyap Desai ioc_err(mrioc, "Unable to find MSI-X Capabilities\n"); 3587824a1566SKashyap Desai retval = -ENODEV; 3588824a1566SKashyap Desai goto out_failed; 3589824a1566SKashyap Desai } 3590824a1566SKashyap Desai mrioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); 3591824a1566SKashyap Desai 3592824a1566SKashyap Desai if (pci_request_selected_regions(pdev, mrioc->bars, 3593824a1566SKashyap Desai mrioc->driver_name)) { 3594824a1566SKashyap Desai ioc_err(mrioc, "pci_request_selected_regions: failed\n"); 3595824a1566SKashyap Desai retval = -ENODEV; 3596824a1566SKashyap Desai goto out_failed; 3597824a1566SKashyap Desai } 3598824a1566SKashyap Desai 3599824a1566SKashyap Desai for (i = 0; (i < DEVICE_COUNT_RESOURCE); i++) { 3600824a1566SKashyap Desai if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 3601824a1566SKashyap Desai mrioc->sysif_regs_phys = pci_resource_start(pdev, i); 3602824a1566SKashyap Desai memap_sz = pci_resource_len(pdev, i); 3603824a1566SKashyap Desai mrioc->sysif_regs = 3604824a1566SKashyap Desai ioremap(mrioc->sysif_regs_phys, memap_sz); 3605824a1566SKashyap Desai break; 3606824a1566SKashyap Desai } 3607824a1566SKashyap Desai } 3608824a1566SKashyap Desai 3609824a1566SKashyap Desai pci_set_master(pdev); 3610824a1566SKashyap Desai 3611824a1566SKashyap Desai retval = dma_set_mask_and_coherent(&pdev->dev, dma_mask); 3612824a1566SKashyap Desai if (retval) { 3613824a1566SKashyap Desai if (dma_mask != DMA_BIT_MASK(32)) { 3614824a1566SKashyap Desai ioc_warn(mrioc, "Setting 64 bit DMA mask failed\n"); 3615824a1566SKashyap Desai dma_mask = DMA_BIT_MASK(32); 3616824a1566SKashyap Desai retval = dma_set_mask_and_coherent(&pdev->dev, 3617824a1566SKashyap Desai dma_mask); 3618824a1566SKashyap Desai } 3619824a1566SKashyap Desai if (retval) { 3620824a1566SKashyap Desai mrioc->dma_mask = 0; 3621824a1566SKashyap Desai ioc_err(mrioc, "Setting 32 bit DMA mask also failed\n"); 3622824a1566SKashyap Desai goto out_failed; 3623824a1566SKashyap Desai } 3624824a1566SKashyap Desai } 3625824a1566SKashyap Desai mrioc->dma_mask = dma_mask; 3626824a1566SKashyap Desai 3627824a1566SKashyap Desai if (!mrioc->sysif_regs) { 3628824a1566SKashyap Desai ioc_err(mrioc, 3629824a1566SKashyap Desai "Unable to map adapter memory or resource not found\n"); 3630824a1566SKashyap Desai retval = -EINVAL; 3631824a1566SKashyap Desai goto out_failed; 3632824a1566SKashyap Desai } 3633824a1566SKashyap Desai 3634824a1566SKashyap Desai pci_read_config_word(pdev, capb + 2, &message_control); 3635824a1566SKashyap Desai mrioc->msix_count = (message_control & 0x3FF) + 1; 3636824a1566SKashyap Desai 3637824a1566SKashyap Desai pci_save_state(pdev); 3638824a1566SKashyap Desai 3639824a1566SKashyap Desai pci_set_drvdata(pdev, mrioc->shost); 3640824a1566SKashyap Desai 3641824a1566SKashyap Desai mpi3mr_ioc_disable_intr(mrioc); 3642824a1566SKashyap Desai 3643824a1566SKashyap Desai ioc_info(mrioc, "iomem(0x%016llx), mapped(0x%p), size(%d)\n", 3644824a1566SKashyap Desai (unsigned long long)mrioc->sysif_regs_phys, 3645824a1566SKashyap Desai mrioc->sysif_regs, memap_sz); 3646824a1566SKashyap Desai ioc_info(mrioc, "Number of MSI-X vectors found in capabilities: (%d)\n", 3647824a1566SKashyap Desai mrioc->msix_count); 3648afd3a579SSreekanth Reddy 3649afd3a579SSreekanth Reddy if (!reset_devices && poll_queues > 0) 3650afd3a579SSreekanth Reddy mrioc->requested_poll_qcount = min_t(int, poll_queues, 3651afd3a579SSreekanth Reddy mrioc->msix_count - 2); 3652824a1566SKashyap Desai return retval; 3653824a1566SKashyap Desai 3654824a1566SKashyap Desai out_failed: 3655824a1566SKashyap Desai mpi3mr_cleanup_resources(mrioc); 3656824a1566SKashyap Desai return retval; 3657824a1566SKashyap Desai } 3658824a1566SKashyap Desai 3659824a1566SKashyap Desai /** 3660e3605f65SSreekanth Reddy * mpi3mr_enable_events - Enable required events 3661e3605f65SSreekanth Reddy * @mrioc: Adapter instance reference 3662e3605f65SSreekanth Reddy * 3663e3605f65SSreekanth Reddy * This routine unmasks the events required by the driver by 3664e3605f65SSreekanth Reddy * sennding appropriate event mask bitmapt through an event 3665e3605f65SSreekanth Reddy * notification request. 3666e3605f65SSreekanth Reddy * 3667e3605f65SSreekanth Reddy * Return: 0 on success and non-zero on failure. 3668e3605f65SSreekanth Reddy */ 3669e3605f65SSreekanth Reddy static int mpi3mr_enable_events(struct mpi3mr_ioc *mrioc) 3670e3605f65SSreekanth Reddy { 3671e3605f65SSreekanth Reddy int retval = 0; 3672e3605f65SSreekanth Reddy u32 i; 3673e3605f65SSreekanth Reddy 3674e3605f65SSreekanth Reddy for (i = 0; i < MPI3_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3675e3605f65SSreekanth Reddy mrioc->event_masks[i] = -1; 3676e3605f65SSreekanth Reddy 3677e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_DEVICE_ADDED); 3678e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_DEVICE_INFO_CHANGED); 3679e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_DEVICE_STATUS_CHANGE); 3680e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_ENCL_DEVICE_STATUS_CHANGE); 36817188c03fSSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_ENCL_DEVICE_ADDED); 3682e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_SAS_TOPOLOGY_CHANGE_LIST); 3683e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_SAS_DISCOVERY); 3684e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_SAS_DEVICE_DISCOVERY_ERROR); 3685e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_SAS_BROADCAST_PRIMITIVE); 3686e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_PCIE_TOPOLOGY_CHANGE_LIST); 3687e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_PCIE_ENUMERATION); 368878b76a07SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_PREPARE_FOR_RESET); 3689e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_CABLE_MGMT); 3690e3605f65SSreekanth Reddy mpi3mr_unmask_events(mrioc, MPI3_EVENT_ENERGY_PACK_CHANGE); 3691e3605f65SSreekanth Reddy 3692e3605f65SSreekanth Reddy retval = mpi3mr_issue_event_notification(mrioc); 3693e3605f65SSreekanth Reddy if (retval) 3694e3605f65SSreekanth Reddy ioc_err(mrioc, "failed to issue event notification %d\n", 3695e3605f65SSreekanth Reddy retval); 3696e3605f65SSreekanth Reddy return retval; 3697e3605f65SSreekanth Reddy } 3698e3605f65SSreekanth Reddy 3699e3605f65SSreekanth Reddy /** 3700824a1566SKashyap Desai * mpi3mr_init_ioc - Initialize the controller 3701824a1566SKashyap Desai * @mrioc: Adapter instance reference 3702824a1566SKashyap Desai * 3703824a1566SKashyap Desai * This the controller initialization routine, executed either 3704824a1566SKashyap Desai * after soft reset or from pci probe callback. 3705824a1566SKashyap Desai * Setup the required resources, memory map the controller 3706824a1566SKashyap Desai * registers, create admin and operational reply queue pairs, 3707824a1566SKashyap Desai * allocate required memory for reply pool, sense buffer pool, 3708824a1566SKashyap Desai * issue IOC init request to the firmware, unmask the events and 3709824a1566SKashyap Desai * issue port enable to discover SAS/SATA/NVMe devies and RAID 3710824a1566SKashyap Desai * volumes. 3711824a1566SKashyap Desai * 3712824a1566SKashyap Desai * Return: 0 on success and non-zero on failure. 3713824a1566SKashyap Desai */ 3714fe6db615SSreekanth Reddy int mpi3mr_init_ioc(struct mpi3mr_ioc *mrioc) 3715824a1566SKashyap Desai { 3716824a1566SKashyap Desai int retval = 0; 3717fe6db615SSreekanth Reddy u8 retry = 0; 3718824a1566SKashyap Desai struct mpi3_ioc_facts_data facts_data; 3719f10af057SSreekanth Reddy u32 sz; 3720824a1566SKashyap Desai 3721fe6db615SSreekanth Reddy retry_init: 3722824a1566SKashyap Desai retval = mpi3mr_bring_ioc_ready(mrioc); 3723824a1566SKashyap Desai if (retval) { 3724824a1566SKashyap Desai ioc_err(mrioc, "Failed to bring ioc ready: error %d\n", 3725824a1566SKashyap Desai retval); 3726fe6db615SSreekanth Reddy goto out_failed_noretry; 3727824a1566SKashyap Desai } 3728824a1566SKashyap Desai 3729824a1566SKashyap Desai retval = mpi3mr_setup_isr(mrioc, 1); 3730824a1566SKashyap Desai if (retval) { 3731824a1566SKashyap Desai ioc_err(mrioc, "Failed to setup ISR error %d\n", 3732824a1566SKashyap Desai retval); 3733fe6db615SSreekanth Reddy goto out_failed_noretry; 3734824a1566SKashyap Desai } 3735824a1566SKashyap Desai 3736824a1566SKashyap Desai retval = mpi3mr_issue_iocfacts(mrioc, &facts_data); 3737824a1566SKashyap Desai if (retval) { 3738824a1566SKashyap Desai ioc_err(mrioc, "Failed to Issue IOC Facts %d\n", 3739824a1566SKashyap Desai retval); 3740824a1566SKashyap Desai goto out_failed; 3741824a1566SKashyap Desai } 3742824a1566SKashyap Desai 3743c5758fc7SSreekanth Reddy mrioc->max_host_ios = mrioc->facts.max_reqs - MPI3MR_INTERNAL_CMDS_RESVD; 3744c5758fc7SSreekanth Reddy 3745f10af057SSreekanth Reddy mrioc->num_io_throttle_group = mrioc->facts.max_io_throttle_group; 3746f10af057SSreekanth Reddy atomic_set(&mrioc->pend_large_data_sz, 0); 3747f10af057SSreekanth Reddy 3748c5758fc7SSreekanth Reddy if (reset_devices) 3749c5758fc7SSreekanth Reddy mrioc->max_host_ios = min_t(int, mrioc->max_host_ios, 3750c5758fc7SSreekanth Reddy MPI3MR_HOST_IOS_KDUMP); 3751c5758fc7SSreekanth Reddy 3752c4723e68SSreekanth Reddy if (!(mrioc->facts.ioc_capabilities & 3753c4723e68SSreekanth Reddy MPI3_IOCFACTS_CAPABILITY_MULTIPATH_ENABLED)) { 3754c4723e68SSreekanth Reddy mrioc->sas_transport_enabled = 1; 3755626665e9SSreekanth Reddy mrioc->scsi_device_channel = 1; 3756626665e9SSreekanth Reddy mrioc->shost->max_channel = 1; 3757c4723e68SSreekanth Reddy } 3758c4723e68SSreekanth Reddy 3759c5758fc7SSreekanth Reddy mrioc->reply_sz = mrioc->facts.reply_sz; 3760fe6db615SSreekanth Reddy 3761824a1566SKashyap Desai retval = mpi3mr_check_reset_dma_mask(mrioc); 3762824a1566SKashyap Desai if (retval) { 3763824a1566SKashyap Desai ioc_err(mrioc, "Resetting dma mask failed %d\n", 3764824a1566SKashyap Desai retval); 3765fe6db615SSreekanth Reddy goto out_failed_noretry; 3766fb9b0457SKashyap Desai } 3767824a1566SKashyap Desai 3768ff9561e9SKashyap Desai mpi3mr_print_ioc_info(mrioc); 3769ff9561e9SKashyap Desai 377032d457d5SSreekanth Reddy dprint_init(mrioc, "allocating config page buffers\n"); 377132d457d5SSreekanth Reddy mrioc->cfg_page = dma_alloc_coherent(&mrioc->pdev->dev, 377232d457d5SSreekanth Reddy MPI3MR_DEFAULT_CFG_PAGE_SZ, &mrioc->cfg_page_dma, GFP_KERNEL); 377332d457d5SSreekanth Reddy if (!mrioc->cfg_page) 377432d457d5SSreekanth Reddy goto out_failed_noretry; 377532d457d5SSreekanth Reddy 377632d457d5SSreekanth Reddy mrioc->cfg_page_sz = MPI3MR_DEFAULT_CFG_PAGE_SZ; 377732d457d5SSreekanth Reddy 3778824a1566SKashyap Desai retval = mpi3mr_alloc_reply_sense_bufs(mrioc); 3779824a1566SKashyap Desai if (retval) { 3780824a1566SKashyap Desai ioc_err(mrioc, 3781824a1566SKashyap Desai "%s :Failed to allocated reply sense buffers %d\n", 3782824a1566SKashyap Desai __func__, retval); 3783fe6db615SSreekanth Reddy goto out_failed_noretry; 3784824a1566SKashyap Desai } 3785824a1566SKashyap Desai 3786824a1566SKashyap Desai retval = mpi3mr_alloc_chain_bufs(mrioc); 3787824a1566SKashyap Desai if (retval) { 3788824a1566SKashyap Desai ioc_err(mrioc, "Failed to allocated chain buffers %d\n", 3789824a1566SKashyap Desai retval); 3790fe6db615SSreekanth Reddy goto out_failed_noretry; 3791fb9b0457SKashyap Desai } 3792824a1566SKashyap Desai 3793824a1566SKashyap Desai retval = mpi3mr_issue_iocinit(mrioc); 3794824a1566SKashyap Desai if (retval) { 3795824a1566SKashyap Desai ioc_err(mrioc, "Failed to Issue IOC Init %d\n", 3796824a1566SKashyap Desai retval); 3797824a1566SKashyap Desai goto out_failed; 3798824a1566SKashyap Desai } 3799824a1566SKashyap Desai 38002ac794baSSreekanth Reddy retval = mpi3mr_print_pkg_ver(mrioc); 38012ac794baSSreekanth Reddy if (retval) { 38022ac794baSSreekanth Reddy ioc_err(mrioc, "failed to get package version\n"); 38032ac794baSSreekanth Reddy goto out_failed; 38042ac794baSSreekanth Reddy } 38052ac794baSSreekanth Reddy 3806824a1566SKashyap Desai retval = mpi3mr_setup_isr(mrioc, 0); 3807824a1566SKashyap Desai if (retval) { 3808824a1566SKashyap Desai ioc_err(mrioc, "Failed to re-setup ISR, error %d\n", 3809824a1566SKashyap Desai retval); 3810fe6db615SSreekanth Reddy goto out_failed_noretry; 3811fb9b0457SKashyap Desai } 3812824a1566SKashyap Desai 3813c9566231SKashyap Desai retval = mpi3mr_create_op_queues(mrioc); 3814c9566231SKashyap Desai if (retval) { 3815c9566231SKashyap Desai ioc_err(mrioc, "Failed to create OpQueues error %d\n", 3816c9566231SKashyap Desai retval); 3817c9566231SKashyap Desai goto out_failed; 3818c9566231SKashyap Desai } 3819c9566231SKashyap Desai 382043ca1100SSumit Saxena if (!mrioc->pel_seqnum_virt) { 382143ca1100SSumit Saxena dprint_init(mrioc, "allocating memory for pel_seqnum_virt\n"); 382243ca1100SSumit Saxena mrioc->pel_seqnum_sz = sizeof(struct mpi3_pel_seq); 382343ca1100SSumit Saxena mrioc->pel_seqnum_virt = dma_alloc_coherent(&mrioc->pdev->dev, 382443ca1100SSumit Saxena mrioc->pel_seqnum_sz, &mrioc->pel_seqnum_dma, 382543ca1100SSumit Saxena GFP_KERNEL); 3826bc7896d3SDan Carpenter if (!mrioc->pel_seqnum_virt) { 3827bc7896d3SDan Carpenter retval = -ENOMEM; 382843ca1100SSumit Saxena goto out_failed_noretry; 382943ca1100SSumit Saxena } 3830bc7896d3SDan Carpenter } 383143ca1100SSumit Saxena 3832f10af057SSreekanth Reddy if (!mrioc->throttle_groups && mrioc->num_io_throttle_group) { 3833f10af057SSreekanth Reddy dprint_init(mrioc, "allocating memory for throttle groups\n"); 3834f10af057SSreekanth Reddy sz = sizeof(struct mpi3mr_throttle_group_info); 3835f10af057SSreekanth Reddy mrioc->throttle_groups = (struct mpi3mr_throttle_group_info *) 3836f10af057SSreekanth Reddy kcalloc(mrioc->num_io_throttle_group, sz, GFP_KERNEL); 3837f10af057SSreekanth Reddy if (!mrioc->throttle_groups) 3838f10af057SSreekanth Reddy goto out_failed_noretry; 3839f10af057SSreekanth Reddy } 3840f10af057SSreekanth Reddy 3841e3605f65SSreekanth Reddy retval = mpi3mr_enable_events(mrioc); 384213ef29eaSKashyap Desai if (retval) { 3843e3605f65SSreekanth Reddy ioc_err(mrioc, "failed to enable events %d\n", 384413ef29eaSKashyap Desai retval); 384513ef29eaSKashyap Desai goto out_failed; 384613ef29eaSKashyap Desai } 384713ef29eaSKashyap Desai 3848fe6db615SSreekanth Reddy ioc_info(mrioc, "controller initialization completed successfully\n"); 3849824a1566SKashyap Desai return retval; 3850824a1566SKashyap Desai out_failed: 3851fe6db615SSreekanth Reddy if (retry < 2) { 3852fe6db615SSreekanth Reddy retry++; 3853fe6db615SSreekanth Reddy ioc_warn(mrioc, "retrying controller initialization, retry_count:%d\n", 3854fe6db615SSreekanth Reddy retry); 3855fe6db615SSreekanth Reddy mpi3mr_memset_buffers(mrioc); 3856fe6db615SSreekanth Reddy goto retry_init; 3857fe6db615SSreekanth Reddy } 3858fe6db615SSreekanth Reddy out_failed_noretry: 3859fe6db615SSreekanth Reddy ioc_err(mrioc, "controller initialization failed\n"); 3860fe6db615SSreekanth Reddy mpi3mr_issue_reset(mrioc, MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, 3861fe6db615SSreekanth Reddy MPI3MR_RESET_FROM_CTLR_CLEANUP); 3862fe6db615SSreekanth Reddy mrioc->unrecoverable = 1; 3863824a1566SKashyap Desai return retval; 3864824a1566SKashyap Desai } 3865824a1566SKashyap Desai 3866c0b00a93SSreekanth Reddy /** 3867c0b00a93SSreekanth Reddy * mpi3mr_reinit_ioc - Re-Initialize the controller 3868c0b00a93SSreekanth Reddy * @mrioc: Adapter instance reference 3869c0b00a93SSreekanth Reddy * @is_resume: Called from resume or reset path 3870c0b00a93SSreekanth Reddy * 3871c0b00a93SSreekanth Reddy * This the controller re-initialization routine, executed from 3872c0b00a93SSreekanth Reddy * the soft reset handler or resume callback. Creates 3873c0b00a93SSreekanth Reddy * operational reply queue pairs, allocate required memory for 3874c0b00a93SSreekanth Reddy * reply pool, sense buffer pool, issue IOC init request to the 3875c0b00a93SSreekanth Reddy * firmware, unmask the events and issue port enable to discover 3876c0b00a93SSreekanth Reddy * SAS/SATA/NVMe devices and RAID volumes. 3877c0b00a93SSreekanth Reddy * 3878c0b00a93SSreekanth Reddy * Return: 0 on success and non-zero on failure. 3879c0b00a93SSreekanth Reddy */ 3880fe6db615SSreekanth Reddy int mpi3mr_reinit_ioc(struct mpi3mr_ioc *mrioc, u8 is_resume) 3881fe6db615SSreekanth Reddy { 3882c0b00a93SSreekanth Reddy int retval = 0; 3883c0b00a93SSreekanth Reddy u8 retry = 0; 3884c0b00a93SSreekanth Reddy struct mpi3_ioc_facts_data facts_data; 3885fe6db615SSreekanth Reddy 3886c0b00a93SSreekanth Reddy retry_init: 3887c0b00a93SSreekanth Reddy dprint_reset(mrioc, "bringing up the controller to ready state\n"); 3888c0b00a93SSreekanth Reddy retval = mpi3mr_bring_ioc_ready(mrioc); 3889c0b00a93SSreekanth Reddy if (retval) { 3890c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to bring to ready state\n"); 3891c0b00a93SSreekanth Reddy goto out_failed_noretry; 3892c0b00a93SSreekanth Reddy } 3893c0b00a93SSreekanth Reddy 3894c0b00a93SSreekanth Reddy if (is_resume) { 3895c0b00a93SSreekanth Reddy dprint_reset(mrioc, "setting up single ISR\n"); 3896c0b00a93SSreekanth Reddy retval = mpi3mr_setup_isr(mrioc, 1); 3897c0b00a93SSreekanth Reddy if (retval) { 3898c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to setup ISR\n"); 3899c0b00a93SSreekanth Reddy goto out_failed_noretry; 3900c0b00a93SSreekanth Reddy } 3901c0b00a93SSreekanth Reddy } else 3902c0b00a93SSreekanth Reddy mpi3mr_ioc_enable_intr(mrioc); 3903c0b00a93SSreekanth Reddy 3904c0b00a93SSreekanth Reddy dprint_reset(mrioc, "getting ioc_facts\n"); 3905c0b00a93SSreekanth Reddy retval = mpi3mr_issue_iocfacts(mrioc, &facts_data); 3906c0b00a93SSreekanth Reddy if (retval) { 3907c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to get ioc_facts\n"); 3908c0b00a93SSreekanth Reddy goto out_failed; 3909c0b00a93SSreekanth Reddy } 3910c0b00a93SSreekanth Reddy 3911c5758fc7SSreekanth Reddy dprint_reset(mrioc, "validating ioc_facts\n"); 3912c5758fc7SSreekanth Reddy retval = mpi3mr_revalidate_factsdata(mrioc); 3913c5758fc7SSreekanth Reddy if (retval) { 3914c5758fc7SSreekanth Reddy ioc_err(mrioc, "failed to revalidate ioc_facts data\n"); 3915c5758fc7SSreekanth Reddy goto out_failed_noretry; 3916c5758fc7SSreekanth Reddy } 3917c0b00a93SSreekanth Reddy 3918c0b00a93SSreekanth Reddy mpi3mr_print_ioc_info(mrioc); 3919c0b00a93SSreekanth Reddy 3920c0b00a93SSreekanth Reddy dprint_reset(mrioc, "sending ioc_init\n"); 3921c0b00a93SSreekanth Reddy retval = mpi3mr_issue_iocinit(mrioc); 3922c0b00a93SSreekanth Reddy if (retval) { 3923c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to send ioc_init\n"); 3924c0b00a93SSreekanth Reddy goto out_failed; 3925c0b00a93SSreekanth Reddy } 3926c0b00a93SSreekanth Reddy 3927c0b00a93SSreekanth Reddy dprint_reset(mrioc, "getting package version\n"); 3928c0b00a93SSreekanth Reddy retval = mpi3mr_print_pkg_ver(mrioc); 3929c0b00a93SSreekanth Reddy if (retval) { 3930c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to get package version\n"); 3931c0b00a93SSreekanth Reddy goto out_failed; 3932c0b00a93SSreekanth Reddy } 3933c0b00a93SSreekanth Reddy 3934c0b00a93SSreekanth Reddy if (is_resume) { 3935c0b00a93SSreekanth Reddy dprint_reset(mrioc, "setting up multiple ISR\n"); 3936c0b00a93SSreekanth Reddy retval = mpi3mr_setup_isr(mrioc, 0); 3937c0b00a93SSreekanth Reddy if (retval) { 3938c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to re-setup ISR\n"); 3939c0b00a93SSreekanth Reddy goto out_failed_noretry; 3940c0b00a93SSreekanth Reddy } 3941c0b00a93SSreekanth Reddy } 3942c0b00a93SSreekanth Reddy 3943c0b00a93SSreekanth Reddy dprint_reset(mrioc, "creating operational queue pairs\n"); 3944c0b00a93SSreekanth Reddy retval = mpi3mr_create_op_queues(mrioc); 3945c0b00a93SSreekanth Reddy if (retval) { 3946c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to create operational queue pairs\n"); 3947c0b00a93SSreekanth Reddy goto out_failed; 3948c0b00a93SSreekanth Reddy } 3949c0b00a93SSreekanth Reddy 395043ca1100SSumit Saxena if (!mrioc->pel_seqnum_virt) { 395143ca1100SSumit Saxena dprint_reset(mrioc, "allocating memory for pel_seqnum_virt\n"); 395243ca1100SSumit Saxena mrioc->pel_seqnum_sz = sizeof(struct mpi3_pel_seq); 395343ca1100SSumit Saxena mrioc->pel_seqnum_virt = dma_alloc_coherent(&mrioc->pdev->dev, 395443ca1100SSumit Saxena mrioc->pel_seqnum_sz, &mrioc->pel_seqnum_dma, 395543ca1100SSumit Saxena GFP_KERNEL); 3956bc7896d3SDan Carpenter if (!mrioc->pel_seqnum_virt) { 3957bc7896d3SDan Carpenter retval = -ENOMEM; 395843ca1100SSumit Saxena goto out_failed_noretry; 395943ca1100SSumit Saxena } 3960bc7896d3SDan Carpenter } 396143ca1100SSumit Saxena 3962c0b00a93SSreekanth Reddy if (mrioc->shost->nr_hw_queues > mrioc->num_op_reply_q) { 3963c0b00a93SSreekanth Reddy ioc_err(mrioc, 39645867b856SColin Ian King "cannot create minimum number of operational queues expected:%d created:%d\n", 3965c0b00a93SSreekanth Reddy mrioc->shost->nr_hw_queues, mrioc->num_op_reply_q); 3966c0b00a93SSreekanth Reddy goto out_failed_noretry; 3967c0b00a93SSreekanth Reddy } 3968c0b00a93SSreekanth Reddy 3969c0b00a93SSreekanth Reddy dprint_reset(mrioc, "enabling events\n"); 3970c0b00a93SSreekanth Reddy retval = mpi3mr_enable_events(mrioc); 3971c0b00a93SSreekanth Reddy if (retval) { 3972c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to enable events\n"); 3973c0b00a93SSreekanth Reddy goto out_failed; 3974c0b00a93SSreekanth Reddy } 3975c0b00a93SSreekanth Reddy 3976c0b00a93SSreekanth Reddy ioc_info(mrioc, "sending port enable\n"); 3977c0b00a93SSreekanth Reddy retval = mpi3mr_issue_port_enable(mrioc, 0); 3978c0b00a93SSreekanth Reddy if (retval) { 3979c0b00a93SSreekanth Reddy ioc_err(mrioc, "failed to issue port enable\n"); 3980c0b00a93SSreekanth Reddy goto out_failed; 3981c0b00a93SSreekanth Reddy } 3982c0b00a93SSreekanth Reddy 3983c0b00a93SSreekanth Reddy ioc_info(mrioc, "controller %s completed successfully\n", 3984c0b00a93SSreekanth Reddy (is_resume)?"resume":"re-initialization"); 3985c0b00a93SSreekanth Reddy return retval; 3986c0b00a93SSreekanth Reddy out_failed: 3987c0b00a93SSreekanth Reddy if (retry < 2) { 3988c0b00a93SSreekanth Reddy retry++; 3989c0b00a93SSreekanth Reddy ioc_warn(mrioc, "retrying controller %s, retry_count:%d\n", 3990c0b00a93SSreekanth Reddy (is_resume)?"resume":"re-initialization", retry); 3991c0b00a93SSreekanth Reddy mpi3mr_memset_buffers(mrioc); 3992c0b00a93SSreekanth Reddy goto retry_init; 3993c0b00a93SSreekanth Reddy } 3994c0b00a93SSreekanth Reddy out_failed_noretry: 3995c0b00a93SSreekanth Reddy ioc_err(mrioc, "controller %s is failed\n", 3996c0b00a93SSreekanth Reddy (is_resume)?"resume":"re-initialization"); 3997c0b00a93SSreekanth Reddy mpi3mr_issue_reset(mrioc, MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, 3998c0b00a93SSreekanth Reddy MPI3MR_RESET_FROM_CTLR_CLEANUP); 3999c0b00a93SSreekanth Reddy mrioc->unrecoverable = 1; 4000c0b00a93SSreekanth Reddy return retval; 4001fe6db615SSreekanth Reddy } 4002fe6db615SSreekanth Reddy 4003824a1566SKashyap Desai /** 4004fb9b0457SKashyap Desai * mpi3mr_memset_op_reply_q_buffers - memset the operational reply queue's 4005fb9b0457SKashyap Desai * segments 4006fb9b0457SKashyap Desai * @mrioc: Adapter instance reference 4007fb9b0457SKashyap Desai * @qidx: Operational reply queue index 4008fb9b0457SKashyap Desai * 4009fb9b0457SKashyap Desai * Return: Nothing. 4010fb9b0457SKashyap Desai */ 4011fb9b0457SKashyap Desai static void mpi3mr_memset_op_reply_q_buffers(struct mpi3mr_ioc *mrioc, u16 qidx) 4012fb9b0457SKashyap Desai { 4013fb9b0457SKashyap Desai struct op_reply_qinfo *op_reply_q = mrioc->op_reply_qinfo + qidx; 4014fb9b0457SKashyap Desai struct segments *segments; 4015fb9b0457SKashyap Desai int i, size; 4016fb9b0457SKashyap Desai 4017fb9b0457SKashyap Desai if (!op_reply_q->q_segments) 4018fb9b0457SKashyap Desai return; 4019fb9b0457SKashyap Desai 4020fb9b0457SKashyap Desai size = op_reply_q->segment_qd * mrioc->op_reply_desc_sz; 4021fb9b0457SKashyap Desai segments = op_reply_q->q_segments; 4022fb9b0457SKashyap Desai for (i = 0; i < op_reply_q->num_segments; i++) 4023fb9b0457SKashyap Desai memset(segments[i].segment, 0, size); 4024fb9b0457SKashyap Desai } 4025fb9b0457SKashyap Desai 4026fb9b0457SKashyap Desai /** 4027fb9b0457SKashyap Desai * mpi3mr_memset_op_req_q_buffers - memset the operational request queue's 4028fb9b0457SKashyap Desai * segments 4029fb9b0457SKashyap Desai * @mrioc: Adapter instance reference 4030fb9b0457SKashyap Desai * @qidx: Operational request queue index 4031fb9b0457SKashyap Desai * 4032fb9b0457SKashyap Desai * Return: Nothing. 4033fb9b0457SKashyap Desai */ 4034fb9b0457SKashyap Desai static void mpi3mr_memset_op_req_q_buffers(struct mpi3mr_ioc *mrioc, u16 qidx) 4035fb9b0457SKashyap Desai { 4036fb9b0457SKashyap Desai struct op_req_qinfo *op_req_q = mrioc->req_qinfo + qidx; 4037fb9b0457SKashyap Desai struct segments *segments; 4038fb9b0457SKashyap Desai int i, size; 4039fb9b0457SKashyap Desai 4040fb9b0457SKashyap Desai if (!op_req_q->q_segments) 4041fb9b0457SKashyap Desai return; 4042fb9b0457SKashyap Desai 4043fb9b0457SKashyap Desai size = op_req_q->segment_qd * mrioc->facts.op_req_sz; 4044fb9b0457SKashyap Desai segments = op_req_q->q_segments; 4045fb9b0457SKashyap Desai for (i = 0; i < op_req_q->num_segments; i++) 4046fb9b0457SKashyap Desai memset(segments[i].segment, 0, size); 4047fb9b0457SKashyap Desai } 4048fb9b0457SKashyap Desai 4049fb9b0457SKashyap Desai /** 4050fb9b0457SKashyap Desai * mpi3mr_memset_buffers - memset memory for a controller 4051fb9b0457SKashyap Desai * @mrioc: Adapter instance reference 4052fb9b0457SKashyap Desai * 4053fb9b0457SKashyap Desai * clear all the memory allocated for a controller, typically 4054fb9b0457SKashyap Desai * called post reset to reuse the memory allocated during the 4055fb9b0457SKashyap Desai * controller init. 4056fb9b0457SKashyap Desai * 4057fb9b0457SKashyap Desai * Return: Nothing. 4058fb9b0457SKashyap Desai */ 40590da66348SKashyap Desai void mpi3mr_memset_buffers(struct mpi3mr_ioc *mrioc) 4060fb9b0457SKashyap Desai { 4061fb9b0457SKashyap Desai u16 i; 4062f10af057SSreekanth Reddy struct mpi3mr_throttle_group_info *tg; 4063fb9b0457SKashyap Desai 4064fe6db615SSreekanth Reddy mrioc->change_count = 0; 4065afd3a579SSreekanth Reddy mrioc->active_poll_qcount = 0; 4066afd3a579SSreekanth Reddy mrioc->default_qcount = 0; 4067fe6db615SSreekanth Reddy if (mrioc->admin_req_base) 4068fb9b0457SKashyap Desai memset(mrioc->admin_req_base, 0, mrioc->admin_req_q_sz); 4069fe6db615SSreekanth Reddy if (mrioc->admin_reply_base) 4070fb9b0457SKashyap Desai memset(mrioc->admin_reply_base, 0, mrioc->admin_reply_q_sz); 4071fb9b0457SKashyap Desai 4072fe6db615SSreekanth Reddy if (mrioc->init_cmds.reply) { 4073fb9b0457SKashyap Desai memset(mrioc->init_cmds.reply, 0, sizeof(*mrioc->init_cmds.reply)); 4074f5e6d5a3SSumit Saxena memset(mrioc->bsg_cmds.reply, 0, 4075f5e6d5a3SSumit Saxena sizeof(*mrioc->bsg_cmds.reply)); 4076e844adb1SKashyap Desai memset(mrioc->host_tm_cmds.reply, 0, 4077e844adb1SKashyap Desai sizeof(*mrioc->host_tm_cmds.reply)); 407843ca1100SSumit Saxena memset(mrioc->pel_cmds.reply, 0, 407943ca1100SSumit Saxena sizeof(*mrioc->pel_cmds.reply)); 408043ca1100SSumit Saxena memset(mrioc->pel_abort_cmd.reply, 0, 408143ca1100SSumit Saxena sizeof(*mrioc->pel_abort_cmd.reply)); 4082*2bd37e28SSreekanth Reddy memset(mrioc->transport_cmds.reply, 0, 4083*2bd37e28SSreekanth Reddy sizeof(*mrioc->transport_cmds.reply)); 4084fb9b0457SKashyap Desai for (i = 0; i < MPI3MR_NUM_DEVRMCMD; i++) 4085fb9b0457SKashyap Desai memset(mrioc->dev_rmhs_cmds[i].reply, 0, 4086fb9b0457SKashyap Desai sizeof(*mrioc->dev_rmhs_cmds[i].reply)); 4087c1af985dSSreekanth Reddy for (i = 0; i < MPI3MR_NUM_EVTACKCMD; i++) 4088c1af985dSSreekanth Reddy memset(mrioc->evtack_cmds[i].reply, 0, 4089c1af985dSSreekanth Reddy sizeof(*mrioc->evtack_cmds[i].reply)); 4090fb9b0457SKashyap Desai memset(mrioc->removepend_bitmap, 0, mrioc->dev_handle_bitmap_sz); 4091fb9b0457SKashyap Desai memset(mrioc->devrem_bitmap, 0, mrioc->devrem_bitmap_sz); 4092c1af985dSSreekanth Reddy memset(mrioc->evtack_cmds_bitmap, 0, 4093c1af985dSSreekanth Reddy mrioc->evtack_cmds_bitmap_sz); 4094fe6db615SSreekanth Reddy } 4095fb9b0457SKashyap Desai 4096fb9b0457SKashyap Desai for (i = 0; i < mrioc->num_queues; i++) { 4097fb9b0457SKashyap Desai mrioc->op_reply_qinfo[i].qid = 0; 4098fb9b0457SKashyap Desai mrioc->op_reply_qinfo[i].ci = 0; 4099fb9b0457SKashyap Desai mrioc->op_reply_qinfo[i].num_replies = 0; 4100fb9b0457SKashyap Desai mrioc->op_reply_qinfo[i].ephase = 0; 4101463429f8SKashyap Desai atomic_set(&mrioc->op_reply_qinfo[i].pend_ios, 0); 4102463429f8SKashyap Desai atomic_set(&mrioc->op_reply_qinfo[i].in_use, 0); 4103fb9b0457SKashyap Desai mpi3mr_memset_op_reply_q_buffers(mrioc, i); 4104fb9b0457SKashyap Desai 4105fb9b0457SKashyap Desai mrioc->req_qinfo[i].ci = 0; 4106fb9b0457SKashyap Desai mrioc->req_qinfo[i].pi = 0; 4107fb9b0457SKashyap Desai mrioc->req_qinfo[i].num_requests = 0; 4108fb9b0457SKashyap Desai mrioc->req_qinfo[i].qid = 0; 4109fb9b0457SKashyap Desai mrioc->req_qinfo[i].reply_qid = 0; 4110fb9b0457SKashyap Desai spin_lock_init(&mrioc->req_qinfo[i].q_lock); 4111fb9b0457SKashyap Desai mpi3mr_memset_op_req_q_buffers(mrioc, i); 4112fb9b0457SKashyap Desai } 4113f10af057SSreekanth Reddy 4114f10af057SSreekanth Reddy atomic_set(&mrioc->pend_large_data_sz, 0); 4115f10af057SSreekanth Reddy if (mrioc->throttle_groups) { 4116f10af057SSreekanth Reddy tg = mrioc->throttle_groups; 4117f10af057SSreekanth Reddy for (i = 0; i < mrioc->num_io_throttle_group; i++, tg++) { 4118f10af057SSreekanth Reddy tg->id = 0; 4119cf1ce8b7SSreekanth Reddy tg->fw_qd = 0; 4120cf1ce8b7SSreekanth Reddy tg->modified_qd = 0; 4121f10af057SSreekanth Reddy tg->io_divert = 0; 4122cf1ce8b7SSreekanth Reddy tg->need_qd_reduction = 0; 4123f10af057SSreekanth Reddy tg->high = 0; 4124f10af057SSreekanth Reddy tg->low = 0; 4125cf1ce8b7SSreekanth Reddy tg->qd_reduction = 0; 4126f10af057SSreekanth Reddy atomic_set(&tg->pend_large_data_sz, 0); 4127f10af057SSreekanth Reddy } 4128f10af057SSreekanth Reddy } 4129fb9b0457SKashyap Desai } 4130fb9b0457SKashyap Desai 4131fb9b0457SKashyap Desai /** 4132824a1566SKashyap Desai * mpi3mr_free_mem - Free memory allocated for a controller 4133824a1566SKashyap Desai * @mrioc: Adapter instance reference 4134824a1566SKashyap Desai * 4135824a1566SKashyap Desai * Free all the memory allocated for a controller. 4136824a1566SKashyap Desai * 4137824a1566SKashyap Desai * Return: Nothing. 4138824a1566SKashyap Desai */ 4139fe6db615SSreekanth Reddy void mpi3mr_free_mem(struct mpi3mr_ioc *mrioc) 4140824a1566SKashyap Desai { 4141824a1566SKashyap Desai u16 i; 4142824a1566SKashyap Desai struct mpi3mr_intr_info *intr_info; 4143824a1566SKashyap Desai 4144824a1566SKashyap Desai if (mrioc->sense_buf_pool) { 4145824a1566SKashyap Desai if (mrioc->sense_buf) 4146824a1566SKashyap Desai dma_pool_free(mrioc->sense_buf_pool, mrioc->sense_buf, 4147824a1566SKashyap Desai mrioc->sense_buf_dma); 4148824a1566SKashyap Desai dma_pool_destroy(mrioc->sense_buf_pool); 4149824a1566SKashyap Desai mrioc->sense_buf = NULL; 4150824a1566SKashyap Desai mrioc->sense_buf_pool = NULL; 4151824a1566SKashyap Desai } 4152824a1566SKashyap Desai if (mrioc->sense_buf_q_pool) { 4153824a1566SKashyap Desai if (mrioc->sense_buf_q) 4154824a1566SKashyap Desai dma_pool_free(mrioc->sense_buf_q_pool, 4155824a1566SKashyap Desai mrioc->sense_buf_q, mrioc->sense_buf_q_dma); 4156824a1566SKashyap Desai dma_pool_destroy(mrioc->sense_buf_q_pool); 4157824a1566SKashyap Desai mrioc->sense_buf_q = NULL; 4158824a1566SKashyap Desai mrioc->sense_buf_q_pool = NULL; 4159824a1566SKashyap Desai } 4160824a1566SKashyap Desai 4161824a1566SKashyap Desai if (mrioc->reply_buf_pool) { 4162824a1566SKashyap Desai if (mrioc->reply_buf) 4163824a1566SKashyap Desai dma_pool_free(mrioc->reply_buf_pool, mrioc->reply_buf, 4164824a1566SKashyap Desai mrioc->reply_buf_dma); 4165824a1566SKashyap Desai dma_pool_destroy(mrioc->reply_buf_pool); 4166824a1566SKashyap Desai mrioc->reply_buf = NULL; 4167824a1566SKashyap Desai mrioc->reply_buf_pool = NULL; 4168824a1566SKashyap Desai } 4169824a1566SKashyap Desai if (mrioc->reply_free_q_pool) { 4170824a1566SKashyap Desai if (mrioc->reply_free_q) 4171824a1566SKashyap Desai dma_pool_free(mrioc->reply_free_q_pool, 4172824a1566SKashyap Desai mrioc->reply_free_q, mrioc->reply_free_q_dma); 4173824a1566SKashyap Desai dma_pool_destroy(mrioc->reply_free_q_pool); 4174824a1566SKashyap Desai mrioc->reply_free_q = NULL; 4175824a1566SKashyap Desai mrioc->reply_free_q_pool = NULL; 4176824a1566SKashyap Desai } 4177824a1566SKashyap Desai 4178c9566231SKashyap Desai for (i = 0; i < mrioc->num_op_req_q; i++) 4179c9566231SKashyap Desai mpi3mr_free_op_req_q_segments(mrioc, i); 4180c9566231SKashyap Desai 4181c9566231SKashyap Desai for (i = 0; i < mrioc->num_op_reply_q; i++) 4182c9566231SKashyap Desai mpi3mr_free_op_reply_q_segments(mrioc, i); 4183c9566231SKashyap Desai 4184824a1566SKashyap Desai for (i = 0; i < mrioc->intr_info_count; i++) { 4185824a1566SKashyap Desai intr_info = mrioc->intr_info + i; 4186824a1566SKashyap Desai intr_info->op_reply_q = NULL; 4187824a1566SKashyap Desai } 4188824a1566SKashyap Desai 4189824a1566SKashyap Desai kfree(mrioc->req_qinfo); 4190824a1566SKashyap Desai mrioc->req_qinfo = NULL; 4191824a1566SKashyap Desai mrioc->num_op_req_q = 0; 4192824a1566SKashyap Desai 4193824a1566SKashyap Desai kfree(mrioc->op_reply_qinfo); 4194824a1566SKashyap Desai mrioc->op_reply_qinfo = NULL; 4195824a1566SKashyap Desai mrioc->num_op_reply_q = 0; 4196824a1566SKashyap Desai 4197824a1566SKashyap Desai kfree(mrioc->init_cmds.reply); 4198824a1566SKashyap Desai mrioc->init_cmds.reply = NULL; 4199824a1566SKashyap Desai 4200f5e6d5a3SSumit Saxena kfree(mrioc->bsg_cmds.reply); 4201f5e6d5a3SSumit Saxena mrioc->bsg_cmds.reply = NULL; 4202f5e6d5a3SSumit Saxena 4203e844adb1SKashyap Desai kfree(mrioc->host_tm_cmds.reply); 4204e844adb1SKashyap Desai mrioc->host_tm_cmds.reply = NULL; 4205e844adb1SKashyap Desai 420643ca1100SSumit Saxena kfree(mrioc->pel_cmds.reply); 420743ca1100SSumit Saxena mrioc->pel_cmds.reply = NULL; 420843ca1100SSumit Saxena 420943ca1100SSumit Saxena kfree(mrioc->pel_abort_cmd.reply); 421043ca1100SSumit Saxena mrioc->pel_abort_cmd.reply = NULL; 421143ca1100SSumit Saxena 4212c1af985dSSreekanth Reddy for (i = 0; i < MPI3MR_NUM_EVTACKCMD; i++) { 4213c1af985dSSreekanth Reddy kfree(mrioc->evtack_cmds[i].reply); 4214c1af985dSSreekanth Reddy mrioc->evtack_cmds[i].reply = NULL; 4215c1af985dSSreekanth Reddy } 4216c1af985dSSreekanth Reddy 4217e844adb1SKashyap Desai kfree(mrioc->removepend_bitmap); 4218e844adb1SKashyap Desai mrioc->removepend_bitmap = NULL; 4219e844adb1SKashyap Desai 4220e844adb1SKashyap Desai kfree(mrioc->devrem_bitmap); 4221e844adb1SKashyap Desai mrioc->devrem_bitmap = NULL; 4222e844adb1SKashyap Desai 4223c1af985dSSreekanth Reddy kfree(mrioc->evtack_cmds_bitmap); 4224c1af985dSSreekanth Reddy mrioc->evtack_cmds_bitmap = NULL; 4225c1af985dSSreekanth Reddy 4226824a1566SKashyap Desai kfree(mrioc->chain_bitmap); 4227824a1566SKashyap Desai mrioc->chain_bitmap = NULL; 4228824a1566SKashyap Desai 4229*2bd37e28SSreekanth Reddy kfree(mrioc->transport_cmds.reply); 4230*2bd37e28SSreekanth Reddy mrioc->transport_cmds.reply = NULL; 4231*2bd37e28SSreekanth Reddy 423213ef29eaSKashyap Desai for (i = 0; i < MPI3MR_NUM_DEVRMCMD; i++) { 423313ef29eaSKashyap Desai kfree(mrioc->dev_rmhs_cmds[i].reply); 423413ef29eaSKashyap Desai mrioc->dev_rmhs_cmds[i].reply = NULL; 423513ef29eaSKashyap Desai } 423613ef29eaSKashyap Desai 4237824a1566SKashyap Desai if (mrioc->chain_buf_pool) { 4238824a1566SKashyap Desai for (i = 0; i < mrioc->chain_buf_count; i++) { 4239824a1566SKashyap Desai if (mrioc->chain_sgl_list[i].addr) { 4240824a1566SKashyap Desai dma_pool_free(mrioc->chain_buf_pool, 4241824a1566SKashyap Desai mrioc->chain_sgl_list[i].addr, 4242824a1566SKashyap Desai mrioc->chain_sgl_list[i].dma_addr); 4243824a1566SKashyap Desai mrioc->chain_sgl_list[i].addr = NULL; 4244824a1566SKashyap Desai } 4245824a1566SKashyap Desai } 4246824a1566SKashyap Desai dma_pool_destroy(mrioc->chain_buf_pool); 4247824a1566SKashyap Desai mrioc->chain_buf_pool = NULL; 4248824a1566SKashyap Desai } 4249824a1566SKashyap Desai 4250824a1566SKashyap Desai kfree(mrioc->chain_sgl_list); 4251824a1566SKashyap Desai mrioc->chain_sgl_list = NULL; 4252824a1566SKashyap Desai 4253824a1566SKashyap Desai if (mrioc->admin_reply_base) { 4254824a1566SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, mrioc->admin_reply_q_sz, 4255824a1566SKashyap Desai mrioc->admin_reply_base, mrioc->admin_reply_dma); 4256824a1566SKashyap Desai mrioc->admin_reply_base = NULL; 4257824a1566SKashyap Desai } 4258824a1566SKashyap Desai if (mrioc->admin_req_base) { 4259824a1566SKashyap Desai dma_free_coherent(&mrioc->pdev->dev, mrioc->admin_req_q_sz, 4260824a1566SKashyap Desai mrioc->admin_req_base, mrioc->admin_req_dma); 4261824a1566SKashyap Desai mrioc->admin_req_base = NULL; 4262824a1566SKashyap Desai } 426343ca1100SSumit Saxena 426443ca1100SSumit Saxena if (mrioc->pel_seqnum_virt) { 426543ca1100SSumit Saxena dma_free_coherent(&mrioc->pdev->dev, mrioc->pel_seqnum_sz, 426643ca1100SSumit Saxena mrioc->pel_seqnum_virt, mrioc->pel_seqnum_dma); 426743ca1100SSumit Saxena mrioc->pel_seqnum_virt = NULL; 426843ca1100SSumit Saxena } 426943ca1100SSumit Saxena 427043ca1100SSumit Saxena kfree(mrioc->logdata_buf); 427143ca1100SSumit Saxena mrioc->logdata_buf = NULL; 427243ca1100SSumit Saxena 4273824a1566SKashyap Desai } 4274824a1566SKashyap Desai 4275824a1566SKashyap Desai /** 4276824a1566SKashyap Desai * mpi3mr_issue_ioc_shutdown - shutdown controller 4277824a1566SKashyap Desai * @mrioc: Adapter instance reference 4278824a1566SKashyap Desai * 4279824a1566SKashyap Desai * Send shutodwn notification to the controller and wait for the 4280824a1566SKashyap Desai * shutdown_timeout for it to be completed. 4281824a1566SKashyap Desai * 4282824a1566SKashyap Desai * Return: Nothing. 4283824a1566SKashyap Desai */ 4284824a1566SKashyap Desai static void mpi3mr_issue_ioc_shutdown(struct mpi3mr_ioc *mrioc) 4285824a1566SKashyap Desai { 4286824a1566SKashyap Desai u32 ioc_config, ioc_status; 4287824a1566SKashyap Desai u8 retval = 1; 4288824a1566SKashyap Desai u32 timeout = MPI3MR_DEFAULT_SHUTDOWN_TIME * 10; 4289824a1566SKashyap Desai 4290824a1566SKashyap Desai ioc_info(mrioc, "Issuing shutdown Notification\n"); 4291824a1566SKashyap Desai if (mrioc->unrecoverable) { 4292824a1566SKashyap Desai ioc_warn(mrioc, 4293824a1566SKashyap Desai "IOC is unrecoverable shutdown is not issued\n"); 4294824a1566SKashyap Desai return; 4295824a1566SKashyap Desai } 4296824a1566SKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 4297824a1566SKashyap Desai if ((ioc_status & MPI3_SYSIF_IOC_STATUS_SHUTDOWN_MASK) 4298824a1566SKashyap Desai == MPI3_SYSIF_IOC_STATUS_SHUTDOWN_IN_PROGRESS) { 4299824a1566SKashyap Desai ioc_info(mrioc, "shutdown already in progress\n"); 4300824a1566SKashyap Desai return; 4301824a1566SKashyap Desai } 4302824a1566SKashyap Desai 4303824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 4304824a1566SKashyap Desai ioc_config |= MPI3_SYSIF_IOC_CONFIG_SHUTDOWN_NORMAL; 4305ec5ebd2cSSreekanth Reddy ioc_config |= MPI3_SYSIF_IOC_CONFIG_DEVICE_SHUTDOWN_SEND_REQ; 4306824a1566SKashyap Desai 4307824a1566SKashyap Desai writel(ioc_config, &mrioc->sysif_regs->ioc_configuration); 4308824a1566SKashyap Desai 4309824a1566SKashyap Desai if (mrioc->facts.shutdown_timeout) 4310824a1566SKashyap Desai timeout = mrioc->facts.shutdown_timeout * 10; 4311824a1566SKashyap Desai 4312824a1566SKashyap Desai do { 4313824a1566SKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 4314824a1566SKashyap Desai if ((ioc_status & MPI3_SYSIF_IOC_STATUS_SHUTDOWN_MASK) 4315824a1566SKashyap Desai == MPI3_SYSIF_IOC_STATUS_SHUTDOWN_COMPLETE) { 4316824a1566SKashyap Desai retval = 0; 4317824a1566SKashyap Desai break; 4318824a1566SKashyap Desai } 4319824a1566SKashyap Desai msleep(100); 4320824a1566SKashyap Desai } while (--timeout); 4321824a1566SKashyap Desai 4322824a1566SKashyap Desai ioc_status = readl(&mrioc->sysif_regs->ioc_status); 4323824a1566SKashyap Desai ioc_config = readl(&mrioc->sysif_regs->ioc_configuration); 4324824a1566SKashyap Desai 4325824a1566SKashyap Desai if (retval) { 4326824a1566SKashyap Desai if ((ioc_status & MPI3_SYSIF_IOC_STATUS_SHUTDOWN_MASK) 4327824a1566SKashyap Desai == MPI3_SYSIF_IOC_STATUS_SHUTDOWN_IN_PROGRESS) 4328824a1566SKashyap Desai ioc_warn(mrioc, 4329824a1566SKashyap Desai "shutdown still in progress after timeout\n"); 4330824a1566SKashyap Desai } 4331824a1566SKashyap Desai 4332824a1566SKashyap Desai ioc_info(mrioc, 4333824a1566SKashyap Desai "Base IOC Sts/Config after %s shutdown is (0x%x)/(0x%x)\n", 4334824a1566SKashyap Desai (!retval) ? "successful" : "failed", ioc_status, 4335824a1566SKashyap Desai ioc_config); 4336824a1566SKashyap Desai } 4337824a1566SKashyap Desai 4338824a1566SKashyap Desai /** 4339824a1566SKashyap Desai * mpi3mr_cleanup_ioc - Cleanup controller 4340824a1566SKashyap Desai * @mrioc: Adapter instance reference 43413bb3c24eSYang Li * 4342824a1566SKashyap Desai * controller cleanup handler, Message unit reset or soft reset 4343fe6db615SSreekanth Reddy * and shutdown notification is issued to the controller. 4344824a1566SKashyap Desai * 4345824a1566SKashyap Desai * Return: Nothing. 4346824a1566SKashyap Desai */ 4347fe6db615SSreekanth Reddy void mpi3mr_cleanup_ioc(struct mpi3mr_ioc *mrioc) 4348824a1566SKashyap Desai { 4349824a1566SKashyap Desai enum mpi3mr_iocstate ioc_state; 4350824a1566SKashyap Desai 4351fe6db615SSreekanth Reddy dprint_exit(mrioc, "cleaning up the controller\n"); 4352824a1566SKashyap Desai mpi3mr_ioc_disable_intr(mrioc); 4353824a1566SKashyap Desai 4354824a1566SKashyap Desai ioc_state = mpi3mr_get_iocstate(mrioc); 4355824a1566SKashyap Desai 4356824a1566SKashyap Desai if ((!mrioc->unrecoverable) && (!mrioc->reset_in_progress) && 4357824a1566SKashyap Desai (ioc_state == MRIOC_STATE_READY)) { 4358824a1566SKashyap Desai if (mpi3mr_issue_and_process_mur(mrioc, 4359824a1566SKashyap Desai MPI3MR_RESET_FROM_CTLR_CLEANUP)) 4360824a1566SKashyap Desai mpi3mr_issue_reset(mrioc, 4361824a1566SKashyap Desai MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET, 4362824a1566SKashyap Desai MPI3MR_RESET_FROM_MUR_FAILURE); 4363824a1566SKashyap Desai mpi3mr_issue_ioc_shutdown(mrioc); 4364824a1566SKashyap Desai } 4365fe6db615SSreekanth Reddy dprint_exit(mrioc, "controller cleanup completed\n"); 4366fb9b0457SKashyap Desai } 4367fb9b0457SKashyap Desai 4368fb9b0457SKashyap Desai /** 4369fb9b0457SKashyap Desai * mpi3mr_drv_cmd_comp_reset - Flush a internal driver command 4370fb9b0457SKashyap Desai * @mrioc: Adapter instance reference 4371fb9b0457SKashyap Desai * @cmdptr: Internal command tracker 4372fb9b0457SKashyap Desai * 4373fb9b0457SKashyap Desai * Complete an internal driver commands with state indicating it 4374fb9b0457SKashyap Desai * is completed due to reset. 4375fb9b0457SKashyap Desai * 4376fb9b0457SKashyap Desai * Return: Nothing. 4377fb9b0457SKashyap Desai */ 4378fb9b0457SKashyap Desai static inline void mpi3mr_drv_cmd_comp_reset(struct mpi3mr_ioc *mrioc, 4379fb9b0457SKashyap Desai struct mpi3mr_drv_cmd *cmdptr) 4380fb9b0457SKashyap Desai { 4381fb9b0457SKashyap Desai if (cmdptr->state & MPI3MR_CMD_PENDING) { 4382fb9b0457SKashyap Desai cmdptr->state |= MPI3MR_CMD_RESET; 4383fb9b0457SKashyap Desai cmdptr->state &= ~MPI3MR_CMD_PENDING; 4384fb9b0457SKashyap Desai if (cmdptr->is_waiting) { 4385fb9b0457SKashyap Desai complete(&cmdptr->done); 4386fb9b0457SKashyap Desai cmdptr->is_waiting = 0; 4387fb9b0457SKashyap Desai } else if (cmdptr->callback) 4388fb9b0457SKashyap Desai cmdptr->callback(mrioc, cmdptr); 4389fb9b0457SKashyap Desai } 4390fb9b0457SKashyap Desai } 4391fb9b0457SKashyap Desai 4392fb9b0457SKashyap Desai /** 4393fb9b0457SKashyap Desai * mpi3mr_flush_drv_cmds - Flush internaldriver commands 4394fb9b0457SKashyap Desai * @mrioc: Adapter instance reference 4395fb9b0457SKashyap Desai * 4396fb9b0457SKashyap Desai * Flush all internal driver commands post reset 4397fb9b0457SKashyap Desai * 4398fb9b0457SKashyap Desai * Return: Nothing. 4399fb9b0457SKashyap Desai */ 4400fb9b0457SKashyap Desai static void mpi3mr_flush_drv_cmds(struct mpi3mr_ioc *mrioc) 4401fb9b0457SKashyap Desai { 4402fb9b0457SKashyap Desai struct mpi3mr_drv_cmd *cmdptr; 4403fb9b0457SKashyap Desai u8 i; 4404fb9b0457SKashyap Desai 4405fb9b0457SKashyap Desai cmdptr = &mrioc->init_cmds; 4406fb9b0457SKashyap Desai mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 440732d457d5SSreekanth Reddy 440832d457d5SSreekanth Reddy cmdptr = &mrioc->cfg_cmds; 440932d457d5SSreekanth Reddy mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 441032d457d5SSreekanth Reddy 4411f5e6d5a3SSumit Saxena cmdptr = &mrioc->bsg_cmds; 4412f5e6d5a3SSumit Saxena mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 4413e844adb1SKashyap Desai cmdptr = &mrioc->host_tm_cmds; 4414e844adb1SKashyap Desai mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 4415fb9b0457SKashyap Desai 4416fb9b0457SKashyap Desai for (i = 0; i < MPI3MR_NUM_DEVRMCMD; i++) { 4417fb9b0457SKashyap Desai cmdptr = &mrioc->dev_rmhs_cmds[i]; 4418fb9b0457SKashyap Desai mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 4419fb9b0457SKashyap Desai } 4420c1af985dSSreekanth Reddy 4421c1af985dSSreekanth Reddy for (i = 0; i < MPI3MR_NUM_EVTACKCMD; i++) { 4422c1af985dSSreekanth Reddy cmdptr = &mrioc->evtack_cmds[i]; 4423c1af985dSSreekanth Reddy mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 4424c1af985dSSreekanth Reddy } 442543ca1100SSumit Saxena 442643ca1100SSumit Saxena cmdptr = &mrioc->pel_cmds; 442743ca1100SSumit Saxena mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 442843ca1100SSumit Saxena 442943ca1100SSumit Saxena cmdptr = &mrioc->pel_abort_cmd; 443043ca1100SSumit Saxena mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 443143ca1100SSumit Saxena 4432*2bd37e28SSreekanth Reddy cmdptr = &mrioc->transport_cmds; 4433*2bd37e28SSreekanth Reddy mpi3mr_drv_cmd_comp_reset(mrioc, cmdptr); 443443ca1100SSumit Saxena } 443543ca1100SSumit Saxena 443643ca1100SSumit Saxena /** 443743ca1100SSumit Saxena * mpi3mr_pel_wait_post - Issue PEL Wait 443843ca1100SSumit Saxena * @mrioc: Adapter instance reference 443943ca1100SSumit Saxena * @drv_cmd: Internal command tracker 444043ca1100SSumit Saxena * 444143ca1100SSumit Saxena * Issue PEL Wait MPI request through admin queue and return. 444243ca1100SSumit Saxena * 444343ca1100SSumit Saxena * Return: Nothing. 444443ca1100SSumit Saxena */ 444543ca1100SSumit Saxena static void mpi3mr_pel_wait_post(struct mpi3mr_ioc *mrioc, 444643ca1100SSumit Saxena struct mpi3mr_drv_cmd *drv_cmd) 444743ca1100SSumit Saxena { 444843ca1100SSumit Saxena struct mpi3_pel_req_action_wait pel_wait; 444943ca1100SSumit Saxena 445043ca1100SSumit Saxena mrioc->pel_abort_requested = false; 445143ca1100SSumit Saxena 445243ca1100SSumit Saxena memset(&pel_wait, 0, sizeof(pel_wait)); 445343ca1100SSumit Saxena drv_cmd->state = MPI3MR_CMD_PENDING; 445443ca1100SSumit Saxena drv_cmd->is_waiting = 0; 445543ca1100SSumit Saxena drv_cmd->callback = mpi3mr_pel_wait_complete; 445643ca1100SSumit Saxena drv_cmd->ioc_status = 0; 445743ca1100SSumit Saxena drv_cmd->ioc_loginfo = 0; 445843ca1100SSumit Saxena pel_wait.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_PEL_WAIT); 445943ca1100SSumit Saxena pel_wait.function = MPI3_FUNCTION_PERSISTENT_EVENT_LOG; 446043ca1100SSumit Saxena pel_wait.action = MPI3_PEL_ACTION_WAIT; 446143ca1100SSumit Saxena pel_wait.starting_sequence_number = cpu_to_le32(mrioc->pel_newest_seqnum); 446243ca1100SSumit Saxena pel_wait.locale = cpu_to_le16(mrioc->pel_locale); 446343ca1100SSumit Saxena pel_wait.class = cpu_to_le16(mrioc->pel_class); 446443ca1100SSumit Saxena pel_wait.wait_time = MPI3_PEL_WAITTIME_INFINITE_WAIT; 446543ca1100SSumit Saxena dprint_bsg_info(mrioc, "sending pel_wait seqnum(%d), class(%d), locale(0x%08x)\n", 446643ca1100SSumit Saxena mrioc->pel_newest_seqnum, mrioc->pel_class, mrioc->pel_locale); 446743ca1100SSumit Saxena 446843ca1100SSumit Saxena if (mpi3mr_admin_request_post(mrioc, &pel_wait, sizeof(pel_wait), 0)) { 446943ca1100SSumit Saxena dprint_bsg_err(mrioc, 447043ca1100SSumit Saxena "Issuing PELWait: Admin post failed\n"); 447143ca1100SSumit Saxena drv_cmd->state = MPI3MR_CMD_NOTUSED; 447243ca1100SSumit Saxena drv_cmd->callback = NULL; 447343ca1100SSumit Saxena drv_cmd->retry_count = 0; 447443ca1100SSumit Saxena mrioc->pel_enabled = false; 447543ca1100SSumit Saxena } 447643ca1100SSumit Saxena } 447743ca1100SSumit Saxena 447843ca1100SSumit Saxena /** 447943ca1100SSumit Saxena * mpi3mr_pel_get_seqnum_post - Issue PEL Get Sequence number 448043ca1100SSumit Saxena * @mrioc: Adapter instance reference 448143ca1100SSumit Saxena * @drv_cmd: Internal command tracker 448243ca1100SSumit Saxena * 448343ca1100SSumit Saxena * Issue PEL get sequence number MPI request through admin queue 448443ca1100SSumit Saxena * and return. 448543ca1100SSumit Saxena * 448643ca1100SSumit Saxena * Return: 0 on success, non-zero on failure. 448743ca1100SSumit Saxena */ 448843ca1100SSumit Saxena int mpi3mr_pel_get_seqnum_post(struct mpi3mr_ioc *mrioc, 448943ca1100SSumit Saxena struct mpi3mr_drv_cmd *drv_cmd) 449043ca1100SSumit Saxena { 449143ca1100SSumit Saxena struct mpi3_pel_req_action_get_sequence_numbers pel_getseq_req; 449243ca1100SSumit Saxena u8 sgl_flags = MPI3MR_SGEFLAGS_SYSTEM_SIMPLE_END_OF_LIST; 449343ca1100SSumit Saxena int retval = 0; 449443ca1100SSumit Saxena 449543ca1100SSumit Saxena memset(&pel_getseq_req, 0, sizeof(pel_getseq_req)); 449643ca1100SSumit Saxena mrioc->pel_cmds.state = MPI3MR_CMD_PENDING; 449743ca1100SSumit Saxena mrioc->pel_cmds.is_waiting = 0; 449843ca1100SSumit Saxena mrioc->pel_cmds.ioc_status = 0; 449943ca1100SSumit Saxena mrioc->pel_cmds.ioc_loginfo = 0; 450043ca1100SSumit Saxena mrioc->pel_cmds.callback = mpi3mr_pel_get_seqnum_complete; 450143ca1100SSumit Saxena pel_getseq_req.host_tag = cpu_to_le16(MPI3MR_HOSTTAG_PEL_WAIT); 450243ca1100SSumit Saxena pel_getseq_req.function = MPI3_FUNCTION_PERSISTENT_EVENT_LOG; 450343ca1100SSumit Saxena pel_getseq_req.action = MPI3_PEL_ACTION_GET_SEQNUM; 450443ca1100SSumit Saxena mpi3mr_add_sg_single(&pel_getseq_req.sgl, sgl_flags, 450543ca1100SSumit Saxena mrioc->pel_seqnum_sz, mrioc->pel_seqnum_dma); 450643ca1100SSumit Saxena 450743ca1100SSumit Saxena retval = mpi3mr_admin_request_post(mrioc, &pel_getseq_req, 450843ca1100SSumit Saxena sizeof(pel_getseq_req), 0); 450943ca1100SSumit Saxena if (retval) { 451043ca1100SSumit Saxena if (drv_cmd) { 451143ca1100SSumit Saxena drv_cmd->state = MPI3MR_CMD_NOTUSED; 451243ca1100SSumit Saxena drv_cmd->callback = NULL; 451343ca1100SSumit Saxena drv_cmd->retry_count = 0; 451443ca1100SSumit Saxena } 451543ca1100SSumit Saxena mrioc->pel_enabled = false; 451643ca1100SSumit Saxena } 451743ca1100SSumit Saxena 451843ca1100SSumit Saxena return retval; 451943ca1100SSumit Saxena } 452043ca1100SSumit Saxena 452143ca1100SSumit Saxena /** 452243ca1100SSumit Saxena * mpi3mr_pel_wait_complete - PELWait Completion callback 452343ca1100SSumit Saxena * @mrioc: Adapter instance reference 452443ca1100SSumit Saxena * @drv_cmd: Internal command tracker 452543ca1100SSumit Saxena * 452643ca1100SSumit Saxena * This is a callback handler for the PELWait request and 452743ca1100SSumit Saxena * firmware completes a PELWait request when it is aborted or a 452843ca1100SSumit Saxena * new PEL entry is available. This sends AEN to the application 452943ca1100SSumit Saxena * and if the PELwait completion is not due to PELAbort then 453043ca1100SSumit Saxena * this will send a request for new PEL Sequence number 453143ca1100SSumit Saxena * 453243ca1100SSumit Saxena * Return: Nothing. 453343ca1100SSumit Saxena */ 453443ca1100SSumit Saxena static void mpi3mr_pel_wait_complete(struct mpi3mr_ioc *mrioc, 453543ca1100SSumit Saxena struct mpi3mr_drv_cmd *drv_cmd) 453643ca1100SSumit Saxena { 453743ca1100SSumit Saxena struct mpi3_pel_reply *pel_reply = NULL; 453843ca1100SSumit Saxena u16 ioc_status, pe_log_status; 453943ca1100SSumit Saxena bool do_retry = false; 454043ca1100SSumit Saxena 454143ca1100SSumit Saxena if (drv_cmd->state & MPI3MR_CMD_RESET) 454243ca1100SSumit Saxena goto cleanup_drv_cmd; 454343ca1100SSumit Saxena 454443ca1100SSumit Saxena ioc_status = drv_cmd->ioc_status & MPI3_IOCSTATUS_STATUS_MASK; 454543ca1100SSumit Saxena if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 454643ca1100SSumit Saxena ioc_err(mrioc, "%s: Failed ioc_status(0x%04x) Loginfo(0x%08x)\n", 454743ca1100SSumit Saxena __func__, ioc_status, drv_cmd->ioc_loginfo); 454843ca1100SSumit Saxena dprint_bsg_err(mrioc, 454943ca1100SSumit Saxena "pel_wait: failed with ioc_status(0x%04x), log_info(0x%08x)\n", 455043ca1100SSumit Saxena ioc_status, drv_cmd->ioc_loginfo); 455143ca1100SSumit Saxena do_retry = true; 455243ca1100SSumit Saxena } 455343ca1100SSumit Saxena 455443ca1100SSumit Saxena if (drv_cmd->state & MPI3MR_CMD_REPLY_VALID) 455543ca1100SSumit Saxena pel_reply = (struct mpi3_pel_reply *)drv_cmd->reply; 455643ca1100SSumit Saxena 455743ca1100SSumit Saxena if (!pel_reply) { 455843ca1100SSumit Saxena dprint_bsg_err(mrioc, 455943ca1100SSumit Saxena "pel_wait: failed due to no reply\n"); 456043ca1100SSumit Saxena goto out_failed; 456143ca1100SSumit Saxena } 456243ca1100SSumit Saxena 456343ca1100SSumit Saxena pe_log_status = le16_to_cpu(pel_reply->pe_log_status); 456443ca1100SSumit Saxena if ((pe_log_status != MPI3_PEL_STATUS_SUCCESS) && 456543ca1100SSumit Saxena (pe_log_status != MPI3_PEL_STATUS_ABORTED)) { 456643ca1100SSumit Saxena ioc_err(mrioc, "%s: Failed pe_log_status(0x%04x)\n", 456743ca1100SSumit Saxena __func__, pe_log_status); 456843ca1100SSumit Saxena dprint_bsg_err(mrioc, 456943ca1100SSumit Saxena "pel_wait: failed due to pel_log_status(0x%04x)\n", 457043ca1100SSumit Saxena pe_log_status); 457143ca1100SSumit Saxena do_retry = true; 457243ca1100SSumit Saxena } 457343ca1100SSumit Saxena 457443ca1100SSumit Saxena if (do_retry) { 457543ca1100SSumit Saxena if (drv_cmd->retry_count < MPI3MR_PEL_RETRY_COUNT) { 457643ca1100SSumit Saxena drv_cmd->retry_count++; 457743ca1100SSumit Saxena dprint_bsg_err(mrioc, "pel_wait: retrying(%d)\n", 457843ca1100SSumit Saxena drv_cmd->retry_count); 457943ca1100SSumit Saxena mpi3mr_pel_wait_post(mrioc, drv_cmd); 458043ca1100SSumit Saxena return; 458143ca1100SSumit Saxena } 458243ca1100SSumit Saxena dprint_bsg_err(mrioc, 458343ca1100SSumit Saxena "pel_wait: failed after all retries(%d)\n", 458443ca1100SSumit Saxena drv_cmd->retry_count); 458543ca1100SSumit Saxena goto out_failed; 458643ca1100SSumit Saxena } 458743ca1100SSumit Saxena atomic64_inc(&event_counter); 458843ca1100SSumit Saxena if (!mrioc->pel_abort_requested) { 458943ca1100SSumit Saxena mrioc->pel_cmds.retry_count = 0; 459043ca1100SSumit Saxena mpi3mr_pel_get_seqnum_post(mrioc, &mrioc->pel_cmds); 459143ca1100SSumit Saxena } 459243ca1100SSumit Saxena 459343ca1100SSumit Saxena return; 459443ca1100SSumit Saxena out_failed: 459543ca1100SSumit Saxena mrioc->pel_enabled = false; 459643ca1100SSumit Saxena cleanup_drv_cmd: 459743ca1100SSumit Saxena drv_cmd->state = MPI3MR_CMD_NOTUSED; 459843ca1100SSumit Saxena drv_cmd->callback = NULL; 459943ca1100SSumit Saxena drv_cmd->retry_count = 0; 460043ca1100SSumit Saxena } 460143ca1100SSumit Saxena 460243ca1100SSumit Saxena /** 460343ca1100SSumit Saxena * mpi3mr_pel_get_seqnum_complete - PELGetSeqNum Completion callback 460443ca1100SSumit Saxena * @mrioc: Adapter instance reference 460543ca1100SSumit Saxena * @drv_cmd: Internal command tracker 460643ca1100SSumit Saxena * 460743ca1100SSumit Saxena * This is a callback handler for the PEL get sequence number 460843ca1100SSumit Saxena * request and a new PEL wait request will be issued to the 460943ca1100SSumit Saxena * firmware from this 461043ca1100SSumit Saxena * 461143ca1100SSumit Saxena * Return: Nothing. 461243ca1100SSumit Saxena */ 461343ca1100SSumit Saxena void mpi3mr_pel_get_seqnum_complete(struct mpi3mr_ioc *mrioc, 461443ca1100SSumit Saxena struct mpi3mr_drv_cmd *drv_cmd) 461543ca1100SSumit Saxena { 461643ca1100SSumit Saxena struct mpi3_pel_reply *pel_reply = NULL; 461743ca1100SSumit Saxena struct mpi3_pel_seq *pel_seqnum_virt; 461843ca1100SSumit Saxena u16 ioc_status; 461943ca1100SSumit Saxena bool do_retry = false; 462043ca1100SSumit Saxena 462143ca1100SSumit Saxena pel_seqnum_virt = (struct mpi3_pel_seq *)mrioc->pel_seqnum_virt; 462243ca1100SSumit Saxena 462343ca1100SSumit Saxena if (drv_cmd->state & MPI3MR_CMD_RESET) 462443ca1100SSumit Saxena goto cleanup_drv_cmd; 462543ca1100SSumit Saxena 462643ca1100SSumit Saxena ioc_status = drv_cmd->ioc_status & MPI3_IOCSTATUS_STATUS_MASK; 462743ca1100SSumit Saxena if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 462843ca1100SSumit Saxena dprint_bsg_err(mrioc, 462943ca1100SSumit Saxena "pel_get_seqnum: failed with ioc_status(0x%04x), log_info(0x%08x)\n", 463043ca1100SSumit Saxena ioc_status, drv_cmd->ioc_loginfo); 463143ca1100SSumit Saxena do_retry = true; 463243ca1100SSumit Saxena } 463343ca1100SSumit Saxena 463443ca1100SSumit Saxena if (drv_cmd->state & MPI3MR_CMD_REPLY_VALID) 463543ca1100SSumit Saxena pel_reply = (struct mpi3_pel_reply *)drv_cmd->reply; 463643ca1100SSumit Saxena if (!pel_reply) { 463743ca1100SSumit Saxena dprint_bsg_err(mrioc, 463843ca1100SSumit Saxena "pel_get_seqnum: failed due to no reply\n"); 463943ca1100SSumit Saxena goto out_failed; 464043ca1100SSumit Saxena } 464143ca1100SSumit Saxena 464243ca1100SSumit Saxena if (le16_to_cpu(pel_reply->pe_log_status) != MPI3_PEL_STATUS_SUCCESS) { 464343ca1100SSumit Saxena dprint_bsg_err(mrioc, 464443ca1100SSumit Saxena "pel_get_seqnum: failed due to pel_log_status(0x%04x)\n", 464543ca1100SSumit Saxena le16_to_cpu(pel_reply->pe_log_status)); 464643ca1100SSumit Saxena do_retry = true; 464743ca1100SSumit Saxena } 464843ca1100SSumit Saxena 464943ca1100SSumit Saxena if (do_retry) { 465043ca1100SSumit Saxena if (drv_cmd->retry_count < MPI3MR_PEL_RETRY_COUNT) { 465143ca1100SSumit Saxena drv_cmd->retry_count++; 465243ca1100SSumit Saxena dprint_bsg_err(mrioc, 465343ca1100SSumit Saxena "pel_get_seqnum: retrying(%d)\n", 465443ca1100SSumit Saxena drv_cmd->retry_count); 465543ca1100SSumit Saxena mpi3mr_pel_get_seqnum_post(mrioc, drv_cmd); 465643ca1100SSumit Saxena return; 465743ca1100SSumit Saxena } 465843ca1100SSumit Saxena 465943ca1100SSumit Saxena dprint_bsg_err(mrioc, 466043ca1100SSumit Saxena "pel_get_seqnum: failed after all retries(%d)\n", 466143ca1100SSumit Saxena drv_cmd->retry_count); 466243ca1100SSumit Saxena goto out_failed; 466343ca1100SSumit Saxena } 466443ca1100SSumit Saxena mrioc->pel_newest_seqnum = le32_to_cpu(pel_seqnum_virt->newest) + 1; 466543ca1100SSumit Saxena drv_cmd->retry_count = 0; 466643ca1100SSumit Saxena mpi3mr_pel_wait_post(mrioc, drv_cmd); 466743ca1100SSumit Saxena 466843ca1100SSumit Saxena return; 466943ca1100SSumit Saxena out_failed: 467043ca1100SSumit Saxena mrioc->pel_enabled = false; 467143ca1100SSumit Saxena cleanup_drv_cmd: 467243ca1100SSumit Saxena drv_cmd->state = MPI3MR_CMD_NOTUSED; 467343ca1100SSumit Saxena drv_cmd->callback = NULL; 467443ca1100SSumit Saxena drv_cmd->retry_count = 0; 4675fb9b0457SKashyap Desai } 4676fb9b0457SKashyap Desai 4677fb9b0457SKashyap Desai /** 4678824a1566SKashyap Desai * mpi3mr_soft_reset_handler - Reset the controller 4679824a1566SKashyap Desai * @mrioc: Adapter instance reference 4680824a1566SKashyap Desai * @reset_reason: Reset reason code 4681824a1566SKashyap Desai * @snapdump: Flag to generate snapdump in firmware or not 4682824a1566SKashyap Desai * 4683fb9b0457SKashyap Desai * This is an handler for recovering controller by issuing soft 4684fb9b0457SKashyap Desai * reset are diag fault reset. This is a blocking function and 4685fb9b0457SKashyap Desai * when one reset is executed if any other resets they will be 4686f5e6d5a3SSumit Saxena * blocked. All BSG requests will be blocked during the reset. If 4687fb9b0457SKashyap Desai * controller reset is successful then the controller will be 4688fb9b0457SKashyap Desai * reinitalized, otherwise the controller will be marked as not 4689fb9b0457SKashyap Desai * recoverable 4690fb9b0457SKashyap Desai * 4691fb9b0457SKashyap Desai * In snapdump bit is set, the controller is issued with diag 4692fb9b0457SKashyap Desai * fault reset so that the firmware can create a snap dump and 4693fb9b0457SKashyap Desai * post that the firmware will result in F000 fault and the 4694fb9b0457SKashyap Desai * driver will issue soft reset to recover from that. 4695824a1566SKashyap Desai * 4696824a1566SKashyap Desai * Return: 0 on success, non-zero on failure. 4697824a1566SKashyap Desai */ 4698824a1566SKashyap Desai int mpi3mr_soft_reset_handler(struct mpi3mr_ioc *mrioc, 4699824a1566SKashyap Desai u32 reset_reason, u8 snapdump) 4700824a1566SKashyap Desai { 4701fb9b0457SKashyap Desai int retval = 0, i; 4702fb9b0457SKashyap Desai unsigned long flags; 4703fb9b0457SKashyap Desai u32 host_diagnostic, timeout = MPI3_SYSIF_DIAG_SAVE_TIMEOUT * 10; 4704fb9b0457SKashyap Desai 4705b64845a7SSreekanth Reddy /* Block the reset handler until diag save in progress*/ 4706b64845a7SSreekanth Reddy dprint_reset(mrioc, 4707b64845a7SSreekanth Reddy "soft_reset_handler: check and block on diagsave_timeout(%d)\n", 4708b64845a7SSreekanth Reddy mrioc->diagsave_timeout); 4709b64845a7SSreekanth Reddy while (mrioc->diagsave_timeout) 4710b64845a7SSreekanth Reddy ssleep(1); 4711fb9b0457SKashyap Desai /* 4712fb9b0457SKashyap Desai * Block new resets until the currently executing one is finished and 4713fb9b0457SKashyap Desai * return the status of the existing reset for all blocked resets 4714fb9b0457SKashyap Desai */ 4715b64845a7SSreekanth Reddy dprint_reset(mrioc, "soft_reset_handler: acquiring reset_mutex\n"); 4716fb9b0457SKashyap Desai if (!mutex_trylock(&mrioc->reset_mutex)) { 4717b64845a7SSreekanth Reddy ioc_info(mrioc, 4718b64845a7SSreekanth Reddy "controller reset triggered by %s is blocked due to another reset in progress\n", 4719b64845a7SSreekanth Reddy mpi3mr_reset_rc_name(reset_reason)); 4720b64845a7SSreekanth Reddy do { 4721b64845a7SSreekanth Reddy ssleep(1); 4722b64845a7SSreekanth Reddy } while (mrioc->reset_in_progress == 1); 4723b64845a7SSreekanth Reddy ioc_info(mrioc, 4724b64845a7SSreekanth Reddy "returning previous reset result(%d) for the reset triggered by %s\n", 4725b64845a7SSreekanth Reddy mrioc->prev_reset_result, 4726b64845a7SSreekanth Reddy mpi3mr_reset_rc_name(reset_reason)); 4727b64845a7SSreekanth Reddy return mrioc->prev_reset_result; 4728fb9b0457SKashyap Desai } 4729b64845a7SSreekanth Reddy ioc_info(mrioc, "controller reset is triggered by %s\n", 4730b64845a7SSreekanth Reddy mpi3mr_reset_rc_name(reset_reason)); 4731b64845a7SSreekanth Reddy 4732fb9b0457SKashyap Desai mrioc->reset_in_progress = 1; 4733f5e6d5a3SSumit Saxena mrioc->stop_bsgs = 1; 4734b64845a7SSreekanth Reddy mrioc->prev_reset_result = -1; 4735fb9b0457SKashyap Desai 4736fb9b0457SKashyap Desai if ((!snapdump) && (reset_reason != MPI3MR_RESET_FROM_FAULT_WATCH) && 4737b64845a7SSreekanth Reddy (reset_reason != MPI3MR_RESET_FROM_FIRMWARE) && 4738fb9b0457SKashyap Desai (reset_reason != MPI3MR_RESET_FROM_CIACTIV_FAULT)) { 4739fb9b0457SKashyap Desai for (i = 0; i < MPI3_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 4740fb9b0457SKashyap Desai mrioc->event_masks[i] = -1; 4741fb9b0457SKashyap Desai 4742b64845a7SSreekanth Reddy dprint_reset(mrioc, "soft_reset_handler: masking events\n"); 4743b64845a7SSreekanth Reddy mpi3mr_issue_event_notification(mrioc); 4744fb9b0457SKashyap Desai } 4745fb9b0457SKashyap Desai 474644dc724fSKashyap Desai mpi3mr_wait_for_host_io(mrioc, MPI3MR_RESET_HOST_IOWAIT_TIMEOUT); 474744dc724fSKashyap Desai 4748fb9b0457SKashyap Desai mpi3mr_ioc_disable_intr(mrioc); 4749fb9b0457SKashyap Desai 4750fb9b0457SKashyap Desai if (snapdump) { 4751fb9b0457SKashyap Desai mpi3mr_set_diagsave(mrioc); 4752fb9b0457SKashyap Desai retval = mpi3mr_issue_reset(mrioc, 4753fb9b0457SKashyap Desai MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, reset_reason); 4754fb9b0457SKashyap Desai if (!retval) { 4755fb9b0457SKashyap Desai do { 4756fb9b0457SKashyap Desai host_diagnostic = 4757fb9b0457SKashyap Desai readl(&mrioc->sysif_regs->host_diagnostic); 4758fb9b0457SKashyap Desai if (!(host_diagnostic & 4759fb9b0457SKashyap Desai MPI3_SYSIF_HOST_DIAG_SAVE_IN_PROGRESS)) 4760fb9b0457SKashyap Desai break; 4761fb9b0457SKashyap Desai msleep(100); 4762fb9b0457SKashyap Desai } while (--timeout); 4763fb9b0457SKashyap Desai } 4764fb9b0457SKashyap Desai } 4765fb9b0457SKashyap Desai 4766fb9b0457SKashyap Desai retval = mpi3mr_issue_reset(mrioc, 4767fb9b0457SKashyap Desai MPI3_SYSIF_HOST_DIAG_RESET_ACTION_SOFT_RESET, reset_reason); 4768fb9b0457SKashyap Desai if (retval) { 4769fb9b0457SKashyap Desai ioc_err(mrioc, "Failed to issue soft reset to the ioc\n"); 4770fb9b0457SKashyap Desai goto out; 4771fb9b0457SKashyap Desai } 4772f10af057SSreekanth Reddy if (mrioc->num_io_throttle_group != 4773f10af057SSreekanth Reddy mrioc->facts.max_io_throttle_group) { 4774f10af057SSreekanth Reddy ioc_err(mrioc, 4775f10af057SSreekanth Reddy "max io throttle group doesn't match old(%d), new(%d)\n", 4776f10af057SSreekanth Reddy mrioc->num_io_throttle_group, 4777f10af057SSreekanth Reddy mrioc->facts.max_io_throttle_group); 47782a8a0147SDan Carpenter retval = -EPERM; 47792a8a0147SDan Carpenter goto out; 4780f10af057SSreekanth Reddy } 4781fb9b0457SKashyap Desai 4782c1af985dSSreekanth Reddy mpi3mr_flush_delayed_cmd_lists(mrioc); 4783fb9b0457SKashyap Desai mpi3mr_flush_drv_cmds(mrioc); 4784fb9b0457SKashyap Desai memset(mrioc->devrem_bitmap, 0, mrioc->devrem_bitmap_sz); 4785fb9b0457SKashyap Desai memset(mrioc->removepend_bitmap, 0, mrioc->dev_handle_bitmap_sz); 4786c1af985dSSreekanth Reddy memset(mrioc->evtack_cmds_bitmap, 0, mrioc->evtack_cmds_bitmap_sz); 4787fb9b0457SKashyap Desai mpi3mr_flush_host_io(mrioc); 4788580e6742SSreekanth Reddy mpi3mr_cleanup_fwevt_list(mrioc); 4789fb9b0457SKashyap Desai mpi3mr_invalidate_devhandles(mrioc); 479078b76a07SSreekanth Reddy if (mrioc->prepare_for_reset) { 479178b76a07SSreekanth Reddy mrioc->prepare_for_reset = 0; 479278b76a07SSreekanth Reddy mrioc->prepare_for_reset_timeout_counter = 0; 479378b76a07SSreekanth Reddy } 4794fb9b0457SKashyap Desai mpi3mr_memset_buffers(mrioc); 4795fe6db615SSreekanth Reddy retval = mpi3mr_reinit_ioc(mrioc, 0); 4796fb9b0457SKashyap Desai if (retval) { 4797fb9b0457SKashyap Desai pr_err(IOCNAME "reinit after soft reset failed: reason %d\n", 4798fb9b0457SKashyap Desai mrioc->name, reset_reason); 4799fb9b0457SKashyap Desai goto out; 4800fb9b0457SKashyap Desai } 4801fb9b0457SKashyap Desai ssleep(10); 4802fb9b0457SKashyap Desai 4803fb9b0457SKashyap Desai out: 4804fb9b0457SKashyap Desai if (!retval) { 4805b64845a7SSreekanth Reddy mrioc->diagsave_timeout = 0; 4806fb9b0457SKashyap Desai mrioc->reset_in_progress = 0; 480743ca1100SSumit Saxena mrioc->pel_abort_requested = 0; 480843ca1100SSumit Saxena if (mrioc->pel_enabled) { 480943ca1100SSumit Saxena mrioc->pel_cmds.retry_count = 0; 481043ca1100SSumit Saxena mpi3mr_pel_wait_post(mrioc, &mrioc->pel_cmds); 481143ca1100SSumit Saxena } 481243ca1100SSumit Saxena 4813fb9b0457SKashyap Desai mpi3mr_rfresh_tgtdevs(mrioc); 481454dfcffbSKashyap Desai mrioc->ts_update_counter = 0; 4815fb9b0457SKashyap Desai spin_lock_irqsave(&mrioc->watchdog_lock, flags); 4816fb9b0457SKashyap Desai if (mrioc->watchdog_work_q) 4817fb9b0457SKashyap Desai queue_delayed_work(mrioc->watchdog_work_q, 4818fb9b0457SKashyap Desai &mrioc->watchdog_work, 4819fb9b0457SKashyap Desai msecs_to_jiffies(MPI3MR_WATCHDOG_INTERVAL)); 4820fb9b0457SKashyap Desai spin_unlock_irqrestore(&mrioc->watchdog_lock, flags); 4821f5e6d5a3SSumit Saxena mrioc->stop_bsgs = 0; 482243ca1100SSumit Saxena if (mrioc->pel_enabled) 482343ca1100SSumit Saxena atomic64_inc(&event_counter); 4824fb9b0457SKashyap Desai } else { 4825fb9b0457SKashyap Desai mpi3mr_issue_reset(mrioc, 4826fb9b0457SKashyap Desai MPI3_SYSIF_HOST_DIAG_RESET_ACTION_DIAG_FAULT, reset_reason); 4827fb9b0457SKashyap Desai mrioc->unrecoverable = 1; 4828fb9b0457SKashyap Desai mrioc->reset_in_progress = 0; 4829fb9b0457SKashyap Desai retval = -1; 4830fb9b0457SKashyap Desai } 4831b64845a7SSreekanth Reddy mrioc->prev_reset_result = retval; 4832fb9b0457SKashyap Desai mutex_unlock(&mrioc->reset_mutex); 4833b64845a7SSreekanth Reddy ioc_info(mrioc, "controller reset is %s\n", 4834b64845a7SSreekanth Reddy ((retval == 0) ? "successful" : "failed")); 4835fb9b0457SKashyap Desai return retval; 4836824a1566SKashyap Desai } 483732d457d5SSreekanth Reddy 483832d457d5SSreekanth Reddy 483932d457d5SSreekanth Reddy /** 484032d457d5SSreekanth Reddy * mpi3mr_free_config_dma_memory - free memory for config page 484132d457d5SSreekanth Reddy * @mrioc: Adapter instance reference 484232d457d5SSreekanth Reddy * @mem_desc: memory descriptor structure 484332d457d5SSreekanth Reddy * 484432d457d5SSreekanth Reddy * Check whether the size of the buffer specified by the memory 484532d457d5SSreekanth Reddy * descriptor is greater than the default page size if so then 484632d457d5SSreekanth Reddy * free the memory pointed by the descriptor. 484732d457d5SSreekanth Reddy * 484832d457d5SSreekanth Reddy * Return: Nothing. 484932d457d5SSreekanth Reddy */ 485032d457d5SSreekanth Reddy static void mpi3mr_free_config_dma_memory(struct mpi3mr_ioc *mrioc, 485132d457d5SSreekanth Reddy struct dma_memory_desc *mem_desc) 485232d457d5SSreekanth Reddy { 485332d457d5SSreekanth Reddy if ((mem_desc->size > mrioc->cfg_page_sz) && mem_desc->addr) { 485432d457d5SSreekanth Reddy dma_free_coherent(&mrioc->pdev->dev, mem_desc->size, 485532d457d5SSreekanth Reddy mem_desc->addr, mem_desc->dma_addr); 485632d457d5SSreekanth Reddy mem_desc->addr = NULL; 485732d457d5SSreekanth Reddy } 485832d457d5SSreekanth Reddy } 485932d457d5SSreekanth Reddy 486032d457d5SSreekanth Reddy /** 486132d457d5SSreekanth Reddy * mpi3mr_alloc_config_dma_memory - Alloc memory for config page 486232d457d5SSreekanth Reddy * @mrioc: Adapter instance reference 486332d457d5SSreekanth Reddy * @mem_desc: Memory descriptor to hold dma memory info 486432d457d5SSreekanth Reddy * 486532d457d5SSreekanth Reddy * This function allocates new dmaable memory or provides the 486632d457d5SSreekanth Reddy * default config page dmaable memory based on the memory size 486732d457d5SSreekanth Reddy * described by the descriptor. 486832d457d5SSreekanth Reddy * 486932d457d5SSreekanth Reddy * Return: 0 on success, non-zero on failure. 487032d457d5SSreekanth Reddy */ 487132d457d5SSreekanth Reddy static int mpi3mr_alloc_config_dma_memory(struct mpi3mr_ioc *mrioc, 487232d457d5SSreekanth Reddy struct dma_memory_desc *mem_desc) 487332d457d5SSreekanth Reddy { 487432d457d5SSreekanth Reddy if (mem_desc->size > mrioc->cfg_page_sz) { 487532d457d5SSreekanth Reddy mem_desc->addr = dma_alloc_coherent(&mrioc->pdev->dev, 487632d457d5SSreekanth Reddy mem_desc->size, &mem_desc->dma_addr, GFP_KERNEL); 487732d457d5SSreekanth Reddy if (!mem_desc->addr) 487832d457d5SSreekanth Reddy return -ENOMEM; 487932d457d5SSreekanth Reddy } else { 488032d457d5SSreekanth Reddy mem_desc->addr = mrioc->cfg_page; 488132d457d5SSreekanth Reddy mem_desc->dma_addr = mrioc->cfg_page_dma; 488232d457d5SSreekanth Reddy memset(mem_desc->addr, 0, mrioc->cfg_page_sz); 488332d457d5SSreekanth Reddy } 488432d457d5SSreekanth Reddy return 0; 488532d457d5SSreekanth Reddy } 488632d457d5SSreekanth Reddy 488732d457d5SSreekanth Reddy /** 488832d457d5SSreekanth Reddy * mpi3mr_post_cfg_req - Issue config requests and wait 488932d457d5SSreekanth Reddy * @mrioc: Adapter instance reference 489032d457d5SSreekanth Reddy * @cfg_req: Configuration request 489132d457d5SSreekanth Reddy * @timeout: Timeout in seconds 489232d457d5SSreekanth Reddy * @ioc_status: Pointer to return ioc status 489332d457d5SSreekanth Reddy * 489432d457d5SSreekanth Reddy * A generic function for posting MPI3 configuration request to 489532d457d5SSreekanth Reddy * the firmware. This blocks for the completion of request for 489632d457d5SSreekanth Reddy * timeout seconds and if the request times out this function 489732d457d5SSreekanth Reddy * faults the controller with proper reason code. 489832d457d5SSreekanth Reddy * 489932d457d5SSreekanth Reddy * On successful completion of the request this function returns 490032d457d5SSreekanth Reddy * appropriate ioc status from the firmware back to the caller. 490132d457d5SSreekanth Reddy * 490232d457d5SSreekanth Reddy * Return: 0 on success, non-zero on failure. 490332d457d5SSreekanth Reddy */ 490432d457d5SSreekanth Reddy static int mpi3mr_post_cfg_req(struct mpi3mr_ioc *mrioc, 490532d457d5SSreekanth Reddy struct mpi3_config_request *cfg_req, int timeout, u16 *ioc_status) 490632d457d5SSreekanth Reddy { 490732d457d5SSreekanth Reddy int retval = 0; 490832d457d5SSreekanth Reddy 490932d457d5SSreekanth Reddy mutex_lock(&mrioc->cfg_cmds.mutex); 491032d457d5SSreekanth Reddy if (mrioc->cfg_cmds.state & MPI3MR_CMD_PENDING) { 491132d457d5SSreekanth Reddy retval = -1; 491232d457d5SSreekanth Reddy ioc_err(mrioc, "sending config request failed due to command in use\n"); 491332d457d5SSreekanth Reddy mutex_unlock(&mrioc->cfg_cmds.mutex); 491432d457d5SSreekanth Reddy goto out; 491532d457d5SSreekanth Reddy } 491632d457d5SSreekanth Reddy mrioc->cfg_cmds.state = MPI3MR_CMD_PENDING; 491732d457d5SSreekanth Reddy mrioc->cfg_cmds.is_waiting = 1; 491832d457d5SSreekanth Reddy mrioc->cfg_cmds.callback = NULL; 491932d457d5SSreekanth Reddy mrioc->cfg_cmds.ioc_status = 0; 492032d457d5SSreekanth Reddy mrioc->cfg_cmds.ioc_loginfo = 0; 492132d457d5SSreekanth Reddy 492232d457d5SSreekanth Reddy cfg_req->host_tag = cpu_to_le16(MPI3MR_HOSTTAG_CFG_CMDS); 492332d457d5SSreekanth Reddy cfg_req->function = MPI3_FUNCTION_CONFIG; 492432d457d5SSreekanth Reddy 492532d457d5SSreekanth Reddy init_completion(&mrioc->cfg_cmds.done); 492632d457d5SSreekanth Reddy dprint_cfg_info(mrioc, "posting config request\n"); 492732d457d5SSreekanth Reddy if (mrioc->logging_level & MPI3_DEBUG_CFG_INFO) 492832d457d5SSreekanth Reddy dprint_dump(cfg_req, sizeof(struct mpi3_config_request), 492932d457d5SSreekanth Reddy "mpi3_cfg_req"); 493032d457d5SSreekanth Reddy retval = mpi3mr_admin_request_post(mrioc, cfg_req, sizeof(*cfg_req), 1); 493132d457d5SSreekanth Reddy if (retval) { 493232d457d5SSreekanth Reddy ioc_err(mrioc, "posting config request failed\n"); 493332d457d5SSreekanth Reddy goto out_unlock; 493432d457d5SSreekanth Reddy } 493532d457d5SSreekanth Reddy wait_for_completion_timeout(&mrioc->cfg_cmds.done, (timeout * HZ)); 493632d457d5SSreekanth Reddy if (!(mrioc->cfg_cmds.state & MPI3MR_CMD_COMPLETE)) { 493732d457d5SSreekanth Reddy mpi3mr_check_rh_fault_ioc(mrioc, 493832d457d5SSreekanth Reddy MPI3MR_RESET_FROM_CFG_REQ_TIMEOUT); 493932d457d5SSreekanth Reddy ioc_err(mrioc, "config request timed out\n"); 494032d457d5SSreekanth Reddy retval = -1; 494132d457d5SSreekanth Reddy goto out_unlock; 494232d457d5SSreekanth Reddy } 494332d457d5SSreekanth Reddy *ioc_status = mrioc->cfg_cmds.ioc_status & MPI3_IOCSTATUS_STATUS_MASK; 494432d457d5SSreekanth Reddy if ((*ioc_status) != MPI3_IOCSTATUS_SUCCESS) 494532d457d5SSreekanth Reddy dprint_cfg_err(mrioc, 494632d457d5SSreekanth Reddy "cfg_page request returned with ioc_status(0x%04x), log_info(0x%08x)\n", 494732d457d5SSreekanth Reddy *ioc_status, mrioc->cfg_cmds.ioc_loginfo); 494832d457d5SSreekanth Reddy 494932d457d5SSreekanth Reddy out_unlock: 495032d457d5SSreekanth Reddy mrioc->cfg_cmds.state = MPI3MR_CMD_NOTUSED; 495132d457d5SSreekanth Reddy mutex_unlock(&mrioc->cfg_cmds.mutex); 495232d457d5SSreekanth Reddy 495332d457d5SSreekanth Reddy out: 495432d457d5SSreekanth Reddy return retval; 495532d457d5SSreekanth Reddy } 495632d457d5SSreekanth Reddy 495732d457d5SSreekanth Reddy /** 495832d457d5SSreekanth Reddy * mpi3mr_process_cfg_req - config page request processor 495932d457d5SSreekanth Reddy * @mrioc: Adapter instance reference 496032d457d5SSreekanth Reddy * @cfg_req: Configuration request 496132d457d5SSreekanth Reddy * @cfg_hdr: Configuration page header 496232d457d5SSreekanth Reddy * @timeout: Timeout in seconds 496332d457d5SSreekanth Reddy * @ioc_status: Pointer to return ioc status 496432d457d5SSreekanth Reddy * @cfg_buf: Memory pointer to copy config page or header 496532d457d5SSreekanth Reddy * @cfg_buf_sz: Size of the memory to get config page or header 496632d457d5SSreekanth Reddy * 496732d457d5SSreekanth Reddy * This is handler for config page read, write and config page 496832d457d5SSreekanth Reddy * header read operations. 496932d457d5SSreekanth Reddy * 497032d457d5SSreekanth Reddy * This function expects the cfg_req to be populated with page 497132d457d5SSreekanth Reddy * type, page number, action for the header read and with page 497232d457d5SSreekanth Reddy * address for all other operations. 497332d457d5SSreekanth Reddy * 497432d457d5SSreekanth Reddy * The cfg_hdr can be passed as null for reading required header 497532d457d5SSreekanth Reddy * details for read/write pages the cfg_hdr should point valid 497632d457d5SSreekanth Reddy * configuration page header. 497732d457d5SSreekanth Reddy * 497832d457d5SSreekanth Reddy * This allocates dmaable memory based on the size of the config 497932d457d5SSreekanth Reddy * buffer and set the SGE of the cfg_req. 498032d457d5SSreekanth Reddy * 498132d457d5SSreekanth Reddy * For write actions, the config page data has to be passed in 498232d457d5SSreekanth Reddy * the cfg_buf and size of the data has to be mentioned in the 498332d457d5SSreekanth Reddy * cfg_buf_sz. 498432d457d5SSreekanth Reddy * 498532d457d5SSreekanth Reddy * For read/header actions, on successful completion of the 498632d457d5SSreekanth Reddy * request with successful ioc_status the data will be copied 498732d457d5SSreekanth Reddy * into the cfg_buf limited to a minimum of actual page size and 498832d457d5SSreekanth Reddy * cfg_buf_sz 498932d457d5SSreekanth Reddy * 499032d457d5SSreekanth Reddy * 499132d457d5SSreekanth Reddy * Return: 0 on success, non-zero on failure. 499232d457d5SSreekanth Reddy */ 499332d457d5SSreekanth Reddy static int mpi3mr_process_cfg_req(struct mpi3mr_ioc *mrioc, 499432d457d5SSreekanth Reddy struct mpi3_config_request *cfg_req, 499532d457d5SSreekanth Reddy struct mpi3_config_page_header *cfg_hdr, int timeout, u16 *ioc_status, 499632d457d5SSreekanth Reddy void *cfg_buf, u32 cfg_buf_sz) 499732d457d5SSreekanth Reddy { 499832d457d5SSreekanth Reddy struct dma_memory_desc mem_desc; 499932d457d5SSreekanth Reddy int retval = -1; 500032d457d5SSreekanth Reddy u8 invalid_action = 0; 500132d457d5SSreekanth Reddy u8 sgl_flags = MPI3MR_SGEFLAGS_SYSTEM_SIMPLE_END_OF_LIST; 500232d457d5SSreekanth Reddy 500332d457d5SSreekanth Reddy memset(&mem_desc, 0, sizeof(struct dma_memory_desc)); 500432d457d5SSreekanth Reddy 500532d457d5SSreekanth Reddy if (cfg_req->action == MPI3_CONFIG_ACTION_PAGE_HEADER) 500632d457d5SSreekanth Reddy mem_desc.size = sizeof(struct mpi3_config_page_header); 500732d457d5SSreekanth Reddy else { 500832d457d5SSreekanth Reddy if (!cfg_hdr) { 500932d457d5SSreekanth Reddy ioc_err(mrioc, "null config header passed for config action(%d), page_type(0x%02x), page_num(%d)\n", 501032d457d5SSreekanth Reddy cfg_req->action, cfg_req->page_type, 501132d457d5SSreekanth Reddy cfg_req->page_number); 501232d457d5SSreekanth Reddy goto out; 501332d457d5SSreekanth Reddy } 501432d457d5SSreekanth Reddy switch (cfg_hdr->page_attribute & MPI3_CONFIG_PAGEATTR_MASK) { 501532d457d5SSreekanth Reddy case MPI3_CONFIG_PAGEATTR_READ_ONLY: 501632d457d5SSreekanth Reddy if (cfg_req->action 501732d457d5SSreekanth Reddy != MPI3_CONFIG_ACTION_READ_CURRENT) 501832d457d5SSreekanth Reddy invalid_action = 1; 501932d457d5SSreekanth Reddy break; 502032d457d5SSreekanth Reddy case MPI3_CONFIG_PAGEATTR_CHANGEABLE: 502132d457d5SSreekanth Reddy if ((cfg_req->action == 502232d457d5SSreekanth Reddy MPI3_CONFIG_ACTION_READ_PERSISTENT) || 502332d457d5SSreekanth Reddy (cfg_req->action == 502432d457d5SSreekanth Reddy MPI3_CONFIG_ACTION_WRITE_PERSISTENT)) 502532d457d5SSreekanth Reddy invalid_action = 1; 502632d457d5SSreekanth Reddy break; 502732d457d5SSreekanth Reddy case MPI3_CONFIG_PAGEATTR_PERSISTENT: 502832d457d5SSreekanth Reddy default: 502932d457d5SSreekanth Reddy break; 503032d457d5SSreekanth Reddy } 503132d457d5SSreekanth Reddy if (invalid_action) { 503232d457d5SSreekanth Reddy ioc_err(mrioc, 503332d457d5SSreekanth Reddy "config action(%d) is not allowed for page_type(0x%02x), page_num(%d) with page_attribute(0x%02x)\n", 503432d457d5SSreekanth Reddy cfg_req->action, cfg_req->page_type, 503532d457d5SSreekanth Reddy cfg_req->page_number, cfg_hdr->page_attribute); 503632d457d5SSreekanth Reddy goto out; 503732d457d5SSreekanth Reddy } 503832d457d5SSreekanth Reddy mem_desc.size = le16_to_cpu(cfg_hdr->page_length) * 4; 503932d457d5SSreekanth Reddy cfg_req->page_length = cfg_hdr->page_length; 504032d457d5SSreekanth Reddy cfg_req->page_version = cfg_hdr->page_version; 504132d457d5SSreekanth Reddy } 504232d457d5SSreekanth Reddy if (mpi3mr_alloc_config_dma_memory(mrioc, &mem_desc)) 504332d457d5SSreekanth Reddy goto out; 504432d457d5SSreekanth Reddy 504532d457d5SSreekanth Reddy mpi3mr_add_sg_single(&cfg_req->sgl, sgl_flags, mem_desc.size, 504632d457d5SSreekanth Reddy mem_desc.dma_addr); 504732d457d5SSreekanth Reddy 504832d457d5SSreekanth Reddy if ((cfg_req->action == MPI3_CONFIG_ACTION_WRITE_PERSISTENT) || 504932d457d5SSreekanth Reddy (cfg_req->action == MPI3_CONFIG_ACTION_WRITE_CURRENT)) { 505032d457d5SSreekanth Reddy memcpy(mem_desc.addr, cfg_buf, min_t(u16, mem_desc.size, 505132d457d5SSreekanth Reddy cfg_buf_sz)); 505232d457d5SSreekanth Reddy dprint_cfg_info(mrioc, "config buffer to be written\n"); 505332d457d5SSreekanth Reddy if (mrioc->logging_level & MPI3_DEBUG_CFG_INFO) 505432d457d5SSreekanth Reddy dprint_dump(mem_desc.addr, mem_desc.size, "cfg_buf"); 505532d457d5SSreekanth Reddy } 505632d457d5SSreekanth Reddy 505732d457d5SSreekanth Reddy if (mpi3mr_post_cfg_req(mrioc, cfg_req, timeout, ioc_status)) 505832d457d5SSreekanth Reddy goto out; 505932d457d5SSreekanth Reddy 506032d457d5SSreekanth Reddy retval = 0; 506132d457d5SSreekanth Reddy if ((*ioc_status == MPI3_IOCSTATUS_SUCCESS) && 506232d457d5SSreekanth Reddy (cfg_req->action != MPI3_CONFIG_ACTION_WRITE_PERSISTENT) && 506332d457d5SSreekanth Reddy (cfg_req->action != MPI3_CONFIG_ACTION_WRITE_CURRENT)) { 506432d457d5SSreekanth Reddy memcpy(cfg_buf, mem_desc.addr, min_t(u16, mem_desc.size, 506532d457d5SSreekanth Reddy cfg_buf_sz)); 506632d457d5SSreekanth Reddy dprint_cfg_info(mrioc, "config buffer read\n"); 506732d457d5SSreekanth Reddy if (mrioc->logging_level & MPI3_DEBUG_CFG_INFO) 506832d457d5SSreekanth Reddy dprint_dump(mem_desc.addr, mem_desc.size, "cfg_buf"); 506932d457d5SSreekanth Reddy } 507032d457d5SSreekanth Reddy 507132d457d5SSreekanth Reddy out: 507232d457d5SSreekanth Reddy mpi3mr_free_config_dma_memory(mrioc, &mem_desc); 507332d457d5SSreekanth Reddy return retval; 507432d457d5SSreekanth Reddy } 507564a8d931SSreekanth Reddy 507664a8d931SSreekanth Reddy /** 507764a8d931SSreekanth Reddy * mpi3mr_cfg_get_dev_pg0 - Read current device page0 507864a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 507964a8d931SSreekanth Reddy * @ioc_status: Pointer to return ioc status 508064a8d931SSreekanth Reddy * @dev_pg0: Pointer to return device page 0 508164a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 508264a8d931SSreekanth Reddy * @form: The form to be used for addressing the page 508364a8d931SSreekanth Reddy * @form_spec: Form specific information like device handle 508464a8d931SSreekanth Reddy * 508564a8d931SSreekanth Reddy * This is handler for config page read for a specific device 508664a8d931SSreekanth Reddy * page0. The ioc_status has the controller returned ioc_status. 508764a8d931SSreekanth Reddy * This routine doesn't check ioc_status to decide whether the 508864a8d931SSreekanth Reddy * page read is success or not and it is the callers 508964a8d931SSreekanth Reddy * responsibility. 509064a8d931SSreekanth Reddy * 509164a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 509264a8d931SSreekanth Reddy */ 509364a8d931SSreekanth Reddy int mpi3mr_cfg_get_dev_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 509464a8d931SSreekanth Reddy struct mpi3_device_page0 *dev_pg0, u16 pg_sz, u32 form, u32 form_spec) 509564a8d931SSreekanth Reddy { 509664a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 509764a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 509864a8d931SSreekanth Reddy u32 page_address; 509964a8d931SSreekanth Reddy 510064a8d931SSreekanth Reddy memset(dev_pg0, 0, pg_sz); 510164a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 510264a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 510364a8d931SSreekanth Reddy 510464a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 510564a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 510664a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_DEVICE; 510764a8d931SSreekanth Reddy cfg_req.page_number = 0; 510864a8d931SSreekanth Reddy cfg_req.page_address = 0; 510964a8d931SSreekanth Reddy 511064a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 511164a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 511264a8d931SSreekanth Reddy ioc_err(mrioc, "device page0 header read failed\n"); 511364a8d931SSreekanth Reddy goto out_failed; 511464a8d931SSreekanth Reddy } 511564a8d931SSreekanth Reddy if (*ioc_status != MPI3_IOCSTATUS_SUCCESS) { 511664a8d931SSreekanth Reddy ioc_err(mrioc, "device page0 header read failed with ioc_status(0x%04x)\n", 511764a8d931SSreekanth Reddy *ioc_status); 511864a8d931SSreekanth Reddy goto out_failed; 511964a8d931SSreekanth Reddy } 512064a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 512164a8d931SSreekanth Reddy page_address = ((form & MPI3_DEVICE_PGAD_FORM_MASK) | 512264a8d931SSreekanth Reddy (form_spec & MPI3_DEVICE_PGAD_HANDLE_MASK)); 512364a8d931SSreekanth Reddy cfg_req.page_address = cpu_to_le32(page_address); 512464a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 512564a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, dev_pg0, pg_sz)) { 512664a8d931SSreekanth Reddy ioc_err(mrioc, "device page0 read failed\n"); 512764a8d931SSreekanth Reddy goto out_failed; 512864a8d931SSreekanth Reddy } 512964a8d931SSreekanth Reddy return 0; 513064a8d931SSreekanth Reddy out_failed: 513164a8d931SSreekanth Reddy return -1; 513264a8d931SSreekanth Reddy } 513364a8d931SSreekanth Reddy 513464a8d931SSreekanth Reddy 513564a8d931SSreekanth Reddy /** 513664a8d931SSreekanth Reddy * mpi3mr_cfg_get_sas_phy_pg0 - Read current SAS Phy page0 513764a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 513864a8d931SSreekanth Reddy * @ioc_status: Pointer to return ioc status 513964a8d931SSreekanth Reddy * @phy_pg0: Pointer to return SAS Phy page 0 514064a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 514164a8d931SSreekanth Reddy * @form: The form to be used for addressing the page 514264a8d931SSreekanth Reddy * @form_spec: Form specific information like phy number 514364a8d931SSreekanth Reddy * 514464a8d931SSreekanth Reddy * This is handler for config page read for a specific SAS Phy 514564a8d931SSreekanth Reddy * page0. The ioc_status has the controller returned ioc_status. 514664a8d931SSreekanth Reddy * This routine doesn't check ioc_status to decide whether the 514764a8d931SSreekanth Reddy * page read is success or not and it is the callers 514864a8d931SSreekanth Reddy * responsibility. 514964a8d931SSreekanth Reddy * 515064a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 515164a8d931SSreekanth Reddy */ 515264a8d931SSreekanth Reddy int mpi3mr_cfg_get_sas_phy_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 515364a8d931SSreekanth Reddy struct mpi3_sas_phy_page0 *phy_pg0, u16 pg_sz, u32 form, 515464a8d931SSreekanth Reddy u32 form_spec) 515564a8d931SSreekanth Reddy { 515664a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 515764a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 515864a8d931SSreekanth Reddy u32 page_address; 515964a8d931SSreekanth Reddy 516064a8d931SSreekanth Reddy memset(phy_pg0, 0, pg_sz); 516164a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 516264a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 516364a8d931SSreekanth Reddy 516464a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 516564a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 516664a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_SAS_PHY; 516764a8d931SSreekanth Reddy cfg_req.page_number = 0; 516864a8d931SSreekanth Reddy cfg_req.page_address = 0; 516964a8d931SSreekanth Reddy 517064a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 517164a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 517264a8d931SSreekanth Reddy ioc_err(mrioc, "sas phy page0 header read failed\n"); 517364a8d931SSreekanth Reddy goto out_failed; 517464a8d931SSreekanth Reddy } 517564a8d931SSreekanth Reddy if (*ioc_status != MPI3_IOCSTATUS_SUCCESS) { 517664a8d931SSreekanth Reddy ioc_err(mrioc, "sas phy page0 header read failed with ioc_status(0x%04x)\n", 517764a8d931SSreekanth Reddy *ioc_status); 517864a8d931SSreekanth Reddy goto out_failed; 517964a8d931SSreekanth Reddy } 518064a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 518164a8d931SSreekanth Reddy page_address = ((form & MPI3_SAS_PHY_PGAD_FORM_MASK) | 518264a8d931SSreekanth Reddy (form_spec & MPI3_SAS_PHY_PGAD_PHY_NUMBER_MASK)); 518364a8d931SSreekanth Reddy cfg_req.page_address = cpu_to_le32(page_address); 518464a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 518564a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, phy_pg0, pg_sz)) { 518664a8d931SSreekanth Reddy ioc_err(mrioc, "sas phy page0 read failed\n"); 518764a8d931SSreekanth Reddy goto out_failed; 518864a8d931SSreekanth Reddy } 518964a8d931SSreekanth Reddy return 0; 519064a8d931SSreekanth Reddy out_failed: 519164a8d931SSreekanth Reddy return -1; 519264a8d931SSreekanth Reddy } 519364a8d931SSreekanth Reddy 519464a8d931SSreekanth Reddy /** 519564a8d931SSreekanth Reddy * mpi3mr_cfg_get_sas_phy_pg1 - Read current SAS Phy page1 519664a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 519764a8d931SSreekanth Reddy * @ioc_status: Pointer to return ioc status 519864a8d931SSreekanth Reddy * @phy_pg1: Pointer to return SAS Phy page 1 519964a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 520064a8d931SSreekanth Reddy * @form: The form to be used for addressing the page 520164a8d931SSreekanth Reddy * @form_spec: Form specific information like phy number 520264a8d931SSreekanth Reddy * 520364a8d931SSreekanth Reddy * This is handler for config page read for a specific SAS Phy 520464a8d931SSreekanth Reddy * page1. The ioc_status has the controller returned ioc_status. 520564a8d931SSreekanth Reddy * This routine doesn't check ioc_status to decide whether the 520664a8d931SSreekanth Reddy * page read is success or not and it is the callers 520764a8d931SSreekanth Reddy * responsibility. 520864a8d931SSreekanth Reddy * 520964a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 521064a8d931SSreekanth Reddy */ 521164a8d931SSreekanth Reddy int mpi3mr_cfg_get_sas_phy_pg1(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 521264a8d931SSreekanth Reddy struct mpi3_sas_phy_page1 *phy_pg1, u16 pg_sz, u32 form, 521364a8d931SSreekanth Reddy u32 form_spec) 521464a8d931SSreekanth Reddy { 521564a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 521664a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 521764a8d931SSreekanth Reddy u32 page_address; 521864a8d931SSreekanth Reddy 521964a8d931SSreekanth Reddy memset(phy_pg1, 0, pg_sz); 522064a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 522164a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 522264a8d931SSreekanth Reddy 522364a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 522464a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 522564a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_SAS_PHY; 522664a8d931SSreekanth Reddy cfg_req.page_number = 1; 522764a8d931SSreekanth Reddy cfg_req.page_address = 0; 522864a8d931SSreekanth Reddy 522964a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 523064a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 523164a8d931SSreekanth Reddy ioc_err(mrioc, "sas phy page1 header read failed\n"); 523264a8d931SSreekanth Reddy goto out_failed; 523364a8d931SSreekanth Reddy } 523464a8d931SSreekanth Reddy if (*ioc_status != MPI3_IOCSTATUS_SUCCESS) { 523564a8d931SSreekanth Reddy ioc_err(mrioc, "sas phy page1 header read failed with ioc_status(0x%04x)\n", 523664a8d931SSreekanth Reddy *ioc_status); 523764a8d931SSreekanth Reddy goto out_failed; 523864a8d931SSreekanth Reddy } 523964a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 524064a8d931SSreekanth Reddy page_address = ((form & MPI3_SAS_PHY_PGAD_FORM_MASK) | 524164a8d931SSreekanth Reddy (form_spec & MPI3_SAS_PHY_PGAD_PHY_NUMBER_MASK)); 524264a8d931SSreekanth Reddy cfg_req.page_address = cpu_to_le32(page_address); 524364a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 524464a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, phy_pg1, pg_sz)) { 524564a8d931SSreekanth Reddy ioc_err(mrioc, "sas phy page1 read failed\n"); 524664a8d931SSreekanth Reddy goto out_failed; 524764a8d931SSreekanth Reddy } 524864a8d931SSreekanth Reddy return 0; 524964a8d931SSreekanth Reddy out_failed: 525064a8d931SSreekanth Reddy return -1; 525164a8d931SSreekanth Reddy } 525264a8d931SSreekanth Reddy 525364a8d931SSreekanth Reddy 525464a8d931SSreekanth Reddy /** 525564a8d931SSreekanth Reddy * mpi3mr_cfg_get_sas_exp_pg0 - Read current SAS Expander page0 525664a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 525764a8d931SSreekanth Reddy * @ioc_status: Pointer to return ioc status 525864a8d931SSreekanth Reddy * @exp_pg0: Pointer to return SAS Expander page 0 525964a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 526064a8d931SSreekanth Reddy * @form: The form to be used for addressing the page 526164a8d931SSreekanth Reddy * @form_spec: Form specific information like device handle 526264a8d931SSreekanth Reddy * 526364a8d931SSreekanth Reddy * This is handler for config page read for a specific SAS 526464a8d931SSreekanth Reddy * Expander page0. The ioc_status has the controller returned 526564a8d931SSreekanth Reddy * ioc_status. This routine doesn't check ioc_status to decide 526664a8d931SSreekanth Reddy * whether the page read is success or not and it is the callers 526764a8d931SSreekanth Reddy * responsibility. 526864a8d931SSreekanth Reddy * 526964a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 527064a8d931SSreekanth Reddy */ 527164a8d931SSreekanth Reddy int mpi3mr_cfg_get_sas_exp_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 527264a8d931SSreekanth Reddy struct mpi3_sas_expander_page0 *exp_pg0, u16 pg_sz, u32 form, 527364a8d931SSreekanth Reddy u32 form_spec) 527464a8d931SSreekanth Reddy { 527564a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 527664a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 527764a8d931SSreekanth Reddy u32 page_address; 527864a8d931SSreekanth Reddy 527964a8d931SSreekanth Reddy memset(exp_pg0, 0, pg_sz); 528064a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 528164a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 528264a8d931SSreekanth Reddy 528364a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 528464a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 528564a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_SAS_EXPANDER; 528664a8d931SSreekanth Reddy cfg_req.page_number = 0; 528764a8d931SSreekanth Reddy cfg_req.page_address = 0; 528864a8d931SSreekanth Reddy 528964a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 529064a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 529164a8d931SSreekanth Reddy ioc_err(mrioc, "expander page0 header read failed\n"); 529264a8d931SSreekanth Reddy goto out_failed; 529364a8d931SSreekanth Reddy } 529464a8d931SSreekanth Reddy if (*ioc_status != MPI3_IOCSTATUS_SUCCESS) { 529564a8d931SSreekanth Reddy ioc_err(mrioc, "expander page0 header read failed with ioc_status(0x%04x)\n", 529664a8d931SSreekanth Reddy *ioc_status); 529764a8d931SSreekanth Reddy goto out_failed; 529864a8d931SSreekanth Reddy } 529964a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 530064a8d931SSreekanth Reddy page_address = ((form & MPI3_SAS_EXPAND_PGAD_FORM_MASK) | 530164a8d931SSreekanth Reddy (form_spec & (MPI3_SAS_EXPAND_PGAD_PHYNUM_MASK | 530264a8d931SSreekanth Reddy MPI3_SAS_EXPAND_PGAD_HANDLE_MASK))); 530364a8d931SSreekanth Reddy cfg_req.page_address = cpu_to_le32(page_address); 530464a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 530564a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, exp_pg0, pg_sz)) { 530664a8d931SSreekanth Reddy ioc_err(mrioc, "expander page0 read failed\n"); 530764a8d931SSreekanth Reddy goto out_failed; 530864a8d931SSreekanth Reddy } 530964a8d931SSreekanth Reddy return 0; 531064a8d931SSreekanth Reddy out_failed: 531164a8d931SSreekanth Reddy return -1; 531264a8d931SSreekanth Reddy } 531364a8d931SSreekanth Reddy 531464a8d931SSreekanth Reddy /** 531564a8d931SSreekanth Reddy * mpi3mr_cfg_get_sas_exp_pg1 - Read current SAS Expander page1 531664a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 531764a8d931SSreekanth Reddy * @ioc_status: Pointer to return ioc status 531864a8d931SSreekanth Reddy * @exp_pg1: Pointer to return SAS Expander page 1 531964a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 532064a8d931SSreekanth Reddy * @form: The form to be used for addressing the page 532164a8d931SSreekanth Reddy * @form_spec: Form specific information like phy number 532264a8d931SSreekanth Reddy * 532364a8d931SSreekanth Reddy * This is handler for config page read for a specific SAS 532464a8d931SSreekanth Reddy * Expander page1. The ioc_status has the controller returned 532564a8d931SSreekanth Reddy * ioc_status. This routine doesn't check ioc_status to decide 532664a8d931SSreekanth Reddy * whether the page read is success or not and it is the callers 532764a8d931SSreekanth Reddy * responsibility. 532864a8d931SSreekanth Reddy * 532964a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 533064a8d931SSreekanth Reddy */ 533164a8d931SSreekanth Reddy int mpi3mr_cfg_get_sas_exp_pg1(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 533264a8d931SSreekanth Reddy struct mpi3_sas_expander_page1 *exp_pg1, u16 pg_sz, u32 form, 533364a8d931SSreekanth Reddy u32 form_spec) 533464a8d931SSreekanth Reddy { 533564a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 533664a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 533764a8d931SSreekanth Reddy u32 page_address; 533864a8d931SSreekanth Reddy 533964a8d931SSreekanth Reddy memset(exp_pg1, 0, pg_sz); 534064a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 534164a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 534264a8d931SSreekanth Reddy 534364a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 534464a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 534564a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_SAS_EXPANDER; 534664a8d931SSreekanth Reddy cfg_req.page_number = 1; 534764a8d931SSreekanth Reddy cfg_req.page_address = 0; 534864a8d931SSreekanth Reddy 534964a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 535064a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 535164a8d931SSreekanth Reddy ioc_err(mrioc, "expander page1 header read failed\n"); 535264a8d931SSreekanth Reddy goto out_failed; 535364a8d931SSreekanth Reddy } 535464a8d931SSreekanth Reddy if (*ioc_status != MPI3_IOCSTATUS_SUCCESS) { 535564a8d931SSreekanth Reddy ioc_err(mrioc, "expander page1 header read failed with ioc_status(0x%04x)\n", 535664a8d931SSreekanth Reddy *ioc_status); 535764a8d931SSreekanth Reddy goto out_failed; 535864a8d931SSreekanth Reddy } 535964a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 536064a8d931SSreekanth Reddy page_address = ((form & MPI3_SAS_EXPAND_PGAD_FORM_MASK) | 536164a8d931SSreekanth Reddy (form_spec & (MPI3_SAS_EXPAND_PGAD_PHYNUM_MASK | 536264a8d931SSreekanth Reddy MPI3_SAS_EXPAND_PGAD_HANDLE_MASK))); 536364a8d931SSreekanth Reddy cfg_req.page_address = cpu_to_le32(page_address); 536464a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 536564a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, exp_pg1, pg_sz)) { 536664a8d931SSreekanth Reddy ioc_err(mrioc, "expander page1 read failed\n"); 536764a8d931SSreekanth Reddy goto out_failed; 536864a8d931SSreekanth Reddy } 536964a8d931SSreekanth Reddy return 0; 537064a8d931SSreekanth Reddy out_failed: 537164a8d931SSreekanth Reddy return -1; 537264a8d931SSreekanth Reddy } 537364a8d931SSreekanth Reddy 537464a8d931SSreekanth Reddy /** 537564a8d931SSreekanth Reddy * mpi3mr_cfg_get_enclosure_pg0 - Read current Enclosure page0 537664a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 537764a8d931SSreekanth Reddy * @ioc_status: Pointer to return ioc status 537864a8d931SSreekanth Reddy * @encl_pg0: Pointer to return Enclosure page 0 537964a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 538064a8d931SSreekanth Reddy * @form: The form to be used for addressing the page 538164a8d931SSreekanth Reddy * @form_spec: Form specific information like device handle 538264a8d931SSreekanth Reddy * 538364a8d931SSreekanth Reddy * This is handler for config page read for a specific Enclosure 538464a8d931SSreekanth Reddy * page0. The ioc_status has the controller returned ioc_status. 538564a8d931SSreekanth Reddy * This routine doesn't check ioc_status to decide whether the 538664a8d931SSreekanth Reddy * page read is success or not and it is the callers 538764a8d931SSreekanth Reddy * responsibility. 538864a8d931SSreekanth Reddy * 538964a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 539064a8d931SSreekanth Reddy */ 539164a8d931SSreekanth Reddy int mpi3mr_cfg_get_enclosure_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 539264a8d931SSreekanth Reddy struct mpi3_enclosure_page0 *encl_pg0, u16 pg_sz, u32 form, 539364a8d931SSreekanth Reddy u32 form_spec) 539464a8d931SSreekanth Reddy { 539564a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 539664a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 539764a8d931SSreekanth Reddy u32 page_address; 539864a8d931SSreekanth Reddy 539964a8d931SSreekanth Reddy memset(encl_pg0, 0, pg_sz); 540064a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 540164a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 540264a8d931SSreekanth Reddy 540364a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 540464a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 540564a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_ENCLOSURE; 540664a8d931SSreekanth Reddy cfg_req.page_number = 0; 540764a8d931SSreekanth Reddy cfg_req.page_address = 0; 540864a8d931SSreekanth Reddy 540964a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 541064a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 541164a8d931SSreekanth Reddy ioc_err(mrioc, "enclosure page0 header read failed\n"); 541264a8d931SSreekanth Reddy goto out_failed; 541364a8d931SSreekanth Reddy } 541464a8d931SSreekanth Reddy if (*ioc_status != MPI3_IOCSTATUS_SUCCESS) { 541564a8d931SSreekanth Reddy ioc_err(mrioc, "enclosure page0 header read failed with ioc_status(0x%04x)\n", 541664a8d931SSreekanth Reddy *ioc_status); 541764a8d931SSreekanth Reddy goto out_failed; 541864a8d931SSreekanth Reddy } 541964a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 542064a8d931SSreekanth Reddy page_address = ((form & MPI3_ENCLOS_PGAD_FORM_MASK) | 542164a8d931SSreekanth Reddy (form_spec & MPI3_ENCLOS_PGAD_HANDLE_MASK)); 542264a8d931SSreekanth Reddy cfg_req.page_address = cpu_to_le32(page_address); 542364a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 542464a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, ioc_status, encl_pg0, pg_sz)) { 542564a8d931SSreekanth Reddy ioc_err(mrioc, "enclosure page0 read failed\n"); 542664a8d931SSreekanth Reddy goto out_failed; 542764a8d931SSreekanth Reddy } 542864a8d931SSreekanth Reddy return 0; 542964a8d931SSreekanth Reddy out_failed: 543064a8d931SSreekanth Reddy return -1; 543164a8d931SSreekanth Reddy } 543264a8d931SSreekanth Reddy 543364a8d931SSreekanth Reddy 543464a8d931SSreekanth Reddy /** 543564a8d931SSreekanth Reddy * mpi3mr_cfg_get_sas_io_unit_pg0 - Read current SASIOUnit page0 543664a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 543764a8d931SSreekanth Reddy * @sas_io_unit_pg0: Pointer to return SAS IO Unit page 0 543864a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 543964a8d931SSreekanth Reddy * 544064a8d931SSreekanth Reddy * This is handler for config page read for the SAS IO Unit 544164a8d931SSreekanth Reddy * page0. This routine checks ioc_status to decide whether the 544264a8d931SSreekanth Reddy * page read is success or not. 544364a8d931SSreekanth Reddy * 544464a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 544564a8d931SSreekanth Reddy */ 544664a8d931SSreekanth Reddy int mpi3mr_cfg_get_sas_io_unit_pg0(struct mpi3mr_ioc *mrioc, 544764a8d931SSreekanth Reddy struct mpi3_sas_io_unit_page0 *sas_io_unit_pg0, u16 pg_sz) 544864a8d931SSreekanth Reddy { 544964a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 545064a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 545164a8d931SSreekanth Reddy u16 ioc_status = 0; 545264a8d931SSreekanth Reddy 545364a8d931SSreekanth Reddy memset(sas_io_unit_pg0, 0, pg_sz); 545464a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 545564a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 545664a8d931SSreekanth Reddy 545764a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 545864a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 545964a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_SAS_IO_UNIT; 546064a8d931SSreekanth Reddy cfg_req.page_number = 0; 546164a8d931SSreekanth Reddy cfg_req.page_address = 0; 546264a8d931SSreekanth Reddy 546364a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 546464a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 546564a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page0 header read failed\n"); 546664a8d931SSreekanth Reddy goto out_failed; 546764a8d931SSreekanth Reddy } 546864a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 546964a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page0 header read failed with ioc_status(0x%04x)\n", 547064a8d931SSreekanth Reddy ioc_status); 547164a8d931SSreekanth Reddy goto out_failed; 547264a8d931SSreekanth Reddy } 547364a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 547464a8d931SSreekanth Reddy 547564a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 547664a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, sas_io_unit_pg0, pg_sz)) { 547764a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page0 read failed\n"); 547864a8d931SSreekanth Reddy goto out_failed; 547964a8d931SSreekanth Reddy } 548064a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 548164a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page0 read failed with ioc_status(0x%04x)\n", 548264a8d931SSreekanth Reddy ioc_status); 548364a8d931SSreekanth Reddy goto out_failed; 548464a8d931SSreekanth Reddy } 548564a8d931SSreekanth Reddy return 0; 548664a8d931SSreekanth Reddy out_failed: 548764a8d931SSreekanth Reddy return -1; 548864a8d931SSreekanth Reddy } 548964a8d931SSreekanth Reddy 549064a8d931SSreekanth Reddy /** 549164a8d931SSreekanth Reddy * mpi3mr_cfg_get_sas_io_unit_pg1 - Read current SASIOUnit page1 549264a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 549364a8d931SSreekanth Reddy * @sas_io_unit_pg1: Pointer to return SAS IO Unit page 1 549464a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 549564a8d931SSreekanth Reddy * 549664a8d931SSreekanth Reddy * This is handler for config page read for the SAS IO Unit 549764a8d931SSreekanth Reddy * page1. This routine checks ioc_status to decide whether the 549864a8d931SSreekanth Reddy * page read is success or not. 549964a8d931SSreekanth Reddy * 550064a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 550164a8d931SSreekanth Reddy */ 550264a8d931SSreekanth Reddy int mpi3mr_cfg_get_sas_io_unit_pg1(struct mpi3mr_ioc *mrioc, 550364a8d931SSreekanth Reddy struct mpi3_sas_io_unit_page1 *sas_io_unit_pg1, u16 pg_sz) 550464a8d931SSreekanth Reddy { 550564a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 550664a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 550764a8d931SSreekanth Reddy u16 ioc_status = 0; 550864a8d931SSreekanth Reddy 550964a8d931SSreekanth Reddy memset(sas_io_unit_pg1, 0, pg_sz); 551064a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 551164a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 551264a8d931SSreekanth Reddy 551364a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 551464a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 551564a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_SAS_IO_UNIT; 551664a8d931SSreekanth Reddy cfg_req.page_number = 1; 551764a8d931SSreekanth Reddy cfg_req.page_address = 0; 551864a8d931SSreekanth Reddy 551964a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 552064a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 552164a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 header read failed\n"); 552264a8d931SSreekanth Reddy goto out_failed; 552364a8d931SSreekanth Reddy } 552464a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 552564a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 header read failed with ioc_status(0x%04x)\n", 552664a8d931SSreekanth Reddy ioc_status); 552764a8d931SSreekanth Reddy goto out_failed; 552864a8d931SSreekanth Reddy } 552964a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 553064a8d931SSreekanth Reddy 553164a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 553264a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, sas_io_unit_pg1, pg_sz)) { 553364a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 read failed\n"); 553464a8d931SSreekanth Reddy goto out_failed; 553564a8d931SSreekanth Reddy } 553664a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 553764a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 read failed with ioc_status(0x%04x)\n", 553864a8d931SSreekanth Reddy ioc_status); 553964a8d931SSreekanth Reddy goto out_failed; 554064a8d931SSreekanth Reddy } 554164a8d931SSreekanth Reddy return 0; 554264a8d931SSreekanth Reddy out_failed: 554364a8d931SSreekanth Reddy return -1; 554464a8d931SSreekanth Reddy } 554564a8d931SSreekanth Reddy 554664a8d931SSreekanth Reddy /** 554764a8d931SSreekanth Reddy * mpi3mr_cfg_set_sas_io_unit_pg1 - Write SASIOUnit page1 554864a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 554964a8d931SSreekanth Reddy * @sas_io_unit_pg1: Pointer to the SAS IO Unit page 1 to write 555064a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 555164a8d931SSreekanth Reddy * 555264a8d931SSreekanth Reddy * This is handler for config page write for the SAS IO Unit 555364a8d931SSreekanth Reddy * page1. This routine checks ioc_status to decide whether the 555464a8d931SSreekanth Reddy * page read is success or not. This will modify both current 555564a8d931SSreekanth Reddy * and persistent page. 555664a8d931SSreekanth Reddy * 555764a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 555864a8d931SSreekanth Reddy */ 555964a8d931SSreekanth Reddy int mpi3mr_cfg_set_sas_io_unit_pg1(struct mpi3mr_ioc *mrioc, 556064a8d931SSreekanth Reddy struct mpi3_sas_io_unit_page1 *sas_io_unit_pg1, u16 pg_sz) 556164a8d931SSreekanth Reddy { 556264a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 556364a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 556464a8d931SSreekanth Reddy u16 ioc_status = 0; 556564a8d931SSreekanth Reddy 556664a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 556764a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 556864a8d931SSreekanth Reddy 556964a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 557064a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 557164a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_SAS_IO_UNIT; 557264a8d931SSreekanth Reddy cfg_req.page_number = 1; 557364a8d931SSreekanth Reddy cfg_req.page_address = 0; 557464a8d931SSreekanth Reddy 557564a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 557664a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 557764a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 header read failed\n"); 557864a8d931SSreekanth Reddy goto out_failed; 557964a8d931SSreekanth Reddy } 558064a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 558164a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 header read failed with ioc_status(0x%04x)\n", 558264a8d931SSreekanth Reddy ioc_status); 558364a8d931SSreekanth Reddy goto out_failed; 558464a8d931SSreekanth Reddy } 558564a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_WRITE_CURRENT; 558664a8d931SSreekanth Reddy 558764a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 558864a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, sas_io_unit_pg1, pg_sz)) { 558964a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 write current failed\n"); 559064a8d931SSreekanth Reddy goto out_failed; 559164a8d931SSreekanth Reddy } 559264a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 559364a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 write current failed with ioc_status(0x%04x)\n", 559464a8d931SSreekanth Reddy ioc_status); 559564a8d931SSreekanth Reddy goto out_failed; 559664a8d931SSreekanth Reddy } 559764a8d931SSreekanth Reddy 559864a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_WRITE_PERSISTENT; 559964a8d931SSreekanth Reddy 560064a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 560164a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, sas_io_unit_pg1, pg_sz)) { 560264a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 write persistent failed\n"); 560364a8d931SSreekanth Reddy goto out_failed; 560464a8d931SSreekanth Reddy } 560564a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 560664a8d931SSreekanth Reddy ioc_err(mrioc, "sas io unit page1 write persistent failed with ioc_status(0x%04x)\n", 560764a8d931SSreekanth Reddy ioc_status); 560864a8d931SSreekanth Reddy goto out_failed; 560964a8d931SSreekanth Reddy } 561064a8d931SSreekanth Reddy return 0; 561164a8d931SSreekanth Reddy out_failed: 561264a8d931SSreekanth Reddy return -1; 561364a8d931SSreekanth Reddy } 561464a8d931SSreekanth Reddy 561564a8d931SSreekanth Reddy /** 561664a8d931SSreekanth Reddy * mpi3mr_cfg_get_driver_pg1 - Read current Driver page1 561764a8d931SSreekanth Reddy * @mrioc: Adapter instance reference 561864a8d931SSreekanth Reddy * @driver_pg1: Pointer to return Driver page 1 561964a8d931SSreekanth Reddy * @pg_sz: Size of the memory allocated to the page pointer 562064a8d931SSreekanth Reddy * 562164a8d931SSreekanth Reddy * This is handler for config page read for the Driver page1. 562264a8d931SSreekanth Reddy * This routine checks ioc_status to decide whether the page 562364a8d931SSreekanth Reddy * read is success or not. 562464a8d931SSreekanth Reddy * 562564a8d931SSreekanth Reddy * Return: 0 on success, non-zero on failure. 562664a8d931SSreekanth Reddy */ 562764a8d931SSreekanth Reddy int mpi3mr_cfg_get_driver_pg1(struct mpi3mr_ioc *mrioc, 562864a8d931SSreekanth Reddy struct mpi3_driver_page1 *driver_pg1, u16 pg_sz) 562964a8d931SSreekanth Reddy { 563064a8d931SSreekanth Reddy struct mpi3_config_page_header cfg_hdr; 563164a8d931SSreekanth Reddy struct mpi3_config_request cfg_req; 563264a8d931SSreekanth Reddy u16 ioc_status = 0; 563364a8d931SSreekanth Reddy 563464a8d931SSreekanth Reddy memset(driver_pg1, 0, pg_sz); 563564a8d931SSreekanth Reddy memset(&cfg_hdr, 0, sizeof(cfg_hdr)); 563664a8d931SSreekanth Reddy memset(&cfg_req, 0, sizeof(cfg_req)); 563764a8d931SSreekanth Reddy 563864a8d931SSreekanth Reddy cfg_req.function = MPI3_FUNCTION_CONFIG; 563964a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_PAGE_HEADER; 564064a8d931SSreekanth Reddy cfg_req.page_type = MPI3_CONFIG_PAGETYPE_DRIVER; 564164a8d931SSreekanth Reddy cfg_req.page_number = 1; 564264a8d931SSreekanth Reddy cfg_req.page_address = 0; 564364a8d931SSreekanth Reddy 564464a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, NULL, 564564a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, &cfg_hdr, sizeof(cfg_hdr))) { 564664a8d931SSreekanth Reddy ioc_err(mrioc, "driver page1 header read failed\n"); 564764a8d931SSreekanth Reddy goto out_failed; 564864a8d931SSreekanth Reddy } 564964a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 565064a8d931SSreekanth Reddy ioc_err(mrioc, "driver page1 header read failed with ioc_status(0x%04x)\n", 565164a8d931SSreekanth Reddy ioc_status); 565264a8d931SSreekanth Reddy goto out_failed; 565364a8d931SSreekanth Reddy } 565464a8d931SSreekanth Reddy cfg_req.action = MPI3_CONFIG_ACTION_READ_CURRENT; 565564a8d931SSreekanth Reddy 565664a8d931SSreekanth Reddy if (mpi3mr_process_cfg_req(mrioc, &cfg_req, &cfg_hdr, 565764a8d931SSreekanth Reddy MPI3MR_INTADMCMD_TIMEOUT, &ioc_status, driver_pg1, pg_sz)) { 565864a8d931SSreekanth Reddy ioc_err(mrioc, "driver page1 read failed\n"); 565964a8d931SSreekanth Reddy goto out_failed; 566064a8d931SSreekanth Reddy } 566164a8d931SSreekanth Reddy if (ioc_status != MPI3_IOCSTATUS_SUCCESS) { 566264a8d931SSreekanth Reddy ioc_err(mrioc, "driver page1 read failed with ioc_status(0x%04x)\n", 566364a8d931SSreekanth Reddy ioc_status); 566464a8d931SSreekanth Reddy goto out_failed; 566564a8d931SSreekanth Reddy } 566664a8d931SSreekanth Reddy return 0; 566764a8d931SSreekanth Reddy out_failed: 566864a8d931SSreekanth Reddy return -1; 566964a8d931SSreekanth Reddy } 5670