xref: /linux/drivers/pinctrl/realtek/pinctrl-rtd1625.c (revision faeab166167f5787719eb8683661fd41a3bb1514)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Realtek DHC 1625 pin controller driver
4  *
5  * Copyright (c) 2023 Realtek Semiconductor Corp.
6  *
7  */
8 
9 #include <linux/module.h>
10 #include <linux/of.h>
11 #include <linux/platform_device.h>
12 #include <linux/pinctrl/pinctrl.h>
13 
14 #include "pinctrl-rtd.h"
15 
16 enum rtd1625_iso_pins_enum {
17 	RTD1625_ISO_GPIO_8 = 0,
18 	RTD1625_ISO_GPIO_9,
19 	RTD1625_ISO_GPIO_10,
20 	RTD1625_ISO_GPIO_11,
21 	RTD1625_ISO_USB_CC1,
22 	RTD1625_ISO_USB_CC2,
23 	RTD1625_ISO_GPIO_45,
24 	RTD1625_ISO_GPIO_46,
25 	RTD1625_ISO_GPIO_47,
26 	RTD1625_ISO_GPIO_48,
27 	RTD1625_ISO_GPIO_49,
28 	RTD1625_ISO_GPIO_50,
29 	RTD1625_ISO_GPIO_52,
30 	RTD1625_ISO_GPIO_94,
31 	RTD1625_ISO_GPIO_95,
32 	RTD1625_ISO_GPIO_96,
33 	RTD1625_ISO_GPIO_97,
34 	RTD1625_ISO_GPIO_98,
35 	RTD1625_ISO_GPIO_99,
36 	RTD1625_ISO_GPIO_100,
37 	RTD1625_ISO_GPIO_101,
38 	RTD1625_ISO_GPIO_102,
39 	RTD1625_ISO_GPIO_103,
40 	RTD1625_ISO_GPIO_104,
41 	RTD1625_ISO_GPIO_105,
42 	RTD1625_ISO_GPIO_106,
43 	RTD1625_ISO_GPIO_107,
44 	RTD1625_ISO_GPIO_108,
45 	RTD1625_ISO_GPIO_109,
46 	RTD1625_ISO_GPIO_110,
47 	RTD1625_ISO_GPIO_111,
48 	RTD1625_ISO_GPIO_112,
49 	RTD1625_ISO_GPIO_128,
50 	RTD1625_ISO_GPIO_129,
51 	RTD1625_ISO_GPIO_130,
52 	RTD1625_ISO_GPIO_131,
53 	RTD1625_ISO_GPIO_145,
54 	RTD1625_ISO_GPIO_146,
55 	RTD1625_ISO_GPIO_147,
56 	RTD1625_ISO_GPIO_148,
57 	RTD1625_ISO_GPIO_149,
58 	RTD1625_ISO_GPIO_150,
59 	RTD1625_ISO_GPIO_151,
60 	RTD1625_ISO_GPIO_152,
61 	RTD1625_ISO_GPIO_153,
62 	RTD1625_ISO_GPIO_154,
63 	RTD1625_ISO_GPIO_155,
64 	RTD1625_ISO_GPIO_156,
65 	RTD1625_ISO_GPIO_157,
66 	RTD1625_ISO_GPIO_158,
67 	RTD1625_ISO_GPIO_159,
68 	RTD1625_ISO_GPIO_160,
69 	RTD1625_ISO_GPIO_161,
70 	RTD1625_ISO_GPIO_162,
71 	RTD1625_ISO_GPIO_163,
72 	RTD1625_ISO_HI_WIDTH,
73 	RTD1625_ISO_SF_EN,
74 	RTD1625_ISO_ARM_TRACE_DBG_EN,
75 	RTD1625_ISO_EJTAG_AUCPU0_LOC,
76 	RTD1625_ISO_EJTAG_AUCPU1_LOC,
77 	RTD1625_ISO_EJTAG_VE2_LOC,
78 	RTD1625_ISO_EJTAG_SCPU_LOC,
79 	RTD1625_ISO_EJTAG_PCPU_LOC,
80 	RTD1625_ISO_EJTAG_ACPU_LOC,
81 	RTD1625_ISO_I2C6_LOC,
82 	RTD1625_ISO_UART0_LOC,
83 	RTD1625_ISO_AI_I2S1_LOC,
84 	RTD1625_ISO_AO_I2S1_LOC,
85 	RTD1625_ISO_ETN_PHY_LOC,
86 	RTD1625_ISO_SPDIF_LOC,
87 	RTD1625_ISO_RGMII_VDSEL,
88 	RTD1625_ISO_CSI_VDSEL,
89 	RTD1625_ISO_SPDIF_IN_MODE,
90 };
91 
92 static const struct pinctrl_pin_desc rtd1625_iso_pins[] = {
93 	PINCTRL_PIN(RTD1625_ISO_GPIO_8, "gpio_8"),
94 	PINCTRL_PIN(RTD1625_ISO_GPIO_9, "gpio_9"),
95 	PINCTRL_PIN(RTD1625_ISO_GPIO_10, "gpio_10"),
96 	PINCTRL_PIN(RTD1625_ISO_GPIO_11, "gpio_11"),
97 	PINCTRL_PIN(RTD1625_ISO_USB_CC1, "usb_cc1"),
98 	PINCTRL_PIN(RTD1625_ISO_USB_CC2, "usb_cc2"),
99 	PINCTRL_PIN(RTD1625_ISO_GPIO_45, "gpio_45"),
100 	PINCTRL_PIN(RTD1625_ISO_GPIO_46, "gpio_46"),
101 	PINCTRL_PIN(RTD1625_ISO_GPIO_47, "gpio_47"),
102 	PINCTRL_PIN(RTD1625_ISO_GPIO_48, "gpio_48"),
103 	PINCTRL_PIN(RTD1625_ISO_GPIO_49, "gpio_49"),
104 	PINCTRL_PIN(RTD1625_ISO_GPIO_50, "gpio_50"),
105 	PINCTRL_PIN(RTD1625_ISO_GPIO_52, "gpio_52"),
106 	PINCTRL_PIN(RTD1625_ISO_GPIO_94, "gpio_94"),
107 	PINCTRL_PIN(RTD1625_ISO_GPIO_95, "gpio_95"),
108 	PINCTRL_PIN(RTD1625_ISO_GPIO_96, "gpio_96"),
109 	PINCTRL_PIN(RTD1625_ISO_GPIO_97, "gpio_97"),
110 	PINCTRL_PIN(RTD1625_ISO_GPIO_98, "gpio_98"),
111 	PINCTRL_PIN(RTD1625_ISO_GPIO_99, "gpio_99"),
112 	PINCTRL_PIN(RTD1625_ISO_GPIO_100, "gpio_100"),
113 	PINCTRL_PIN(RTD1625_ISO_GPIO_101, "gpio_101"),
114 	PINCTRL_PIN(RTD1625_ISO_GPIO_102, "gpio_102"),
115 	PINCTRL_PIN(RTD1625_ISO_GPIO_103, "gpio_103"),
116 	PINCTRL_PIN(RTD1625_ISO_GPIO_104, "gpio_104"),
117 	PINCTRL_PIN(RTD1625_ISO_GPIO_105, "gpio_105"),
118 	PINCTRL_PIN(RTD1625_ISO_GPIO_106, "gpio_106"),
119 	PINCTRL_PIN(RTD1625_ISO_GPIO_107, "gpio_107"),
120 	PINCTRL_PIN(RTD1625_ISO_GPIO_108, "gpio_108"),
121 	PINCTRL_PIN(RTD1625_ISO_GPIO_109, "gpio_109"),
122 	PINCTRL_PIN(RTD1625_ISO_GPIO_110, "gpio_110"),
123 	PINCTRL_PIN(RTD1625_ISO_GPIO_111, "gpio_111"),
124 	PINCTRL_PIN(RTD1625_ISO_GPIO_112, "gpio_112"),
125 	PINCTRL_PIN(RTD1625_ISO_GPIO_128, "gpio_128"),
126 	PINCTRL_PIN(RTD1625_ISO_GPIO_129, "gpio_129"),
127 	PINCTRL_PIN(RTD1625_ISO_GPIO_130, "gpio_130"),
128 	PINCTRL_PIN(RTD1625_ISO_GPIO_131, "gpio_131"),
129 	PINCTRL_PIN(RTD1625_ISO_GPIO_145, "gpio_145"),
130 	PINCTRL_PIN(RTD1625_ISO_GPIO_146, "gpio_146"),
131 	PINCTRL_PIN(RTD1625_ISO_GPIO_147, "gpio_147"),
132 	PINCTRL_PIN(RTD1625_ISO_GPIO_148, "gpio_148"),
133 	PINCTRL_PIN(RTD1625_ISO_GPIO_149, "gpio_149"),
134 	PINCTRL_PIN(RTD1625_ISO_GPIO_150, "gpio_150"),
135 	PINCTRL_PIN(RTD1625_ISO_GPIO_151, "gpio_151"),
136 	PINCTRL_PIN(RTD1625_ISO_GPIO_152, "gpio_152"),
137 	PINCTRL_PIN(RTD1625_ISO_GPIO_153, "gpio_153"),
138 	PINCTRL_PIN(RTD1625_ISO_GPIO_154, "gpio_154"),
139 	PINCTRL_PIN(RTD1625_ISO_GPIO_155, "gpio_155"),
140 	PINCTRL_PIN(RTD1625_ISO_GPIO_156, "gpio_156"),
141 	PINCTRL_PIN(RTD1625_ISO_GPIO_157, "gpio_157"),
142 	PINCTRL_PIN(RTD1625_ISO_GPIO_158, "gpio_158"),
143 	PINCTRL_PIN(RTD1625_ISO_GPIO_159, "gpio_159"),
144 	PINCTRL_PIN(RTD1625_ISO_GPIO_160, "gpio_160"),
145 	PINCTRL_PIN(RTD1625_ISO_GPIO_161, "gpio_161"),
146 	PINCTRL_PIN(RTD1625_ISO_GPIO_162, "gpio_162"),
147 	PINCTRL_PIN(RTD1625_ISO_GPIO_163, "gpio_163"),
148 	PINCTRL_PIN(RTD1625_ISO_HI_WIDTH, "hi_width"),
149 	PINCTRL_PIN(RTD1625_ISO_SF_EN, "sf_en"),
150 	PINCTRL_PIN(RTD1625_ISO_ARM_TRACE_DBG_EN, "arm_trace_dbg_en"),
151 	PINCTRL_PIN(RTD1625_ISO_EJTAG_AUCPU0_LOC, "ejtag_aucpu0_loc"),
152 	PINCTRL_PIN(RTD1625_ISO_EJTAG_AUCPU1_LOC, "ejtag_aucpu1_loc"),
153 	PINCTRL_PIN(RTD1625_ISO_EJTAG_VE2_LOC, "ejtag_ve2_loc"),
154 	PINCTRL_PIN(RTD1625_ISO_EJTAG_SCPU_LOC, "ejtag_scpu_loc"),
155 	PINCTRL_PIN(RTD1625_ISO_EJTAG_PCPU_LOC, "ejtag_pcpu_loc"),
156 	PINCTRL_PIN(RTD1625_ISO_EJTAG_ACPU_LOC, "ejtag_acpu_loc"),
157 	PINCTRL_PIN(RTD1625_ISO_I2C6_LOC, "i2c6_loc"),
158 	PINCTRL_PIN(RTD1625_ISO_UART0_LOC, "uart0_loc"),
159 	PINCTRL_PIN(RTD1625_ISO_AI_I2S1_LOC, "ai_i2s1_loc"),
160 	PINCTRL_PIN(RTD1625_ISO_AO_I2S1_LOC, "ao_i2s1_loc"),
161 	PINCTRL_PIN(RTD1625_ISO_ETN_PHY_LOC, "etn_phy_loc"),
162 	PINCTRL_PIN(RTD1625_ISO_SPDIF_LOC, "spdif_loc"),
163 	PINCTRL_PIN(RTD1625_ISO_RGMII_VDSEL, "rgmii_vdsel"),
164 	PINCTRL_PIN(RTD1625_ISO_CSI_VDSEL, "csi_vdsel"),
165 	PINCTRL_PIN(RTD1625_ISO_SPDIF_IN_MODE, "spdif_in_mode"),
166 };
167 
168 enum rtd1625_isom_pins_enum {
169 	RTD1625_ISOM_GPIO_0 = 0,
170 	RTD1625_ISOM_GPIO_1,
171 	RTD1625_ISOM_GPIO_28,
172 	RTD1625_ISOM_GPIO_29,
173 	RTD1625_ISOM_IR_RX_LOC,
174 };
175 
176 static const struct pinctrl_pin_desc rtd1625_isom_pins[] = {
177 	PINCTRL_PIN(RTD1625_ISOM_GPIO_0, "gpio_0"),
178 	PINCTRL_PIN(RTD1625_ISOM_GPIO_1, "gpio_1"),
179 	PINCTRL_PIN(RTD1625_ISOM_GPIO_28, "gpio_28"),
180 	PINCTRL_PIN(RTD1625_ISOM_GPIO_29, "gpio_29"),
181 	PINCTRL_PIN(RTD1625_ISOM_IR_RX_LOC, "ir_rx_loc"),
182 };
183 
184 enum rtd1625_ve4_pins_enum {
185 	RTD1625_VE4_GPIO_2 = 0,
186 	RTD1625_VE4_GPIO_3,
187 	RTD1625_VE4_GPIO_4,
188 	RTD1625_VE4_GPIO_5,
189 	RTD1625_VE4_GPIO_6,
190 	RTD1625_VE4_GPIO_7,
191 	RTD1625_VE4_GPIO_12,
192 	RTD1625_VE4_GPIO_13,
193 	RTD1625_VE4_GPIO_16,
194 	RTD1625_VE4_GPIO_17,
195 	RTD1625_VE4_GPIO_18,
196 	RTD1625_VE4_GPIO_19,
197 	RTD1625_VE4_GPIO_23,
198 	RTD1625_VE4_GPIO_24,
199 	RTD1625_VE4_GPIO_25,
200 	RTD1625_VE4_GPIO_30,
201 	RTD1625_VE4_GPIO_31,
202 	RTD1625_VE4_GPIO_32,
203 	RTD1625_VE4_GPIO_33,
204 	RTD1625_VE4_GPIO_34,
205 	RTD1625_VE4_GPIO_35,
206 	RTD1625_VE4_GPIO_42,
207 	RTD1625_VE4_GPIO_43,
208 	RTD1625_VE4_GPIO_44,
209 	RTD1625_VE4_GPIO_51,
210 	RTD1625_VE4_GPIO_53,
211 	RTD1625_VE4_GPIO_54,
212 	RTD1625_VE4_GPIO_55,
213 	RTD1625_VE4_GPIO_56,
214 	RTD1625_VE4_GPIO_57,
215 	RTD1625_VE4_GPIO_58,
216 	RTD1625_VE4_GPIO_59,
217 	RTD1625_VE4_GPIO_60,
218 	RTD1625_VE4_GPIO_61,
219 	RTD1625_VE4_GPIO_62,
220 	RTD1625_VE4_GPIO_63,
221 	RTD1625_VE4_GPIO_92,
222 	RTD1625_VE4_GPIO_93,
223 	RTD1625_VE4_GPIO_132,
224 	RTD1625_VE4_GPIO_133,
225 	RTD1625_VE4_GPIO_134,
226 	RTD1625_VE4_GPIO_135,
227 	RTD1625_VE4_GPIO_136,
228 	RTD1625_VE4_GPIO_137,
229 	RTD1625_VE4_GPIO_138,
230 	RTD1625_VE4_GPIO_139,
231 	RTD1625_VE4_GPIO_140,
232 	RTD1625_VE4_GPIO_141,
233 	RTD1625_VE4_GPIO_142,
234 	RTD1625_VE4_GPIO_143,
235 	RTD1625_VE4_GPIO_144,
236 	RTD1625_VE4_GPIO_164,
237 	RTD1625_VE4_GPIO_165,
238 	RTD1625_VE4_UART_LOC,
239 };
240 
241 static const struct pinctrl_pin_desc rtd1625_ve4_pins[] = {
242 	PINCTRL_PIN(RTD1625_VE4_GPIO_2, "gpio_2"),
243 	PINCTRL_PIN(RTD1625_VE4_GPIO_3, "gpio_3"),
244 	PINCTRL_PIN(RTD1625_VE4_GPIO_4, "gpio_4"),
245 	PINCTRL_PIN(RTD1625_VE4_GPIO_5, "gpio_5"),
246 	PINCTRL_PIN(RTD1625_VE4_GPIO_6, "gpio_6"),
247 	PINCTRL_PIN(RTD1625_VE4_GPIO_7, "gpio_7"),
248 	PINCTRL_PIN(RTD1625_VE4_GPIO_12, "gpio_12"),
249 	PINCTRL_PIN(RTD1625_VE4_GPIO_13, "gpio_13"),
250 	PINCTRL_PIN(RTD1625_VE4_GPIO_16, "gpio_16"),
251 	PINCTRL_PIN(RTD1625_VE4_GPIO_17, "gpio_17"),
252 	PINCTRL_PIN(RTD1625_VE4_GPIO_18, "gpio_18"),
253 	PINCTRL_PIN(RTD1625_VE4_GPIO_19, "gpio_19"),
254 	PINCTRL_PIN(RTD1625_VE4_GPIO_23, "gpio_23"),
255 	PINCTRL_PIN(RTD1625_VE4_GPIO_24, "gpio_24"),
256 	PINCTRL_PIN(RTD1625_VE4_GPIO_25, "gpio_25"),
257 	PINCTRL_PIN(RTD1625_VE4_GPIO_30, "gpio_30"),
258 	PINCTRL_PIN(RTD1625_VE4_GPIO_31, "gpio_31"),
259 	PINCTRL_PIN(RTD1625_VE4_GPIO_32, "gpio_32"),
260 	PINCTRL_PIN(RTD1625_VE4_GPIO_33, "gpio_33"),
261 	PINCTRL_PIN(RTD1625_VE4_GPIO_34, "gpio_34"),
262 	PINCTRL_PIN(RTD1625_VE4_GPIO_35, "gpio_35"),
263 	PINCTRL_PIN(RTD1625_VE4_GPIO_42, "gpio_42"),
264 	PINCTRL_PIN(RTD1625_VE4_GPIO_43, "gpio_43"),
265 	PINCTRL_PIN(RTD1625_VE4_GPIO_44, "gpio_44"),
266 	PINCTRL_PIN(RTD1625_VE4_GPIO_51, "gpio_51"),
267 	PINCTRL_PIN(RTD1625_VE4_GPIO_53, "gpio_53"),
268 	PINCTRL_PIN(RTD1625_VE4_GPIO_54, "gpio_54"),
269 	PINCTRL_PIN(RTD1625_VE4_GPIO_55, "gpio_55"),
270 	PINCTRL_PIN(RTD1625_VE4_GPIO_56, "gpio_56"),
271 	PINCTRL_PIN(RTD1625_VE4_GPIO_57, "gpio_57"),
272 	PINCTRL_PIN(RTD1625_VE4_GPIO_58, "gpio_58"),
273 	PINCTRL_PIN(RTD1625_VE4_GPIO_59, "gpio_59"),
274 	PINCTRL_PIN(RTD1625_VE4_GPIO_60, "gpio_60"),
275 	PINCTRL_PIN(RTD1625_VE4_GPIO_61, "gpio_61"),
276 	PINCTRL_PIN(RTD1625_VE4_GPIO_62, "gpio_62"),
277 	PINCTRL_PIN(RTD1625_VE4_GPIO_63, "gpio_63"),
278 	PINCTRL_PIN(RTD1625_VE4_GPIO_92, "gpio_92"),
279 	PINCTRL_PIN(RTD1625_VE4_GPIO_93, "gpio_93"),
280 	PINCTRL_PIN(RTD1625_VE4_GPIO_132, "gpio_132"),
281 	PINCTRL_PIN(RTD1625_VE4_GPIO_133, "gpio_133"),
282 	PINCTRL_PIN(RTD1625_VE4_GPIO_134, "gpio_134"),
283 	PINCTRL_PIN(RTD1625_VE4_GPIO_135, "gpio_135"),
284 	PINCTRL_PIN(RTD1625_VE4_GPIO_136, "gpio_136"),
285 	PINCTRL_PIN(RTD1625_VE4_GPIO_137, "gpio_137"),
286 	PINCTRL_PIN(RTD1625_VE4_GPIO_138, "gpio_138"),
287 	PINCTRL_PIN(RTD1625_VE4_GPIO_139, "gpio_139"),
288 	PINCTRL_PIN(RTD1625_VE4_GPIO_140, "gpio_140"),
289 	PINCTRL_PIN(RTD1625_VE4_GPIO_141, "gpio_141"),
290 	PINCTRL_PIN(RTD1625_VE4_GPIO_142, "gpio_142"),
291 	PINCTRL_PIN(RTD1625_VE4_GPIO_143, "gpio_143"),
292 	PINCTRL_PIN(RTD1625_VE4_GPIO_144, "gpio_144"),
293 	PINCTRL_PIN(RTD1625_VE4_GPIO_164, "gpio_164"),
294 	PINCTRL_PIN(RTD1625_VE4_GPIO_165, "gpio_165"),
295 	PINCTRL_PIN(RTD1625_VE4_UART_LOC, "ve4_uart_loc"),
296 };
297 
298 enum rtd1625_main2_pins_enum {
299 	RTD1625_MAIN2_GPIO_14 = 0,
300 	RTD1625_MAIN2_GPIO_15,
301 	RTD1625_MAIN2_GPIO_20,
302 	RTD1625_MAIN2_GPIO_21,
303 	RTD1625_MAIN2_GPIO_22,
304 	RTD1625_MAIN2_HIF_DATA,
305 	RTD1625_MAIN2_HIF_EN,
306 	RTD1625_MAIN2_HIF_RDY,
307 	RTD1625_MAIN2_HIF_CLK,
308 	RTD1625_MAIN2_GPIO_40,
309 	RTD1625_MAIN2_GPIO_41,
310 	RTD1625_MAIN2_GPIO_64,
311 	RTD1625_MAIN2_GPIO_65,
312 	RTD1625_MAIN2_GPIO_66,
313 	RTD1625_MAIN2_GPIO_67,
314 	RTD1625_MAIN2_EMMC_DATA_0,
315 	RTD1625_MAIN2_EMMC_DATA_1,
316 	RTD1625_MAIN2_EMMC_DATA_2,
317 	RTD1625_MAIN2_EMMC_DATA_3,
318 	RTD1625_MAIN2_EMMC_DATA_4,
319 	RTD1625_MAIN2_EMMC_DATA_5,
320 	RTD1625_MAIN2_EMMC_DATA_6,
321 	RTD1625_MAIN2_EMMC_DATA_7,
322 	RTD1625_MAIN2_EMMC_RST_N,
323 	RTD1625_MAIN2_EMMC_CMD,
324 	RTD1625_MAIN2_EMMC_CLK,
325 	RTD1625_MAIN2_EMMC_DD_SB,
326 	RTD1625_MAIN2_GPIO_80,
327 	RTD1625_MAIN2_GPIO_81,
328 	RTD1625_MAIN2_GPIO_82,
329 	RTD1625_MAIN2_GPIO_83,
330 	RTD1625_MAIN2_GPIO_84,
331 	RTD1625_MAIN2_GPIO_85,
332 	RTD1625_MAIN2_GPIO_86,
333 	RTD1625_MAIN2_GPIO_87,
334 	RTD1625_MAIN2_GPIO_88,
335 	RTD1625_MAIN2_GPIO_89,
336 	RTD1625_MAIN2_GPIO_90,
337 	RTD1625_MAIN2_GPIO_91,
338 };
339 
340 static const struct pinctrl_pin_desc rtd1625_main2_pins[] = {
341 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_14, "gpio_14"),
342 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_15, "gpio_15"),
343 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_20, "gpio_20"),
344 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_21, "gpio_21"),
345 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_22, "gpio_22"),
346 	PINCTRL_PIN(RTD1625_MAIN2_HIF_DATA, "hif_data"),
347 	PINCTRL_PIN(RTD1625_MAIN2_HIF_EN, "hif_en"),
348 	PINCTRL_PIN(RTD1625_MAIN2_HIF_RDY, "hif_rdy"),
349 	PINCTRL_PIN(RTD1625_MAIN2_HIF_CLK, "hif_clk"),
350 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_40, "gpio_40"),
351 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_41, "gpio_41"),
352 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_64, "gpio_64"),
353 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_65, "gpio_65"),
354 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_66, "gpio_66"),
355 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_67, "gpio_67"),
356 	PINCTRL_PIN(RTD1625_MAIN2_EMMC_DATA_0, "emmc_data_0"),
357 	PINCTRL_PIN(RTD1625_MAIN2_EMMC_DATA_1, "emmc_data_1"),
358 	PINCTRL_PIN(RTD1625_MAIN2_EMMC_DATA_2, "emmc_data_2"),
359 	PINCTRL_PIN(RTD1625_MAIN2_EMMC_DATA_3, "emmc_data_3"),
360 	PINCTRL_PIN(RTD1625_MAIN2_EMMC_DATA_4, "emmc_data_4"),
361 	PINCTRL_PIN(RTD1625_MAIN2_EMMC_DATA_5, "emmc_data_5"),
362 	PINCTRL_PIN(RTD1625_MAIN2_EMMC_DATA_6, "emmc_data_6"),
363 	PINCTRL_PIN(RTD1625_MAIN2_EMMC_DATA_7, "emmc_data_7"),
364 	PINCTRL_PIN(RTD1625_MAIN2_EMMC_RST_N, "emmc_rst_n"),
365 	PINCTRL_PIN(RTD1625_MAIN2_EMMC_CMD, "emmc_cmd"),
366 	PINCTRL_PIN(RTD1625_MAIN2_EMMC_CLK, "emmc_clk"),
367 	PINCTRL_PIN(RTD1625_MAIN2_EMMC_DD_SB, "emmc_dd_sb"),
368 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_80, "gpio_80"),
369 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_81, "gpio_81"),
370 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_82, "gpio_82"),
371 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_83, "gpio_83"),
372 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_84, "gpio_84"),
373 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_85, "gpio_85"),
374 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_86, "gpio_86"),
375 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_87, "gpio_87"),
376 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_88, "gpio_88"),
377 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_89, "gpio_89"),
378 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_90, "gpio_90"),
379 	PINCTRL_PIN(RTD1625_MAIN2_GPIO_91, "gpio_91"),
380 };
381 
382 #define DECLARE_RTD1625_PIN(_pin, _name) \
383 	static const unsigned int rtd1625_##_name##_pins[] = { _pin }
384 
385 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_8, gpio_8);
386 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_9, gpio_9);
387 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_10, gpio_10);
388 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_11, gpio_11);
389 DECLARE_RTD1625_PIN(RTD1625_ISO_USB_CC1, usb_cc1);
390 DECLARE_RTD1625_PIN(RTD1625_ISO_USB_CC2, usb_cc2);
391 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_45, gpio_45);
392 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_46, gpio_46);
393 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_47, gpio_47);
394 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_48, gpio_48);
395 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_49, gpio_49);
396 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_50, gpio_50);
397 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_52, gpio_52);
398 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_94, gpio_94);
399 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_95, gpio_95);
400 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_96, gpio_96);
401 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_97, gpio_97);
402 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_98, gpio_98);
403 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_99, gpio_99);
404 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_100, gpio_100);
405 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_101, gpio_101);
406 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_102, gpio_102);
407 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_103, gpio_103);
408 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_104, gpio_104);
409 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_105, gpio_105);
410 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_106, gpio_106);
411 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_107, gpio_107);
412 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_108, gpio_108);
413 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_109, gpio_109);
414 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_110, gpio_110);
415 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_111, gpio_111);
416 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_112, gpio_112);
417 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_128, gpio_128);
418 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_129, gpio_129);
419 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_130, gpio_130);
420 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_131, gpio_131);
421 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_145, gpio_145);
422 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_146, gpio_146);
423 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_147, gpio_147);
424 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_148, gpio_148);
425 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_149, gpio_149);
426 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_150, gpio_150);
427 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_151, gpio_151);
428 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_152, gpio_152);
429 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_153, gpio_153);
430 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_154, gpio_154);
431 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_155, gpio_155);
432 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_156, gpio_156);
433 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_157, gpio_157);
434 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_158, gpio_158);
435 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_159, gpio_159);
436 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_160, gpio_160);
437 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_161, gpio_161);
438 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_162, gpio_162);
439 DECLARE_RTD1625_PIN(RTD1625_ISO_GPIO_163, gpio_163);
440 
441 DECLARE_RTD1625_PIN(RTD1625_ISO_HI_WIDTH, hi_width);
442 DECLARE_RTD1625_PIN(RTD1625_ISO_SF_EN, sf_en);
443 DECLARE_RTD1625_PIN(RTD1625_ISO_ARM_TRACE_DBG_EN, arm_trace_dbg_en);
444 DECLARE_RTD1625_PIN(RTD1625_ISO_EJTAG_AUCPU0_LOC, ejtag_aucpu0_loc);
445 DECLARE_RTD1625_PIN(RTD1625_ISO_EJTAG_AUCPU1_LOC, ejtag_aucpu1_loc);
446 DECLARE_RTD1625_PIN(RTD1625_ISO_EJTAG_VE2_LOC, ejtag_ve2_loc);
447 DECLARE_RTD1625_PIN(RTD1625_ISO_EJTAG_SCPU_LOC, ejtag_scpu_loc);
448 DECLARE_RTD1625_PIN(RTD1625_ISO_EJTAG_PCPU_LOC, ejtag_pcpu_loc);
449 DECLARE_RTD1625_PIN(RTD1625_ISO_EJTAG_ACPU_LOC, ejtag_acpu_loc);
450 
451 DECLARE_RTD1625_PIN(RTD1625_ISO_I2C6_LOC, i2c6_loc);
452 DECLARE_RTD1625_PIN(RTD1625_ISO_UART0_LOC, uart0_loc);
453 DECLARE_RTD1625_PIN(RTD1625_ISO_AI_I2S1_LOC, ai_i2s1_loc);
454 DECLARE_RTD1625_PIN(RTD1625_ISO_AO_I2S1_LOC, ao_i2s1_loc);
455 DECLARE_RTD1625_PIN(RTD1625_ISO_ETN_PHY_LOC, etn_phy_loc);
456 DECLARE_RTD1625_PIN(RTD1625_ISO_SPDIF_LOC, spdif_loc);
457 DECLARE_RTD1625_PIN(RTD1625_ISO_RGMII_VDSEL, rgmii_vdsel);
458 DECLARE_RTD1625_PIN(RTD1625_ISO_CSI_VDSEL, csi_vdsel);
459 DECLARE_RTD1625_PIN(RTD1625_ISO_SPDIF_IN_MODE, spdif_in_mode);
460 
461 DECLARE_RTD1625_PIN(RTD1625_ISOM_GPIO_0, gpio_0);
462 DECLARE_RTD1625_PIN(RTD1625_ISOM_GPIO_1, gpio_1);
463 DECLARE_RTD1625_PIN(RTD1625_ISOM_GPIO_28, gpio_28);
464 DECLARE_RTD1625_PIN(RTD1625_ISOM_GPIO_29, gpio_29);
465 DECLARE_RTD1625_PIN(RTD1625_ISOM_IR_RX_LOC, ir_rx_loc);
466 
467 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_2, gpio_2);
468 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_3, gpio_3);
469 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_4, gpio_4);
470 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_5, gpio_5);
471 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_6, gpio_6);
472 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_7, gpio_7);
473 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_12, gpio_12);
474 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_13, gpio_13);
475 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_16, gpio_16);
476 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_17, gpio_17);
477 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_18, gpio_18);
478 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_19, gpio_19);
479 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_23, gpio_23);
480 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_24, gpio_24);
481 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_25, gpio_25);
482 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_30, gpio_30);
483 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_31, gpio_31);
484 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_32, gpio_32);
485 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_33, gpio_33);
486 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_34, gpio_34);
487 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_35, gpio_35);
488 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_42, gpio_42);
489 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_43, gpio_43);
490 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_44, gpio_44);
491 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_51, gpio_51);
492 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_53, gpio_53);
493 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_54, gpio_54);
494 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_55, gpio_55);
495 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_56, gpio_56);
496 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_57, gpio_57);
497 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_58, gpio_58);
498 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_59, gpio_59);
499 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_60, gpio_60);
500 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_61, gpio_61);
501 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_62, gpio_62);
502 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_63, gpio_63);
503 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_92, gpio_92);
504 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_93, gpio_93);
505 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_132, gpio_132);
506 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_133, gpio_133);
507 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_134, gpio_134);
508 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_135, gpio_135);
509 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_136, gpio_136);
510 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_137, gpio_137);
511 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_138, gpio_138);
512 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_139, gpio_139);
513 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_140, gpio_140);
514 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_141, gpio_141);
515 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_142, gpio_142);
516 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_143, gpio_143);
517 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_144, gpio_144);
518 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_164, gpio_164);
519 DECLARE_RTD1625_PIN(RTD1625_VE4_GPIO_165, gpio_165);
520 DECLARE_RTD1625_PIN(RTD1625_VE4_UART_LOC, ve4_uart_loc);
521 
522 DECLARE_RTD1625_PIN(RTD1625_MAIN2_EMMC_RST_N, emmc_rst_n);
523 DECLARE_RTD1625_PIN(RTD1625_MAIN2_EMMC_DD_SB, emmc_dd_sb);
524 DECLARE_RTD1625_PIN(RTD1625_MAIN2_EMMC_CLK, emmc_clk);
525 DECLARE_RTD1625_PIN(RTD1625_MAIN2_EMMC_CMD, emmc_cmd);
526 DECLARE_RTD1625_PIN(RTD1625_MAIN2_EMMC_DATA_0, emmc_data_0);
527 DECLARE_RTD1625_PIN(RTD1625_MAIN2_EMMC_DATA_1, emmc_data_1);
528 DECLARE_RTD1625_PIN(RTD1625_MAIN2_EMMC_DATA_2, emmc_data_2);
529 DECLARE_RTD1625_PIN(RTD1625_MAIN2_EMMC_DATA_3, emmc_data_3);
530 DECLARE_RTD1625_PIN(RTD1625_MAIN2_EMMC_DATA_4, emmc_data_4);
531 DECLARE_RTD1625_PIN(RTD1625_MAIN2_EMMC_DATA_5, emmc_data_5);
532 DECLARE_RTD1625_PIN(RTD1625_MAIN2_EMMC_DATA_6, emmc_data_6);
533 DECLARE_RTD1625_PIN(RTD1625_MAIN2_EMMC_DATA_7, emmc_data_7);
534 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_14, gpio_14);
535 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_15, gpio_15);
536 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_20, gpio_20);
537 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_21, gpio_21);
538 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_22, gpio_22);
539 DECLARE_RTD1625_PIN(RTD1625_MAIN2_HIF_DATA, hif_data);
540 DECLARE_RTD1625_PIN(RTD1625_MAIN2_HIF_EN, hif_en);
541 DECLARE_RTD1625_PIN(RTD1625_MAIN2_HIF_RDY, hif_rdy);
542 DECLARE_RTD1625_PIN(RTD1625_MAIN2_HIF_CLK, hif_clk);
543 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_40, gpio_40);
544 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_41, gpio_41);
545 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_64, gpio_64);
546 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_65, gpio_65);
547 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_66, gpio_66);
548 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_67, gpio_67);
549 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_80, gpio_80);
550 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_81, gpio_81);
551 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_82, gpio_82);
552 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_83, gpio_83);
553 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_84, gpio_84);
554 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_85, gpio_85);
555 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_86, gpio_86);
556 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_87, gpio_87);
557 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_88, gpio_88);
558 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_89, gpio_89);
559 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_90, gpio_90);
560 DECLARE_RTD1625_PIN(RTD1625_MAIN2_GPIO_91, gpio_91);
561 
562 #define RTD1625_GROUP(_name) \
563 	{ \
564 		.name = # _name, \
565 		.pins = rtd1625_ ## _name ## _pins, \
566 		.num_pins = ARRAY_SIZE(rtd1625_ ## _name ## _pins), \
567 	}
568 
569 static const struct rtd_pin_group_desc rtd1625_iso_pin_groups[] = {
570 	RTD1625_GROUP(gpio_8),
571 	RTD1625_GROUP(gpio_9),
572 	RTD1625_GROUP(gpio_10),
573 	RTD1625_GROUP(gpio_11),
574 	RTD1625_GROUP(usb_cc1),
575 	RTD1625_GROUP(usb_cc2),
576 	RTD1625_GROUP(gpio_45),
577 	RTD1625_GROUP(gpio_46),
578 	RTD1625_GROUP(gpio_47),
579 	RTD1625_GROUP(gpio_48),
580 	RTD1625_GROUP(gpio_49),
581 	RTD1625_GROUP(gpio_50),
582 	RTD1625_GROUP(gpio_52),
583 	RTD1625_GROUP(gpio_94),
584 	RTD1625_GROUP(gpio_95),
585 	RTD1625_GROUP(gpio_96),
586 	RTD1625_GROUP(gpio_97),
587 	RTD1625_GROUP(gpio_98),
588 	RTD1625_GROUP(gpio_99),
589 	RTD1625_GROUP(gpio_100),
590 	RTD1625_GROUP(gpio_101),
591 	RTD1625_GROUP(gpio_102),
592 	RTD1625_GROUP(gpio_103),
593 	RTD1625_GROUP(gpio_104),
594 	RTD1625_GROUP(gpio_105),
595 	RTD1625_GROUP(gpio_106),
596 	RTD1625_GROUP(gpio_107),
597 	RTD1625_GROUP(gpio_108),
598 	RTD1625_GROUP(gpio_109),
599 	RTD1625_GROUP(gpio_110),
600 	RTD1625_GROUP(gpio_111),
601 	RTD1625_GROUP(gpio_112),
602 	RTD1625_GROUP(gpio_128),
603 	RTD1625_GROUP(gpio_129),
604 	RTD1625_GROUP(gpio_130),
605 	RTD1625_GROUP(gpio_131),
606 	RTD1625_GROUP(gpio_145),
607 	RTD1625_GROUP(gpio_146),
608 	RTD1625_GROUP(gpio_147),
609 	RTD1625_GROUP(gpio_148),
610 	RTD1625_GROUP(gpio_149),
611 	RTD1625_GROUP(gpio_150),
612 	RTD1625_GROUP(gpio_151),
613 	RTD1625_GROUP(gpio_152),
614 	RTD1625_GROUP(gpio_153),
615 	RTD1625_GROUP(gpio_154),
616 	RTD1625_GROUP(gpio_155),
617 	RTD1625_GROUP(gpio_156),
618 	RTD1625_GROUP(gpio_157),
619 	RTD1625_GROUP(gpio_158),
620 	RTD1625_GROUP(gpio_159),
621 	RTD1625_GROUP(gpio_160),
622 	RTD1625_GROUP(gpio_161),
623 	RTD1625_GROUP(gpio_162),
624 	RTD1625_GROUP(gpio_163),
625 	RTD1625_GROUP(hi_width),
626 	RTD1625_GROUP(sf_en),
627 	RTD1625_GROUP(arm_trace_dbg_en),
628 	RTD1625_GROUP(ejtag_aucpu0_loc),
629 	RTD1625_GROUP(ejtag_aucpu1_loc),
630 	RTD1625_GROUP(ejtag_ve2_loc),
631 	RTD1625_GROUP(ejtag_scpu_loc),
632 	RTD1625_GROUP(ejtag_pcpu_loc),
633 	RTD1625_GROUP(ejtag_acpu_loc),
634 	RTD1625_GROUP(i2c6_loc),
635 	RTD1625_GROUP(uart0_loc),
636 	RTD1625_GROUP(ai_i2s1_loc),
637 	RTD1625_GROUP(ao_i2s1_loc),
638 	RTD1625_GROUP(etn_phy_loc),
639 	RTD1625_GROUP(spdif_loc),
640 	RTD1625_GROUP(rgmii_vdsel),
641 	RTD1625_GROUP(csi_vdsel),
642 	RTD1625_GROUP(spdif_in_mode),
643 };
644 
645 static const struct rtd_pin_group_desc rtd1625_isom_pin_groups[] = {
646 	RTD1625_GROUP(gpio_0),
647 	RTD1625_GROUP(gpio_1),
648 	RTD1625_GROUP(gpio_28),
649 	RTD1625_GROUP(gpio_29),
650 	RTD1625_GROUP(ir_rx_loc),
651 };
652 
653 static const struct rtd_pin_group_desc rtd1625_ve4_pin_groups[] = {
654 	RTD1625_GROUP(gpio_2),
655 	RTD1625_GROUP(gpio_3),
656 	RTD1625_GROUP(gpio_4),
657 	RTD1625_GROUP(gpio_5),
658 	RTD1625_GROUP(gpio_6),
659 	RTD1625_GROUP(gpio_7),
660 	RTD1625_GROUP(gpio_12),
661 	RTD1625_GROUP(gpio_13),
662 	RTD1625_GROUP(gpio_16),
663 	RTD1625_GROUP(gpio_17),
664 	RTD1625_GROUP(gpio_18),
665 	RTD1625_GROUP(gpio_19),
666 	RTD1625_GROUP(gpio_23),
667 	RTD1625_GROUP(gpio_24),
668 	RTD1625_GROUP(gpio_25),
669 	RTD1625_GROUP(gpio_30),
670 	RTD1625_GROUP(gpio_31),
671 	RTD1625_GROUP(gpio_32),
672 	RTD1625_GROUP(gpio_33),
673 	RTD1625_GROUP(gpio_34),
674 	RTD1625_GROUP(gpio_35),
675 	RTD1625_GROUP(gpio_42),
676 	RTD1625_GROUP(gpio_43),
677 	RTD1625_GROUP(gpio_44),
678 	RTD1625_GROUP(gpio_51),
679 	RTD1625_GROUP(gpio_53),
680 	RTD1625_GROUP(gpio_54),
681 	RTD1625_GROUP(gpio_55),
682 	RTD1625_GROUP(gpio_56),
683 	RTD1625_GROUP(gpio_57),
684 	RTD1625_GROUP(gpio_58),
685 	RTD1625_GROUP(gpio_59),
686 	RTD1625_GROUP(gpio_60),
687 	RTD1625_GROUP(gpio_61),
688 	RTD1625_GROUP(gpio_62),
689 	RTD1625_GROUP(gpio_63),
690 	RTD1625_GROUP(gpio_92),
691 	RTD1625_GROUP(gpio_93),
692 	RTD1625_GROUP(gpio_132),
693 	RTD1625_GROUP(gpio_133),
694 	RTD1625_GROUP(gpio_134),
695 	RTD1625_GROUP(gpio_135),
696 	RTD1625_GROUP(gpio_136),
697 	RTD1625_GROUP(gpio_137),
698 	RTD1625_GROUP(gpio_138),
699 	RTD1625_GROUP(gpio_139),
700 	RTD1625_GROUP(gpio_140),
701 	RTD1625_GROUP(gpio_141),
702 	RTD1625_GROUP(gpio_142),
703 	RTD1625_GROUP(gpio_143),
704 	RTD1625_GROUP(gpio_144),
705 	RTD1625_GROUP(gpio_164),
706 	RTD1625_GROUP(gpio_165),
707 	RTD1625_GROUP(ve4_uart_loc),
708 };
709 
710 static const struct rtd_pin_group_desc rtd1625_main2_pin_groups[] = {
711 	RTD1625_GROUP(gpio_14),
712 	RTD1625_GROUP(gpio_15),
713 	RTD1625_GROUP(gpio_20),
714 	RTD1625_GROUP(gpio_21),
715 	RTD1625_GROUP(gpio_22),
716 	RTD1625_GROUP(hif_data),
717 	RTD1625_GROUP(hif_en),
718 	RTD1625_GROUP(hif_rdy),
719 	RTD1625_GROUP(hif_clk),
720 	RTD1625_GROUP(gpio_40),
721 	RTD1625_GROUP(gpio_41),
722 	RTD1625_GROUP(gpio_64),
723 	RTD1625_GROUP(gpio_65),
724 	RTD1625_GROUP(gpio_66),
725 	RTD1625_GROUP(gpio_67),
726 	RTD1625_GROUP(emmc_data_0),
727 	RTD1625_GROUP(emmc_data_1),
728 	RTD1625_GROUP(emmc_data_2),
729 	RTD1625_GROUP(emmc_data_3),
730 	RTD1625_GROUP(emmc_data_4),
731 	RTD1625_GROUP(emmc_data_5),
732 	RTD1625_GROUP(emmc_data_6),
733 	RTD1625_GROUP(emmc_data_7),
734 	RTD1625_GROUP(emmc_rst_n),
735 	RTD1625_GROUP(emmc_cmd),
736 	RTD1625_GROUP(emmc_clk),
737 	RTD1625_GROUP(emmc_dd_sb),
738 	RTD1625_GROUP(gpio_80),
739 	RTD1625_GROUP(gpio_81),
740 	RTD1625_GROUP(gpio_82),
741 	RTD1625_GROUP(gpio_83),
742 	RTD1625_GROUP(gpio_84),
743 	RTD1625_GROUP(gpio_85),
744 	RTD1625_GROUP(gpio_86),
745 	RTD1625_GROUP(gpio_87),
746 	RTD1625_GROUP(gpio_88),
747 	RTD1625_GROUP(gpio_89),
748 	RTD1625_GROUP(gpio_90),
749 	RTD1625_GROUP(gpio_91),
750 };
751 
752 static const char * const rtd1625_iso_gpio_groups[] = {
753 	"gpio_10", "gpio_100", "gpio_101", "gpio_102", "gpio_103", "gpio_104",
754 	"gpio_105", "gpio_106", "gpio_107", "gpio_108", "gpio_109", "gpio_11",
755 	"gpio_110", "gpio_111", "gpio_112", "gpio_128", "gpio_129", "gpio_130",
756 	"gpio_131", "gpio_145", "gpio_146", "gpio_147", "gpio_148", "gpio_149",
757 	"gpio_150", "gpio_151", "gpio_152", "gpio_153", "gpio_154", "gpio_155",
758 	"gpio_156", "gpio_157", "gpio_158", "gpio_159", "gpio_160", "gpio_161",
759 	"gpio_162", "gpio_163", "gpio_45", "gpio_46", "gpio_47", "gpio_48",
760 	"gpio_49", "gpio_50", "gpio_52", "gpio_8", "gpio_9", "gpio_94", "gpio_95",
761 	"gpio_96", "gpio_97", "gpio_98", "gpio_99", "usb_cc1", "usb_cc2"
762 };
763 
764 static const char * const rtd1625_iso_uart1_groups[] = {
765 	"gpio_10", "gpio_11", "gpio_8", "gpio_9"
766 };
767 
768 static const char * const rtd1625_iso_iso_tristate_groups[] = {
769 	"gpio_10", "gpio_100", "gpio_101", "gpio_102", "gpio_103", "gpio_104",
770 	"gpio_105", "gpio_106", "gpio_107", "gpio_108", "gpio_109", "gpio_11",
771 	"gpio_110", "gpio_111", "gpio_112", "gpio_128", "gpio_129", "gpio_130",
772 	"gpio_131", "gpio_145", "gpio_146", "gpio_147", "gpio_148", "gpio_149",
773 	"gpio_150", "gpio_151", "gpio_152", "gpio_153", "gpio_154", "gpio_155",
774 	"gpio_156", "gpio_157", "gpio_158", "gpio_159", "gpio_160", "gpio_161",
775 	"gpio_162", "gpio_163", "gpio_45", "gpio_46", "gpio_47", "gpio_48",
776 	"gpio_49", "gpio_50", "gpio_52", "gpio_8", "gpio_9", "gpio_94", "gpio_95",
777 	"gpio_96", "gpio_97", "gpio_98", "gpio_99", "usb_cc1", "usb_cc2"
778 };
779 
780 static const char * const rtd1625_iso_usb_cc1_groups[] = {
781 	"usb_cc1"
782 };
783 
784 static const char * const rtd1625_iso_usb_cc2_groups[] = {
785 	"usb_cc2"
786 };
787 
788 static const char * const rtd1625_iso_sdio_groups[] = {
789 	"gpio_45", "gpio_46", "gpio_47", "gpio_48", "gpio_49", "gpio_50"
790 };
791 
792 static const char * const rtd1625_iso_scpu_ejtag_loc2_groups[] = {
793 	"ejtag_scpu_loc", "gpio_45", "gpio_46", "gpio_47", "gpio_48", "gpio_49"
794 };
795 
796 static const char * const rtd1625_iso_acpu_ejtag_loc2_groups[] = {
797 	"ejtag_acpu_loc", "gpio_45", "gpio_46", "gpio_47", "gpio_48", "gpio_49"
798 };
799 
800 static const char * const rtd1625_iso_pcpu_ejtag_loc2_groups[] = {
801 	"ejtag_pcpu_loc", "gpio_45", "gpio_46", "gpio_47", "gpio_48", "gpio_49"
802 };
803 
804 static const char * const rtd1625_iso_aucpu0_ejtag_loc2_groups[] = {
805 	"ejtag_aucpu0_loc", "gpio_45", "gpio_46", "gpio_47", "gpio_48", "gpio_49"
806 };
807 
808 static const char * const rtd1625_iso_ve2_ejtag_loc2_groups[] = {
809 	"ejtag_ve2_loc", "gpio_45", "gpio_46", "gpio_47", "gpio_48", "gpio_49"
810 };
811 
812 static const char * const rtd1625_iso_aucpu1_ejtag_loc2_groups[] = {
813 	"ejtag_aucpu1_loc", "gpio_45", "gpio_46", "gpio_47", "gpio_48", "gpio_49"
814 };
815 
816 static const char * const rtd1625_iso_pwm4_groups[] = {
817 	"gpio_52"
818 };
819 
820 static const char * const rtd1625_iso_uart7_groups[] = {
821 	"gpio_94", "gpio_95"
822 };
823 
824 static const char * const rtd1625_iso_pwm2_loc1_groups[] = {
825 	"gpio_95"
826 };
827 
828 static const char * const rtd1625_iso_uart8_groups[] = {
829 	"gpio_96", "gpio_97"
830 };
831 
832 static const char * const rtd1625_iso_pwm3_loc1_groups[] = {
833 	"gpio_97"
834 };
835 
836 static const char * const rtd1625_iso_ai_tdm0_groups[] = {
837 	"gpio_100", "gpio_101", "gpio_102", "gpio_98"
838 };
839 
840 static const char * const rtd1625_iso_vtc_i2s_groups[] = {
841 	"gpio_100", "gpio_101", "gpio_102", "gpio_161", "gpio_98"
842 };
843 
844 static const char * const rtd1625_iso_ai_i2s0_groups[] = {
845 	"gpio_100", "gpio_101", "gpio_102", "gpio_156", "gpio_160", "gpio_161",
846 	"gpio_98"
847 };
848 
849 static const char * const rtd1625_iso_ao_tdm0_groups[] = {
850 	"gpio_100", "gpio_101", "gpio_102", "gpio_99"
851 };
852 
853 static const char * const rtd1625_iso_ao_i2s0_groups[] = {
854 	"gpio_100", "gpio_101", "gpio_102", "gpio_112", "gpio_99"
855 };
856 
857 static const char * const rtd1625_iso_ai_tdm1_groups[] = {
858 	"gpio_103", "gpio_105", "gpio_106", "gpio_107"
859 };
860 
861 static const char * const rtd1625_iso_ai_i2s1_loc0_groups[] = {
862 	"ai_i2s1_loc", "gpio_103", "gpio_105", "gpio_106", "gpio_107"
863 };
864 
865 static const char * const rtd1625_iso_ao_i2s0_loc1_groups[] = {
866 	"gpio_103", "gpio_107"
867 };
868 
869 static const char * const rtd1625_iso_ao_tdm1_loc0_groups[] = {
870 	"gpio_104"
871 };
872 
873 static const char * const rtd1625_iso_ao_i2s1_loc0_groups[] = {
874 	"ao_i2s1_loc", "gpio_104", "gpio_105", "gpio_106", "gpio_107"
875 };
876 
877 static const char * const rtd1625_iso_ao_tdm1_groups[] = {
878 	"gpio_105", "gpio_106", "gpio_107"
879 };
880 
881 static const char * const rtd1625_iso_ai_tdm2_groups[] = {
882 	"gpio_108", "gpio_110", "gpio_111", "gpio_112"
883 };
884 
885 static const char * const rtd1625_iso_pcm_groups[] = {
886 	"gpio_108", "gpio_109", "gpio_110", "gpio_111"
887 };
888 
889 static const char * const rtd1625_iso_ai_i2s2_groups[] = {
890 	"gpio_108", "gpio_110", "gpio_111", "gpio_112"
891 };
892 
893 static const char * const rtd1625_iso_ao_tdm2_groups[] = {
894 	"gpio_109", "gpio_110", "gpio_111", "gpio_112"
895 };
896 
897 static const char * const rtd1625_iso_ao_i2s2_groups[] = {
898 	"gpio_109", "gpio_110", "gpio_111", "gpio_112"
899 };
900 
901 static const char * const rtd1625_iso_vtc_ao_i2s_groups[] = {
902 	"gpio_109", "gpio_110", "gpio_111", "gpio_112"
903 };
904 
905 static const char * const rtd1625_iso_scpu_ejtag_loc0_groups[] = {
906 	"ejtag_scpu_loc", "gpio_112"
907 };
908 
909 static const char * const rtd1625_iso_acpu_ejtag_loc0_groups[] = {
910 	"ejtag_acpu_loc", "gpio_112"
911 };
912 
913 static const char * const rtd1625_iso_pcpu_ejtag_loc0_groups[] = {
914 	"ejtag_pcpu_loc", "gpio_112"
915 };
916 
917 static const char * const rtd1625_iso_aucpu0_ejtag_loc0_groups[] = {
918 	"ejtag_aucpu0_loc", "gpio_112"
919 };
920 
921 static const char * const rtd1625_iso_ve2_ejtag_loc0_groups[] = {
922 	"ejtag_ve2_loc", "gpio_112"
923 };
924 
925 static const char * const rtd1625_iso_gpu_ejtag_loc0_groups[] = {
926 	"gpio_112"
927 };
928 
929 static const char * const rtd1625_iso_ao_tdm1_loc1_groups[] = {
930 	"gpio_112"
931 };
932 
933 static const char * const rtd1625_iso_aucpu1_ejtag_loc0_groups[] = {
934 	"ejtag_aucpu1_loc", "gpio_112"
935 };
936 
937 static const char * const rtd1625_iso_edptx_hdp_groups[] = {
938 	"gpio_128"
939 };
940 
941 static const char * const rtd1625_iso_pwm5_groups[] = {
942 	"gpio_130"
943 };
944 
945 static const char * const rtd1625_iso_vi0_dtv_groups[] = {
946 	"gpio_145", "gpio_146", "gpio_147", "gpio_148", "gpio_149", "gpio_150",
947 	"gpio_151", "gpio_152", "gpio_153", "gpio_154", "gpio_155", "gpio_156",
948 	"gpio_157", "gpio_158", "gpio_159", "gpio_160", "gpio_161"
949 };
950 
951 static const char * const rtd1625_iso_vi1_dtv_groups[] = {
952 	"gpio_154", "gpio_155", "gpio_156", "gpio_157", "gpio_158", "gpio_159",
953 	"gpio_160", "gpio_161", "gpio_162"
954 };
955 
956 static const char * const rtd1625_iso_ao_i2s0_loc0_groups[] = {
957 	"gpio_154", "gpio_155"
958 };
959 
960 static const char * const rtd1625_iso_dmic0_groups[] = {
961 	"gpio_156", "gpio_157"
962 };
963 
964 static const char * const rtd1625_iso_vtc_dmic_groups[] = {
965 	"gpio_156", "gpio_157", "gpio_158", "gpio_159"
966 };
967 
968 static const char * const rtd1625_iso_ai_i2s1_loc1_groups[] = {
969 	"ai_i2s1_loc", "gpio_157", "gpio_158", "gpio_159", "gpio_160"
970 };
971 
972 static const char * const rtd1625_iso_ao_i2s1_loc1_groups[] = {
973 	"ao_i2s1_loc", "gpio_157", "gpio_158", "gpio_159", "gpio_161"
974 };
975 
976 static const char * const rtd1625_iso_dmic1_groups[] = {
977 	"gpio_158", "gpio_159"
978 };
979 
980 static const char * const rtd1625_iso_dmic2_groups[] = {
981 	"gpio_160", "gpio_161"
982 };
983 
984 static const char * const rtd1625_iso_pwm0_loc2_groups[] = {
985 	"gpio_162"
986 };
987 
988 static const char * const rtd1625_iso_spdif_in_coaxial_groups[] = {
989 	"gpio_163", "spdif_sel", "spdif_in_mode"
990 };
991 
992 static const char * const rtd1625_iso_spdif_in_gpio_groups[] = {
993 	"spdif_in_mode"
994 };
995 
996 static const char * const rtd1625_iso_hi_width_disable_groups[] = {
997 	"hi_width"
998 };
999 
1000 static const char * const rtd1625_iso_hi_width_1bit_groups[] = {
1001 	"hi_width"
1002 };
1003 
1004 static const char * const rtd1625_iso_sf_disable_groups[] = {
1005 	"sf_en"
1006 };
1007 
1008 static const char * const rtd1625_iso_sf_enable_groups[] = {
1009 	"sf_en"
1010 };
1011 
1012 static const char * const rtd1625_iso_arm_trace_debug_disable_groups[] = {
1013 	"arm_trace_dbg_en"
1014 };
1015 
1016 static const char * const rtd1625_iso_arm_trace_debug_enable_groups[] = {
1017 	"arm_trace_dbg_en"
1018 };
1019 
1020 static const char * const rtd1625_iso_aucpu0_ejtag_loc1_groups[] = {
1021 	"ejtag_aucpu0_loc"
1022 };
1023 
1024 static const char * const rtd1625_iso_aucpu1_ejtag_loc1_groups[] = {
1025 	"ejtag_aucpu1_loc"
1026 };
1027 
1028 static const char * const rtd1625_iso_ve2_ejtag_loc1_groups[] = {
1029 	"ejtag_ve2_loc"
1030 };
1031 
1032 static const char * const rtd1625_iso_scpu_ejtag_loc1_groups[] = {
1033 	"ejtag_scpu_loc"
1034 };
1035 
1036 static const char * const rtd1625_iso_pcpu_ejtag_loc1_groups[] = {
1037 	"ejtag_pcpu_loc"
1038 };
1039 
1040 static const char * const rtd1625_iso_acpu_ejtag_loc1_groups[] = {
1041 	"ejtag_acpu_loc"
1042 };
1043 
1044 static const char * const rtd1625_iso_i2c6_loc0_groups[] = {
1045 	"i2c6_loc"
1046 };
1047 
1048 static const char * const rtd1625_iso_i2c6_loc1_groups[] = {
1049 	"i2c6_loc"
1050 };
1051 
1052 static const char * const rtd1625_iso_uart0_loc0_groups[] = {
1053 	"uart0_loc"
1054 };
1055 
1056 static const char * const rtd1625_iso_uart0_loc1_groups[] = {
1057 	"uart0_loc"
1058 };
1059 
1060 static const char * const rtd1625_iso_etn_phy_loc0_groups[] = {
1061 	"etn_phy_loc"
1062 };
1063 
1064 static const char * const rtd1625_iso_etn_phy_loc1_groups[] = {
1065 	"etn_phy_loc"
1066 };
1067 
1068 static const char * const rtd1625_iso_spdif_loc0_groups[] = {
1069 	"spdif_loc"
1070 };
1071 
1072 static const char * const rtd1625_iso_spdif_loc1_groups[] = {
1073 	"spdif_loc"
1074 };
1075 
1076 static const char * const rtd1625_iso_rgmii_1v2_groups[] = {
1077 	"rgmii_vdsel"
1078 };
1079 
1080 static const char * const rtd1625_iso_rgmii_1v8_groups[] = {
1081 	"rgmii_vdsel"
1082 };
1083 
1084 static const char * const rtd1625_iso_rgmii_2v5_groups[] = {
1085 	"rgmii_vdsel"
1086 };
1087 
1088 static const char * const rtd1625_iso_rgmii_3v3_groups[] = {
1089 	"rgmii_vdsel"
1090 };
1091 
1092 static const char * const rtd1625_iso_csi_1v2_groups[] = {
1093 	"csi_vdsel"
1094 };
1095 
1096 static const char * const rtd1625_iso_csi_1v8_groups[] = {
1097 	"csi_vdsel"
1098 };
1099 
1100 static const char * const rtd1625_iso_csi_2v5_groups[] = {
1101 	"csi_vdsel"
1102 };
1103 
1104 static const char * const rtd1625_iso_csi_3v3_groups[] = {
1105 	"csi_vdsel"
1106 };
1107 
1108 static const char * const rtd1625_isom_gpio_groups[] = {
1109 	"gpio_0", "gpio_1", "gpio_28", "gpio_29"
1110 };
1111 
1112 static const char * const rtd1625_isom_pctrl_groups[] = {
1113 	"gpio_0", "gpio_1", "gpio_28", "gpio_29"
1114 };
1115 
1116 static const char * const rtd1625_isom_iso_tristate_groups[] = {
1117 	"gpio_0", "gpio_1", "gpio_28", "gpio_29"
1118 };
1119 
1120 static const char * const rtd1625_isom_ir_rx_loc1_groups[] = {
1121 	"gpio_1", "ir_rx_loc"
1122 };
1123 
1124 static const char * const rtd1625_isom_uart10_groups[] = {
1125 	"gpio_28", "gpio_29"
1126 };
1127 
1128 static const char * const rtd1625_isom_isom_dbg_out_groups[] = {
1129 	"gpio_28", "gpio_29"
1130 };
1131 
1132 static const char * const rtd1625_isom_ir_rx_loc0_groups[] = {
1133 	"gpio_29", "ir_rx_loc"
1134 };
1135 
1136 static const char * const rtd1625_ve4_gpio_groups[] = {
1137 	"gpio_12", "gpio_13", "gpio_132", "gpio_133", "gpio_134", "gpio_135",
1138 	"gpio_136", "gpio_137", "gpio_138", "gpio_139", "gpio_140", "gpio_141",
1139 	"gpio_142", "gpio_143", "gpio_144", "gpio_16", "gpio_164", "gpio_165",
1140 	"gpio_17", "gpio_18", "gpio_19", "gpio_2", "gpio_23", "gpio_24", "gpio_25",
1141 	"gpio_3", "gpio_30", "gpio_31", "gpio_32", "gpio_33", "gpio_34", "gpio_35",
1142 	"gpio_4", "gpio_42", "gpio_43", "gpio_44", "gpio_5", "gpio_51", "gpio_53",
1143 	"gpio_54", "gpio_55", "gpio_56", "gpio_57", "gpio_58", "gpio_59", "gpio_6",
1144 	"gpio_60", "gpio_61", "gpio_62", "gpio_63", "gpio_7", "gpio_92", "gpio_93"
1145 };
1146 
1147 static const char * const rtd1625_ve4_uart0_loc0_groups[] = {
1148 	"gpio_2", "gpio_3"
1149 };
1150 
1151 static const char * const rtd1625_ve4_iso_tristate_groups[] = {
1152 	"gpio_12", "gpio_13", "gpio_132", "gpio_133", "gpio_134", "gpio_135",
1153 	"gpio_136", "gpio_137", "gpio_138", "gpio_139", "gpio_140", "gpio_141",
1154 	"gpio_142", "gpio_143", "gpio_144", "gpio_16", "gpio_164", "gpio_165",
1155 	"gpio_17", "gpio_18", "gpio_19", "gpio_2", "gpio_23", "gpio_24", "gpio_25",
1156 	"gpio_3", "gpio_30", "gpio_31", "gpio_32", "gpio_33", "gpio_34", "gpio_35",
1157 	"gpio_4", "gpio_42", "gpio_43", "gpio_44", "gpio_5", "gpio_51", "gpio_53",
1158 	"gpio_54", "gpio_55", "gpio_56", "gpio_57", "gpio_58", "gpio_59", "gpio_6",
1159 	"gpio_60", "gpio_61", "gpio_62", "gpio_63", "gpio_7", "gpio_92", "gpio_93"
1160 };
1161 
1162 static const char * const rtd1625_ve4_uart2_groups[] = {
1163 	"gpio_4", "gpio_5", "gpio_6", "gpio_7"
1164 };
1165 
1166 static const char * const rtd1625_ve4_gspi0_groups[] = {
1167 	"gpio_4", "gpio_5", "gpio_6", "gpio_7"
1168 };
1169 
1170 static const char * const rtd1625_ve4_scpu_ejtag_loc0_groups[] = {
1171 	"gpio_4", "gpio_5", "gpio_6", "gpio_7"
1172 };
1173 
1174 static const char * const rtd1625_ve4_acpu_ejtag_loc0_groups[] = {
1175 	"gpio_4", "gpio_5", "gpio_6", "gpio_7"
1176 };
1177 
1178 static const char * const rtd1625_ve4_pcpu_ejtag_loc0_groups[] = {
1179 	"gpio_4", "gpio_5", "gpio_6", "gpio_7"
1180 };
1181 
1182 static const char * const rtd1625_ve4_aucpu0_ejtag_loc0_groups[] = {
1183 	"gpio_4", "gpio_5", "gpio_6", "gpio_7"
1184 };
1185 
1186 static const char * const rtd1625_ve4_ve2_ejtag_loc0_groups[] = {
1187 	"gpio_4", "gpio_5", "gpio_6", "gpio_7"
1188 };
1189 
1190 static const char * const rtd1625_ve4_gpu_ejtag_loc0_groups[] = {
1191 	"gpio_4", "gpio_5", "gpio_6", "gpio_7"
1192 };
1193 
1194 static const char * const rtd1625_ve4_aucpu1_ejtag_loc0_groups[] = {
1195 	"gpio_4", "gpio_5", "gpio_6", "gpio_7"
1196 };
1197 
1198 static const char * const rtd1625_ve4_pwm0_loc1_groups[] = {
1199 	"gpio_6"
1200 };
1201 
1202 static const char * const rtd1625_ve4_pwm1_loc0_groups[] = {
1203 	"gpio_7"
1204 };
1205 
1206 static const char * const rtd1625_ve4_i2c0_groups[] = {
1207 	"gpio_12", "gpio_13"
1208 };
1209 
1210 static const char * const rtd1625_ve4_pwm0_loc3_groups[] = {
1211 	"gpio_12"
1212 };
1213 
1214 static const char * const rtd1625_ve4_dptx_hpd_groups[] = {
1215 	"gpio_16"
1216 };
1217 
1218 static const char * const rtd1625_ve4_pwm2_loc0_groups[] = {
1219 	"gpio_16"
1220 };
1221 
1222 static const char * const rtd1625_ve4_pcie0_groups[] = {
1223 	"gpio_18"
1224 };
1225 
1226 static const char * const rtd1625_ve4_pwm3_loc0_groups[] = {
1227 	"gpio_19"
1228 };
1229 
1230 static const char * const rtd1625_ve4_i2c3_groups[] = {
1231 	"gpio_24", "gpio_25"
1232 };
1233 
1234 static const char * const rtd1625_ve4_pcie1_groups[] = {
1235 	"gpio_30"
1236 };
1237 
1238 static const char * const rtd1625_ve4_uart9_groups[] = {
1239 	"gpio_32", "gpio_33"
1240 };
1241 
1242 static const char * const rtd1625_ve4_ve4_uart_loc2_groups[] = {
1243 	"gpio_32", "gpio_33", "ve4_uart_loc"
1244 };
1245 
1246 static const char * const rtd1625_ve4_sd_groups[] = {
1247 	"gpio_42", "gpio_43"
1248 };
1249 
1250 static const char * const rtd1625_ve4_i2c6_loc1_groups[] = {
1251 	"gpio_51", "gpio_61"
1252 };
1253 
1254 static const char * const rtd1625_ve4_uart3_groups[] = {
1255 	"gpio_53", "gpio_54", "gpio_55", "gpio_56"
1256 };
1257 
1258 static const char * const rtd1625_ve4_ts0_groups[] = {
1259 	"gpio_53", "gpio_54", "gpio_55", "gpio_56"
1260 };
1261 
1262 static const char * const rtd1625_ve4_gspi2_groups[] = {
1263 	"gpio_53", "gpio_54", "gpio_55", "gpio_56"
1264 };
1265 
1266 static const char * const rtd1625_ve4_ve4_uart_loc0_groups[] = {
1267 	"gpio_53", "gpio_54", "ve4_uart_loc"
1268 };
1269 
1270 static const char * const rtd1625_ve4_uart5_groups[] = {
1271 	"gpio_57", "gpio_58"
1272 };
1273 
1274 static const char * const rtd1625_ve4_uart0_loc1_groups[] = {
1275 	"gpio_57", "gpio_58"
1276 };
1277 
1278 static const char * const rtd1625_ve4_gspi1_groups[] = {
1279 	"gpio_57", "gpio_58", "gpio_59", "gpio_60"
1280 };
1281 
1282 static const char * const rtd1625_ve4_uart4_groups[] = {
1283 	"gpio_59", "gpio_60"
1284 };
1285 
1286 static const char * const rtd1625_ve4_i2c4_groups[] = {
1287 	"gpio_59", "gpio_60"
1288 };
1289 
1290 static const char * const rtd1625_ve4_spdif_out_groups[] = {
1291 	"gpio_61"
1292 };
1293 
1294 static const char * const rtd1625_ve4_spdif_in_optical_groups[] = {
1295 	"gpio_61"
1296 };
1297 
1298 static const char * const rtd1625_ve4_pll_test_loc0_groups[] = {
1299 	"gpio_62", "gpio_63"
1300 };
1301 
1302 static const char * const rtd1625_ve4_uart6_groups[] = {
1303 	"gpio_92", "gpio_93"
1304 };
1305 
1306 static const char * const rtd1625_ve4_i2c7_groups[] = {
1307 	"gpio_92", "gpio_93"
1308 };
1309 
1310 static const char * const rtd1625_ve4_ve4_uart_loc1_groups[] = {
1311 	"gpio_92", "gpio_93", "ve4_uart_loc"
1312 };
1313 
1314 static const char * const rtd1625_ve4_pwm1_loc1_groups[] = {
1315 	"gpio_93"
1316 };
1317 
1318 static const char * const rtd1625_ve4_pwm6_groups[] = {
1319 	"gpio_132"
1320 };
1321 
1322 static const char * const rtd1625_ve4_ts1_groups[] = {
1323 	"gpio_133", "gpio_134", "gpio_135", "gpio_136"
1324 };
1325 
1326 static const char * const rtd1625_ve4_pwm0_loc0_groups[] = {
1327 	"gpio_136"
1328 };
1329 
1330 static const char * const rtd1625_ve4_i2c6_loc0_groups[] = {
1331 	"gpio_137", "gpio_138"
1332 };
1333 
1334 static const char * const rtd1625_ve4_csi0_groups[] = {
1335 	"gpio_141"
1336 };
1337 
1338 static const char * const rtd1625_ve4_csi1_groups[] = {
1339 	"gpio_144"
1340 };
1341 
1342 static const char * const rtd1625_ve4_etn_led_loc1_groups[] = {
1343 	"gpio_164", "gpio_165"
1344 };
1345 
1346 static const char * const rtd1625_ve4_etn_phy_loc1_groups[] = {
1347 	"gpio_164", "gpio_165"
1348 };
1349 
1350 static const char * const rtd1625_ve4_i2c5_groups[] = {
1351 	"gpio_164", "gpio_165"
1352 };
1353 
1354 static const char * const rtd1625_main2_gpio_groups[] = {
1355 	"emmc_clk", "emmc_cmd", "emmc_data_0", "emmc_data_1", "emmc_data_2",
1356 	"emmc_data_3", "emmc_data_4", "emmc_data_5", "emmc_data_6", "emmc_data_7",
1357 	"emmc_dd_sb", "emmc_rst_n", "gpio_14", "gpio_15", "gpio_20", "gpio_21",
1358 	"gpio_22", "gpio_40", "gpio_41", "gpio_64", "gpio_65", "gpio_66", "gpio_67",
1359 	"gpio_80", "gpio_81", "gpio_82", "gpio_83", "gpio_84", "gpio_85", "gpio_86",
1360 	"gpio_87", "gpio_88", "gpio_89", "gpio_90", "gpio_91", "hif_clk",
1361 	"hif_data", "hif_en", "hif_rdy"
1362 };
1363 
1364 static const char * const rtd1625_main2_emmc_groups[] = {
1365 	"emmc_clk", "emmc_cmd", "emmc_data_0", "emmc_data_1", "emmc_data_2",
1366 	"emmc_data_3", "emmc_data_4", "emmc_data_5", "emmc_data_6", "emmc_data_7",
1367 	"emmc_dd_sb", "emmc_rst_n"
1368 };
1369 
1370 static const char * const rtd1625_main2_iso_tristate_groups[] = {
1371 	"emmc_clk", "emmc_cmd", "emmc_data_0", "emmc_data_1", "emmc_data_2",
1372 	"emmc_data_3", "emmc_data_4", "emmc_data_5", "emmc_data_6", "emmc_data_7",
1373 	"emmc_dd_sb", "emmc_rst_n", "gpio_14", "gpio_15", "gpio_20", "gpio_21",
1374 	"gpio_40", "gpio_41", "gpio_64", "gpio_65", "gpio_66", "gpio_67", "gpio_80",
1375 	"gpio_81", "gpio_82", "gpio_83", "gpio_84", "gpio_85", "gpio_86", "gpio_87",
1376 	"gpio_88", "gpio_89", "gpio_90", "gpio_91", "hif_clk", "hif_data", "hif_en",
1377 	"hif_rdy"
1378 };
1379 
1380 static const char * const rtd1625_main2_nf_groups[] = {
1381 	"emmc_data_0", "emmc_data_1", "emmc_data_2", "emmc_data_3", "emmc_data_4",
1382 	"emmc_data_5"
1383 };
1384 
1385 static const char * const rtd1625_main2_etn_led_loc0_groups[] = {
1386 	"gpio_14", "gpio_15"
1387 };
1388 
1389 static const char * const rtd1625_main2_etn_phy_loc0_groups[] = {
1390 	"gpio_14", "gpio_15"
1391 };
1392 
1393 static const char * const rtd1625_main2_rgmii_groups[] = {
1394 	"gpio_14", "gpio_15", "gpio_80", "gpio_81", "gpio_82", "gpio_83", "gpio_84",
1395 	"gpio_85", "gpio_86", "gpio_87", "gpio_88", "gpio_89", "gpio_90", "gpio_91"
1396 };
1397 
1398 static const char * const rtd1625_main2_i2c1_groups[] = {
1399 	"gpio_20", "gpio_21"
1400 };
1401 
1402 static const char * const rtd1625_main2_dbg_out1_groups[] = {
1403 	"gpio_22"
1404 };
1405 
1406 static const char * const rtd1625_main2_sd_groups[] = {
1407 	"gpio_40", "gpio_41", "hif_clk", "hif_data", "hif_en", "hif_rdy"
1408 };
1409 
1410 static const char * const rtd1625_main2_scpu_ejtag_loc1_groups[] = {
1411 	"gpio_40", "hif_clk", "hif_data", "hif_en", "hif_rdy"
1412 };
1413 
1414 static const char * const rtd1625_main2_acpu_ejtag_loc1_groups[] = {
1415 	"gpio_40", "hif_clk", "hif_data", "hif_en", "hif_rdy"
1416 };
1417 
1418 static const char * const rtd1625_main2_pcpu_ejtag_loc1_groups[] = {
1419 	"gpio_40", "hif_clk", "hif_data", "hif_en", "hif_rdy"
1420 };
1421 
1422 static const char * const rtd1625_main2_aupu0_ejtag_loc1_groups[] = {
1423 	"gpio_40", "hif_clk", "hif_data", "hif_en", "hif_rdy"
1424 };
1425 
1426 static const char * const rtd1625_main2_ve2_ejtag_loc1_groups[] = {
1427 	"gpio_40", "hif_clk", "hif_data", "hif_en", "hif_rdy"
1428 };
1429 
1430 static const char * const rtd1625_main2_hi_loc0_groups[] = {
1431 	"hif_clk", "hif_data", "hif_en", "hif_rdy"
1432 };
1433 
1434 static const char * const rtd1625_main2_hi_m_groups[] = {
1435 	"hif_clk", "hif_data", "hif_en", "hif_rdy"
1436 };
1437 
1438 static const char * const rtd1625_main2_aupu1_ejtag_loc1_groups[] = {
1439 	"gpio_40", "hif_clk", "hif_data", "hif_en", "hif_rdy"
1440 };
1441 
1442 static const char * const rtd1625_main2_spi_groups[] = {
1443 	"gpio_64", "gpio_65", "gpio_66", "gpio_67"
1444 };
1445 
1446 static const char * const rtd1625_main2_pll_test_loc1_groups[] = {
1447 	"gpio_65", "gpio_66"
1448 };
1449 
1450 static const char * const rtd1625_main2_rmii_groups[] = {
1451 	"gpio_80", "gpio_81", "gpio_82", "gpio_83", "gpio_84", "gpio_87", "gpio_88",
1452 	"gpio_89"
1453 };
1454 
1455 #define RTD1625_FUNC(_group, _name) \
1456 	{ \
1457 		.name = # _name, \
1458 		.groups = rtd1625_ ## _group ## _ ## _name ## _groups, \
1459 		.num_groups = ARRAY_SIZE(rtd1625_ ## _group ## _ ## _name ## _groups), \
1460 	}
1461 
1462 static const struct rtd_pin_func_desc rtd1625_iso_pin_functions[] = {
1463 	RTD1625_FUNC(iso, gpio),
1464 	RTD1625_FUNC(iso, uart1),
1465 	RTD1625_FUNC(iso, iso_tristate),
1466 	RTD1625_FUNC(iso, usb_cc1),
1467 	RTD1625_FUNC(iso, usb_cc2),
1468 	RTD1625_FUNC(iso, sdio),
1469 	RTD1625_FUNC(iso, scpu_ejtag_loc2),
1470 	RTD1625_FUNC(iso, acpu_ejtag_loc2),
1471 	RTD1625_FUNC(iso, pcpu_ejtag_loc2),
1472 	RTD1625_FUNC(iso, aucpu0_ejtag_loc2),
1473 	RTD1625_FUNC(iso, ve2_ejtag_loc2),
1474 	RTD1625_FUNC(iso, aucpu1_ejtag_loc2),
1475 	RTD1625_FUNC(iso, pwm4),
1476 	RTD1625_FUNC(iso, uart7),
1477 	RTD1625_FUNC(iso, pwm2_loc1),
1478 	RTD1625_FUNC(iso, uart8),
1479 	RTD1625_FUNC(iso, pwm3_loc1),
1480 	RTD1625_FUNC(iso, ai_tdm0),
1481 	RTD1625_FUNC(iso, vtc_i2s),
1482 	RTD1625_FUNC(iso, ai_i2s0),
1483 	RTD1625_FUNC(iso, ao_tdm0),
1484 	RTD1625_FUNC(iso, ao_i2s0),
1485 	RTD1625_FUNC(iso, ai_tdm1),
1486 	RTD1625_FUNC(iso, ai_i2s1_loc0),
1487 	RTD1625_FUNC(iso, ao_i2s0_loc1),
1488 	RTD1625_FUNC(iso, ao_tdm1_loc0),
1489 	RTD1625_FUNC(iso, ao_i2s1_loc0),
1490 	RTD1625_FUNC(iso, ao_tdm1),
1491 	RTD1625_FUNC(iso, ai_tdm2),
1492 	RTD1625_FUNC(iso, pcm),
1493 	RTD1625_FUNC(iso, ai_i2s2),
1494 	RTD1625_FUNC(iso, ao_tdm2),
1495 	RTD1625_FUNC(iso, ao_i2s2),
1496 	RTD1625_FUNC(iso, vtc_ao_i2s),
1497 	RTD1625_FUNC(iso, scpu_ejtag_loc0),
1498 	RTD1625_FUNC(iso, acpu_ejtag_loc0),
1499 	RTD1625_FUNC(iso, pcpu_ejtag_loc0),
1500 	RTD1625_FUNC(iso, aucpu0_ejtag_loc0),
1501 	RTD1625_FUNC(iso, ve2_ejtag_loc0),
1502 	RTD1625_FUNC(iso, gpu_ejtag_loc0),
1503 	RTD1625_FUNC(iso, ao_tdm1_loc1),
1504 	RTD1625_FUNC(iso, aucpu1_ejtag_loc0),
1505 	RTD1625_FUNC(iso, edptx_hdp),
1506 	RTD1625_FUNC(iso, pwm5),
1507 	RTD1625_FUNC(iso, vi0_dtv),
1508 	RTD1625_FUNC(iso, vi1_dtv),
1509 	RTD1625_FUNC(iso, ao_i2s0_loc0),
1510 	RTD1625_FUNC(iso, dmic0),
1511 	RTD1625_FUNC(iso, vtc_dmic),
1512 	RTD1625_FUNC(iso, ai_i2s1_loc1),
1513 	RTD1625_FUNC(iso, ao_i2s1_loc1),
1514 	RTD1625_FUNC(iso, dmic1),
1515 	RTD1625_FUNC(iso, dmic2),
1516 	RTD1625_FUNC(iso, pwm0_loc2),
1517 	RTD1625_FUNC(iso, spdif_in_coaxial),
1518 	RTD1625_FUNC(iso, spdif_in_gpio),
1519 	RTD1625_FUNC(iso, hi_width_disable),
1520 	RTD1625_FUNC(iso, hi_width_1bit),
1521 	RTD1625_FUNC(iso, sf_disable),
1522 	RTD1625_FUNC(iso, sf_enable),
1523 	RTD1625_FUNC(iso, arm_trace_debug_disable),
1524 	RTD1625_FUNC(iso, arm_trace_debug_enable),
1525 	RTD1625_FUNC(iso, aucpu0_ejtag_loc1),
1526 	RTD1625_FUNC(iso, aucpu1_ejtag_loc1),
1527 	RTD1625_FUNC(iso, ve2_ejtag_loc1),
1528 	RTD1625_FUNC(iso, scpu_ejtag_loc1),
1529 	RTD1625_FUNC(iso, pcpu_ejtag_loc1),
1530 	RTD1625_FUNC(iso, acpu_ejtag_loc1),
1531 	RTD1625_FUNC(iso, i2c6_loc0),
1532 	RTD1625_FUNC(iso, i2c6_loc1),
1533 	RTD1625_FUNC(iso, uart0_loc0),
1534 	RTD1625_FUNC(iso, uart0_loc1),
1535 	RTD1625_FUNC(iso, etn_phy_loc0),
1536 	RTD1625_FUNC(iso, etn_phy_loc1),
1537 	RTD1625_FUNC(iso, spdif_loc0),
1538 	RTD1625_FUNC(iso, spdif_loc1),
1539 	RTD1625_FUNC(iso, rgmii_1v2),
1540 	RTD1625_FUNC(iso, rgmii_1v8),
1541 	RTD1625_FUNC(iso, rgmii_2v5),
1542 	RTD1625_FUNC(iso, rgmii_3v3),
1543 	RTD1625_FUNC(iso, csi_1v2),
1544 	RTD1625_FUNC(iso, csi_1v8),
1545 	RTD1625_FUNC(iso, csi_2v5),
1546 	RTD1625_FUNC(iso, csi_3v3),
1547 };
1548 
1549 static const struct rtd_pin_func_desc rtd1625_isom_pin_functions[] = {
1550 	RTD1625_FUNC(isom, gpio),
1551 	RTD1625_FUNC(isom, pctrl),
1552 	RTD1625_FUNC(isom, iso_tristate),
1553 	RTD1625_FUNC(isom, ir_rx_loc1),
1554 	RTD1625_FUNC(isom, uart10),
1555 	RTD1625_FUNC(isom, isom_dbg_out),
1556 	RTD1625_FUNC(isom, ir_rx_loc0),
1557 };
1558 
1559 static const struct rtd_pin_func_desc rtd1625_ve4_pin_functions[] = {
1560 	RTD1625_FUNC(ve4, gpio),
1561 	RTD1625_FUNC(ve4, uart0_loc0),
1562 	RTD1625_FUNC(ve4, iso_tristate),
1563 	RTD1625_FUNC(ve4, uart2),
1564 	RTD1625_FUNC(ve4, gspi0),
1565 	RTD1625_FUNC(ve4, scpu_ejtag_loc0),
1566 	RTD1625_FUNC(ve4, acpu_ejtag_loc0),
1567 	RTD1625_FUNC(ve4, pcpu_ejtag_loc0),
1568 	RTD1625_FUNC(ve4, aucpu0_ejtag_loc0),
1569 	RTD1625_FUNC(ve4, ve2_ejtag_loc0),
1570 	RTD1625_FUNC(ve4, gpu_ejtag_loc0),
1571 	RTD1625_FUNC(ve4, aucpu1_ejtag_loc0),
1572 	RTD1625_FUNC(ve4, pwm0_loc1),
1573 	RTD1625_FUNC(ve4, pwm1_loc0),
1574 	RTD1625_FUNC(ve4, i2c0),
1575 	RTD1625_FUNC(ve4, pwm0_loc3),
1576 	RTD1625_FUNC(ve4, dptx_hpd),
1577 	RTD1625_FUNC(ve4, pwm2_loc0),
1578 	RTD1625_FUNC(ve4, pcie0),
1579 	RTD1625_FUNC(ve4, pwm3_loc0),
1580 	RTD1625_FUNC(ve4, i2c3),
1581 	RTD1625_FUNC(ve4, pcie1),
1582 	RTD1625_FUNC(ve4, uart9),
1583 	RTD1625_FUNC(ve4, ve4_uart_loc2),
1584 	RTD1625_FUNC(ve4, sd),
1585 	RTD1625_FUNC(ve4, i2c6_loc1),
1586 	RTD1625_FUNC(ve4, uart3),
1587 	RTD1625_FUNC(ve4, ts0),
1588 	RTD1625_FUNC(ve4, gspi2),
1589 	RTD1625_FUNC(ve4, ve4_uart_loc0),
1590 	RTD1625_FUNC(ve4, uart5),
1591 	RTD1625_FUNC(ve4, uart0_loc1),
1592 	RTD1625_FUNC(ve4, gspi1),
1593 	RTD1625_FUNC(ve4, uart4),
1594 	RTD1625_FUNC(ve4, i2c4),
1595 	RTD1625_FUNC(ve4, spdif_out),
1596 	RTD1625_FUNC(ve4, spdif_in_optical),
1597 	RTD1625_FUNC(ve4, pll_test_loc0),
1598 	RTD1625_FUNC(ve4, uart6),
1599 	RTD1625_FUNC(ve4, i2c7),
1600 	RTD1625_FUNC(ve4, ve4_uart_loc1),
1601 	RTD1625_FUNC(ve4, pwm1_loc1),
1602 	RTD1625_FUNC(ve4, pwm6),
1603 	RTD1625_FUNC(ve4, ts1),
1604 	RTD1625_FUNC(ve4, pwm0_loc0),
1605 	RTD1625_FUNC(ve4, i2c6_loc0),
1606 	RTD1625_FUNC(ve4, csi0),
1607 	RTD1625_FUNC(ve4, csi1),
1608 	RTD1625_FUNC(ve4, etn_led_loc1),
1609 	RTD1625_FUNC(ve4, etn_phy_loc1),
1610 	RTD1625_FUNC(ve4, i2c5),
1611 };
1612 
1613 static const struct rtd_pin_func_desc rtd1625_main2_pin_functions[] = {
1614 	RTD1625_FUNC(main2, gpio),
1615 	RTD1625_FUNC(main2, emmc),
1616 	RTD1625_FUNC(main2, iso_tristate),
1617 	RTD1625_FUNC(main2, nf),
1618 	RTD1625_FUNC(main2, etn_led_loc0),
1619 	RTD1625_FUNC(main2, etn_phy_loc0),
1620 	RTD1625_FUNC(main2, rgmii),
1621 	RTD1625_FUNC(main2, i2c1),
1622 	RTD1625_FUNC(main2, dbg_out1),
1623 	RTD1625_FUNC(main2, sd),
1624 	RTD1625_FUNC(main2, scpu_ejtag_loc1),
1625 	RTD1625_FUNC(main2, acpu_ejtag_loc1),
1626 	RTD1625_FUNC(main2, pcpu_ejtag_loc1),
1627 	RTD1625_FUNC(main2, aupu0_ejtag_loc1),
1628 	RTD1625_FUNC(main2, ve2_ejtag_loc1),
1629 	RTD1625_FUNC(main2, hi_loc0),
1630 	RTD1625_FUNC(main2, hi_m),
1631 	RTD1625_FUNC(main2, aupu1_ejtag_loc1),
1632 	RTD1625_FUNC(main2, spi),
1633 	RTD1625_FUNC(main2, pll_test_loc1),
1634 	RTD1625_FUNC(main2, rmii),
1635 };
1636 
1637 #undef RTD1625_FUNC
1638 
1639 static const struct rtd_pin_desc rtd1625_iso_muxes[] = {
1640 	[RTD1625_ISO_GPIO_8] = RTK_PIN_MUX(gpio_8, 0x0, GENMASK(3, 0),
1641 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
1642 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "uart1"),
1643 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
1644 	),
1645 	[RTD1625_ISO_GPIO_9] = RTK_PIN_MUX(gpio_9, 0x0, GENMASK(7, 4),
1646 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
1647 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "uart1"),
1648 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
1649 	),
1650 	[RTD1625_ISO_GPIO_10] = RTK_PIN_MUX(gpio_10, 0x0, GENMASK(11, 8),
1651 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
1652 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "uart1"),
1653 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
1654 	),
1655 	[RTD1625_ISO_GPIO_11] = RTK_PIN_MUX(gpio_11, 0x0, GENMASK(15, 12),
1656 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
1657 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "uart1"),
1658 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
1659 	),
1660 	[RTD1625_ISO_USB_CC1] = RTK_PIN_MUX(usb_cc1, 0x0, GENMASK(19, 16),
1661 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
1662 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "usb_cc1"),
1663 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
1664 	),
1665 	[RTD1625_ISO_USB_CC2] = RTK_PIN_MUX(usb_cc2, 0x0, GENMASK(23, 20),
1666 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
1667 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "usb_cc2"),
1668 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
1669 	),
1670 	[RTD1625_ISO_GPIO_45] = RTK_PIN_MUX(gpio_45, 0x0, GENMASK(27, 24),
1671 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
1672 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "sdio"),
1673 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 24), "scpu_ejtag_loc2"),
1674 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 24), "acpu_ejtag_loc2"),
1675 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 24), "pcpu_ejtag_loc2"),
1676 		RTK_PIN_FUNC(SHIFT_LEFT(0x6, 24), "aucpu0_ejtag_loc2"),
1677 		RTK_PIN_FUNC(SHIFT_LEFT(0x7, 24), "ve2_ejtag_loc2"),
1678 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 24), "aucpu1_ejtag_loc2"),
1679 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
1680 	),
1681 	[RTD1625_ISO_GPIO_46] = RTK_PIN_MUX(gpio_46, 0x0, GENMASK(31, 28),
1682 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio"),
1683 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 28), "sdio"),
1684 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 28), "scpu_ejtag_loc2"),
1685 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 28), "acpu_ejtag_loc2"),
1686 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 28), "pcpu_ejtag_loc2"),
1687 		RTK_PIN_FUNC(SHIFT_LEFT(0x6, 28), "aucpu0_ejtag_loc2"),
1688 		RTK_PIN_FUNC(SHIFT_LEFT(0x7, 28), "ve2_ejtag_loc2"),
1689 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 28), "aucpu1_ejtag_loc2"),
1690 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate")
1691 	),
1692 
1693 	[RTD1625_ISO_GPIO_47] = RTK_PIN_MUX(gpio_47, 0x4, GENMASK(3, 0),
1694 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
1695 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "sdio"),
1696 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 0), "scpu_ejtag_loc2"),
1697 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 0), "acpu_ejtag_loc2"),
1698 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 0), "pcpu_ejtag_loc2"),
1699 		RTK_PIN_FUNC(SHIFT_LEFT(0x6, 0), "aucpu0_ejtag_loc2"),
1700 		RTK_PIN_FUNC(SHIFT_LEFT(0x7, 0), "ve2_ejtag_loc2"),
1701 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 0), "aucpu1_ejtag_loc2"),
1702 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
1703 	),
1704 	[RTD1625_ISO_GPIO_48] = RTK_PIN_MUX(gpio_48, 0x4, GENMASK(7, 4),
1705 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
1706 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "sdio"),
1707 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 4), "scpu_ejtag_loc2"),
1708 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 4), "acpu_ejtag_loc2"),
1709 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 4), "pcpu_ejtag_loc2"),
1710 		RTK_PIN_FUNC(SHIFT_LEFT(0x6, 4), "aucpu0_ejtag_loc2"),
1711 		RTK_PIN_FUNC(SHIFT_LEFT(0x7, 4), "ve2_ejtag_loc2"),
1712 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 4), "aucpu1_ejtag_loc2"),
1713 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
1714 	),
1715 	[RTD1625_ISO_GPIO_49] = RTK_PIN_MUX(gpio_49, 0x4, GENMASK(11, 8),
1716 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
1717 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "sdio"),
1718 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 8), "scpu_ejtag_loc2"),
1719 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 8), "acpu_ejtag_loc2"),
1720 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 8), "pcpu_ejtag_loc2"),
1721 		RTK_PIN_FUNC(SHIFT_LEFT(0x6, 8), "aucpu0_ejtag_loc2"),
1722 		RTK_PIN_FUNC(SHIFT_LEFT(0x7, 8), "ve2_ejtag_loc2"),
1723 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 8), "aucpu1_ejtag_loc2"),
1724 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
1725 	),
1726 	[RTD1625_ISO_GPIO_50] = RTK_PIN_MUX(gpio_50, 0x4, GENMASK(15, 12),
1727 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
1728 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "sdio"),
1729 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
1730 	),
1731 	[RTD1625_ISO_GPIO_52] = RTK_PIN_MUX(gpio_52, 0x4, GENMASK(19, 16),
1732 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
1733 		RTK_PIN_FUNC(SHIFT_LEFT(0xd, 16), "pwm4"),
1734 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
1735 	),
1736 	[RTD1625_ISO_GPIO_94] = RTK_PIN_MUX(gpio_94, 0x4, GENMASK(23, 20),
1737 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
1738 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "uart7"),
1739 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
1740 	),
1741 	[RTD1625_ISO_GPIO_95] = RTK_PIN_MUX(gpio_95, 0x4, GENMASK(27, 24),
1742 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
1743 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "uart7"),
1744 		RTK_PIN_FUNC(SHIFT_LEFT(0xd, 24), "pwm2_loc1"),
1745 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
1746 	),
1747 	[RTD1625_ISO_GPIO_96] = RTK_PIN_MUX(gpio_96, 0x4, GENMASK(31, 28),
1748 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio"),
1749 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 28), "uart8"),
1750 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate")
1751 	),
1752 
1753 	[RTD1625_ISO_GPIO_97] = RTK_PIN_MUX(gpio_97, 0x8, GENMASK(3, 0),
1754 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
1755 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "uart8"),
1756 		RTK_PIN_FUNC(SHIFT_LEFT(0xd, 0), "pwm3_loc1"),
1757 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
1758 	),
1759 	[RTD1625_ISO_GPIO_98] = RTK_PIN_MUX(gpio_98, 0x8, GENMASK(7, 4),
1760 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
1761 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "ai_tdm0"),
1762 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 4), "vtc_i2s"),
1763 		RTK_PIN_FUNC(SHIFT_LEFT(0x8, 4), "ai_i2s0"),
1764 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
1765 	),
1766 	[RTD1625_ISO_GPIO_99] = RTK_PIN_MUX(gpio_99, 0x8, GENMASK(11, 8),
1767 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
1768 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "ao_tdm0"),
1769 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 8), "ao_i2s0"),
1770 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
1771 	),
1772 	[RTD1625_ISO_GPIO_100] = RTK_PIN_MUX(gpio_100, 0x8, GENMASK(15, 12),
1773 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
1774 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "ai_tdm0"),
1775 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "ao_tdm0"),
1776 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 12), "vtc_i2s"),
1777 		RTK_PIN_FUNC(SHIFT_LEFT(0x8, 12), "ai_i2s0"),
1778 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 12), "ao_i2s0"),
1779 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
1780 	),
1781 	[RTD1625_ISO_GPIO_101] = RTK_PIN_MUX(gpio_101, 0x8, GENMASK(19, 16),
1782 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
1783 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "ai_tdm0"),
1784 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "ao_tdm0"),
1785 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 16), "vtc_i2s"),
1786 		RTK_PIN_FUNC(SHIFT_LEFT(0x8, 16), "ai_i2s0"),
1787 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 16), "ao_i2s0"),
1788 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
1789 	),
1790 	[RTD1625_ISO_GPIO_102] = RTK_PIN_MUX(gpio_102, 0x8, GENMASK(23, 20),
1791 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
1792 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "ai_tdm0"),
1793 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 20), "ao_tdm0"),
1794 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 20), "vtc_i2s"),
1795 		RTK_PIN_FUNC(SHIFT_LEFT(0x8, 20), "ai_i2s0"),
1796 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 20), "ao_i2s0"),
1797 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
1798 	),
1799 	[RTD1625_ISO_GPIO_103] = RTK_PIN_MUX(gpio_103, 0x8, GENMASK(27, 24),
1800 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
1801 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "ai_tdm1"),
1802 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 24), "ai_i2s1_loc0"),
1803 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 24), "ao_i2s0_loc1"),
1804 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
1805 	),
1806 	[RTD1625_ISO_GPIO_104] = RTK_PIN_MUX(gpio_104, 0x8, GENMASK(31, 28),
1807 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio"),
1808 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 28), "ao_tdm1_loc0"),
1809 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 28), "ao_i2s1_loc0"),
1810 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate")
1811 	),
1812 
1813 	[RTD1625_ISO_GPIO_105] = RTK_PIN_MUX(gpio_105, 0xc, GENMASK(3, 0),
1814 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
1815 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "ai_tdm1"),
1816 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "ao_tdm1"),
1817 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 0), "ai_i2s1_loc0"),
1818 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 0), "ao_i2s1_loc0"),
1819 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
1820 	),
1821 	[RTD1625_ISO_GPIO_106] = RTK_PIN_MUX(gpio_106, 0xc, GENMASK(7, 4),
1822 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
1823 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "ai_tdm1"),
1824 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "ao_tdm1"),
1825 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 4), "ai_i2s1_loc0"),
1826 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 4), "ao_i2s1_loc0"),
1827 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
1828 	),
1829 	[RTD1625_ISO_GPIO_107] = RTK_PIN_MUX(gpio_107, 0xc, GENMASK(11, 8),
1830 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
1831 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "ai_tdm1"),
1832 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "ao_tdm1"),
1833 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 8), "ai_i2s1_loc0"),
1834 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 8), "ao_i2s1_loc0"),
1835 		RTK_PIN_FUNC(SHIFT_LEFT(0xb, 8), "ao_i2s0_loc1"),
1836 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
1837 	),
1838 	[RTD1625_ISO_GPIO_108] = RTK_PIN_MUX(gpio_108, 0xc, GENMASK(15, 12),
1839 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
1840 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "ai_tdm2"),
1841 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 12), "pcm"),
1842 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 12), "ai_i2s2"),
1843 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
1844 	),
1845 	[RTD1625_ISO_GPIO_109] = RTK_PIN_MUX(gpio_109, 0xc, GENMASK(19, 16),
1846 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
1847 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "ao_tdm2"),
1848 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 16), "pcm"),
1849 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 16), "ao_i2s2"),
1850 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 16), "vtc_ao_i2s"),
1851 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
1852 	),
1853 	[RTD1625_ISO_GPIO_110] = RTK_PIN_MUX(gpio_110, 0xc, GENMASK(23, 20),
1854 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
1855 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "ai_tdm2"),
1856 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 20), "ao_tdm2"),
1857 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 20), "pcm"),
1858 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 20), "ai_i2s2"),
1859 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 20), "ao_i2s2"),
1860 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 20), "vtc_ao_i2s"),
1861 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
1862 	),
1863 	[RTD1625_ISO_GPIO_111] = RTK_PIN_MUX(gpio_111, 0xc, GENMASK(27, 24),
1864 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
1865 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "ai_tdm2"),
1866 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 24), "ao_tdm2"),
1867 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 24), "pcm"),
1868 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 24), "ai_i2s2"),
1869 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 24), "ao_i2s2"),
1870 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 24), "vtc_ao_i2s"),
1871 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
1872 	),
1873 
1874 	[RTD1625_ISO_GPIO_112] = RTK_PIN_MUX(gpio_112, 0x10, GENMASK(4, 0),
1875 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
1876 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "ai_tdm2"),
1877 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "ao_tdm2"),
1878 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 0), "scpu_ejtag_loc0"),
1879 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 0), "acpu_ejtag_loc0"),
1880 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 0), "pcpu_ejtag_loc0"),
1881 		RTK_PIN_FUNC(SHIFT_LEFT(0x6, 0), "aucpu0_ejtag_loc0"),
1882 		RTK_PIN_FUNC(SHIFT_LEFT(0x7, 0), "ve2_ejtag_loc0"),
1883 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 0), "ai_i2s2"),
1884 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 0), "ao_i2s2"),
1885 		RTK_PIN_FUNC(SHIFT_LEFT(0xc, 0), "gpu_ejtag_loc0"),
1886 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 0), "vtc_ao_i2s"),
1887 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate"),
1888 		RTK_PIN_FUNC(SHIFT_LEFT(0x10, 0), "ao_tdm1_loc1"),
1889 		RTK_PIN_FUNC(SHIFT_LEFT(0x11, 0), "aucpu1_ejtag_loc0"),
1890 		RTK_PIN_FUNC(SHIFT_LEFT(0x13, 0), "ao_i2s0")
1891 	),
1892 	[RTD1625_ISO_GPIO_128] = RTK_PIN_MUX(gpio_128, 0x10, GENMASK(8, 5),
1893 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 5), "gpio"),
1894 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 5), "edptx_hdp"),
1895 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 5), "iso_tristate")
1896 	),
1897 	[RTD1625_ISO_GPIO_129] = RTK_PIN_MUX(gpio_129, 0x10, GENMASK(12, 9),
1898 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 9), "gpio"),
1899 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 9), "iso_tristate")
1900 	),
1901 	[RTD1625_ISO_GPIO_130] = RTK_PIN_MUX(gpio_130, 0x10, GENMASK(16, 13),
1902 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 13), "gpio"),
1903 		RTK_PIN_FUNC(SHIFT_LEFT(0xd, 13), "pwm5"),
1904 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 13), "iso_tristate")
1905 	),
1906 	[RTD1625_ISO_GPIO_131] = RTK_PIN_MUX(gpio_131, 0x10, GENMASK(20, 17),
1907 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 17), "gpio"),
1908 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 17), "iso_tristate")
1909 	),
1910 	[RTD1625_ISO_GPIO_145] = RTK_PIN_MUX(gpio_145, 0x10, GENMASK(24, 21),
1911 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 21), "gpio"),
1912 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 21), "vi0_dtv"),
1913 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 21), "iso_tristate")
1914 	),
1915 	[RTD1625_ISO_GPIO_146] = RTK_PIN_MUX(gpio_146, 0x10, GENMASK(28, 25),
1916 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 25), "gpio"),
1917 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 25), "vi0_dtv"),
1918 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 25), "iso_tristate")
1919 	),
1920 
1921 	[RTD1625_ISO_GPIO_147] = RTK_PIN_MUX(gpio_147, 0x14, GENMASK(3, 0),
1922 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
1923 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "vi0_dtv"),
1924 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
1925 	),
1926 	[RTD1625_ISO_GPIO_148] = RTK_PIN_MUX(gpio_148, 0x14, GENMASK(7, 4),
1927 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
1928 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "vi0_dtv"),
1929 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
1930 	),
1931 	[RTD1625_ISO_GPIO_149] = RTK_PIN_MUX(gpio_149, 0x14, GENMASK(11, 8),
1932 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
1933 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "vi0_dtv"),
1934 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
1935 	),
1936 	[RTD1625_ISO_GPIO_150] = RTK_PIN_MUX(gpio_150, 0x14, GENMASK(15, 12),
1937 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
1938 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "vi0_dtv"),
1939 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
1940 	),
1941 	[RTD1625_ISO_GPIO_151] = RTK_PIN_MUX(gpio_151, 0x14, GENMASK(19, 16),
1942 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
1943 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "vi0_dtv"),
1944 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
1945 	),
1946 	[RTD1625_ISO_GPIO_152] = RTK_PIN_MUX(gpio_152, 0x14, GENMASK(23, 20),
1947 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
1948 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "vi0_dtv"),
1949 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
1950 	),
1951 	[RTD1625_ISO_GPIO_153] = RTK_PIN_MUX(gpio_153, 0x14, GENMASK(27, 24),
1952 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
1953 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "vi0_dtv"),
1954 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
1955 	),
1956 	[RTD1625_ISO_GPIO_154] = RTK_PIN_MUX(gpio_154, 0x14, GENMASK(31, 28),
1957 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio"),
1958 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 28), "vi0_dtv"),
1959 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 28), "vi1_dtv"),
1960 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 28), "ao_i2s0_loc0"),
1961 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate")
1962 	),
1963 
1964 	[RTD1625_ISO_GPIO_155] = RTK_PIN_MUX(gpio_155, 0x18, GENMASK(3, 0),
1965 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
1966 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "vi0_dtv"),
1967 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "vi1_dtv"),
1968 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 0), "ao_i2s0_loc0"),
1969 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
1970 	),
1971 	[RTD1625_ISO_GPIO_156] = RTK_PIN_MUX(gpio_156, 0x18, GENMASK(7, 4),
1972 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
1973 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "vi0_dtv"),
1974 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "vi1_dtv"),
1975 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 4), "dmic0"),
1976 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 4), "vtc_dmic"),
1977 		RTK_PIN_FUNC(SHIFT_LEFT(0x8, 4), "ai_i2s0"),
1978 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
1979 	),
1980 	[RTD1625_ISO_GPIO_157] = RTK_PIN_MUX(gpio_157, 0x18, GENMASK(11, 8),
1981 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
1982 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "vi0_dtv"),
1983 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "vi1_dtv"),
1984 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 8), "dmic0"),
1985 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 8), "vtc_dmic"),
1986 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 8), "ai_i2s1_loc1"),
1987 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 8), "ao_i2s1_loc1"),
1988 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
1989 	),
1990 	[RTD1625_ISO_GPIO_158] = RTK_PIN_MUX(gpio_158, 0x18, GENMASK(15, 12),
1991 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
1992 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "vi0_dtv"),
1993 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "vi1_dtv"),
1994 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 12), "dmic1"),
1995 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 12), "vtc_dmic"),
1996 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 12), "ai_i2s1_loc1"),
1997 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 12), "ao_i2s1_loc1"),
1998 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
1999 	),
2000 	[RTD1625_ISO_GPIO_159] = RTK_PIN_MUX(gpio_159, 0x18, GENMASK(19, 16),
2001 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
2002 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "vi0_dtv"),
2003 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "vi1_dtv"),
2004 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 16), "dmic1"),
2005 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 16), "vtc_dmic"),
2006 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 16), "ai_i2s1_loc1"),
2007 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 16), "ao_i2s1_loc1"),
2008 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
2009 	),
2010 	[RTD1625_ISO_GPIO_160] = RTK_PIN_MUX(gpio_160, 0x18, GENMASK(23, 20),
2011 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
2012 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "vi0_dtv"),
2013 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 20), "vi1_dtv"),
2014 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 20), "dmic2"),
2015 		RTK_PIN_FUNC(SHIFT_LEFT(0x8, 20), "ai_i2s0"),
2016 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 20), "ai_i2s1_loc1"),
2017 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
2018 	),
2019 	[RTD1625_ISO_GPIO_161] = RTK_PIN_MUX(gpio_161, 0x18, GENMASK(27, 24),
2020 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
2021 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "vi0_dtv"),
2022 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 24), "vi1_dtv"),
2023 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 24), "dmic2"),
2024 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 24), "vtc_i2s"),
2025 		RTK_PIN_FUNC(SHIFT_LEFT(0x8, 24), "ai_i2s0"),
2026 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 24), "ao_i2s1_loc1"),
2027 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
2028 	),
2029 	[RTD1625_ISO_GPIO_162] = RTK_PIN_MUX(gpio_162, 0x18, GENMASK(31, 28),
2030 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio"),
2031 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 28), "vi1_dtv"),
2032 		RTK_PIN_FUNC(SHIFT_LEFT(0xd, 28), "pwm0_loc2"),
2033 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate")
2034 	),
2035 
2036 	[RTD1625_ISO_GPIO_163] = RTK_PIN_MUX(gpio_163, 0x1c, GENMASK(3, 0),
2037 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
2038 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 0), "spdif_in_coaxial"),
2039 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
2040 	),
2041 
2042 	[RTD1625_ISO_HI_WIDTH] = RTK_PIN_MUX(hi_width, 0x120, GENMASK(9, 8),
2043 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "hi_width_disable"),
2044 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "hi_width_1bit")
2045 	),
2046 	[RTD1625_ISO_SF_EN] = RTK_PIN_MUX(sf_en, 0x120, GENMASK(11, 11),
2047 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 11), "sf_disable"),
2048 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 11), "sf_enable")
2049 	),
2050 	[RTD1625_ISO_ARM_TRACE_DBG_EN] = RTK_PIN_MUX(arm_trace_dbg_en, 0x120, GENMASK(13, 12),
2051 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "arm_trace_debug_disable"),
2052 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "arm_trace_debug_enable")
2053 	),
2054 	[RTD1625_ISO_EJTAG_AUCPU0_LOC] = RTK_PIN_MUX(ejtag_aucpu0_loc, 0x120, GENMASK(16, 14),
2055 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 14), "aucpu0_ejtag_loc0"),
2056 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 14), "aucpu0_ejtag_loc1"),
2057 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 14), "aucpu0_ejtag_loc2")
2058 	),
2059 	[RTD1625_ISO_EJTAG_AUCPU1_LOC] = RTK_PIN_MUX(ejtag_aucpu1_loc, 0x120, GENMASK(19, 17),
2060 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 17), "aucpu1_ejtag_loc0"),
2061 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 17), "aucpu1_ejtag_loc1"),
2062 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 17), "aucpu1_ejtag_loc2")
2063 	),
2064 	[RTD1625_ISO_EJTAG_VE2_LOC] = RTK_PIN_MUX(ejtag_ve2_loc, 0x120, GENMASK(22, 20),
2065 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "ve2_ejtag_loc0"),
2066 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 20), "ve2_ejtag_loc1"),
2067 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 20), "ve2_ejtag_loc2")
2068 	),
2069 	[RTD1625_ISO_EJTAG_SCPU_LOC] = RTK_PIN_MUX(ejtag_scpu_loc, 0x120, GENMASK(25, 23),
2070 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 23), "scpu_ejtag_loc0"),
2071 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 23), "scpu_ejtag_loc1"),
2072 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 23), "scpu_ejtag_loc2")
2073 	),
2074 	[RTD1625_ISO_EJTAG_PCPU_LOC] = RTK_PIN_MUX(ejtag_pcpu_loc, 0x120, GENMASK(28, 26),
2075 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 26), "pcpu_ejtag_loc0"),
2076 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 26), "pcpu_ejtag_loc1"),
2077 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 26), "pcpu_ejtag_loc2")
2078 	),
2079 	[RTD1625_ISO_EJTAG_ACPU_LOC] = RTK_PIN_MUX(ejtag_acpu_loc, 0x120, GENMASK(31, 29),
2080 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 29), "acpu_ejtag_loc0"),
2081 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 29), "acpu_ejtag_loc1"),
2082 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 29), "acpu_ejtag_loc2")
2083 	),
2084 	[RTD1625_ISO_I2C6_LOC] = RTK_PIN_MUX(i2c6_loc, 0x128, GENMASK(1, 0),
2085 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "i2c6_loc0"),
2086 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "i2c6_loc1")
2087 	),
2088 	[RTD1625_ISO_UART0_LOC] = RTK_PIN_MUX(uart0_loc, 0x128, GENMASK(3, 2),
2089 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 2), "uart0_loc0"),
2090 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 2), "uart0_loc1")
2091 	),
2092 	[RTD1625_ISO_AI_I2S1_LOC] = RTK_PIN_MUX(ai_i2s1_loc, 0x128, GENMASK(5, 4),
2093 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "ai_i2s1_loc0"),
2094 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "ai_i2s1_loc1")
2095 	),
2096 	[RTD1625_ISO_AO_I2S1_LOC] = RTK_PIN_MUX(ao_i2s1_loc, 0x128, GENMASK(7, 6),
2097 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 6), "ao_i2s1_loc0"),
2098 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 6), "ao_i2s1_loc1")
2099 	),
2100 	[RTD1625_ISO_ETN_PHY_LOC] = RTK_PIN_MUX(etn_phy_loc, 0x128, GENMASK(9, 8),
2101 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "etn_phy_loc0"),
2102 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "etn_phy_loc1")
2103 	),
2104 	[RTD1625_ISO_SPDIF_LOC] = RTK_PIN_MUX(spdif_loc, 0x128, GENMASK(14, 13),
2105 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 13), "spdif_loc0"),
2106 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 13), "spdif_loc1")
2107 	),
2108 	[RTD1625_ISO_RGMII_VDSEL] = RTK_PIN_MUX(rgmii_vdsel, 0x188, GENMASK(17, 16),
2109 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "rgmii_3v3"),
2110 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "rgmii_2v5"),
2111 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "rgmii_1v8"),
2112 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 16), "rgmii_1v2")
2113 	),
2114 	[RTD1625_ISO_CSI_VDSEL] = RTK_PIN_MUX(csi_vdsel, 0x188, GENMASK(19, 18),
2115 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 18), "csi_3v3"),
2116 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 18), "csi_2v5"),
2117 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 18), "csi_1v8"),
2118 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 18), "csi_1v2")
2119 	),
2120 
2121 	[RTD1625_ISO_SPDIF_IN_MODE] = RTK_PIN_MUX(spdif_in_mode, 0x188, GENMASK(20, 20),
2122 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "spdif_in_gpio"),
2123 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "spdif_in_coaxial")
2124 	),
2125 };
2126 
2127 static const struct rtd_pin_desc rtd1625_isom_muxes[] = {
2128 	[RTD1625_ISOM_GPIO_0] = RTK_PIN_MUX(gpio_0, 0x0, GENMASK(3, 0),
2129 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
2130 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "pctrl"),
2131 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
2132 	),
2133 	[RTD1625_ISOM_GPIO_1] = RTK_PIN_MUX(gpio_1, 0x0, GENMASK(7, 4),
2134 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
2135 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "pctrl"),
2136 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 4), "ir_rx_loc1"),
2137 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
2138 	),
2139 	[RTD1625_ISOM_GPIO_28] = RTK_PIN_MUX(gpio_28, 0x0, GENMASK(11, 8),
2140 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
2141 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "uart10"),
2142 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "pctrl"),
2143 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 8), "isom_dbg_out"),
2144 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
2145 	),
2146 	[RTD1625_ISOM_GPIO_29] = RTK_PIN_MUX(gpio_29, 0x0, GENMASK(15, 12),
2147 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
2148 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "uart10"),
2149 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "pctrl"),
2150 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 12), "ir_rx_loc0"),
2151 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 12), "isom_dbg_out"),
2152 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
2153 	),
2154 	[RTD1625_ISOM_IR_RX_LOC] = RTK_PIN_MUX(ir_rx_loc, 0x30, GENMASK(1, 0),
2155 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "ir_rx_loc0"),
2156 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "ir_rx_loc1")
2157 	),
2158 };
2159 
2160 static const struct rtd_pin_desc rtd1625_ve4_muxes[] = {
2161 	[RTD1625_VE4_GPIO_2] = RTK_PIN_MUX(gpio_2, 0x0, GENMASK(3, 0),
2162 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
2163 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "uart0_loc0"),
2164 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
2165 	),
2166 	[RTD1625_VE4_GPIO_3] = RTK_PIN_MUX(gpio_3, 0x0, GENMASK(7, 4),
2167 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
2168 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "uart0_loc0"),
2169 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
2170 	),
2171 	[RTD1625_VE4_GPIO_4] = RTK_PIN_MUX(gpio_4, 0x0, GENMASK(11, 8),
2172 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
2173 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "uart2"),
2174 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "gspi0"),
2175 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 8), "scpu_ejtag_loc0"),
2176 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 8), "acpu_ejtag_loc0"),
2177 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 8), "pcpu_ejtag_loc0"),
2178 		RTK_PIN_FUNC(SHIFT_LEFT(0x6, 8), "aucpu0_ejtag_loc0"),
2179 		RTK_PIN_FUNC(SHIFT_LEFT(0x7, 8), "ve2_ejtag_loc0"),
2180 		RTK_PIN_FUNC(SHIFT_LEFT(0xc, 8), "gpu_ejtag_loc0"),
2181 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 8), "aucpu1_ejtag_loc0"),
2182 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
2183 	),
2184 	[RTD1625_VE4_GPIO_5] = RTK_PIN_MUX(gpio_5, 0x0, GENMASK(15, 12),
2185 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
2186 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "uart2"),
2187 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "gspi0"),
2188 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 12), "scpu_ejtag_loc0"),
2189 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 12), "acpu_ejtag_loc0"),
2190 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 12), "pcpu_ejtag_loc0"),
2191 		RTK_PIN_FUNC(SHIFT_LEFT(0x6, 12), "aucpu0_ejtag_loc0"),
2192 		RTK_PIN_FUNC(SHIFT_LEFT(0x7, 12), "ve2_ejtag_loc0"),
2193 		RTK_PIN_FUNC(SHIFT_LEFT(0xc, 12), "gpu_ejtag_loc0"),
2194 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 12), "aucpu1_ejtag_loc0"),
2195 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
2196 	),
2197 	[RTD1625_VE4_GPIO_6] = RTK_PIN_MUX(gpio_6, 0x0, GENMASK(20, 16),
2198 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
2199 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "uart2"),
2200 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "gspi0"),
2201 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 16), "scpu_ejtag_loc0"),
2202 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 16), "acpu_ejtag_loc0"),
2203 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 16), "pcpu_ejtag_loc0"),
2204 		RTK_PIN_FUNC(SHIFT_LEFT(0x6, 16), "aucpu0_ejtag_loc0"),
2205 		RTK_PIN_FUNC(SHIFT_LEFT(0x7, 16), "ve2_ejtag_loc0"),
2206 		RTK_PIN_FUNC(SHIFT_LEFT(0xc, 16), "gpu_ejtag_loc0"),
2207 		RTK_PIN_FUNC(SHIFT_LEFT(0xd, 16), "pwm0_loc1"),
2208 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 16), "aucpu1_ejtag_loc0"),
2209 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
2210 	),
2211 	[RTD1625_VE4_GPIO_7] = RTK_PIN_MUX(gpio_7, 0x0, GENMASK(24, 21),
2212 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 21), "gpio"),
2213 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 21), "uart2"),
2214 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 21), "gspi0"),
2215 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 21), "scpu_ejtag_loc0"),
2216 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 21), "acpu_ejtag_loc0"),
2217 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 21), "pcpu_ejtag_loc0"),
2218 		RTK_PIN_FUNC(SHIFT_LEFT(0x6, 21), "aucpu0_ejtag_loc0"),
2219 		RTK_PIN_FUNC(SHIFT_LEFT(0x7, 21), "ve2_ejtag_loc0"),
2220 		RTK_PIN_FUNC(SHIFT_LEFT(0xc, 21), "gpu_ejtag_loc0"),
2221 		RTK_PIN_FUNC(SHIFT_LEFT(0xd, 21), "pwm1_loc0"),
2222 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 21), "aucpu1_ejtag_loc0"),
2223 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 21), "iso_tristate")
2224 	),
2225 	[RTD1625_VE4_GPIO_12] = RTK_PIN_MUX(gpio_12, 0x0, GENMASK(28, 25),
2226 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 25), "gpio"),
2227 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 25), "i2c0"),
2228 		RTK_PIN_FUNC(SHIFT_LEFT(0xd, 25), "pwm0_loc3"),
2229 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 25), "iso_tristate")
2230 	),
2231 
2232 	[RTD1625_VE4_GPIO_13] = RTK_PIN_MUX(gpio_13, 0x4, GENMASK(3, 0),
2233 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
2234 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "i2c0"),
2235 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
2236 	),
2237 	[RTD1625_VE4_GPIO_16] = RTK_PIN_MUX(gpio_16, 0x4, GENMASK(7, 4),
2238 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
2239 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "dptx_hpd"),
2240 		RTK_PIN_FUNC(SHIFT_LEFT(0xd, 4), "pwm2_loc0"),
2241 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
2242 	),
2243 	[RTD1625_VE4_GPIO_17] = RTK_PIN_MUX(gpio_17, 0x4, GENMASK(11, 8),
2244 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
2245 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
2246 	),
2247 	[RTD1625_VE4_GPIO_18] = RTK_PIN_MUX(gpio_18, 0x4, GENMASK(15, 12),
2248 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
2249 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "pcie0"),
2250 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
2251 	),
2252 	[RTD1625_VE4_GPIO_19] = RTK_PIN_MUX(gpio_19, 0x4, GENMASK(19, 16),
2253 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
2254 		RTK_PIN_FUNC(SHIFT_LEFT(0xd, 16), "pwm3_loc0"),
2255 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
2256 	),
2257 	[RTD1625_VE4_GPIO_23] = RTK_PIN_MUX(gpio_23, 0x4, GENMASK(23, 20),
2258 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
2259 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
2260 	),
2261 	[RTD1625_VE4_GPIO_24] = RTK_PIN_MUX(gpio_24, 0x4, GENMASK(27, 24),
2262 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
2263 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 24), "i2c3"),
2264 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
2265 	),
2266 	[RTD1625_VE4_GPIO_25] = RTK_PIN_MUX(gpio_25, 0x4, GENMASK(31, 28),
2267 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio"),
2268 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 28), "i2c3"),
2269 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate")
2270 	),
2271 
2272 	[RTD1625_VE4_GPIO_30] = RTK_PIN_MUX(gpio_30, 0x8, GENMASK(3, 0),
2273 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
2274 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "pcie1"),
2275 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
2276 	),
2277 	[RTD1625_VE4_GPIO_31] = RTK_PIN_MUX(gpio_31, 0x8, GENMASK(7, 4),
2278 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
2279 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
2280 	),
2281 	[RTD1625_VE4_GPIO_32] = RTK_PIN_MUX(gpio_32, 0x8, GENMASK(11, 8),
2282 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
2283 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "uart9"),
2284 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 8), "ve4_uart_loc2"),
2285 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
2286 	),
2287 	[RTD1625_VE4_GPIO_33] = RTK_PIN_MUX(gpio_33, 0x8, GENMASK(15, 12),
2288 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
2289 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "uart9"),
2290 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 12), "ve4_uart_loc2"),
2291 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
2292 	),
2293 	[RTD1625_VE4_GPIO_34] = RTK_PIN_MUX(gpio_34, 0x8, GENMASK(19, 16),
2294 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
2295 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
2296 	),
2297 	[RTD1625_VE4_GPIO_35] = RTK_PIN_MUX(gpio_35, 0x8, GENMASK(23, 20),
2298 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
2299 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
2300 	),
2301 	[RTD1625_VE4_GPIO_42] = RTK_PIN_MUX(gpio_42, 0x8, GENMASK(27, 24),
2302 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
2303 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "sd"),
2304 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
2305 	),
2306 	[RTD1625_VE4_GPIO_43] = RTK_PIN_MUX(gpio_43, 0x8, GENMASK(31, 28),
2307 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio"),
2308 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 28), "sd"),
2309 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate")
2310 	),
2311 
2312 	[RTD1625_VE4_GPIO_44] = RTK_PIN_MUX(gpio_44, 0xc, GENMASK(3, 0),
2313 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
2314 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
2315 	),
2316 	[RTD1625_VE4_GPIO_51] = RTK_PIN_MUX(gpio_51, 0xc, GENMASK(7, 4),
2317 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
2318 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "i2c6_loc1"),
2319 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
2320 	),
2321 	[RTD1625_VE4_GPIO_53] = RTK_PIN_MUX(gpio_53, 0xc, GENMASK(11, 8),
2322 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
2323 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "uart3"),
2324 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "ts0"),
2325 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 8), "gspi2"),
2326 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 8), "ve4_uart_loc0"),
2327 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
2328 	),
2329 	[RTD1625_VE4_GPIO_54] = RTK_PIN_MUX(gpio_54, 0xc, GENMASK(15, 12),
2330 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
2331 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "uart3"),
2332 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "ts0"),
2333 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 12), "gspi2"),
2334 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 12), "ve4_uart_loc0"),
2335 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
2336 	),
2337 	[RTD1625_VE4_GPIO_55] = RTK_PIN_MUX(gpio_55, 0xc, GENMASK(19, 16),
2338 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
2339 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "uart3"),
2340 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "ts0"),
2341 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 16), "gspi2"),
2342 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
2343 	),
2344 	[RTD1625_VE4_GPIO_56] = RTK_PIN_MUX(gpio_56, 0xc, GENMASK(23, 20),
2345 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
2346 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "uart3"),
2347 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 20), "ts0"),
2348 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 20), "gspi2"),
2349 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
2350 	),
2351 	[RTD1625_VE4_GPIO_57] = RTK_PIN_MUX(gpio_57, 0xc, GENMASK(27, 24),
2352 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
2353 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "uart5"),
2354 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 24), "uart0_loc1"),
2355 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 24), "gspi1"),
2356 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
2357 	),
2358 	[RTD1625_VE4_GPIO_58] = RTK_PIN_MUX(gpio_58, 0xc, GENMASK(31, 28),
2359 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio"),
2360 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 28), "uart5"),
2361 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 28), "uart0_loc1"),
2362 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 28), "gspi1"),
2363 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate")
2364 	),
2365 
2366 	[RTD1625_VE4_GPIO_59] = RTK_PIN_MUX(gpio_59, 0x10, GENMASK(3, 0),
2367 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
2368 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "uart4"),
2369 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "i2c4"),
2370 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 0), "gspi1"),
2371 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
2372 	),
2373 	[RTD1625_VE4_GPIO_60] = RTK_PIN_MUX(gpio_60, 0x10, GENMASK(7, 4),
2374 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
2375 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "uart4"),
2376 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "i2c4"),
2377 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 4), "gspi1"),
2378 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
2379 	),
2380 	[RTD1625_VE4_GPIO_61] = RTK_PIN_MUX(gpio_61, 0x10, GENMASK(11, 8),
2381 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
2382 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "i2c6_loc1"),
2383 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 8), "spdif_out"),
2384 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 8), "spdif_in_optical"),
2385 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
2386 	),
2387 	[RTD1625_VE4_GPIO_62] = RTK_PIN_MUX(gpio_62, 0x10, GENMASK(15, 12),
2388 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
2389 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "pll_test_loc0"),
2390 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
2391 	),
2392 	[RTD1625_VE4_GPIO_63] = RTK_PIN_MUX(gpio_63, 0x10, GENMASK(19, 16),
2393 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
2394 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "pll_test_loc0"),
2395 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
2396 	),
2397 	[RTD1625_VE4_GPIO_92] = RTK_PIN_MUX(gpio_92, 0x10, GENMASK(23, 20),
2398 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
2399 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "uart6"),
2400 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 20), "i2c7"),
2401 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 20), "ve4_uart_loc1"),
2402 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
2403 	),
2404 	[RTD1625_VE4_GPIO_93] = RTK_PIN_MUX(gpio_93, 0x10, GENMASK(27, 24),
2405 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
2406 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "uart6"),
2407 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 24), "i2c7"),
2408 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 24), "ve4_uart_loc1"),
2409 		RTK_PIN_FUNC(SHIFT_LEFT(0xd, 24), "pwm1_loc1"),
2410 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
2411 	),
2412 	[RTD1625_VE4_GPIO_132] = RTK_PIN_MUX(gpio_132, 0x10, GENMASK(31, 28),
2413 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio"),
2414 		RTK_PIN_FUNC(SHIFT_LEFT(0xd, 28), "pwm6"),
2415 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate")
2416 	),
2417 
2418 	[RTD1625_VE4_GPIO_133] = RTK_PIN_MUX(gpio_133, 0x14, GENMASK(3, 0),
2419 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
2420 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "ts1"),
2421 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
2422 	),
2423 	[RTD1625_VE4_GPIO_134] = RTK_PIN_MUX(gpio_134, 0x14, GENMASK(7, 4),
2424 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
2425 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "ts1"),
2426 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
2427 	),
2428 	[RTD1625_VE4_GPIO_135] = RTK_PIN_MUX(gpio_135, 0x14, GENMASK(11, 8),
2429 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
2430 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "ts1"),
2431 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
2432 	),
2433 	[RTD1625_VE4_GPIO_136] = RTK_PIN_MUX(gpio_136, 0x14, GENMASK(15, 12),
2434 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
2435 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "ts1"),
2436 		RTK_PIN_FUNC(SHIFT_LEFT(0xd, 12), "pwm0_loc0"),
2437 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
2438 	),
2439 	[RTD1625_VE4_GPIO_137] = RTK_PIN_MUX(gpio_137, 0x14, GENMASK(19, 16),
2440 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
2441 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "i2c6_loc0"),
2442 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
2443 	),
2444 	[RTD1625_VE4_GPIO_138] = RTK_PIN_MUX(gpio_138, 0x14, GENMASK(23, 20),
2445 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
2446 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 20), "i2c6_loc0"),
2447 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
2448 	),
2449 	[RTD1625_VE4_GPIO_139] = RTK_PIN_MUX(gpio_139, 0x14, GENMASK(27, 24),
2450 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
2451 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
2452 	),
2453 	[RTD1625_VE4_GPIO_140] = RTK_PIN_MUX(gpio_140, 0x14, GENMASK(31, 28),
2454 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio"),
2455 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate")
2456 	),
2457 
2458 	[RTD1625_VE4_GPIO_141] = RTK_PIN_MUX(gpio_141, 0x18, GENMASK(3, 0),
2459 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
2460 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "csi0"),
2461 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
2462 	),
2463 	[RTD1625_VE4_GPIO_142] = RTK_PIN_MUX(gpio_142, 0x18, GENMASK(7, 4),
2464 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
2465 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
2466 	),
2467 	[RTD1625_VE4_GPIO_143] = RTK_PIN_MUX(gpio_143, 0x18, GENMASK(11, 8),
2468 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
2469 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
2470 	),
2471 	[RTD1625_VE4_GPIO_144] = RTK_PIN_MUX(gpio_144, 0x18, GENMASK(15, 12),
2472 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
2473 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "csi1"),
2474 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
2475 	),
2476 	[RTD1625_VE4_GPIO_164] = RTK_PIN_MUX(gpio_164, 0x18, GENMASK(19, 16),
2477 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
2478 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "etn_led_loc1"),
2479 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "etn_phy_loc1"),
2480 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 16), "i2c5"),
2481 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
2482 	),
2483 	[RTD1625_VE4_GPIO_165] = RTK_PIN_MUX(gpio_165, 0x18, GENMASK(23, 20),
2484 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
2485 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "etn_led_loc1"),
2486 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 20), "etn_phy_loc1"),
2487 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 20), "i2c5"),
2488 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
2489 	),
2490 	[RTD1625_VE4_UART_LOC] = RTK_PIN_MUX(ve4_uart_loc, 0x80, GENMASK(2, 0),
2491 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "ve4_uart_loc0"),
2492 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "ve4_uart_loc1"),
2493 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 0), "ve4_uart_loc2")
2494 	),
2495 };
2496 
2497 static const struct rtd_pin_desc rtd1625_main2_muxes[] = {
2498 	[RTD1625_MAIN2_EMMC_RST_N] = RTK_PIN_MUX(emmc_rst_n, 0x0, GENMASK(3, 0),
2499 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
2500 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "emmc"),
2501 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
2502 	),
2503 	[RTD1625_MAIN2_EMMC_DD_SB] = RTK_PIN_MUX(emmc_dd_sb, 0x0, GENMASK(7, 4),
2504 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
2505 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "emmc"),
2506 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
2507 	),
2508 	[RTD1625_MAIN2_EMMC_CLK] = RTK_PIN_MUX(emmc_clk, 0x0, GENMASK(11, 8),
2509 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
2510 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "emmc"),
2511 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
2512 	),
2513 	[RTD1625_MAIN2_EMMC_CMD] = RTK_PIN_MUX(emmc_cmd, 0x0, GENMASK(15, 12),
2514 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
2515 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "emmc"),
2516 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
2517 	),
2518 	[RTD1625_MAIN2_EMMC_DATA_0] = RTK_PIN_MUX(emmc_data_0, 0x0, GENMASK(19, 16),
2519 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
2520 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "emmc"),
2521 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 16), "nf"),
2522 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
2523 	),
2524 	[RTD1625_MAIN2_EMMC_DATA_1] = RTK_PIN_MUX(emmc_data_1, 0x0, GENMASK(23, 20),
2525 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
2526 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 20), "emmc"),
2527 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 20), "nf"),
2528 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
2529 	),
2530 	[RTD1625_MAIN2_EMMC_DATA_2] = RTK_PIN_MUX(emmc_data_2, 0x0, GENMASK(27, 24),
2531 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
2532 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 24), "emmc"),
2533 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 24), "nf"),
2534 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
2535 	),
2536 	[RTD1625_MAIN2_EMMC_DATA_3] = RTK_PIN_MUX(emmc_data_3, 0x0, GENMASK(31, 28),
2537 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio"),
2538 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 28), "emmc"),
2539 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 28), "nf"),
2540 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate")
2541 	),
2542 
2543 	[RTD1625_MAIN2_EMMC_DATA_4] = RTK_PIN_MUX(emmc_data_4, 0x4, GENMASK(3, 0),
2544 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
2545 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "emmc"),
2546 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 0), "nf"),
2547 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
2548 	),
2549 	[RTD1625_MAIN2_EMMC_DATA_5] = RTK_PIN_MUX(emmc_data_5, 0x4, GENMASK(7, 4),
2550 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
2551 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "emmc"),
2552 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 4), "nf"),
2553 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
2554 	),
2555 	[RTD1625_MAIN2_EMMC_DATA_6] = RTK_PIN_MUX(emmc_data_6, 0x4, GENMASK(11, 8),
2556 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
2557 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "emmc"),
2558 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
2559 	),
2560 	[RTD1625_MAIN2_EMMC_DATA_7] = RTK_PIN_MUX(emmc_data_7, 0x4, GENMASK(15, 12),
2561 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
2562 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "emmc"),
2563 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
2564 	),
2565 	[RTD1625_MAIN2_GPIO_14] = RTK_PIN_MUX(gpio_14, 0x4, GENMASK(19, 16),
2566 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
2567 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "etn_led_loc0"),
2568 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "etn_phy_loc0"),
2569 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 16), "rgmii"),
2570 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
2571 	),
2572 	[RTD1625_MAIN2_GPIO_15] = RTK_PIN_MUX(gpio_15, 0x4, GENMASK(23, 20),
2573 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
2574 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "etn_led_loc0"),
2575 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 20), "etn_phy_loc0"),
2576 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 20), "rgmii"),
2577 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
2578 	),
2579 	[RTD1625_MAIN2_GPIO_20] = RTK_PIN_MUX(gpio_20, 0x4, GENMASK(27, 24),
2580 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
2581 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 24), "i2c1"),
2582 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
2583 	),
2584 	[RTD1625_MAIN2_GPIO_21] = RTK_PIN_MUX(gpio_21, 0x4, GENMASK(31, 28),
2585 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio"),
2586 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 28), "i2c1"),
2587 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate")
2588 	),
2589 
2590 	[RTD1625_MAIN2_GPIO_22] = RTK_PIN_MUX(gpio_22, 0x8, GENMASK(3, 0),
2591 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
2592 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "dbg_out1")
2593 	),
2594 	[RTD1625_MAIN2_HIF_DATA] = RTK_PIN_MUX(hif_data, 0x8, GENMASK(7, 4),
2595 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
2596 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "sd"),
2597 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 4), "scpu_ejtag_loc1"),
2598 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 4), "acpu_ejtag_loc1"),
2599 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 4), "pcpu_ejtag_loc1"),
2600 		RTK_PIN_FUNC(SHIFT_LEFT(0x6, 4), "aupu0_ejtag_loc1"),
2601 		RTK_PIN_FUNC(SHIFT_LEFT(0x7, 4), "ve2_ejtag_loc1"),
2602 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 4), "hi_loc0"),
2603 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 4), "hi_m"),
2604 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 4), "aupu1_ejtag_loc1"),
2605 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
2606 	),
2607 	[RTD1625_MAIN2_HIF_EN] = RTK_PIN_MUX(hif_en, 0x8, GENMASK(11, 8),
2608 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
2609 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 8), "sd"),
2610 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 8), "scpu_ejtag_loc1"),
2611 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 8), "acpu_ejtag_loc1"),
2612 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 8), "pcpu_ejtag_loc1"),
2613 		RTK_PIN_FUNC(SHIFT_LEFT(0x6, 8), "aupu0_ejtag_loc1"),
2614 		RTK_PIN_FUNC(SHIFT_LEFT(0x7, 8), "ve2_ejtag_loc1"),
2615 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 8), "hi_loc0"),
2616 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 8), "hi_m"),
2617 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 8), "aupu1_ejtag_loc1"),
2618 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
2619 	),
2620 	[RTD1625_MAIN2_HIF_RDY] = RTK_PIN_MUX(hif_rdy, 0x8, GENMASK(15, 12),
2621 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
2622 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 12), "sd"),
2623 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 12), "scpu_ejtag_loc1"),
2624 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 12), "acpu_ejtag_loc1"),
2625 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 12), "pcpu_ejtag_loc1"),
2626 		RTK_PIN_FUNC(SHIFT_LEFT(0x6, 12), "aupu0_ejtag_loc1"),
2627 		RTK_PIN_FUNC(SHIFT_LEFT(0x7, 12), "ve2_ejtag_loc1"),
2628 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 12), "hi_loc0"),
2629 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 12), "hi_m"),
2630 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 12), "aupu1_ejtag_loc1"),
2631 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
2632 	),
2633 	[RTD1625_MAIN2_HIF_CLK] = RTK_PIN_MUX(hif_clk, 0x8, GENMASK(19, 16),
2634 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
2635 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 16), "sd"),
2636 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 16), "scpu_ejtag_loc1"),
2637 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 16), "acpu_ejtag_loc1"),
2638 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 16), "pcpu_ejtag_loc1"),
2639 		RTK_PIN_FUNC(SHIFT_LEFT(0x6, 16), "aupu0_ejtag_loc1"),
2640 		RTK_PIN_FUNC(SHIFT_LEFT(0x7, 16), "ve2_ejtag_loc1"),
2641 		RTK_PIN_FUNC(SHIFT_LEFT(0x9, 16), "hi_loc0"),
2642 		RTK_PIN_FUNC(SHIFT_LEFT(0xa, 16), "hi_m"),
2643 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 16), "aupu1_ejtag_loc1"),
2644 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
2645 	),
2646 	[RTD1625_MAIN2_GPIO_40] = RTK_PIN_MUX(gpio_40, 0x8, GENMASK(23, 20),
2647 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
2648 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 20), "sd"),
2649 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 20), "scpu_ejtag_loc1"),
2650 		RTK_PIN_FUNC(SHIFT_LEFT(0x4, 20), "acpu_ejtag_loc1"),
2651 		RTK_PIN_FUNC(SHIFT_LEFT(0x5, 20), "pcpu_ejtag_loc1"),
2652 		RTK_PIN_FUNC(SHIFT_LEFT(0x6, 20), "aupu0_ejtag_loc1"),
2653 		RTK_PIN_FUNC(SHIFT_LEFT(0x7, 20), "ve2_ejtag_loc1"),
2654 		RTK_PIN_FUNC(SHIFT_LEFT(0xe, 20), "aupu1_ejtag_loc1"),
2655 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
2656 	),
2657 	[RTD1625_MAIN2_GPIO_41] = RTK_PIN_MUX(gpio_41, 0x8, GENMASK(27, 24),
2658 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
2659 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 24), "sd"),
2660 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
2661 	),
2662 	[RTD1625_MAIN2_GPIO_64] = RTK_PIN_MUX(gpio_64, 0x8, GENMASK(31, 28),
2663 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio"),
2664 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 28), "spi"),
2665 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate")
2666 	),
2667 
2668 	[RTD1625_MAIN2_GPIO_65] = RTK_PIN_MUX(gpio_65, 0xc, GENMASK(3, 0),
2669 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
2670 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 0), "pll_test_loc1"),
2671 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 0), "spi"),
2672 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
2673 	),
2674 	[RTD1625_MAIN2_GPIO_66] = RTK_PIN_MUX(gpio_66, 0xc, GENMASK(7, 4),
2675 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
2676 		RTK_PIN_FUNC(SHIFT_LEFT(0x1, 4), "pll_test_loc1"),
2677 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 4), "spi"),
2678 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
2679 	),
2680 	[RTD1625_MAIN2_GPIO_67] = RTK_PIN_MUX(gpio_67, 0xc, GENMASK(13, 8),
2681 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
2682 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "spi"),
2683 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
2684 	),
2685 	[RTD1625_MAIN2_GPIO_80] = RTK_PIN_MUX(gpio_80, 0xc, GENMASK(15, 12),
2686 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
2687 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "rmii"),
2688 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 12), "rgmii"),
2689 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
2690 	),
2691 	[RTD1625_MAIN2_GPIO_81] = RTK_PIN_MUX(gpio_81, 0xc, GENMASK(19, 16),
2692 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
2693 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "rmii"),
2694 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 16), "rgmii"),
2695 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
2696 	),
2697 	[RTD1625_MAIN2_GPIO_82] = RTK_PIN_MUX(gpio_82, 0xc, GENMASK(23, 20),
2698 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
2699 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 20), "rmii"),
2700 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 20), "rgmii"),
2701 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
2702 	),
2703 	[RTD1625_MAIN2_GPIO_83] = RTK_PIN_MUX(gpio_83, 0xc, GENMASK(27, 24),
2704 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
2705 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 24), "rmii"),
2706 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 24), "rgmii"),
2707 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
2708 	),
2709 	[RTD1625_MAIN2_GPIO_84] = RTK_PIN_MUX(gpio_84, 0xc, GENMASK(31, 28),
2710 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 28), "gpio"),
2711 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 28), "rmii"),
2712 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 28), "rgmii"),
2713 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 28), "iso_tristate")
2714 	),
2715 
2716 	[RTD1625_MAIN2_GPIO_85] = RTK_PIN_MUX(gpio_85, 0x10, GENMASK(3, 0),
2717 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 0), "gpio"),
2718 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 0), "rgmii"),
2719 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 0), "iso_tristate")
2720 	),
2721 	[RTD1625_MAIN2_GPIO_86] = RTK_PIN_MUX(gpio_86, 0x10, GENMASK(7, 4),
2722 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 4), "gpio"),
2723 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 4), "rgmii"),
2724 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 4), "iso_tristate")
2725 	),
2726 	[RTD1625_MAIN2_GPIO_87] = RTK_PIN_MUX(gpio_87, 0x10, GENMASK(11, 8),
2727 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 8), "gpio"),
2728 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 8), "rmii"),
2729 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 8), "rgmii"),
2730 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 8), "iso_tristate")
2731 	),
2732 	[RTD1625_MAIN2_GPIO_88] = RTK_PIN_MUX(gpio_88, 0x10, GENMASK(15, 12),
2733 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 12), "gpio"),
2734 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 12), "rmii"),
2735 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 12), "rgmii"),
2736 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 12), "iso_tristate")
2737 	),
2738 	[RTD1625_MAIN2_GPIO_89] = RTK_PIN_MUX(gpio_89, 0x10, GENMASK(19, 16),
2739 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 16), "gpio"),
2740 		RTK_PIN_FUNC(SHIFT_LEFT(0x2, 16), "rmii"),
2741 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 16), "rgmii"),
2742 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 16), "iso_tristate")
2743 	),
2744 	[RTD1625_MAIN2_GPIO_90] = RTK_PIN_MUX(gpio_90, 0x10, GENMASK(23, 20),
2745 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 20), "gpio"),
2746 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 20), "rgmii"),
2747 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 20), "iso_tristate")
2748 	),
2749 	[RTD1625_MAIN2_GPIO_91] = RTK_PIN_MUX(gpio_91, 0x10, GENMASK(27, 24),
2750 		RTK_PIN_FUNC(SHIFT_LEFT(0x0, 24), "gpio"),
2751 		RTK_PIN_FUNC(SHIFT_LEFT(0x3, 24), "rgmii"),
2752 		RTK_PIN_FUNC(SHIFT_LEFT(0xf, 24), "iso_tristate")
2753 	),
2754 };
2755 
2756 static const struct rtd_pin_config_desc rtd1625_iso_configs[] = {
2757 	[RTD1625_ISO_GPIO_8] = RTK_PIN_CONFIG_V2(gpio_8, 0x20, 0, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2758 	[RTD1625_ISO_GPIO_9] = RTK_PIN_CONFIG_V2(gpio_9, 0x20, 6, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2759 	[RTD1625_ISO_GPIO_10] = RTK_PIN_CONFIG_V2(gpio_10, 0x20, 12, 1, 2, 0, 3, 4, 5,
2760 						  PADDRI_4_8),
2761 	[RTD1625_ISO_GPIO_11] = RTK_PIN_CONFIG_V2(gpio_11, 0x20, 18, 1, 2, 0, 3, 4, 5,
2762 						  PADDRI_4_8),
2763 	[RTD1625_ISO_GPIO_45] = RTK_PIN_CONFIG(gpio_45, 0x24, 0, 0, 1, NA, 2, 12, NA),
2764 	[RTD1625_ISO_GPIO_46] = RTK_PIN_CONFIG(gpio_46, 0x24, 13, 0, 1, NA, 2, 12, NA),
2765 	[RTD1625_ISO_GPIO_47] = RTK_PIN_CONFIG(gpio_47, 0x28, 0, 0, 1, NA, 2, 12, NA),
2766 	[RTD1625_ISO_GPIO_48] = RTK_PIN_CONFIG(gpio_48, 0x28, 13, 0, 1, NA, 2, 12, NA),
2767 	[RTD1625_ISO_GPIO_49] = RTK_PIN_CONFIG(gpio_49, 0x2c, 0, 0, 1, NA, 2, 12, NA),
2768 	[RTD1625_ISO_GPIO_50] = RTK_PIN_CONFIG(gpio_50, 0x2c, 13, 0, 1, NA, 2, 12, NA),
2769 	[RTD1625_ISO_GPIO_52] = RTK_PIN_CONFIG_V2(gpio_52, 0x2c, 26, 1, 2, 0, 3, 4, 5,
2770 						  PADDRI_4_8),
2771 	[RTD1625_ISO_GPIO_94] = RTK_PIN_CONFIG_V2(gpio_94, 0x30, 0, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2772 	[RTD1625_ISO_GPIO_95] = RTK_PIN_CONFIG_V2(gpio_95, 0x30, 6, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2773 	[RTD1625_ISO_GPIO_96] = RTK_PIN_CONFIG_V2(gpio_96, 0x30, 12, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2774 	[RTD1625_ISO_GPIO_97] = RTK_PIN_CONFIG_V2(gpio_97, 0x30, 18, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2775 	[RTD1625_ISO_GPIO_98] = RTK_PIN_CONFIG_V2(gpio_98, 0x30, 24, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2776 	[RTD1625_ISO_GPIO_99] = RTK_PIN_CONFIG_V2(gpio_99, 0x34, 0, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2777 	[RTD1625_ISO_GPIO_100] = RTK_PIN_CONFIG_V2(gpio_100, 0x34, 6, 1, 2, 0, 3, 4, 5,
2778 						   PADDRI_4_8),
2779 	[RTD1625_ISO_GPIO_101] = RTK_PIN_CONFIG_V2(gpio_101, 0x34, 12, 1, 2, 0, 3, 4, 5,
2780 						   PADDRI_4_8),
2781 	[RTD1625_ISO_GPIO_102] = RTK_PIN_CONFIG_V2(gpio_102, 0x34, 18, 1, 2, 0, 3, 4, 5,
2782 						   PADDRI_4_8),
2783 	[RTD1625_ISO_GPIO_103] = RTK_PIN_CONFIG_V2(gpio_103, 0x34, 24, 1, 2, 0, 3, 4, 5,
2784 						   PADDRI_4_8),
2785 	[RTD1625_ISO_GPIO_104] = RTK_PIN_CONFIG_V2(gpio_104, 0x38, 0, 1, 2, 0, 3, 4, 5,
2786 						   PADDRI_4_8),
2787 	[RTD1625_ISO_GPIO_105] = RTK_PIN_CONFIG_V2(gpio_105, 0x38, 6, 1, 2, 0, 3, 4, 5,
2788 						   PADDRI_4_8),
2789 	[RTD1625_ISO_GPIO_106] = RTK_PIN_CONFIG_V2(gpio_106, 0x38, 12, 1, 2, 0, 3, 4, 5,
2790 						   PADDRI_4_8),
2791 	[RTD1625_ISO_GPIO_107] = RTK_PIN_CONFIG_V2(gpio_107, 0x38, 18, 1, 2, 0, 3, 4, 5,
2792 						   PADDRI_4_8),
2793 	[RTD1625_ISO_GPIO_108] = RTK_PIN_CONFIG_V2(gpio_108, 0x38, 24, 1, 2, 0, 3, 4, 5,
2794 						   PADDRI_4_8),
2795 	[RTD1625_ISO_GPIO_109] = RTK_PIN_CONFIG_V2(gpio_109, 0x3c, 0, 1, 2, 0, 3, 4, 5,
2796 						   PADDRI_4_8),
2797 	[RTD1625_ISO_GPIO_110] = RTK_PIN_CONFIG_V2(gpio_110, 0x3c, 6, 1, 2, 0, 3, 4, 5,
2798 						   PADDRI_4_8),
2799 	[RTD1625_ISO_GPIO_111] = RTK_PIN_CONFIG_V2(gpio_111, 0x3c, 12, 1, 2, 0, 3, 4, 5,
2800 						   PADDRI_4_8),
2801 	[RTD1625_ISO_GPIO_112] = RTK_PIN_CONFIG_V2(gpio_112, 0x3c, 18, 1, 2, 0, 3, 4, 5,
2802 						   PADDRI_4_8),
2803 	[RTD1625_ISO_GPIO_128] = RTK_PIN_CONFIG_V2(gpio_128, 0x3c, 24, 1, 2, 0, 3, 4, 5,
2804 						   PADDRI_4_8),
2805 	[RTD1625_ISO_GPIO_129] = RTK_PIN_CONFIG_V2(gpio_129, 0x40, 0, 1, 2, 0, 3, 4, 5,
2806 						   PADDRI_4_8),
2807 	[RTD1625_ISO_GPIO_130] = RTK_PIN_CONFIG_V2(gpio_130, 0x40, 6, 1, 2, 0, 3, 4, 5,
2808 						   PADDRI_4_8),
2809 	[RTD1625_ISO_GPIO_131] = RTK_PIN_CONFIG_V2(gpio_131, 0x40, 12, 1, 2, 0, 3, 4, 5,
2810 						   PADDRI_4_8),
2811 	[RTD1625_ISO_GPIO_145] = RTK_PIN_CONFIG_V2(gpio_145, 0x40, 18, 1, 2, 0, 3, 4, 5,
2812 						   PADDRI_4_8),
2813 	[RTD1625_ISO_GPIO_146] = RTK_PIN_CONFIG_V2(gpio_146, 0x40, 24, 1, 2, 0, 3, 4, 5,
2814 						   PADDRI_4_8),
2815 	[RTD1625_ISO_GPIO_147] = RTK_PIN_CONFIG_V2(gpio_147, 0x44, 0, 1, 2, 0, 3, 4, 5,
2816 						   PADDRI_4_8),
2817 	[RTD1625_ISO_GPIO_148] = RTK_PIN_CONFIG_V2(gpio_148, 0x44, 6, 1, 2, 0, 3, 4, 5,
2818 						   PADDRI_4_8),
2819 	[RTD1625_ISO_GPIO_149] = RTK_PIN_CONFIG_V2(gpio_149, 0x44, 12, 1, 2, 0, 3, 4, 5,
2820 						   PADDRI_4_8),
2821 	[RTD1625_ISO_GPIO_150] = RTK_PIN_CONFIG_V2(gpio_150, 0x44, 18, 1, 2, 0, 3, 4, 5,
2822 						   PADDRI_4_8),
2823 	[RTD1625_ISO_GPIO_151] = RTK_PIN_CONFIG_V2(gpio_151, 0x44, 24, 1, 2, 0, 3, 4, 5,
2824 						   PADDRI_4_8),
2825 	[RTD1625_ISO_GPIO_152] = RTK_PIN_CONFIG_V2(gpio_152, 0x48, 0, 1, 2, 0, 3, 4, 5,
2826 						   PADDRI_4_8),
2827 	[RTD1625_ISO_GPIO_153] = RTK_PIN_CONFIG_V2(gpio_153, 0x48, 6, 1, 2, 0, 3, 4, 5,
2828 						   PADDRI_4_8),
2829 	[RTD1625_ISO_GPIO_154] = RTK_PIN_CONFIG_V2(gpio_154, 0x48, 12, 1, 2, 0, 3, 4, 5,
2830 						   PADDRI_4_8),
2831 	[RTD1625_ISO_GPIO_155] = RTK_PIN_CONFIG_V2(gpio_155, 0x48, 18, 1, 2, 0, 3, 4, 5,
2832 						   PADDRI_4_8),
2833 	[RTD1625_ISO_GPIO_156] = RTK_PIN_CONFIG_V2(gpio_156, 0x48, 24, 1, 2, 0, 3, 4, 5,
2834 						   PADDRI_4_8),
2835 	[RTD1625_ISO_GPIO_157] = RTK_PIN_CONFIG_V2(gpio_157, 0x4c, 0, 1, 2, 0, 3, 4, 5,
2836 						   PADDRI_4_8),
2837 	[RTD1625_ISO_GPIO_158] = RTK_PIN_CONFIG_V2(gpio_158, 0x4c, 6, 1, 2, 0, 3, 4, 5,
2838 						   PADDRI_4_8),
2839 	[RTD1625_ISO_GPIO_159] = RTK_PIN_CONFIG_V2(gpio_159, 0x4c, 12, 1, 2, 0, 3, 4, 5,
2840 						   PADDRI_4_8),
2841 	[RTD1625_ISO_GPIO_160] = RTK_PIN_CONFIG_V2(gpio_160, 0x4c, 18, 1, 2, 0, 3, 4, 5,
2842 						   PADDRI_4_8),
2843 	[RTD1625_ISO_GPIO_161] = RTK_PIN_CONFIG_V2(gpio_161, 0x4c, 24, 1, 2, 0, 3, 4, 5,
2844 						   PADDRI_4_8),
2845 	[RTD1625_ISO_GPIO_162] = RTK_PIN_CONFIG_V2(gpio_162, 0x50, 0, 1, 2, 0, 3, 4, 5,
2846 						   PADDRI_4_8),
2847 	[RTD1625_ISO_GPIO_163] = RTK_PIN_CONFIG_V2(gpio_163, 0x50, 6, 1, 2, 0, 3, 4, 5,
2848 						   PADDRI_4_8),
2849 	[RTD1625_ISO_USB_CC1] = RTK_PIN_CONFIG_V2(usb_cc1, 0x50, 12, NA, NA, 0, 1, 2, 3,
2850 						  PADDRI_4_8),
2851 	[RTD1625_ISO_USB_CC2] = RTK_PIN_CONFIG_V2(usb_cc2, 0x50, 16, NA, NA, 0, 1, 2, 3,
2852 						  PADDRI_4_8),
2853 };
2854 
2855 static const struct rtd_pin_config_desc rtd1625_isom_configs[] = {
2856 	[RTD1625_ISOM_GPIO_0] = RTK_PIN_CONFIG_V2(gpio_0, 0x4, 5, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2857 	[RTD1625_ISOM_GPIO_1] = RTK_PIN_CONFIG_V2(gpio_1, 0x4, 11, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2858 	[RTD1625_ISOM_GPIO_28] = RTK_PIN_CONFIG_V2(gpio_28, 0x4, 17, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2859 	[RTD1625_ISOM_GPIO_29] = RTK_PIN_CONFIG_V2(gpio_29, 0x4, 23, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2860 };
2861 
2862 static const struct rtd_pin_config_desc rtd1625_ve4_configs[] = {
2863 	[RTD1625_VE4_GPIO_2] = RTK_PIN_CONFIG_V2(gpio_2, 0x1c, 0, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2864 	[RTD1625_VE4_GPIO_3] = RTK_PIN_CONFIG_V2(gpio_3, 0x1c, 6, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2865 	[RTD1625_VE4_GPIO_4] = RTK_PIN_CONFIG_V2(gpio_4, 0x1c, 12, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2866 	[RTD1625_VE4_GPIO_5] = RTK_PIN_CONFIG_V2(gpio_5, 0x1c, 18, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2867 	[RTD1625_VE4_GPIO_6] = RTK_PIN_CONFIG_V2(gpio_6, 0x1c, 24, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2868 	[RTD1625_VE4_GPIO_7] = RTK_PIN_CONFIG_V2(gpio_7, 0x20, 0, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2869 	[RTD1625_VE4_GPIO_12] = RTK_PIN_CONFIG_V2(gpio_12, 0x20, 6, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2870 	[RTD1625_VE4_GPIO_13] = RTK_PIN_CONFIG_V2(gpio_13, 0x20, 18, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2871 	[RTD1625_VE4_GPIO_16] = RTK_PIN_CONFIG_V2(gpio_16, 0x20, 18, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2872 	[RTD1625_VE4_GPIO_17] = RTK_PIN_CONFIG_V2(gpio_17, 0x20, 24, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2873 	[RTD1625_VE4_GPIO_18] = RTK_PIN_CONFIG_V2(gpio_18, 0x24, 0, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2874 	[RTD1625_VE4_GPIO_19] = RTK_PIN_CONFIG_V2(gpio_19, 0x24, 6, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2875 	[RTD1625_VE4_GPIO_23] = RTK_PIN_CONFIG_V2(gpio_23, 0x24, 12, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2876 	[RTD1625_VE4_GPIO_24] = RTK_PIN_CONFIG_V2(gpio_24, 0x24, 18, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2877 	[RTD1625_VE4_GPIO_25] = RTK_PIN_CONFIG_V2(gpio_25, 0x24, 24, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2878 	[RTD1625_VE4_GPIO_30] = RTK_PIN_CONFIG_V2(gpio_30, 0x28, 0, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2879 	[RTD1625_VE4_GPIO_31] = RTK_PIN_CONFIG_V2(gpio_31, 0x28, 6, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2880 	[RTD1625_VE4_GPIO_32] = RTK_PIN_CONFIG_V2(gpio_32, 0x28, 12, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2881 	[RTD1625_VE4_GPIO_33] = RTK_PIN_CONFIG_V2(gpio_33, 0x28, 18, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2882 	[RTD1625_VE4_GPIO_34] = RTK_PIN_CONFIG_V2(gpio_34, 0x28, 24, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2883 	[RTD1625_VE4_GPIO_35] = RTK_PIN_CONFIG_V2(gpio_35, 0x2c, 0, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2884 	[RTD1625_VE4_GPIO_42] = RTK_PIN_CONFIG_V2(gpio_42, 0x2c, 6, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2885 	[RTD1625_VE4_GPIO_43] = RTK_PIN_CONFIG_V2(gpio_43, 0x2c, 12, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2886 	[RTD1625_VE4_GPIO_44] = RTK_PIN_CONFIG_V2(gpio_44, 0x2c, 18, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2887 	[RTD1625_VE4_GPIO_51] = RTK_PIN_CONFIG_V2(gpio_51, 0x2c, 24, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2888 	[RTD1625_VE4_GPIO_53] = RTK_PIN_CONFIG_V2(gpio_53, 0x30, 0, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2889 	[RTD1625_VE4_GPIO_54] = RTK_PIN_CONFIG_V2(gpio_54, 0x30, 6, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2890 	[RTD1625_VE4_GPIO_55] = RTK_PIN_CONFIG_V2(gpio_55, 0x30, 12, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2891 	[RTD1625_VE4_GPIO_56] = RTK_PIN_CONFIG_V2(gpio_56, 0x30, 18, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2892 	[RTD1625_VE4_GPIO_57] = RTK_PIN_CONFIG_V2(gpio_57, 0x30, 24, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2893 	[RTD1625_VE4_GPIO_58] = RTK_PIN_CONFIG_V2(gpio_58, 0x34, 0, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2894 	[RTD1625_VE4_GPIO_59] = RTK_PIN_CONFIG_V2(gpio_59, 0x34, 6, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2895 	[RTD1625_VE4_GPIO_60] = RTK_PIN_CONFIG_V2(gpio_60, 0x34, 12, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2896 	[RTD1625_VE4_GPIO_61] = RTK_PIN_CONFIG_V2(gpio_61, 0x34, 18, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2897 	[RTD1625_VE4_GPIO_62] = RTK_PIN_CONFIG_V2(gpio_62, 0x34, 24, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2898 	[RTD1625_VE4_GPIO_63] = RTK_PIN_CONFIG_V2(gpio_63, 0x38, 0, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2899 	[RTD1625_VE4_GPIO_92] = RTK_PIN_CONFIG_V2(gpio_92, 0x38, 6, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2900 	[RTD1625_VE4_GPIO_93] = RTK_PIN_CONFIG_V2(gpio_93, 0x38, 12, 1, 2, 0, 3, 4, 5, PADDRI_4_8),
2901 	[RTD1625_VE4_GPIO_132] = RTK_PIN_CONFIG_V2(gpio_132, 0x38, 18, 1, 2, 0, 3, 4, 5,
2902 						   PADDRI_4_8),
2903 	[RTD1625_VE4_GPIO_133] = RTK_PIN_CONFIG_V2(gpio_133, 0x38, 24, 1, 2, 0, 3, 4, 5,
2904 						   PADDRI_4_8),
2905 	[RTD1625_VE4_GPIO_134] = RTK_PIN_CONFIG_V2(gpio_134, 0x3c, 0, 1, 2, 0, 3, 4, 5,
2906 						   PADDRI_4_8),
2907 	[RTD1625_VE4_GPIO_135] = RTK_PIN_CONFIG_V2(gpio_135, 0x3c, 6, 1, 2, 0, 3, 4, 5,
2908 						   PADDRI_4_8),
2909 	[RTD1625_VE4_GPIO_136] = RTK_PIN_CONFIG_V2(gpio_136, 0x3c, 12, 1, 2, 0, 3, 4, 5,
2910 						   PADDRI_4_8),
2911 	[RTD1625_VE4_GPIO_137] = RTK_PIN_CONFIG(gpio_137, 0x3c, 18, 1, 2, 0, NA, NA, PADDRI_4_8),
2912 	[RTD1625_VE4_GPIO_138] = RTK_PIN_CONFIG(gpio_138, 0x3c, 21, 1, 2, 0, NA, NA, PADDRI_4_8),
2913 	[RTD1625_VE4_GPIO_139] = RTK_PIN_CONFIG(gpio_139, 0x3c, 24, 1, 2, 0, NA, NA, PADDRI_4_8),
2914 	[RTD1625_VE4_GPIO_140] = RTK_PIN_CONFIG(gpio_140, 0x3c, 27, 1, 2, 0, NA, NA, PADDRI_4_8),
2915 	[RTD1625_VE4_GPIO_141] = RTK_PIN_CONFIG(gpio_141, 0x40, 0, 1, 2, 0, NA, NA, PADDRI_4_8),
2916 	[RTD1625_VE4_GPIO_142] = RTK_PIN_CONFIG(gpio_142, 0x40, 3, 1, 2, 0, NA, NA, PADDRI_4_8),
2917 	[RTD1625_VE4_GPIO_143] = RTK_PIN_CONFIG(gpio_143, 0x40, 6, 1, 2, 0, NA, NA, PADDRI_4_8),
2918 	[RTD1625_VE4_GPIO_144] = RTK_PIN_CONFIG(gpio_144, 0x40, 9, 1, 2, 0, NA, NA, PADDRI_4_8),
2919 	[RTD1625_VE4_GPIO_164] = RTK_PIN_CONFIG(gpio_164, 0x40, 12, 1, 2, 0, NA, NA, PADDRI_4_8),
2920 	[RTD1625_VE4_GPIO_165] = RTK_PIN_CONFIG(gpio_165, 0x40, 15, 1, 2, 0, NA, NA, PADDRI_4_8),
2921 };
2922 
2923 static const struct rtd_pin_config_desc rtd1625_main2_configs[] = {
2924 	[RTD1625_MAIN2_EMMC_CLK] = RTK_PIN_CONFIG(emmc_clk, 0x14, 0, 0, 1, NA, 2, 12, NA),
2925 	[RTD1625_MAIN2_EMMC_CMD] = RTK_PIN_CONFIG(emmc_cmd, 0x14, 13, 0, 1, NA, 2, 13, NA),
2926 	[RTD1625_MAIN2_EMMC_DATA_0] = RTK_PIN_CONFIG(emmc_data_0, 0x18, 0, 0, 1, NA, 2, 12, NA),
2927 	[RTD1625_MAIN2_EMMC_DATA_1] = RTK_PIN_CONFIG(emmc_data_1, 0x18, 13, 0, 1, NA, 2, 12, NA),
2928 	[RTD1625_MAIN2_EMMC_DATA_2] = RTK_PIN_CONFIG(emmc_data_2, 0x1c, 0, 0, 1, NA, 2, 12, NA),
2929 	[RTD1625_MAIN2_EMMC_DATA_3] = RTK_PIN_CONFIG(emmc_data_3, 0x1c, 13, 0, 1, NA, 2, 12, NA),
2930 	[RTD1625_MAIN2_EMMC_DATA_4] = RTK_PIN_CONFIG(emmc_data_4, 0x20, 0, 0, 1, NA, 2, 12, NA),
2931 	[RTD1625_MAIN2_EMMC_DATA_5] = RTK_PIN_CONFIG(emmc_data_5, 0x20, 13, 0, 1, NA, 2, 12, NA),
2932 	[RTD1625_MAIN2_EMMC_DATA_6] = RTK_PIN_CONFIG(emmc_data_6, 0x24, 0, 0, 1, NA, 2, 12, NA),
2933 	[RTD1625_MAIN2_EMMC_DATA_7] = RTK_PIN_CONFIG(emmc_data_7, 0x24, 13, 0, 1, NA, 2, 12, NA),
2934 	[RTD1625_MAIN2_EMMC_DD_SB] = RTK_PIN_CONFIG(emmc_dd_sb, 0x28, 0, 0, 1, NA, 2, 12, NA),
2935 	[RTD1625_MAIN2_EMMC_RST_N] = RTK_PIN_CONFIG(emmc_rst_n, 0x28, 13, 0, 1, NA, 2, 12, NA),
2936 	[RTD1625_MAIN2_GPIO_14] = RTK_PIN_CONFIG(gpio_14, 0x28, 26, 1, 2, 0, NA, NA, PADDRI_4_8),
2937 	[RTD1625_MAIN2_GPIO_15] = RTK_PIN_CONFIG(gpio_15, 0x28, 29, 1, 2, 0, NA, NA, PADDRI_4_8),
2938 	[RTD1625_MAIN2_GPIO_20] = RTK_PIN_CONFIG_I2C(gpio_20, 0x2c, 0, 1, 2, 0, 3, 4, 5, 7, 8,
2939 						     PADDRI_4_8),
2940 	[RTD1625_MAIN2_GPIO_21] = RTK_PIN_CONFIG_I2C(gpio_21, 0x2c, 9, 1, 2, 0, 3, 4, 5, 7, 8,
2941 						     PADDRI_4_8),
2942 	[RTD1625_MAIN2_GPIO_22] = RTK_PIN_CONFIG_V2(gpio_22, 0x2c, 18, 1, 2, 0, 3, 7, 8,
2943 						     PADDRI_4_8),
2944 	[RTD1625_MAIN2_GPIO_40] = RTK_PIN_CONFIG(gpio_40, 0x30, 0, 0, 1, NA, 2, 12, NA),
2945 	[RTD1625_MAIN2_GPIO_41] = RTK_PIN_CONFIG(gpio_41, 0x30, 13, 0, 1, NA, 2, 12, NA),
2946 	[RTD1625_MAIN2_GPIO_64] = RTK_PIN_CONFIG(gpio_64, 0x34, 0, 0, 1, NA, 2, 12, NA),
2947 	[RTD1625_MAIN2_GPIO_65] = RTK_PIN_CONFIG(gpio_65, 0x34, 13, 0, 1, NA, 2, 12, NA),
2948 	[RTD1625_MAIN2_GPIO_66] = RTK_PIN_CONFIG(gpio_66, 0x38, 0, 0, 1, NA, 2, 12, NA),
2949 	[RTD1625_MAIN2_GPIO_67] = RTK_PIN_CONFIG(gpio_67, 0x38, 13, 0, 1, NA, 2, 12, NA),
2950 	[RTD1625_MAIN2_GPIO_80] = RTK_PIN_CONFIG(gpio_80, 0x38, 26, 1, 2, 0, NA, NA, PADDRI_4_8),
2951 	[RTD1625_MAIN2_GPIO_81] = RTK_PIN_CONFIG(gpio_81, 0x38, 29, 1, 2, 0, NA, NA, PADDRI_4_8),
2952 	[RTD1625_MAIN2_GPIO_82] = RTK_PIN_CONFIG(gpio_82, 0x3c, 0, 1, 2, 0, NA, NA, PADDRI_4_8),
2953 	[RTD1625_MAIN2_GPIO_83] = RTK_PIN_CONFIG(gpio_83, 0x3c, 3, 1, 2, 0, NA, NA, PADDRI_4_8),
2954 	[RTD1625_MAIN2_GPIO_84] = RTK_PIN_CONFIG(gpio_84, 0x3c, 6, 1, 2, 0, NA, NA, PADDRI_4_8),
2955 	[RTD1625_MAIN2_GPIO_85] = RTK_PIN_CONFIG(gpio_85, 0x3c, 9, 1, 2, NA, NA, NA, PADDRI_4_8),
2956 	[RTD1625_MAIN2_GPIO_86] = RTK_PIN_CONFIG(gpio_86, 0x3c, 12, 1, 2, NA, NA, NA, PADDRI_4_8),
2957 	[RTD1625_MAIN2_GPIO_87] = RTK_PIN_CONFIG(gpio_87, 0x3c, 22, 1, 2, NA, NA, NA, PADDRI_4_8),
2958 	[RTD1625_MAIN2_GPIO_88] = RTK_PIN_CONFIG(gpio_88, 0x40, 0, 1, 2, NA, NA, NA, PADDRI_4_8),
2959 	[RTD1625_MAIN2_GPIO_89] = RTK_PIN_CONFIG(gpio_89, 0x40, 10, 1, 2, NA, NA, NA, PADDRI_4_8),
2960 	[RTD1625_MAIN2_GPIO_90] = RTK_PIN_CONFIG(gpio_90, 0x40, 20, 1, 2, NA, NA, NA, PADDRI_4_8),
2961 	[RTD1625_MAIN2_GPIO_91] = RTK_PIN_CONFIG(gpio_91, 0x44, 0, 1, 2, NA, NA, NA, PADDRI_4_8),
2962 	[RTD1625_MAIN2_HIF_CLK] = RTK_PIN_CONFIG(hif_clk, 0x44, 10, 0, 1, NA, 2, 12, NA),
2963 	[RTD1625_MAIN2_HIF_DATA] = RTK_PIN_CONFIG(hif_data, 0x48, 0, 0, 1, NA, 2, 12, NA),
2964 	[RTD1625_MAIN2_HIF_EN] = RTK_PIN_CONFIG(hif_en, 0x48, 13, 0, 1, NA, 2, 12, NA),
2965 	[RTD1625_MAIN2_HIF_RDY] = RTK_PIN_CONFIG(hif_rdy, 0x4c, 0, 0, 1, NA, 2, 12, NA),
2966 };
2967 
2968 static const struct rtd_pin_sconfig_desc rtd1625_iso_sconfigs[] = {
2969 	RTK_PIN_SCONFIG(gpio_45, 0x24, 3, 3, 6, 3, 9, 3),
2970 	RTK_PIN_SCONFIG(gpio_46, 0x24, 16, 3, 19, 3, 22, 3),
2971 	RTK_PIN_SCONFIG(gpio_47, 0x28, 3, 3, 6, 3, 9, 3),
2972 	RTK_PIN_SCONFIG(gpio_48, 0x28, 16, 3, 19, 3, 22, 3),
2973 	RTK_PIN_SCONFIG(gpio_49, 0x2c, 3, 3, 6, 3, 9, 3),
2974 	RTK_PIN_SCONFIG(gpio_50, 0x2c, 16, 3, 19, 3, 22, 3),
2975 };
2976 
2977 static const struct rtd_pin_sconfig_desc rtd1625_main2_sconfigs[] = {
2978 	RTK_PIN_SCONFIG(emmc_clk, 0x14, 3, 3, 6, 3, 9, 3),
2979 	RTK_PIN_SCONFIG(emmc_cmd, 0x14, 16, 3, 19, 3, 22, 3),
2980 	RTK_PIN_SCONFIG(emmc_data_0, 0x18, 3, 3, 6, 3, 9, 3),
2981 	RTK_PIN_SCONFIG(emmc_data_1, 0x18, 16, 3, 19, 3, 22, 3),
2982 	RTK_PIN_SCONFIG(emmc_data_2, 0x1c, 3, 3, 6, 3, 9, 3),
2983 	RTK_PIN_SCONFIG(emmc_data_3, 0x1c, 16, 3, 19, 3, 22, 3),
2984 	RTK_PIN_SCONFIG(emmc_data_4, 0x20, 3, 3, 6, 3, 9, 3),
2985 	RTK_PIN_SCONFIG(emmc_data_5, 0x20, 16, 3, 19, 3, 22, 3),
2986 	RTK_PIN_SCONFIG(emmc_data_6, 0x24, 3, 3, 6, 3, 9, 3),
2987 	RTK_PIN_SCONFIG(emmc_data_7, 0x24, 16, 3, 19, 3, 22, 3),
2988 	RTK_PIN_SCONFIG(emmc_dd_sb, 0x28, 3, 3, 6, 3, 9, 3),
2989 	RTK_PIN_SCONFIG(emmc_rst_n, 0x28, 16, 3, 19, 3, 22, 3),
2990 	RTK_PIN_SCONFIG(gpio_40, 0x30, 3, 3, 6, 3, 9, 3),
2991 	RTK_PIN_SCONFIG(gpio_41, 0x30, 16, 3, 19, 3, 22, 3),
2992 	RTK_PIN_SCONFIG(gpio_64, 0x34, 3, 3, 6, 3, 9, 3),
2993 	RTK_PIN_SCONFIG(gpio_65, 0x34, 16, 3, 19, 3, 22, 3),
2994 	RTK_PIN_SCONFIG(gpio_66, 0x38, 3, 3, 6, 3, 9, 3),
2995 	RTK_PIN_SCONFIG(gpio_67, 0x38, 16, 3, 19, 3, 22, 3),
2996 	RTK_PIN_SCONFIG(gpio_86, 0x3c, 0, 0, 14, 4, 18, 4),
2997 	RTK_PIN_SCONFIG(gpio_87, 0x3c, 0, 0, 24, 4, 28, 4),
2998 	RTK_PIN_SCONFIG(gpio_88, 0x40, 0, 0, 2, 4, 6, 4),
2999 	RTK_PIN_SCONFIG(gpio_89, 0x40, 0, 0, 12, 4, 16, 4),
3000 	RTK_PIN_SCONFIG(gpio_90, 0x40, 0, 0, 22, 4, 26, 4),
3001 	RTK_PIN_SCONFIG(gpio_91, 0x44, 0, 0, 2, 4, 6, 4),
3002 	RTK_PIN_SCONFIG(hif_clk, 0x44, 13, 3, 16, 3, 19, 3),
3003 	RTK_PIN_SCONFIG(hif_data, 0x48, 3, 3, 6, 3, 9, 3),
3004 	RTK_PIN_SCONFIG(hif_en, 0x48, 16, 3, 19, 3, 22, 3),
3005 	RTK_PIN_SCONFIG(hif_rdy, 0x4c, 3, 3, 6, 3, 9, 3),
3006 };
3007 
3008 static const struct rtd_reg_range rtd1625_iso_reg_ranges[] = {
3009 	{ .offset = 0x0,  .len = 0x58 },
3010 	{ .offset = 0x120, .len = 0x10 },
3011 	{ .offset = 0x180, .len = 0xc },
3012 	{ .offset = 0x1A0, .len = 0xc },
3013 };
3014 
3015 static const struct rtd_pin_range rtd1625_iso_pin_ranges = {
3016 	.ranges = rtd1625_iso_reg_ranges,
3017 	.num_ranges = ARRAY_SIZE(rtd1625_iso_reg_ranges),
3018 };
3019 
3020 static const struct rtd_reg_range rtd1625_isom_reg_ranges[] = {
3021 	{ .offset = 0x0,  .len = 0xc },
3022 	{ .offset = 0x30, .len = 0x4 },
3023 };
3024 
3025 static const struct rtd_pin_range rtd1625_isom_pin_ranges = {
3026 	.ranges = rtd1625_isom_reg_ranges,
3027 	.num_ranges = ARRAY_SIZE(rtd1625_isom_reg_ranges),
3028 };
3029 
3030 static const struct rtd_reg_range rtd1625_ve4_reg_ranges[] = {
3031 	{ .offset = 0x0,  .len = 0x48 },
3032 	{ .offset = 0x80, .len = 0x4 },
3033 };
3034 
3035 static const struct rtd_pin_range rtd1625_ve4_pin_ranges = {
3036 	.ranges = rtd1625_ve4_reg_ranges,
3037 	.num_ranges = ARRAY_SIZE(rtd1625_ve4_reg_ranges),
3038 };
3039 
3040 static const struct rtd_reg_range rtd1625_main2_reg_ranges[] = {
3041 	{ .offset = 0x0,  .len = 0x50 },
3042 };
3043 
3044 static const struct rtd_pin_range rtd1625_main2_pin_ranges = {
3045 	.ranges = rtd1625_main2_reg_ranges,
3046 	.num_ranges = ARRAY_SIZE(rtd1625_main2_reg_ranges),
3047 };
3048 
3049 static const struct rtd_pinctrl_desc rtd1625_iso_pinctrl_desc = {
3050 	.pins = rtd1625_iso_pins,
3051 	.num_pins = ARRAY_SIZE(rtd1625_iso_pins),
3052 	.groups = rtd1625_iso_pin_groups,
3053 	.num_groups = ARRAY_SIZE(rtd1625_iso_pin_groups),
3054 	.functions = rtd1625_iso_pin_functions,
3055 	.num_functions = ARRAY_SIZE(rtd1625_iso_pin_functions),
3056 	.muxes = rtd1625_iso_muxes,
3057 	.num_muxes = ARRAY_SIZE(rtd1625_iso_muxes),
3058 	.configs = rtd1625_iso_configs,
3059 	.num_configs = ARRAY_SIZE(rtd1625_iso_configs),
3060 	.sconfigs = rtd1625_iso_sconfigs,
3061 	.num_sconfigs = ARRAY_SIZE(rtd1625_iso_sconfigs),
3062 	.pin_range = &rtd1625_iso_pin_ranges,
3063 };
3064 
3065 static const struct rtd_pinctrl_desc rtd1625_isom_pinctrl_desc = {
3066 	.pins = rtd1625_isom_pins,
3067 	.num_pins = ARRAY_SIZE(rtd1625_isom_pins),
3068 	.groups = rtd1625_isom_pin_groups,
3069 	.num_groups = ARRAY_SIZE(rtd1625_isom_pin_groups),
3070 	.functions = rtd1625_isom_pin_functions,
3071 	.num_functions = ARRAY_SIZE(rtd1625_isom_pin_functions),
3072 	.muxes = rtd1625_isom_muxes,
3073 	.num_muxes = ARRAY_SIZE(rtd1625_isom_muxes),
3074 	.configs = rtd1625_isom_configs,
3075 	.num_configs = ARRAY_SIZE(rtd1625_isom_configs),
3076 	.pin_range = &rtd1625_isom_pin_ranges,
3077 };
3078 
3079 static const struct rtd_pinctrl_desc rtd1625_ve4_pinctrl_desc = {
3080 	.pins = rtd1625_ve4_pins,
3081 	.num_pins = ARRAY_SIZE(rtd1625_ve4_pins),
3082 	.groups = rtd1625_ve4_pin_groups,
3083 	.num_groups = ARRAY_SIZE(rtd1625_ve4_pin_groups),
3084 	.functions = rtd1625_ve4_pin_functions,
3085 	.num_functions = ARRAY_SIZE(rtd1625_ve4_pin_functions),
3086 	.muxes = rtd1625_ve4_muxes,
3087 	.num_muxes = ARRAY_SIZE(rtd1625_ve4_muxes),
3088 	.configs = rtd1625_ve4_configs,
3089 	.num_configs = ARRAY_SIZE(rtd1625_ve4_configs),
3090 	.pin_range = &rtd1625_ve4_pin_ranges,
3091 };
3092 
3093 static const struct rtd_pinctrl_desc rtd1625_main2_pinctrl_desc = {
3094 	.pins = rtd1625_main2_pins,
3095 	.num_pins = ARRAY_SIZE(rtd1625_main2_pins),
3096 	.groups = rtd1625_main2_pin_groups,
3097 	.num_groups = ARRAY_SIZE(rtd1625_main2_pin_groups),
3098 	.functions = rtd1625_main2_pin_functions,
3099 	.num_functions = ARRAY_SIZE(rtd1625_main2_pin_functions),
3100 	.muxes = rtd1625_main2_muxes,
3101 	.num_muxes = ARRAY_SIZE(rtd1625_main2_muxes),
3102 	.configs = rtd1625_main2_configs,
3103 	.num_configs = ARRAY_SIZE(rtd1625_main2_configs),
3104 	.sconfigs = rtd1625_main2_sconfigs,
3105 	.num_sconfigs = ARRAY_SIZE(rtd1625_main2_sconfigs),
3106 	.pin_range = &rtd1625_main2_pin_ranges,
3107 };
3108 
3109 static int rtd1625_pinctrl_probe(struct platform_device *pdev)
3110 {
3111 	const struct rtd_pinctrl_desc *desc = device_get_match_data(&pdev->dev);
3112 
3113 	return rtd_pinctrl_probe(pdev, desc);
3114 }
3115 
3116 static const struct of_device_id rtd1625_pinctrl_of_match[] = {
3117 	{.compatible = "realtek,rtd1625-iso-pinctrl", .data = &rtd1625_iso_pinctrl_desc},
3118 	{.compatible = "realtek,rtd1625-isom-pinctrl", .data = &rtd1625_isom_pinctrl_desc},
3119 	{.compatible = "realtek,rtd1625-ve4-pinctrl", .data = &rtd1625_ve4_pinctrl_desc},
3120 	{.compatible = "realtek,rtd1625-main2-pinctrl", .data = &rtd1625_main2_pinctrl_desc},
3121 	{},
3122 };
3123 MODULE_DEVICE_TABLE(of, rtd1625_pinctrl_of_match);
3124 
3125 static struct platform_driver rtd1625_pinctrl_driver = {
3126 	.driver = {
3127 		.name = "rtd1625-pinctrl",
3128 		.of_match_table = rtd1625_pinctrl_of_match,
3129 		.pm = &realtek_pinctrl_pm_ops,
3130 	},
3131 	.probe = rtd1625_pinctrl_probe,
3132 };
3133 
3134 module_platform_driver(rtd1625_pinctrl_driver);
3135 
3136 MODULE_LICENSE("GPL");
3137 MODULE_AUTHOR("Realtek Semiconductor Corporation");
3138 MODULE_DESCRIPTION("Realtek DHC SoC RTD1625 pinctrl driver");
3139